WO2009054414A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- WO2009054414A1 WO2009054414A1 PCT/JP2008/069149 JP2008069149W WO2009054414A1 WO 2009054414 A1 WO2009054414 A1 WO 2009054414A1 JP 2008069149 W JP2008069149 W JP 2008069149W WO 2009054414 A1 WO2009054414 A1 WO 2009054414A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor element
- semiconductor device
- insulating layer
- embedding
- fan
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01038—Strontium [Sr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0104—Zirconium [Zr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01041—Niobium [Nb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01056—Barium [Ba]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01073—Tantalum [Ta]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Wire Bonding (AREA)
Abstract
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009538235A JP5644107B2 (ja) | 2007-10-22 | 2008-10-22 | 半導体装置 |
CN2008801126601A CN101836289B (zh) | 2007-10-22 | 2008-10-22 | 半导体装置 |
US12/739,302 US8344498B2 (en) | 2007-10-22 | 2008-10-22 | Semiconductor device |
US13/687,594 US20130087927A1 (en) | 2007-10-22 | 2012-11-28 | Multimedia providing service |
US14/468,522 US20140367863A1 (en) | 2007-10-22 | 2014-08-26 | Semiconductor device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007273929 | 2007-10-22 | ||
JP2007-273929 | 2007-10-22 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/739,302 A-371-Of-International US8344498B2 (en) | 2007-10-22 | 2008-10-22 | Semiconductor device |
US13/687,594 Division US20130087927A1 (en) | 2007-10-22 | 2012-11-28 | Multimedia providing service |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2009054414A1 true WO2009054414A1 (ja) | 2009-04-30 |
Family
ID=40579518
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/069149 WO2009054414A1 (ja) | 2007-10-22 | 2008-10-22 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (3) | US8344498B2 (ja) |
JP (1) | JP5644107B2 (ja) |
CN (1) | CN101836289B (ja) |
WO (1) | WO2009054414A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2013057867A1 (ja) * | 2011-10-21 | 2015-04-02 | パナソニック株式会社 | 半導体装置 |
KR20160025892A (ko) * | 2014-08-28 | 2016-03-09 | 삼성전자주식회사 | 반도체 패키지 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI476479B (zh) * | 2012-06-21 | 2015-03-11 | Au Optronics Corp | 扇出線路 |
FI130299B (en) * | 2017-12-28 | 2023-06-09 | Ledfoil Finland Oy | DISPLAY STRUCTURE SUITABLE FOR ICE AND OUTDOOR USE |
KR20210044055A (ko) * | 2019-10-14 | 2021-04-22 | 삼성전자주식회사 | 발광 다이오드 모듈 및 이를 포함하는 디스플레이 장치 |
CN112652573A (zh) * | 2020-12-07 | 2021-04-13 | 海光信息技术股份有限公司 | 一种封装方法及芯片 |
CN114400214B (zh) * | 2022-01-07 | 2023-02-10 | 广东气派科技有限公司 | 一种改善Flip chip晶圆电路层裂纹的方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11126951A (ja) * | 1997-10-24 | 1999-05-11 | Murata Mach Ltd | 印刷回路基板およびその製造方法 |
JP2001015650A (ja) * | 1999-06-29 | 2001-01-19 | Nec Corp | ボールグリッドアレイパッケージとその製造方法 |
JP2003046028A (ja) * | 2001-07-27 | 2003-02-14 | Ibiden Co Ltd | 多層プリント配線板の製造方法 |
JP2005005548A (ja) * | 2003-06-13 | 2005-01-06 | Sony Corp | 半導体装置及びその実装構造、並びにその製造方法 |
JP2005108898A (ja) * | 2003-09-26 | 2005-04-21 | Oki Electric Ind Co Ltd | 半導体装置内蔵基板及びその製造方法 |
JP2006245076A (ja) * | 2005-03-01 | 2006-09-14 | Matsushita Electric Ind Co Ltd | 半導体装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5583377A (en) * | 1992-07-15 | 1996-12-10 | Motorola, Inc. | Pad array semiconductor device having a heat sink with die receiving cavity |
KR100315030B1 (ko) * | 1998-12-29 | 2002-04-24 | 박종섭 | 반도체패키지의제조방법 |
US6239489B1 (en) * | 1999-07-30 | 2001-05-29 | Micron Technology, Inc. | Reinforcement of lead bonding in microelectronics packages |
JP2002141636A (ja) | 2000-11-06 | 2002-05-17 | Toray Eng Co Ltd | 電子部品埋込み実装用基板及びその製造方法 |
JP2004200243A (ja) | 2002-12-16 | 2004-07-15 | Kyocera Corp | 半導体素子収納用パッケージおよび半導体装置 |
JP2007134569A (ja) | 2005-11-11 | 2007-05-31 | Sony Corp | 電子部品内蔵基板及びその製造方法 |
-
2008
- 2008-10-22 US US12/739,302 patent/US8344498B2/en active Active
- 2008-10-22 WO PCT/JP2008/069149 patent/WO2009054414A1/ja active Application Filing
- 2008-10-22 CN CN2008801126601A patent/CN101836289B/zh active Active
- 2008-10-22 JP JP2009538235A patent/JP5644107B2/ja active Active
-
2012
- 2012-11-28 US US13/687,594 patent/US20130087927A1/en not_active Abandoned
-
2014
- 2014-08-26 US US14/468,522 patent/US20140367863A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11126951A (ja) * | 1997-10-24 | 1999-05-11 | Murata Mach Ltd | 印刷回路基板およびその製造方法 |
JP2001015650A (ja) * | 1999-06-29 | 2001-01-19 | Nec Corp | ボールグリッドアレイパッケージとその製造方法 |
JP2003046028A (ja) * | 2001-07-27 | 2003-02-14 | Ibiden Co Ltd | 多層プリント配線板の製造方法 |
JP2005005548A (ja) * | 2003-06-13 | 2005-01-06 | Sony Corp | 半導体装置及びその実装構造、並びにその製造方法 |
JP2005108898A (ja) * | 2003-09-26 | 2005-04-21 | Oki Electric Ind Co Ltd | 半導体装置内蔵基板及びその製造方法 |
JP2006245076A (ja) * | 2005-03-01 | 2006-09-14 | Matsushita Electric Ind Co Ltd | 半導体装置 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2013057867A1 (ja) * | 2011-10-21 | 2015-04-02 | パナソニック株式会社 | 半導体装置 |
KR20160025892A (ko) * | 2014-08-28 | 2016-03-09 | 삼성전자주식회사 | 반도체 패키지 |
KR102284652B1 (ko) * | 2014-08-28 | 2021-08-02 | 삼성전자 주식회사 | 반도체 패키지 |
Also Published As
Publication number | Publication date |
---|---|
US20100244231A1 (en) | 2010-09-30 |
US8344498B2 (en) | 2013-01-01 |
CN101836289B (zh) | 2012-07-18 |
JPWO2009054414A1 (ja) | 2011-03-03 |
JP5644107B2 (ja) | 2014-12-24 |
US20130087927A1 (en) | 2013-04-11 |
US20140367863A1 (en) | 2014-12-18 |
CN101836289A (zh) | 2010-09-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2009054414A1 (ja) | 半導体装置 | |
TW200833200A (en) | Wiring board and method of manufacturing the same | |
JP2013062474A5 (ja) | 配線基板及び配線基板の製造方法と半導体装置及び半導体装置の製造方法 | |
EP1976001A3 (en) | Method for manufacturing semiconductor device | |
SG151166A1 (en) | Semiconductor wafer having through-hole vias on saw streets with backside redistibution layer | |
WO2008105437A1 (ja) | 半導体装置、リードフレームおよび半導体装置の製造方法 | |
JP2011119502A5 (ja) | ||
TW200746323A (en) | Semiconductor device, manufacturing method of the semiconductor device, and mounting method of the semiconductor device | |
TW200744173A (en) | Semiconductor device and its manufacturing method | |
TW200644135A (en) | Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure | |
WO2008117383A1 (ja) | 電子装置、電子装置が実装された電子機器、電子装置が装着された物品、および電子装置の製造方法 | |
JP2013197382A5 (ja) | ||
TW200802972A (en) | GaN-based semiconductor light-emitting device and method for the fabrication thereof | |
JP2014010131A5 (ja) | ||
JP2009141041A5 (ja) | ||
JP2013254830A5 (ja) | ||
WO2008126468A1 (ja) | 半導体装置及び半導体装置の製造方法 | |
TW200711081A (en) | A method of manufacturing a semiconductor packages and packages made | |
WO2010008689A3 (en) | Embedded die package and process flow using a pre-molded carrier | |
WO2010096213A3 (en) | Integrated circuit micro-module | |
TW200717672A (en) | Method of manufacturing wiring board | |
WO2007133302A3 (en) | Semiconductor components and systems having encapsulated through wire interconnects (twi) and wafer level methods of fabrication | |
JP2010147153A5 (ja) | ||
JP2014022618A5 (ja) | ||
TW200737408A (en) | Semiconductor device and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200880112660.1 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 08841642 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2009538235 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 12739302 Country of ref document: US |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 08841642 Country of ref document: EP Kind code of ref document: A1 |