WO2009044480A1 - 情報処理装置、記憶部制御装置、記憶部制御方法 - Google Patents

情報処理装置、記憶部制御装置、記憶部制御方法 Download PDF

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Publication number
WO2009044480A1
WO2009044480A1 PCT/JP2007/069573 JP2007069573W WO2009044480A1 WO 2009044480 A1 WO2009044480 A1 WO 2009044480A1 JP 2007069573 W JP2007069573 W JP 2007069573W WO 2009044480 A1 WO2009044480 A1 WO 2009044480A1
Authority
WO
WIPO (PCT)
Prior art keywords
storage section
section control
cells
information processor
refresh
Prior art date
Application number
PCT/JP2007/069573
Other languages
English (en)
French (fr)
Inventor
Kazunori Kasuga
Osamu Ishibashi
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to CN200780100886.5A priority Critical patent/CN101809670B/zh
Priority to JP2009535938A priority patent/JP5146457B2/ja
Priority to KR1020107006264A priority patent/KR101098128B1/ko
Priority to PCT/JP2007/069573 priority patent/WO2009044480A1/ja
Publication of WO2009044480A1 publication Critical patent/WO2009044480A1/ja
Priority to US12/731,400 priority patent/US8473674B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618—Refresh operations over multiple banks or interleaving
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40622—Partial refresh of memory arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4061—Calibration or ate or cycle tuning
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4065—Low level details of refresh operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)

Abstract

　データを記憶する複数のセルからなる第１記憶部２と、前記複数のセルそれぞれに対するリフレッシュ間隔とリフレッシュ動作実施状況とを保持する第２記憶部３と、第２記憶部に保持されるリフレッシュ間隔とリフレッシュ動作実施状況とに基づいて前記セルそれぞれに対しリフレッシュ動作を制御する制御部とを備え、セルそれぞれに対し設けられたリフレッシュ間隔でそれぞれのセルに対しリフレッシュ動作を制御する情報処理装置１を提供する。
PCT/JP2007/069573 2007-10-05 2007-10-05 情報処理装置、記憶部制御装置、記憶部制御方法 WO2009044480A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN200780100886.5A CN101809670B (zh) 2007-10-05 2007-10-05 信息处理装置、存储部控制装置、存储部控制方法
JP2009535938A JP5146457B2 (ja) 2007-10-05 2007-10-05 情報処理装置、記憶部制御装置、記憶部制御方法
KR1020107006264A KR101098128B1 (ko) 2007-10-05 2007-10-05 정보 처리 장치, 기억부 제어 장치 및 기억부 제어 방법
PCT/JP2007/069573 WO2009044480A1 (ja) 2007-10-05 2007-10-05 情報処理装置、記憶部制御装置、記憶部制御方法
US12/731,400 US8473674B2 (en) 2007-10-05 2010-03-25 Information processing device including a plurality of cells to store data, storage control device that controls a storage section including a plurality of cells to store data, and storage control method of controlling a refresh operation of a storage section including a plurality of cells to store data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/069573 WO2009044480A1 (ja) 2007-10-05 2007-10-05 情報処理装置、記憶部制御装置、記憶部制御方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/731,400 Continuation US8473674B2 (en) 2007-10-05 2010-03-25 Information processing device including a plurality of cells to store data, storage control device that controls a storage section including a plurality of cells to store data, and storage control method of controlling a refresh operation of a storage section including a plurality of cells to store data

Publications (1)

Publication Number Publication Date
WO2009044480A1 true WO2009044480A1 (ja) 2009-04-09

Family

ID=40525913

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/069573 WO2009044480A1 (ja) 2007-10-05 2007-10-05 情報処理装置、記憶部制御装置、記憶部制御方法

Country Status (5)

Country Link
US (1) US8473674B2 (ja)
JP (1) JP5146457B2 (ja)
KR (1) KR101098128B1 (ja)
CN (1) CN101809670B (ja)
WO (1) WO2009044480A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111798915A (zh) * 2019-04-02 2020-10-20 爱思开海力士有限公司 存储器系统及其操作方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104239220B (zh) * 2013-06-13 2017-11-24 华为技术有限公司 存储器刷新处理方法和装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07169268A (ja) * 1993-12-13 1995-07-04 Hitachi Ltd 半導体記憶装置
JPH08306184A (ja) * 1995-03-03 1996-11-22 Hitachi Ltd ダイナミック型ｒａｍとメモリモジュール及びそのリフレッシュ方法
JPH09102193A (ja) * 1995-10-04 1997-04-15 Mitsubishi Electric Corp 半導体記憶装置
JP2005222593A (ja) * 2004-02-04 2005-08-18 Elpida Memory Inc 半導体記憶装置および半導体記憶装置のリフレッシュ方法

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US4142233A (en) * 1975-10-30 1979-02-27 Tokyo Shibaura Electric Co., Ltd. Refreshing system for dynamic memory
US4933907A (en) * 1987-12-03 1990-06-12 Mitsubishi Denki Kabushiki Kaisha Dynamic random access memory device and operating method therefor
JPH0366092A (ja) * 1989-08-04 1991-03-20 Fujitsu Ltd 半導体メモリ装置
JP2794138B2 (ja) * 1991-08-13 1998-09-03 三菱電機株式会社 半導体記憶装置
JPH0660647A (ja) * 1992-08-10 1994-03-04 Hitachi Ltd 半導体記憶システム
JPH07176185A (ja) 1993-12-20 1995-07-14 Canon Inc リフレッシュ制御装置
JPH09106674A (ja) * 1995-10-12 1997-04-22 Fujitsu Ltd 同期型ダイナミック半導体記憶装置
US5784548A (en) * 1996-03-08 1998-07-21 Mylex Corporation Modular mirrored cache memory battery backup system
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JP2004030738A (ja) * 2002-06-24 2004-01-29 Toshiba Corp ダイナミック型半導体メモリ装置
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07169268A (ja) * 1993-12-13 1995-07-04 Hitachi Ltd 半導体記憶装置
JPH08306184A (ja) * 1995-03-03 1996-11-22 Hitachi Ltd ダイナミック型ｒａｍとメモリモジュール及びそのリフレッシュ方法
JPH09102193A (ja) * 1995-10-04 1997-04-15 Mitsubishi Electric Corp 半導体記憶装置
JP2005222593A (ja) * 2004-02-04 2005-08-18 Elpida Memory Inc 半導体記憶装置および半導体記憶装置のリフレッシュ方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111798915A (zh) * 2019-04-02 2020-10-20 爱思开海力士有限公司 存储器系统及其操作方法
CN111798915B (zh) * 2019-04-02 2023-09-15 爱思开海力士有限公司 存储器系统及其操作方法

Also Published As

Publication number Publication date
US8473674B2 (en) 2013-06-25
KR101098128B1 (ko) 2011-12-26
CN101809670B (zh) 2014-03-05
JP5146457B2 (ja) 2013-02-20
KR20100057662A (ko) 2010-05-31
CN101809670A (zh) 2010-08-18
US20100180152A1 (en) 2010-07-15
JPWO2009044480A1 (ja) 2011-02-03

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