WO2008104950A1 - Printed circuit board with a blind hole for mounting a component - Google Patents

Printed circuit board with a blind hole for mounting a component Download PDF

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Publication number
WO2008104950A1
WO2008104950A1 PCT/IB2008/050724 IB2008050724W WO2008104950A1 WO 2008104950 A1 WO2008104950 A1 WO 2008104950A1 IB 2008050724 W IB2008050724 W IB 2008050724W WO 2008104950 A1 WO2008104950 A1 WO 2008104950A1
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WO
Grant status
Application
Patent type
Prior art keywords
layer
hole
surface
pcb
arranged
Prior art date
Application number
PCT/IB2008/050724
Other languages
French (fr)
Inventor
Tertholen Onno Van
Gerrit Nieboer
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • H05K1/116Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09436Pads or lands on permanent coating which covers the other conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Other shape and layout details not provided for in H05K2201/09009 - H05K2201/09209; Shape and layout details covering several of these groups
    • H05K2201/09827Tapered, e.g. tapered hole, via or groove
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Other shape and layout details not provided for in H05K2201/09009 - H05K2201/09209; Shape and layout details covering several of these groups
    • H05K2201/09854Hole or via having special cross-section, e.g. elliptical
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742Details of leads
    • H05K2201/1075Shape details
    • H05K2201/10757Bent leads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/063Lamination of preperforated insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • Y02P70/60Greenhouse gas [GHG] capture, heat recovery or other energy efficient measures relating to production or assembly of electric or electronic components or products, e.g. motor control
    • Y02P70/613Greenhouse gas [GHG] capture, heat recovery or other energy efficient measures relating to production or assembly of electric or electronic components or products, e.g. motor control involving the assembly of several electronic elements

Abstract

In a printed circuit board, PCB (10, 30), a number of blind holes (16, 42, 44) are provided for soldering an end of a lead (20) of a component without the end of the lead extending through the PCB. Thus, a substantially flat surface is obtained. The substantially flat surface allows for good thermal contact with a heatsink and/or for miniaturization purposes. In order to allow use of common manufacturing methods the PCB according to the present invention comprises a first layer (12) and a second layer (14) arranged at a first surface (12A) of the first layer. An electrically conductive trace (18) is arranged on the first layer. The hole is arranged in the first layer, wherein the hole extends from the electrically conductive trace through the first layer, the hole being closed at the first surface of the first layer by the second layer. The hole is configured for accommodating an end of the lead and electrically connecting the lead and the trace.

Description

Printed circuit board with a blind hole for mounting a component

FIELD OF THE INVENTION

The present invention relates to a printed circuit board (PCB) and a method for manufacturing such a printed circuit board. Further, the present invention relates to a method for mounting, in particular soldering, an electrical component on such a printed circuit board, and more in particular the present invention relates to a layered printed circuit board comprising at least two layers.

BACKGROUND OF THE INVENTION

It is well known to mount electrical components of an electrical circuit on a printed circuit board (PCB). Many electrical components have leads that are used to mount the components on the PCB. Conventionally, the component is positioned at a first side of the PCB. The leads protrude the PCB and the leads are soldered at an opposite second side of the PCB to a conductive trace, or the like.

The above-described method of mounting a leaded component on a PCB results in a problem with respect to miniaturization and heat transfer. With respect to miniaturization, it is known to mount leaded components at the second side and SMD components at the first side of the PCB. Soldering is then performed by wave soldering leaded components and SMD components. However, this known method limits miniaturization due to more fine-pitched SMD components. Reflow soldering of components could break through this barrier, but is not suitable to be used with this known PCB. Further, a conventional PCB containing protruding leads needs an insulating layer or sheet at a certain distance in order to prevent a flash-over voltage or an undesired electrical contact to the housing or other electrically conductive materials.

With respect to the heat transfer, the protruding leads make it difficult to provide a suitable thermal contact between a component and a heatsink. Due to the protruding leads, a heatsink is arranged at a certain distance from the surface of the PCB having an insulating layer of air, or the like, therebetween.

In JP 09-051160 A a brazing method for mounting an electrical component on a printed board is disclosed. The board is provided with a blind hole, in which a brazing powder is provided. A terminal of a component is then inserted into the hole. The brazing material is subsequently melted using laser light. Thus, a PCB having a flat second surface is obtained, thereby overcoming the above problems. However, a disadvantage of such a method is the difficult and relatively expensive soldering method that is required, compared to known and commonly used soldering methods, such as wave soldering and reflow soldering. A disadvantage of the board used by the method is the blind hole arranged in a single layer. The hole made in a single layer requires an expensive manufacturing method compared to the commonly used methods and devices for making a PCB. In the common methods, the holes are through holes, allowing to be made by drilling a hole through a stack of a number of PCBs. Making a blind hole in a single layer requires a drilling operation per PCB instead of one drilling operation per stack of PCBs.

OBJECT OF THE INVENTION

It is desirable to have a PCB having blind holes on which leaded components may be soldered using well-known and commonly used prior art soldering methods, and which PCB may be manufactured using well-known and commonly used prior art manufacturing methods.

SUMMARY OF THE INVENTION The present invention is embodied in a PCB according to claim 1 , a manufacturing method according to claim 10 and a component mounting method according to claim 14.

The PCB comprises at least two layers. A first layer may be regarded as a base layer, such as a FR4 epoxy layer, as well known in the art. A second layer is an additional layer arranged at a first surface of the first layer. On the first layer, at the first surface or at a second surface opposite to the first surface, is at least one trace of a conductive material such as copper arranged. From the conductive trace a hole is extending through the first layer. The second layer closes the hole at the first surface of the first layer. Thus, a blind hole is provided. Advantageously, the PCB according to the present invention allows to use reflow soldering for soldering leaded components without exposing the leaded components to excessive heat.

As it is known in the art to manufacture multi-layered PCB's, the PCB according to the present invention may be manufactured using well-known and commonly used methods. Only a sequence of manufacturing steps may need to be changed. Instead of first arranging the second layer on a surface of the first layer and then making a hole, first a hole is made in the first layer and thereafter the second layer is provided.

The second layer may be a prepreg layer, as such a prepreg layer is commonly used in the manufacturing of PCB's. However, the second layer may be made of other suitable materials. Preferably, the first and the second layer are of a similar material suitable for growing an electrically conductive material on the first and the second layer.

The hole in the PCB according to the present invention has an inner surface. In an embodiment, on at least a part of the inner surface of the hole, an electrically conductive material may be provided, which allows for a stronger adhering of a lead in the hole after soldering. Preferably, the conductive material, such as copper, is electrically connected to the conductive trace at the second surface of the first layer such that a good electrical contact may be obtained.

For soldering the end of a lead in the hole, a solder paste may be provided over at least a part of the conductive trace and/or over or in the hole. By heating the solder paste and inserting the end of the lead, the lead may be soldered thereby accommodating the lead in the hole while providing an electrical connection between the lead and the conductive trace. Prior to soldering, an end of a lead may be held in a hole using a suitable material like a suitable adhesive. Such an adhesive may be provided in the hole or may be provided on the lead prior to positioning the end of the lead in the hole.

In an embodiment, for good heat transfer, a heatsink may be arranged at the free surface of the second layer. The heatsink is thus enabled to have a good thermal contact, since the second layer is flat, i.e. without soldered lead ends protruding through and extending from the PCB, while the electronic circuit is sufficiently insulated from ground and other circuitry. Moreover, due to the electrical insulation, the heatsink may be the housing of the circuit board.

In an embodiment, for miniaturization, the PCB according to the present invention may be double sided. In such a case, the PCB may have a third layer. Thus, in such an embodiment, the PCB comprises the first layer, a first surface of the first layer being arranged at a first surface of the second layer; a third layer, a first surface of the third layer being arranged at a second surface of the second layer, and a first conductive trace arranged at the second surface of the first layer and a second conductive trace arranged at the second surface of the third layer. A first hole extends from the first conductive trace to the second layer and a second hole extends from the second conductive trace to the second layer, each hole being closed by the second layer. Hence, two separate circuits may be arranged on a single PCB.

It is noted that in accordance with the present invention the electrically conductive traces may be arranged on the outer surface of the first layer or may be arranged on the surface arranged on the second layer. In the latter embodiment, the conductive traces are arranged between the first and the second layer. Moreover, on both surfaces conductive traces may be arranged. The blind holes for accommodating an end of a lead of a component may be used to connect the traces at the first surface and the traces at the second surface.

BRIEF DESCRIPTION OF THE DRAWINGS

Hereinafter the present invention is elucidated in more detail with reference to the appended drawings illustrating non-limiting embodiments, wherein

Fig. IA shows a schematical view of a cross-section of an embodiment of a PCB according to the present invention; Fig. IB - 1C show in cross-section an embodiment of a method for connecting a lead in a hole of the embodiment of the PCB according to Fig. IA;

Fig. 2 A - 2D schematically illustrate an embodiment of a method for manufacturing a PCB according to Fig. IA;

Fig. 3 A - 3D schematically illustrate an embodiment of a method for manufacturing a PCB according to Fig. IA;

Fig. 4 schematically illustrates a second embodiment of a PCB according to the present invention;

Fig. 5A - 5B schematically show in cross-section a third and a fourth embodiment of a PCB according to the present invention, respectively; and Fig. 5 C schematically shows in cross-section a fifth embodiment of a PCB according to the present invention.

DETAILED DESCRIPTION OF EXAMPLES

In the drawings, same reference numerals refer to same or similar elements. In Fig. IA, a layered PCB 10 is shown. The PCB comprises a first layer 12 and a second layer 14. The first layer 12 has a first surface 12A and a second surface 12B. The second layer 14 has a first surface 14A and a second surface 14B.

A hole 16 is present in the first layer 12. At the first surface 12A of the first layer 12, the hole 16 is closed by the first surface 14A of the second layer 14. Thus, a blind hole is constructed. The hole 16 has an inner surface 16 A. On the first surface 12A of the first layer 12, a trace 18 of electrically conductive material is arranged. The electrically conductive material extends into the hole 16 and a layer of the electrically conductive material is arranged on the inner surface 16A of the hole 16. Usually, the electrically conductive material is copper, but other materials may be used as well. The traces 18 may be manufactured in accordance with the prior art, e.g. by arranging a layer of copper on the second surface 12B of the first layer 12 and then etching the copper layer such that the desired trace pattern results.

The first layer 12 may be made of a commonly known and used material such as an epoxy material known as FR4 or any other suitable material. The second layer 14 may be made of a commonly known and used material for adhering a number of layers of a PCB, such as a prepreg material. However, other materials may be used as well. Thus, the second layer 14 may as well be made of a FR4 epoxy material, for example. The material of the first layer 12 and the second layer 14 may be selected depending on the application of the PCB 10.

The hole 16 of the PCB 10 as shown in Fig. IA is suitable for accommodating an end of a lead of an electrical component. The end of the lead does not extend through the PCB 10 and hence, the second surface 14B of the second layer 14 remains substantially flat after components have been arranged at the second surface 12B of the first layer 12. The substantially flat surface allows a good thermal contact with a heatsink, for example. If a heatsink is to be arranged at the second surface 14B of the second layer 14, the material of the second layer 14 may be selected to have a good thermal conductivity. Without the electrically conductive ends extending through the PCB 10, another electrical circuit may be positioned near the second surface 14B of the second layer 14 without conventional problems such as a possibility of a short circuit or a flash-over. Thus, a PCB according to the present invention further enables miniaturization. For such miniaturization, the material of the second layer 14 may be selected to be a good electrical insulator.

In Fig. IB - 1C an embodiment of a method of accommodating an end of a lead 20 in the hole 16 is illustrated. As a first step, a layer of solder paste 22 is arranged over the electrically conductive trace 18 and over the hole 16, as illustrated in Fig. IB. Heating the solder paste 22 and inserting the end of the lead 20 in the hole 16 results in the lead being soldered in the hole 16 as illustrated in Fig. 1C. The solder paste 22 may be screen printed on the PCB 10, but other methods such as stencil printing or dispensing of a preformed structure may be used as well. In general, a number of well known soldering methods may be employed, e.g. wave soldering, hotplate soldering, and reflow soldering.

It is noted that the first layer 12 and the second layer 14 may each be constructed of a number of layers, depending of the application requirements. For example, the first layer 12 may be a multi-layer FR4 epoxy material, as known in the art.

Further, it is noted that the hole 16 may have a relatively large diameter compared to a width of the lead 20, allowing a less accurately manufactured and thus a cheaper PCB. Further, such a relatively large hole 16 makes assembling the PCB 10 with the components easier, resulting in a cheaper assembling method. Using a relatively flexible second layer 14 may reduce, or even avoid, thermal stress in the PCB 10. Such thermal stress may be caused by hot components, for example.

A PCB according to the present invention may be manufactured using well known and commonly used manufacturing methods. Referring to Fig. 2A, a first layer 12 has a first surface 12A and a second surface 12B. The first surface 12A and the second surface 12B are usually opposite surfaces. At the second surface 12B an electrically conductive trace 18 is arranged by etching, for example, as known in the art and as mentioned above.

Referring to Fig. 2B, a hole 16 is drilled in the first layer 12. The hole extends from the trace 18 to the first surface 12A of the first layer 12. As illustrated, the hole 16 may extend through the trace 18, but the hole 16 may as well be arranged near an edge of the trace 18, for example.

Referring to Fig. 2C, a first surface 14A of a second layer 14 is arranged on the first surface 12A of the first layer 12. The second layer 14 further comprises a second surface 14B. The second layer 14 extends over the opening of the hole 16 in the first layer 12, thereby closing the hole 16 at the first surface 12A of the first layer 12. The second layer 14 may be a prepreg layer as known in the art and thus any method known in the art may be used to adhere the second layer 14 to the first layer 12.

Referring to Fig. 2D, the electrically conductive material of the trace 18 may be arranged on the inner surface 16A of the hole 16. For example, the electrically conductive material may be galvanicly grown on the inner surface 16A. However, any other suitable method may as well be employed. In an embodiment, a layer of the electrically conductive material may be arranged on the first surface 14A of the second layer 14 prior to adhering the first surface 14A of the second layer 14 to the first surface 12A of the first layer 12. The electrically conductive material on the inner surface 16A of the hole 16 may be provided to obtain a sufficiently strong mechanical coupling between the end of the lead and the PCB after soldering, since the solder paste may adhere to the electrically conductive material, but not to the material of the first layer 12.

Referring to Fig. 2A, instead of having an electrically conductive trace arranged on the second surface 12B prior to drilling and attaching the second layer 14, the first layer 12 may be free of conductive traces as shown in Fig. 3A. Then, in accordance with the method illustrated in Fig. 2A - 2D, a hole 16 may be drilled (Fig. 3B) and the second layer 14 may be arranged on the first surface 12A of the first layer 12 (Fig. 3C). Thereafter, as illustrated in Fig. 3D, the conductive traces 18 are formed, thereby also providing the conductive material on the inner surface 16A of the hole 16. Thus, a similar PCB 10 is manufactured compared to the embodiment illustrated in Fig. 2D. A single difference is the thickness of the conductive trace 18 near the edge of the hole 16 as illustrated. In the embodiment of Fig. 2D the conductive trace 18 is near the hole 16 thicker than the conductive trace 18 of the embodiment of Fig. 3D.

Fig. 4 illustrates a second embodiment of a PCB 10 according to the present invention. In comparison with the embodiment of the PCB illustrated in Fig. IA, the second embodiment comprises conductive traces 118A and 118B arranged between the first layer 12 and the second layer 14. The conductive traces 118A and 118B are part of a circuit of traces arranged between the first and the second layers 12, 14. The circuit may be connected to a circuit arranged on the second surface 12B of the first layer 12 through the conductive material arranged on the inner surface 16A of the hole 16. For example, as illustrated, the conductive trace 118B is electrically coupled to the conductive material arranged on the inner surface 16A of the hole 16. Thus, using two levels of electrically conductive traces more complex circuits may be arranged on the PCB 10.

The embodiment illustrated in Fig. 4 may be manufactured by first arranging the conductive traces 118 A, 118B on the first surface 12A of the first layer 12 or by arranging the conductive traces 118 A, 118B on the first surface 14A of the second layer 14 and thereafter arranging the first and the second layer 12, 14 on each other.

Referring to Fig. 5 A, a hole 16 may take any kind of shape depending on the application. As illustrated, the hole 16 may have a shape of a trapezium, having a larger diameter at the first surface 12A of the first layer compared to the diameter at the second surface 12B of the first layer 12. Using such a trapezoidal shape results in a relatively strong mechanical coupling between a soldered end of a lead accommodated in the hole 16 and the PCB. Therefore, in such an embodiment, the electrically conductive material may be omitted from the inner surface 16A of the hole 16. Further, with respect to the shape of the hole 16 in the embodiment of Fig. 5 A as well as any other embodiment, the hole 16 may be cylindrically shaped, or may have any other kind of shape such as square or elliptical.

Referring to Fig. 5B, the hole 16 may have such dimensions that a bent end of a lead 22 may be accommodated in the hole 16 for obtaining a strong mechanical coupling. Referring to Fig. 5C, a PCB 30 according to the present invention may be double sided for supporting two possibly independent electrical circuits. The double sided PCB 30 comprises a first layer 32, a first surface 32A of the first layer 32 being arranged at a first surface 34A of a second layer 34. The PCB 30 further comprises a third layer 36, a first surface 36A of the third layer 36 being arranged at a second surface 34B of the second layer 34. A first conductive trace 38 is arranged at the second surface 32B of the first layer 32 and a second conductive trace 40 is arranged at the second surface 36B of the third layer 36. A first hole 42 extends from the first conductive trace 38 to the second layer 34 and a second hole 44 extends from the second conductive trace 40 to the second layer 34. Each hole is closed by the second layer 34 The PCB 30 may support components on either side of the PCB 30 and thus support two electrical circuits that may be independent from each other, although using a via, for example, the circuits on both sides may be electrically coupled. The double sided PCB 30 is in particular suitable for miniaturization purposes, for example.

Although detailed embodiments of the present invention are disclosed herein, it is to be understood that the disclosed embodiments are merely exemplary of the invention, which can be embodied in various forms. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a basis for the claims and as a representative basis for teaching one skilled in the art to variously employ the present invention in virtually any appropriately detailed structure.

Further, the terms and phrases used herein are not intended to be limiting; but rather, to provide an understandable description of the invention. The terms "a" or "an", as used herein, are defined as one or more than one. The term another, as used herein, is defined as at least a second or more. The terms including and/or having, as used herein, are defined as comprising (i.e., open language). The term coupled, as used herein, is defined as connected, although not necessarily directly, and not necessarily by means of wires.

Claims

CLAIMS:
1. A layered printed circuit board, PCB, (10) for mounting a component having a lead (20), the PCB comprising: a first layer (12) having a first surface (12A) and a second surface (12B); a second layer (14) having a first surface (14A) and a second surface (14B), the second layer with its first surface being arranged at the first surface of the first layer and an electrically conductive trace (18) arranged on the first layer, wherein a hole (16) is arranged in the first layer, the hole extending from the electrically conductive trace through the first layer, the hole being closed at the first surface of the first layer by the first surface of the second layer and the hole being configured for accommodating an end of the lead and electrically connecting the lead and the trace.
2. The PCB according to claim 1, wherein the electrically conductive trace is formed on the first surface of the first layer.
3. The PCB according to claim 1, wherein the electrically conductive trace is formed on the second surface of the first layer.
4. The PCB according to claim 1, wherein the hole has an inner surface (16A) and an electrically conductive material is arranged on at least a part of the inner surface of the hole.
5. The PCB according to claim 4, wherein the conductive material arranged on the inner surface of the hole is in electrical contact with the conductive trace arranged on the first layer.
6. The PCB according to claim 1, wherein a solder paste (22) is arranged over at least a part of the conductive trace and/or over at least a part of the hole and/or in the hole for enabling to solder the end of the lead in the hole.
7. The PCB according to claim 1, wherein the first layer and/or the second layer is made from an epoxy FR4 material.
8. The PCB according to claim 1, wherein the first layer and/or the second layer is made of a prepreg material.
9. The PCB (30) according to claim 1 , the PCB (30) comprising: the first layer (32), the first surface (32A) of the first layer being arranged at the first surface (34A) of the second layer (34); - a third layer (36) having a first surface (36A) and a second surface (36B), the first surface (36A) of the third layer being arranged at the second surface (34B) of the second layer, a first conductive trace (38) arranged on the first layer and a second conductive trace (40) arranged on the third layer; - a first hole (42) extending from the first conductive trace through the first layer and a second hole (44) extending from the second conductive trace through the third layer, each hole being closed by the second layer.
10. The PCB according to claim 1, wherein the PCB further comprises a heatsink, the heatsink being arranged at the second surface of the second layer and being in good thermal contact with the second layer.
11. The PCB according to claim 1 , wherein the PCB further comprises an electrical component, the electrical component comprising at least one component lead, an end (20) of the component lead being held in the hole and being in electrical contact with the electrically conductive trace.
12. Method of manufacturing a printed circuit board, PCB (10), the method comprising: - making a hole (16) in a first layer (12); arranging a second layer (14) on a first surface (12A) of the first layer, thereby closing the hole at the first surface of the first layer; and arranging a conductive trace (18) on the first layer; wherein the hole in the first layer extends from the conductive trace through the first layer.
13. Method according to claim 12, the method further comprising: arranging a conductive material on at least a part of an inner surface (16A) of the hole.
14. Method according to claim 12, wherein the method further comprises: arranging a solder paste (22) over at least a part of the conductive trace and/or over at least a part of the hole and/or in the hole.
15. Method according to claim 14, wherein the method further comprises: soldering an end of a lead (20) in the hole using the solder paste.
16. Method according to claim 12, wherein arranging a conductive trace on the first layer comprises: arranging a conductive trace on a first surface of the second layer; and - arranging the first surface of the second layer on the first surface of the first layer.
17. Method according to claim 12, wherein the conductive trace is arranged on the first layer prior to arranging the second layer on the first layer.
18. Method according to claim 12, wherein the conductive trace is arranged on the first layer after arranging the second layer on the first layer.
19. Method of mounting a component provided with a lead (20) on a printed circuit board PCB (10) according to claim 1, the method comprising: arranging a solder paste (22) over at least a part of the conductive trace (18) and/or over at least a part of the hole (16) and/or in the hole (16); and soldering an end of the lead in the hole.
20. Use of a circuit housing as a heatsink for an electrical component comprised in an electrical circuit arranged on a PCB (10) according to any one of the claims 1 - 11, the circuit housing being in good thermal contact with the second surface (14B) of the PCB, and being electrically insulated from the electrical circuit.
PCT/IB2008/050724 2007-03-01 2008-02-28 Printed circuit board with a blind hole for mounting a component WO2008104950A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP07103301.3 2007-03-01
EP07103301 2007-03-01

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0951160A (en) * 1995-08-07 1997-02-18 Kitagawa Ind Co Ltd Brazing method of electronic component
JPH11112111A (en) * 1997-10-02 1999-04-23 Hitachi Aic Inc Printed wiring board
US5925206A (en) * 1997-04-21 1999-07-20 International Business Machines Corporation Practical method to make blind vias in circuit boards and other substrates
DE19942631A1 (en) * 1999-09-07 2001-03-08 Endress Hauser Gmbh Co A method for mounting a printed circuit board
US20040251046A1 (en) * 2003-06-13 2004-12-16 Itt Manufacturing Enterprises, Inc. Blind hole termination of pin to pcb

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0951160A (en) * 1995-08-07 1997-02-18 Kitagawa Ind Co Ltd Brazing method of electronic component
US5925206A (en) * 1997-04-21 1999-07-20 International Business Machines Corporation Practical method to make blind vias in circuit boards and other substrates
JPH11112111A (en) * 1997-10-02 1999-04-23 Hitachi Aic Inc Printed wiring board
DE19942631A1 (en) * 1999-09-07 2001-03-08 Endress Hauser Gmbh Co A method for mounting a printed circuit board
US20040251046A1 (en) * 2003-06-13 2004-12-16 Itt Manufacturing Enterprises, Inc. Blind hole termination of pin to pcb

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