WO2008096076A3 - Systemes electroniques securises, procedes de securisation et utilisations de tels systemes - Google Patents

Systemes electroniques securises, procedes de securisation et utilisations de tels systemes Download PDF

Info

Publication number
WO2008096076A3
WO2008096076A3 PCT/FR2007/002152 FR2007002152W WO2008096076A3 WO 2008096076 A3 WO2008096076 A3 WO 2008096076A3 FR 2007002152 W FR2007002152 W FR 2007002152W WO 2008096076 A3 WO2008096076 A3 WO 2008096076A3
Authority
WO
WIPO (PCT)
Prior art keywords
systems
securing methods
secured electronic
securing
module
Prior art date
Application number
PCT/FR2007/002152
Other languages
English (en)
Other versions
WO2008096076A2 (fr
Inventor
Patrice Hameaux
Guillaume Phan
Cedric Mesnil
Axelle Apvrille
Original Assignee
Trusted Logic
Patrice Hameaux
Guillaume Phan
Cedric Mesnil
Axelle Apvrille
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trusted Logic, Patrice Hameaux, Guillaume Phan, Cedric Mesnil, Axelle Apvrille filed Critical Trusted Logic
Priority to EP07872435A priority Critical patent/EP2104893A2/fr
Priority to JP2009542142A priority patent/JP2010514039A/ja
Priority to BRPI0721042-6A priority patent/BRPI0721042A2/pt
Publication of WO2008096076A2 publication Critical patent/WO2008096076A2/fr
Publication of WO2008096076A3 publication Critical patent/WO2008096076A3/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1408Protection against unauthorised use of memory or access to memory by using cryptography
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/77Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Storage Device Security (AREA)
  • Multi Processors (AREA)

Abstract

L'invention concerne un système électronique muni d'un processeur et d'une mémoire de stockage de données informatiques, un procédé de sécurisation et une utilisation d'un tel système. Le système selon l'invention se caractérise en ce qu'il comporte en outre un module d'allocation des adresses physiques d'écriture de telles données dans ladite mémoire, ledit module étant apte à allouer lesdites adresses selon une heuristique diversifiée par un variant. L'invention s'applique en particulier à la sécurisation de systèmes embarqués fabriqués en séries contre des attaques matérielles ou logicielles.
PCT/FR2007/002152 2006-12-22 2007-12-21 Systemes electroniques securises, procedes de securisation et utilisations de tels systemes WO2008096076A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP07872435A EP2104893A2 (fr) 2006-12-22 2007-12-21 Systemes electroniques securises, procedes de securisation et utilisations de tels systemes
JP2009542142A JP2010514039A (ja) 2006-12-22 2007-12-21 セキュリティ保護された電子システム、セキュリティ保護方法およびそのシステムの使用
BRPI0721042-6A BRPI0721042A2 (pt) 2006-12-22 2007-12-21 Sistemas eletrônico seguros, processo de segurança e utilização dos respectivos sistemas

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FRFR0611283 2006-12-22
FR0611283A FR2910658B1 (fr) 2006-12-22 2006-12-22 Systemes electroniques securises,procedes de securisation et utilisations de tels systemes

Publications (2)

Publication Number Publication Date
WO2008096076A2 WO2008096076A2 (fr) 2008-08-14
WO2008096076A3 true WO2008096076A3 (fr) 2008-10-02

Family

ID=38318668

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2007/002152 WO2008096076A2 (fr) 2006-12-22 2007-12-21 Systemes electroniques securises, procedes de securisation et utilisations de tels systemes

Country Status (5)

Country Link
EP (1) EP2104893A2 (fr)
JP (1) JP2010514039A (fr)
BR (1) BRPI0721042A2 (fr)
FR (1) FR2910658B1 (fr)
WO (1) WO2008096076A2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020226054A1 (fr) * 2019-05-07 2020-11-12 株式会社日立製作所 Procédé de traitement d'informations, dispositif de traitement d'informations et support d'informations

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997033217A1 (fr) * 1996-03-07 1997-09-12 Bull Cp8 Circuit integre perfectionne et procede d'utilisation d'un tel circuit integre
US6408073B1 (en) * 1998-10-27 2002-06-18 Winbond Electronics Corp. Scramble circuit to protect data in a read only memory
US20050008150A1 (en) * 2003-07-07 2005-01-13 Sunplus Technology Co., Ltd. Device and method for scrambling data by means of address lines
US20050251695A1 (en) * 2004-05-04 2005-11-10 International Business Machines (Ibm) Corporation Tamper-resistant re-writable data storage media

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63157365A (ja) * 1986-12-19 1988-06-30 Fuji Xerox Co Ltd 物理アドレス変換装置
JP3936630B2 (ja) * 2002-06-20 2007-06-27 株式会社日立製作所 半導体試験装置または半導体装置の検査方法または半導体装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997033217A1 (fr) * 1996-03-07 1997-09-12 Bull Cp8 Circuit integre perfectionne et procede d'utilisation d'un tel circuit integre
US6408073B1 (en) * 1998-10-27 2002-06-18 Winbond Electronics Corp. Scramble circuit to protect data in a read only memory
US20050008150A1 (en) * 2003-07-07 2005-01-13 Sunplus Technology Co., Ltd. Device and method for scrambling data by means of address lines
US20050251695A1 (en) * 2004-05-04 2005-11-10 International Business Machines (Ibm) Corporation Tamper-resistant re-writable data storage media

Also Published As

Publication number Publication date
BRPI0721042A2 (pt) 2014-07-29
EP2104893A2 (fr) 2009-09-30
FR2910658B1 (fr) 2009-02-20
FR2910658A1 (fr) 2008-06-27
WO2008096076A2 (fr) 2008-08-14
JP2010514039A (ja) 2010-04-30

Similar Documents

Publication Publication Date Title
WO2007022454A3 (fr) Systemes, procedes et supports de protection d'un dispositif de traitement de donnees numeriques contre les attaques
WO2007001490A3 (fr) Serveur pour un environnement d'ordinateur personnel portatif
WO2009140631A3 (fr) Système informatique distribué avec système et procédé d’adresses universels
WO2006023713A3 (fr) Reprogrammation de moteur exploitable sur le web
WO2009023637A3 (fr) Dispositif de mémoire et procédé ayant une logique de traitement intégrée pour faciliter l'interface avec de multiples processeurs, et système informatique utilisant ce dispositif
WO2005048046A3 (fr) Systemes et procedes destines a evaluer le risque de fraude dans des operations commerciales
WO2006118667A3 (fr) Anticipation de chargement au-dela d'une limite de page
WO2006077443A3 (fr) Protection informatique face a une anomalie de logiciel malveillant
WO2007146519A3 (fr) Restaurations prioritaires automatiques
WO2005119962A3 (fr) Systeme et methode pour presenter un contenu protege contre la copie a un utilisateur
WO2010065271A3 (fr) Systèmes et procédés pour assurer une protection de fichier continue au niveau bloc
EP1906330A3 (fr) Système de traitement d'informations, procédé de traitement d'informations, programme de traitement d'informations, support lisible sur ordinateur et signal de données informatiques
TW200708952A (en) Providing extended memory protection
WO2008092031A3 (fr) Architecture de système informatique et procédé faisant appel à une gestion de système de fichier de type isolé
WO2006110921A3 (fr) Systeme et methode pour scanner une memoire pour des signatures de decalage de logiciels malveillants
WO2007100694A3 (fr) Systemes, procedes et appareils destines a l'utilisation du meme type de memoire pour prendre en charge un mode de verification d'erreur et un mode de verification d'absence d'erreur
WO2011123361A3 (fr) Mappage de la sémantique rdma à un dispositif de stockage haute vitesse
TW200721016A (en) Memory system and method of writing into nonvolatile semiconductor memory
EP1956498A4 (fr) Procede de gestion de donnees documentaires, systeme de gestion et logiciel
WO2006033992A3 (fr) Machine de jeu a memoire a tolerance de pannes securisee
EP2003541A3 (fr) Système informatique ou procédé de gestion de la performance d'un système informatisé
EP1921538A3 (fr) Système de stockage et système informatique et leurs procédés de traitement
WO2008150927A3 (fr) Système comprenant une mémoire affinée et une mémoire moins affinée
SG160268A1 (en) Portable electronic device and data processing method in portable electronic device
WO2003069518A3 (fr) Procede, application logicielle et systeme d'echange de donnees reperes

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07872435

Country of ref document: EP

Kind code of ref document: A2

ENP Entry into the national phase

Ref document number: 2009542142

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2007872435

Country of ref document: EP

ENP Entry into the national phase

Ref document number: PI0721042

Country of ref document: BR

Kind code of ref document: A2

Effective date: 20090619