Connect public, paid and private patent data with Google Patents Public Datasets

Method for programming with initial programming voltage based on trial

Info

Publication number
WO2008083131A3
WO2008083131A3 PCT/US2007/088777 US2007088777W WO2008083131A3 WO 2008083131 A3 WO2008083131 A3 WO 2008083131A3 US 2007088777 W US2007088777 W US 2007088777W WO 2008083131 A3 WO2008083131 A3 WO 2008083131A3
Authority
WO
Grant status
Application
Patent type
Prior art keywords
programming
trial
non
set
storage
Prior art date
Application number
PCT/US2007/088777
Other languages
French (fr)
Other versions
WO2008083131A2 (en )
Inventor
Teruhiko Kamei
Yan Li
Original Assignee
Teruhiko Kamei
Yan Li
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409Online test

Abstract

A trial programming process is performed for a first set of one or more non-volatile storage elements to test usage of the non-volatile storage system. Based on this trial programming, a programming signal is calibrated by adjusting its initial magnitude. The calibrated programming signal is then used to program a second set of non-volatile storage elements (which may or may not include the first set).
PCT/US2007/088777 2006-12-27 2007-12-24 Method for programming with initial programming voltage based on trial WO2008083131A3 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US11/616,647 2006-12-27
US11616647 US7551482B2 (en) 2006-12-27 2006-12-27 Method for programming with initial programming voltage based on trial
US11616665 US7570520B2 (en) 2006-12-27 2006-12-27 Non-volatile storage system with initial programming voltage based on trial
US11/616,665 2006-12-27

Publications (2)

Publication Number Publication Date
WO2008083131A2 true WO2008083131A2 (en) 2008-07-10
WO2008083131A3 true true WO2008083131A3 (en) 2008-08-28

Family

ID=39493829

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/088777 WO2008083131A3 (en) 2006-12-27 2007-12-24 Method for programming with initial programming voltage based on trial

Country Status (1)

Country Link
WO (1) WO2008083131A3 (en)

Families Citing this family (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007132457A3 (en) 2006-05-12 2009-04-16 Anobit Technologies Ltd Combined distortion estimation and error correction coding for memory devices
WO2007132452A3 (en) 2006-05-12 2009-04-09 Anobit Technologies Reducing programming error in memory devices
WO2007132453A3 (en) 2006-05-12 2009-04-16 Anobit Technologies Ltd Distortion estimation and cancellation in memory devices
WO2007132456A3 (en) 2006-05-12 2009-04-16 Anobit Technologies Ltd Memory device with adaptive capacity
US8151166B2 (en) 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
WO2008026203A3 (en) 2006-08-27 2009-05-07 Anobit Technologies Estimation of non-linear distortion in memory devices
CN101601094B (en) 2006-10-30 2013-03-27 苹果公司 Reading memory cells using multiple thresholds
WO2008053472A3 (en) 2006-10-30 2009-05-14 Anobit Technologies Ltd Reading memory cells using multiple thresholds
US7924648B2 (en) 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
US7706182B2 (en) 2006-12-03 2010-04-27 Anobit Technologies Ltd. Adaptive programming of analog memory cells using statistical characteristics
US8151163B2 (en) 2006-12-03 2012-04-03 Anobit Technologies Ltd. Automatic defect management in memory devices
US7900102B2 (en) 2006-12-17 2011-03-01 Anobit Technologies Ltd. High-speed programming of memory devices
US7570520B2 (en) 2006-12-27 2009-08-04 Sandisk Corporation Non-volatile storage system with initial programming voltage based on trial
US7751240B2 (en) 2007-01-24 2010-07-06 Anobit Technologies Ltd. Memory device with negative thresholds
CN101715595A (en) 2007-03-12 2010-05-26 爱诺彼得技术有限责任公司 Adaptive estimation of memory cell read thresholds
US8001320B2 (en) 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
WO2008139441A3 (en) 2007-05-12 2010-02-25 Anobit Technologies Ltd. Memory device with internal signal processing unit
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US7773413B2 (en) 2007-10-08 2010-08-10 Anobit Technologies Ltd. Reliable data storage in analog memory cells in the presence of temperature variations
US8000141B1 (en) 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
US8068360B2 (en) 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
US8527819B2 (en) 2007-10-19 2013-09-03 Apple Inc. Data storage in analog memory cell arrays having erase failures
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8085586B2 (en) 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US7924587B2 (en) 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US7864573B2 (en) 2008-02-24 2011-01-04 Anobit Technologies Ltd. Programming analog memory cells for reduced variance after retention
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8059457B2 (en) 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
US8498151B1 (en) 2008-08-05 2013-07-30 Apple Inc. Data storage in analog memory cells using modified pass voltages
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8713330B1 (en) 2008-10-30 2014-04-29 Apple Inc. Data scrambling in memory devices
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8174857B1 (en) 2008-12-31 2012-05-08 Anobit Technologies Ltd. Efficient readout schemes for analog memory cell devices using multiple read threshold sets
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8228701B2 (en) 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8572311B1 (en) 2010-01-11 2013-10-29 Apple Inc. Redundant data storage in multi-die memory systems
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8767459B1 (en) 2010-07-31 2014-07-01 Apple Inc. Data storage in analog memory cells across word lines using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8493781B1 (en) 2010-08-12 2013-07-23 Apple Inc. Interference mitigation using individual word line erasure operations
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6192445B1 (en) * 1996-09-24 2001-02-20 Altera Corporation System and method for programming EPROM cells using shorter duration pulse(s) in repeating the programming process of a particular cell
EP1227501A2 (en) * 2000-12-07 2002-07-31 Saifun Semiconductors Ltd. Programming and erasing methods for an NROM array
EP1333445A2 (en) * 2002-01-31 2003-08-06 Saifun Semiconductors Ltd. Method for operating a memory device
WO2008033679A2 (en) * 2006-09-12 2008-03-20 Sandisk Corporation Non-volatile memory and method for reduced erase/write cycling during trimming of initial programming voltage

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6192445B1 (en) * 1996-09-24 2001-02-20 Altera Corporation System and method for programming EPROM cells using shorter duration pulse(s) in repeating the programming process of a particular cell
EP1227501A2 (en) * 2000-12-07 2002-07-31 Saifun Semiconductors Ltd. Programming and erasing methods for an NROM array
EP1333445A2 (en) * 2002-01-31 2003-08-06 Saifun Semiconductors Ltd. Method for operating a memory device
WO2008033679A2 (en) * 2006-09-12 2008-03-20 Sandisk Corporation Non-volatile memory and method for reduced erase/write cycling during trimming of initial programming voltage

Also Published As

Publication number Publication date Type
WO2008083131A2 (en) 2008-07-10 application

Similar Documents

Publication Publication Date Title
WO2007143225A3 (en) Analyte monitoring system and method
WO2008114857A1 (en) Method for producing aminoacetylpyrrolidinecarbonitrile derivative
WO2008090836A1 (en) Radio control method
WO2008118820A3 (en) Somatic cell reprogramming
WO2009148184A1 (en) Method for detection of idiopathic interstitial pneumonia
WO2007046128A1 (en) Semiconductor device and its fabrication method
WO2009100571A1 (en) A method for the separation and purification of epothilones
WO2009025307A1 (en) Aircraft and method of using aircraft
WO2008133271A1 (en) Curable resin composition, led package, and method for production of the led package, and optical semiconductor
WO2006132390A1 (en) Method for producing hexahydrofurofuranol derivative
WO2006109738A1 (en) Circuit building device
WO2009050703A3 (en) Data storage in analog memory cell arrays having erase failures
WO2008084517A1 (en) System, method and program for generating route curve
WO2010006541A1 (en) Data storage method and device, and data splitting and separate storing device
WO2008111464A1 (en) Method for examination of action of anti-cancer agent utilizing splicing defect as measure
WO2008120312A1 (en) Condition judging device, condition judging method, and condition judging program
WO2007138868A1 (en) Method of selecting cosmetic and design method
WO2009143760A1 (en) Method and device for correcting and obtaining reference voltage
WO2008102469A1 (en) Protein crystallizing agent and method of crystallizing protein therewith
WO2007144936A1 (en) Peripheral device of programmable logic controller and automatic program verification method
WO2006118232A1 (en) Ionic liquid containing phosphonium ion and method for producing same
WO2009064920A3 (en) Compounds and methods for modulating protein expression
WO2006109558A1 (en) Verification support device, verification support method, program, and recording medium
Predehl The Chandra LETGS Soft X-ray Spectrum of the White Dwarf GD153
WO2008074212A1 (en) Method for controlling flash memory

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07869864

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase in:

Ref country code: DE

122 Ep: pct app. not ent. europ. phase

Ref document number: 07869864

Country of ref document: EP

Kind code of ref document: A2