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WO2008044183A3 - Integrated circuit with iddq test facilities and ic iddq test method - Google Patents

Integrated circuit with iddq test facilities and ic iddq test method

Info

Publication number
WO2008044183A3
WO2008044183A3 PCT/IB2007/054072 IB2007054072W WO2008044183A3 WO 2008044183 A3 WO2008044183 A3 WO 2008044183A3 IB 2007054072 W IB2007054072 W IB 2007054072W WO 2008044183 A3 WO2008044183 A3 WO 2008044183A3
Authority
WO
Grant status
Application
Patent type
Prior art keywords
rail
supply
power
test
circuit
Prior art date
Application number
PCT/IB2007/054072
Other languages
French (fr)
Other versions
WO2008044183A2 (en )
Inventor
Villagra Luis Elvira
Rinze I M Meijer
Vazquez Josep Rius
Original Assignee
Nxp Bv
Villagra Luis Elvira
Rinze I M Meijer
Vazquez Josep Rius
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30Marginal testing, e.g. varying supply voltage
    • G01R31/3004Current or voltage test
    • G01R31/3008Quiescent current [IDDQ] test or leakage current test

Abstract

An IC (10) is disclosed that comprises a first power supply rail (110) and a second power supply rail (130) and a plurality of circuit portions (100, 400, 700) respectively coupled between the first power supply rail (110) and the second power supply rail (130). A first circuit portion thereof is coupled to the first power supply rail (110) via a first conductive path comprising a first enable switch (120), and to a test mode power supply rail (110, 310) via a second conductive path for enabling a quiescent current measurement (610) of the first circuit portion in a test mode of the integrated circuit (10). The second conductive path comprises a sensing switch (220) for coupling the first portion to the test mode power supply rail (110, 310) in the test mode. The test mode power supply rail may be same rail as the first power supply rail (110), in which case the IC (10) may comprise a current sensor (230) to facilitate on-chip IDDQ measurements. The IC (10) of the present invention allows for accurate IDDQ measurements of parts of the IC at little area overhead cost only.
PCT/IB2007/054072 2006-10-09 2007-10-05 Integrated circuit with iddq test facilities and ic iddq test method WO2008044183A3 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP06121966 2006-10-09
EP06121966.3 2006-10-09

Publications (2)

Publication Number Publication Date
WO2008044183A2 true WO2008044183A2 (en) 2008-04-17
WO2008044183A3 true true WO2008044183A3 (en) 2008-06-05

Family

ID=39247747

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2007/054072 WO2008044183A3 (en) 2006-10-09 2007-10-05 Integrated circuit with iddq test facilities and ic iddq test method

Country Status (1)

Country Link
WO (1) WO2008044183A3 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8860817B2 (en) 2011-07-25 2014-10-14 Aptina Imaging Corporation Imaging systems with verification circuitry for monitoring standby leakage current levels
US9506977B2 (en) 2014-03-04 2016-11-29 International Business Machines Corporation Application of stress conditions for homogenization of stress samples in semiconductor product acceleration studies

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6043672A (en) * 1998-05-13 2000-03-28 Lsi Logic Corporation Selectable power supply lines for isolating defects in integrated circuits
WO2005047911A1 (en) * 2003-11-05 2005-05-26 International Business Machines Corporation Hot switchable voltage bus for iddq current measurements
US20060125470A1 (en) * 2004-12-10 2006-06-15 Wei Chen System and method for IDDQ measurement in system on a chip (SOC) design

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6043672A (en) * 1998-05-13 2000-03-28 Lsi Logic Corporation Selectable power supply lines for isolating defects in integrated circuits
WO2005047911A1 (en) * 2003-11-05 2005-05-26 International Business Machines Corporation Hot switchable voltage bus for iddq current measurements
US20060125470A1 (en) * 2004-12-10 2006-06-15 Wei Chen System and method for IDDQ measurement in system on a chip (SOC) design

Also Published As

Publication number Publication date Type
WO2008044183A2 (en) 2008-04-17 application

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