WO2008027115A3 - Off-board computational resources - Google Patents
Off-board computational resources Download PDFInfo
- Publication number
- WO2008027115A3 WO2008027115A3 PCT/US2007/015870 US2007015870W WO2008027115A3 WO 2008027115 A3 WO2008027115 A3 WO 2008027115A3 US 2007015870 W US2007015870 W US 2007015870W WO 2008027115 A3 WO2008027115 A3 WO 2008027115A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- computational resources
- computational
- host computer
- memory
- work
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
- G06F21/31—User authentication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2131—Lost password, e.g. recovery of lost or forgotten passwords
Abstract
A host computer system is coupled via an interface to a computational unit that includes an input, a gateway and a sea of computational resources. The interface can be a hard disk storage interface. In some embodiments, the gateway is a gateway master device, such as an FPGA, and a memory that are configured to control transfer of data between the host computer and the memory and/or control transfer of data between the memory and the computational resources. The computational resources can be FPGAs interconnected to perform atomic units of work using a nearest neighbor protocol. The host computer can execute software that generates the atomic units of work for the computational resources, wherein generating the atomic units of work in the form of request packets that are consumed by the computational resources by processing each request packet and generating a corresponding response packet that is sent to the host computer. Each FPGA in the computational resources can have a plurality of computational blocks so that consuming a request packet involves a computational block processing the data in the request packet.
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/511,190 | 2006-08-28 | ||
US11/510,922 US20080052525A1 (en) | 2006-08-28 | 2006-08-28 | Password recovery |
US11/510,950 US20080126472A1 (en) | 2006-08-28 | 2006-08-28 | Computer communication |
US11/510,894 US20080052490A1 (en) | 2006-08-28 | 2006-08-28 | Computational resource array |
US11/510,922 | 2006-08-28 | ||
US11/511,190 US20080052429A1 (en) | 2006-08-28 | 2006-08-28 | Off-board computational resources |
US11/510,894 | 2006-08-28 | ||
US11/510,950 | 2006-08-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2008027115A2 WO2008027115A2 (en) | 2008-03-06 |
WO2008027115A3 true WO2008027115A3 (en) | 2008-04-17 |
Family
ID=38626612
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/011809 WO2008027091A1 (en) | 2006-08-28 | 2007-05-17 | Method and system for password recovery using a hardware accelerator |
PCT/US2007/012257 WO2008027092A1 (en) | 2006-08-28 | 2007-05-23 | Computer communication |
PCT/US2007/015870 WO2008027115A2 (en) | 2006-08-28 | 2007-07-12 | Off-board computational resources |
PCT/US2007/015869 WO2008027114A2 (en) | 2006-08-28 | 2007-07-12 | Computational resource array |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/011809 WO2008027091A1 (en) | 2006-08-28 | 2007-05-17 | Method and system for password recovery using a hardware accelerator |
PCT/US2007/012257 WO2008027092A1 (en) | 2006-08-28 | 2007-05-23 | Computer communication |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/015869 WO2008027114A2 (en) | 2006-08-28 | 2007-07-12 | Computational resource array |
Country Status (1)
Country | Link |
---|---|
WO (4) | WO2008027091A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105799620B (en) * | 2014-12-29 | 2019-01-22 | 上海通用汽车有限公司 | The security code of vehicle electric control module calculates |
CN110770710B (en) * | 2017-05-03 | 2023-09-05 | 艾德蒂克通信公司 | Apparatus and method for controlling acceleration of data |
CN108616535B (en) * | 2018-04-28 | 2021-02-09 | 浪潮集团有限公司 | FPGA-based multi-protocol security authentication network exchange acceleration system and method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2348974A (en) * | 1999-04-09 | 2000-10-18 | Pixelfusion Ltd | Data transfer controller with an array of processing elements |
US20060041932A1 (en) * | 2004-08-23 | 2006-02-23 | International Business Machines Corporation | Systems and methods for recovering passwords and password-protected data |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3812823A1 (en) * | 1988-04-16 | 1989-11-02 | Asea Brown Boveri | Network of connected microcomputers |
US5577262A (en) * | 1990-05-22 | 1996-11-19 | International Business Machines Corporation | Parallel array processor interconnections |
JPH06500655A (en) * | 1990-10-03 | 1994-01-20 | スィンキング マシンズ コーポレーション | parallel computer system |
JP3136088B2 (en) * | 1996-02-22 | 2001-02-19 | シャープ株式会社 | Data processing device and data processing method |
US6085316A (en) * | 1998-07-28 | 2000-07-04 | Sun Microsystems, Inc. | Layered counterflow pipeline processor with anticipatory control |
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2007
- 2007-05-17 WO PCT/US2007/011809 patent/WO2008027091A1/en active Application Filing
- 2007-05-23 WO PCT/US2007/012257 patent/WO2008027092A1/en active Application Filing
- 2007-07-12 WO PCT/US2007/015870 patent/WO2008027115A2/en active Application Filing
- 2007-07-12 WO PCT/US2007/015869 patent/WO2008027114A2/en active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2348974A (en) * | 1999-04-09 | 2000-10-18 | Pixelfusion Ltd | Data transfer controller with an array of processing elements |
US20060041932A1 (en) * | 2004-08-23 | 2006-02-23 | International Business Machines Corporation | Systems and methods for recovering passwords and password-protected data |
Non-Patent Citations (1)
Title |
---|
KYO S ET AL: "IMAP-CE: A 51.2 GOPS VIDEO RATE IMAGE PROCESSOR WITH 128 VLIW PROCESSING ELEMENTS", PROCEEDINGS 2001 INTERNATIONAL CONFERENCE ON IMAGE PROCESSING. ICIP 2001. THESSALONIKI, GREECE, OCT. 7 - 10, 2001, INTERNATIONAL CONFERENCE ON IMAGE PROCESSING, NEW YORK, NY : IEEE, US, vol. VOL. 3 OF 3. CONF. 8, 7 October 2001 (2001-10-07), pages 294 - 297, XP001110140, ISBN: 0-7803-6725-1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2008027092A1 (en) | 2008-03-06 |
WO2008027114A3 (en) | 2008-04-24 |
WO2008027114A2 (en) | 2008-03-06 |
WO2008027091A1 (en) | 2008-03-06 |
WO2008027115A2 (en) | 2008-03-06 |
WO2008027091B1 (en) | 2008-05-08 |
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