WO2008019218A2 - évacuation par phases des déchets numériques - Google Patents

évacuation par phases des déchets numériques Download PDF

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Publication number
WO2008019218A2
WO2008019218A2 PCT/US2007/073891 US2007073891W WO2008019218A2 WO 2008019218 A2 WO2008019218 A2 WO 2008019218A2 US 2007073891 W US2007073891 W US 2007073891W WO 2008019218 A2 WO2008019218 A2 WO 2008019218A2
Authority
WO
WIPO (PCT)
Prior art keywords
data
block
storage system
volatile memory
write
Prior art date
Application number
PCT/US2007/073891
Other languages
English (en)
Other versions
WO2008019218A3 (fr
Inventor
Shai Traister
Jason Lin
Original Assignee
Sandisk Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/499,606 external-priority patent/US7444461B2/en
Priority claimed from US11/499,598 external-priority patent/US7451265B2/en
Application filed by Sandisk Corporation filed Critical Sandisk Corporation
Priority to JP2009522934A priority Critical patent/JP4362549B1/ja
Publication of WO2008019218A2 publication Critical patent/WO2008019218A2/fr
Publication of WO2008019218A3 publication Critical patent/WO2008019218A3/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7205—Cleaning, compaction, garbage collection, erase control

Definitions

  • Figure 2 is a simplified block diagram of an organization of the memory cell array into planes.
  • Figure 3 is a simplified block diagram of pages of memory cells.
  • a metapage can extend across all planes within the non-volatile memory storage system or the non-volatile memory storage system can dynamically form metapages from one or more pages in one or more separate blocks in one or more different planes.
  • Figure 4 is a simplified block diagram of sectors of memory cells. A page can be further divided into one or more sectors. The amount of data in each page can be an integer number of one or more sectors of data, where each sector may store 512 bytes of data.
  • Figure 4 shows page 401 divided into two sectors 402 and 404. Each sector 402 or 404 contains data 406, which can be 512 bytes in size, and overhead data 405 associated with the data.
  • Figure 5 is a simplified block diagram of a logical interface between a host and nonvolatile memory storage system.
  • a continuous logical address space 512 provides addresses for data that can be stored in memory.
  • Logical address space 512 as viewed by the host can be divided into increments of clusters of data. Each cluster may include a number of sectors of data, such as between 4 and 64 sectors.
  • Block 504 represents a table of these logical-to-physical address conversions, which is maintained by the non- volatile memory storage system.
  • Figure 6 is a flowchart diagram of a general overview of operations for phased garbage collection, in accordance with an embodiment of the present invention. It should be appreciated that data stored at specific host logical addresses can be overwritten by new data as the original stored data become obsolete. The non-volatile memory storage system, in response, writes the new data in an update block and then changes the logical-to-physical address table for those logical addresses to identify the new physical block to which the new data are stored. The blocks containing the original data at those logical addresses are then erased and made available for the storage of additional data. Such erasure can take place before a write operation. As a result, the memory controller learns that data at a given logical address has been rendered obsolete or invalid by the host after the new data are written to the same logical address. Many blocks of memory can therefore be storing invalid data for a period of time.
  • such data can be periodically garbage collected (i.e., compacted or consolidated).
  • a garbage collection operation involves reading the valid data from a block and writing the valid data to a new block, ignoring invalid data in the process.
  • the creation of new data file 3 makes old data file 3 obsolete.
  • Old data file 3 can be erased to reclaim the physical capacity used by old data file 3.
  • such erase operation would trigger a garbage collection operation if file 2 and old file 3 are stored in the same physical block.
  • the new data associated with the write command can be written to the write buffer block in operation 810.
  • the non- volatile memory storage system can write the new data to the write buffer block before, during, or after the garbage collection operation. As will be explained in more detail below, the new data may be copied from the write buffer block to an update block upon completion of the garbage collection operation.
  • the write buffer block is maintained in memory by the non-volatile memory storage system. In general, the write buffer block buffers new data in the non-volatile memory storage system. In an embodiment, the write buffer block spans multiple logical addresses. In another embodiment, the write buffer block spans an entire logical address space.
  • the non-volatile memory storage system uses the write buffer block for phased garbage collection operations. Accordingly, the write buffer block may not store the most updated new data. As a result, if the new data are read in a subsequent read operation, the non- volatile memory storage system checks which of the new data stored in either the update block or the write buffer block are the most recently updated. The read operation then accesses and returns the most recently updated new data.
  • the non-volatile memory storage system can use the write buffer block for both non-phased and phased garbage collection operations.
  • the write buffer block is used for all write operations. In other words, new data from non-phased and phased garbage collection operations are written to the write buffer block.
  • the write buffer block operates like a write cache and therefore includes the most recently updated new data.
  • Figures 9A and 9B are simplified block diagrams of memory blocks with sequential update blocks being garbage collected in phases, in accordance with embodiments of the present invention.
  • original block A 980 and associated sequential update block A 982 are selected for garbage collection.
  • data received from a write command may be written to an update block.
  • a dedicated metablock can be assigned as an update block for each logical group within which data is being updated.
  • logical sectors of data are stored in logical groups comprising a set of logically contiguous sectors.
  • An update block can be managed to receive data in either sequential order or chaotic order (i.e., non-sequential order).
  • closure of the sequential update block may result from the sequential update block being completely filled by updated sector data written by the host or copied from the original block.
  • the chaotic update block can be created by conversion from a sequential update block when a sector of data written by a host is logically non-sequential to the previously written sector of data within the logical group being updated.
  • Original block A 980 can include invalid and valid data, which is represented in Figure 9A by hatched pattern and dotted pattern, respectively. It should be noted that in addition to valid data copied from original block A 980, sequential update block A 982 additionally includes existing data 981 that were written to the sequential update block A before the garbage collection operation. When a write command to write new data 983 is received, the write command may trigger the closure of sequential update block A 982, which is a type of garbage collection operation, because the new data are associated with a logical group that does not have an open update block or that the new data invoke a garbage collection operation. The non-volatile memory storage system asserts a busy signal and then copies the valid data from original block A 980 to sequential update block A 982 until first garbage collection time period 970 is reached.
  • Figure 1OB shows the continuation of the garbage collection operation at a subsequent timeout period.
  • a second write command is received after the first write command and a second timeout period is allocated to the second write command.
  • the remaining valid data are copied from original block A 902 and chaotic update block A 904 to new block A 906 until second garbage collection time period 951 is reached.
  • the garbage collection operation cannot be completed within second garbage collection time period 951 as there are still valid data remaining in original block A 902 and chaotic update block A 904.
  • new data 905 received before the garbage collection operation started are written to write buffer block 908.
  • one or more first blocks include twelve pages of valid data and the twelve pages of valid data are to be copied to a second block.
  • the non-volatile memory storage system can estimate the execution time by adding the amount of time the non- volatile memory storage system takes to read twelve pages of valid data and the amount of time the non-volatile memory storage system takes to write the valid data to the second block.
  • the write buffer block is structured to include multiple sectors and one or more sectors within the write buffer block may be indexed.
  • one pointer can point to or reference multiple sectors (e.g., four sectors).
  • one pointer can point to or reference one sector.
  • the new data are written to a single sector of the write buffer block.
  • Subsequent new data associated with another write command are written to the next available sector in the write buffer block.
  • sectors of new data from multiple write commands can be written to different sectors of the same page in the write buffer block.
  • the write buffer block can be structured to include multiple sectors and each sector is configured to store a sector of new data.
  • the total number of sectors that are allocated to the write buffer block can be defined as
  • a multiple sectors write command is received in operation 1302. Thereafter, in operation 1304, the sectors of new data are stored (or buffered) and garbage collection operation can be performed, if needed.
  • the non-volatile memory storage system may not utilize a write buffer block because multiple timeout periods are allocated to the multiple sectors write command and one garbage collection operation can usually be completed by the end of the multiple sectors write command. Accordingly, instead of the write buffer block, the non- volatile memory storage system may store the new data in RAM associated with the non-volatile memory storage system, or in other memories associated with the non-volatile memory storage system, while asserting the busy signals between sectors of new data in order to use the allocated timeout periods to perform garbage collection operations.
  • N round-down to nearest integer [(Tgc+TO)/TO] (2.0) can be written directly to the update blocks and not the write buffer block. Equation 2.0 shows that new data are written to the write buffer block when the write command is a single sector write command or when the non-volatile memory storage system receives less than N sectors of new data in a multiple sectors write command.
  • the non- volatile memory storage system operates the multiple sectors write command in accordance with the single sector write command operations, which is shown in Figure 13.
  • the write buffer block cleaning operation may be performed if the new data received in operation 1302 did not invoke garbage collection, or if the new data invoked garbage collection that was completed before the allocated garbage collection time period.
  • no write buffer block cleaning is performed, as the new data may be audio/video data. If the write buffer block cleaning operation cannot be performed, then the new data are written to memory in operation 1314.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

L'invention concerne une méthode de fonctionnement d'un système de stockage à mémoire non volatile. Dans cette méthode, une commande d'écriture est reçue, afin d'écrire des données. On alloue à la commande d'écriture une période d'attente pour exécuter la commande d'écriture. Pendant ladite période d'attente, on effectue une partie de l'évacuation des déchets numériques. Les données associées à la commande d'écriture sont écrites dans un tampon associé au système de stockage à mémoire non volatile.
PCT/US2007/073891 2006-08-04 2007-07-19 évacuation par phases des déchets numériques WO2008019218A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009522934A JP4362549B1 (ja) 2006-08-04 2007-07-19 段階的ガーベッジコレクション

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/499,606 US7444461B2 (en) 2006-08-04 2006-08-04 Methods for phased garbage collection
US11/499,598 US7451265B2 (en) 2006-08-04 2006-08-04 Non-volatile memory storage systems for phased garbage collection
US11/499,598 2006-08-04
US11/499,606 2006-08-04

Publications (2)

Publication Number Publication Date
WO2008019218A2 true WO2008019218A2 (fr) 2008-02-14
WO2008019218A3 WO2008019218A3 (fr) 2008-09-12

Family

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Family Applications (1)

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PCT/US2007/073891 WO2008019218A2 (fr) 2006-08-04 2007-07-19 évacuation par phases des déchets numériques

Country Status (4)

Country Link
JP (1) JP4362549B1 (fr)
KR (1) KR100922308B1 (fr)
TW (1) TWI343522B (fr)
WO (1) WO2008019218A2 (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2250567A1 (fr) * 2008-03-01 2010-11-17 Kabushiki Kaisha Toshiba Système de mémoire
FR2950462A1 (fr) * 2009-09-21 2011-03-25 St Microelectronics Rousset Procede d'ecriture et de lecture de donnees dans une memoire non volatile, au moyen de metadonnees
EP2302638A1 (fr) * 2009-09-21 2011-03-30 STMicroelectronics (Rousset) SAS Procédé d'écriture et de lecture de données dans une mémoire non volatile, au moyen de métadonnées
WO2011162973A1 (fr) * 2010-06-23 2011-12-29 Sandisk Technologies Inc. Utilisation de bandes de garde et d'opérations d'entretien par étapes pour éviter de dépasser des exigences de latence maximale dans systèmes de mémoire non volatile
WO2012001479A1 (fr) * 2010-06-30 2012-01-05 Sandisk Il Ltd. Indication d'état lorsqu'une opération de maintenance doit être réalisée sur un dispositif de mémoire
US9710326B2 (en) 2014-07-28 2017-07-18 SK Hynix Inc. Encoder by-pass with scrambler

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5535128B2 (ja) 2010-12-16 2014-07-02 株式会社東芝 メモリシステム
JP2014132505A (ja) * 2010-12-16 2014-07-17 Toshiba Corp メモリシステム
KR101157763B1 (ko) * 2010-12-27 2012-06-25 서울시립대학교 산학협력단 Ｔｒｉｍ 명령 처리 기능이 추가된 플래시 메모리 장치를 위한 가변 공간 페이지 사상 방법 및 그 장치
JP6320318B2 (ja) * 2015-02-17 2018-05-09 東芝メモリ株式会社 記憶装置及び記憶装置を含む情報処理システム
US9990304B2 (en) * 2015-11-13 2018-06-05 Samsung Electronics Co., Ltd Multimode storage management system
US11126544B2 (en) 2016-12-14 2021-09-21 Via Technologies, Inc. Method and apparatus for efficient garbage collection based on access probability of data
TWI631460B (zh) * 2017-05-19 2018-08-01 群聯電子股份有限公司 資料讀取方法、記憶體控制電路單元與記憶體儲存裝置
KR102529710B1 (ko) * 2018-02-19 2023-05-09 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작방법
US11281578B2 (en) 2019-08-20 2022-03-22 Micron Technology, Inc. Garbage collection in a memory sub-system during a low battery state
US11282567B2 (en) 2019-08-20 2022-03-22 Micron Technology, Inc. Sequential SLC read optimization
US11726869B2 (en) 2019-08-20 2023-08-15 Micron Technology, Inc. Performing error control operation on memory component for garbage collection
US11281392B2 (en) * 2019-08-28 2022-03-22 Micron Technology, Inc. Garbage collection in a memory component using an adjusted parameter

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WO2005045683A1 (fr) * 2003-11-05 2005-05-19 Electronics And Telecommunications Research Institute Appareil et procede de recuperation de l'espace memoire
US20060161728A1 (en) * 2005-01-20 2006-07-20 Bennett Alan D Scheduling of housekeeping operations in flash memory systems

Patent Citations (2)

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WO2005045683A1 (fr) * 2003-11-05 2005-05-19 Electronics And Telecommunications Research Institute Appareil et procede de recuperation de l'espace memoire
US20060161728A1 (en) * 2005-01-20 2006-07-20 Bennett Alan D Scheduling of housekeeping operations in flash memory systems

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8176237B2 (en) 2008-03-01 2012-05-08 Kabushiki Kaisha Toshiba Solid state drive with input buffer
EP2250567A4 (fr) * 2008-03-01 2011-09-28 Toshiba Kk Système de mémoire
EP2250567A1 (fr) * 2008-03-01 2010-11-17 Kabushiki Kaisha Toshiba Système de mémoire
FR2950462A1 (fr) * 2009-09-21 2011-03-25 St Microelectronics Rousset Procede d'ecriture et de lecture de donnees dans une memoire non volatile, au moyen de metadonnees
EP2302638A1 (fr) * 2009-09-21 2011-03-30 STMicroelectronics (Rousset) SAS Procédé d'écriture et de lecture de données dans une mémoire non volatile, au moyen de métadonnées
US10261702B2 (en) 2009-09-21 2019-04-16 Stmicroelectronics (Rousset) Sas Method for wear leveling in a nonvolatile memory
US8782338B2 (en) 2009-09-21 2014-07-15 Stmicroelectronics (Rousset) Sas Method for wear leveling in a nonvolatile memory
US9229857B2 (en) 2009-09-21 2016-01-05 Stmicroelectronics (Rousset) Sas Method for wear leveling in a nonvolatile memory
US8478723B2 (en) 2009-09-21 2013-07-02 Stmicroelectronics (Rousset) Sas Method for reading a nonvolatile memory by means of metadata and of a look-up table
US8499192B2 (en) 2009-09-21 2013-07-30 Stmicroelectronics (Rousset) Sas Tearing-proof method for writing data in a nonvolatile memory
US8499117B2 (en) 2009-09-21 2013-07-30 Stmicroelectronics (Rousset) Sas Method for writing and reading data in a nonvolatile memory, by means of metadata
US8578088B2 (en) 2009-09-21 2013-11-05 Stmicroelectronics (Rousset) Sas Method for wear leveling in a nonvolatile memory
US9081671B2 (en) 2009-09-21 2015-07-14 Stmicroelectronics (Rousset) Sas Method for wear leveling in a nonvolatile memory
WO2011162973A1 (fr) * 2010-06-23 2011-12-29 Sandisk Technologies Inc. Utilisation de bandes de garde et d'opérations d'entretien par étapes pour éviter de dépasser des exigences de latence maximale dans systèmes de mémoire non volatile
US8417876B2 (en) 2010-06-23 2013-04-09 Sandisk Technologies Inc. Use of guard bands and phased maintenance operations to avoid exceeding maximum latency requirements in non-volatile memory systems
US8683148B2 (en) 2010-06-30 2014-03-25 Sandisk Il Ltd. Status indication when a maintenance operation is to be performed at a memory device
WO2012001479A1 (fr) * 2010-06-30 2012-01-05 Sandisk Il Ltd. Indication d'état lorsqu'une opération de maintenance doit être réalisée sur un dispositif de mémoire
US9710326B2 (en) 2014-07-28 2017-07-18 SK Hynix Inc. Encoder by-pass with scrambler

Also Published As

Publication number Publication date
JP2009545819A (ja) 2009-12-24
TW200825738A (en) 2008-06-16
KR20090053901A (ko) 2009-05-28
TWI343522B (en) 2011-06-11
JP4362549B1 (ja) 2009-11-11
WO2008019218A3 (fr) 2008-09-12
KR100922308B1 (ko) 2009-10-21

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