WO2007119264A1 - Input impedance circuit and low-pass filter circuit - Google Patents

Input impedance circuit and low-pass filter circuit Download PDF

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Publication number
WO2007119264A1
WO2007119264A1 PCT/JP2006/305523 JP2006305523W WO2007119264A1 WO 2007119264 A1 WO2007119264 A1 WO 2007119264A1 JP 2006305523 W JP2006305523 W JP 2006305523W WO 2007119264 A1 WO2007119264 A1 WO 2007119264A1
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Prior art keywords
output terminal
circuit
inverting
input terminal
inverting output
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PCT/JP2006/305523
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French (fr)
Japanese (ja)
Inventor
Hiroshi Yamazaki
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Fujitsu Limited
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Priority to PCT/JP2006/305523 priority Critical patent/WO2007119264A1/en
Publication of WO2007119264A1 publication Critical patent/WO2007119264A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/46One-port networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • H03H11/08Frequency selective two-port networks using gyrators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • H03H11/12Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1217Frequency selective two-port networks using amplifiers with feedback using a plurality of operational amplifiers
    • H03H11/1252Two integrator-loop-filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • H03H11/12Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1217Frequency selective two-port networks using amplifiers with feedback using a plurality of operational amplifiers
    • H03H11/1252Two integrator-loop-filters
    • H03H11/1256Tow-Thomas biquad

Definitions

  • the present invention relates to an input impedance circuit and a low-pass filter circuit.
  • the reception method has changed from superheterodyne method to direct conversion method
  • the channel selection filter has changed from a bandpass filter as an individual element to an integrated low-pass filter
  • LSI technology has also shifted from bipolar technology to CMOS technology.
  • FIG. 9 is a circuit diagram of a second-order low-pass filter.
  • the signal of the input signal source 901 passes only the low frequency through the secondary low pass filter and is output from the output terminal 902.
  • This low-pass filter has amplifier circuits 911, 912 and 913.
  • the amplifier circuits 911 to 913 are manufactured by a CMOS process.
  • FIG. 10 is a graph showing the noise characteristics of each of the amplifier circuits 91:! To 913
  • FIG. 11 is a graph showing the noise characteristics at the filter output terminal 902 of FIG.
  • the noise characteristic 1101 of the low-pass filter is the sum of the noise characteristics 1001 of the three CMOS amplifier circuits 911 to 913, and a large noise is generated.
  • a low-pass filter used for channel selection in a radio communication receiver circuit has a high order for removing P-junction interference (about 5th order), and a large number of amplifier circuits, resulting in an increase in low-frequency noise. Resulting in.
  • FIG. 12 is a circuit diagram of a second-order low-pass filter in which the low-frequency noise of the CMOS amplifier circuit according to the following Non-Patent Document 1 does not leak as noise in the pass band of the filter
  • FIG. 13 is a circuit diagram of the input impedance circuit 1202. It is a circuit diagram.
  • the secondary low-pass filter consists of an input terminal 1211, Gm amplifier (OTA) 1201, input impedance circuit 1202, resistor 1203, and output Has children 1212. This second-order low-pass filter can reduce low-frequency noise compared to the one shown in Fig. 9.
  • OTA Gm amplifier
  • the input impedance Zf of the secondary input impedance circuit 1202 can be expressed by the following equation.
  • FIG. 14 is a circuit diagram of a fourth-order low-pass filter according to Non-Patent Document 1.
  • the fourth-order low-pass finoleta is a series connection of a Gm amplifier 1201, an input impedance circuit 1202, and a resistor 1203. In this case, the noise of the two sets of filters connected in cascade will be added and the noise of the filter will increase.
  • Non-Patent Document 1 shows that a second-order low-pass filter has a force S that can reduce noise, and a higher-order filter configuration is a cascade connection of a second-order filter configuration. Addition will increase the noise of the filter.
  • Non-Patent Document 1 A. Zolfaghari, B. Razavi, "ALow-Power 2.4GHz Transmitter / Receiver CMOS IC,” IEEE Journal of Solid-State Circuits, VOL 38, pp.176-183, Feb. 2003 Invention Disclosure of
  • An object of the present invention is to provide an input impedance circuit and a low-pass filter circuit that prevent low-frequency noise from leaking to the output terminal of the filter even in a high-order low-pass filter.
  • a first differentiating circuit having an input terminal and an inverting output terminal, and a first capacitor connected between the inverting output terminal and the input terminal of the first differentiating circuit, An input impedance circuit is provided.
  • the input impedance circuit a filter output terminal connected to an input terminal of the first differentiating circuit in the input impedance circuit, a voltage signal source, and the A low-pass filter circuit having a filter resistor connected between the filter output terminals is provided.
  • a filter output terminal connected to the input impedance circuit and the input terminal of the first differentiating circuit in the input impedance circuit. And a filter resistor connected between the filter output terminal and a reference potential, wherein the filter output terminal is connected to a current signal source.
  • FIG. 1 is a circuit diagram showing a configuration example of a low-pass filter according to a first embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing a configuration example of an input impedance circuit.
  • FIG. 3 is a circuit diagram showing a configuration example of a differentiating circuit.
  • FIG. 4 is a circuit diagram showing a configuration example of a low-pass filter according to a second embodiment of the present invention.
  • FIG. 5 is a circuit diagram showing a configuration example of a low-pass filter according to a third embodiment of the present invention.
  • FIG. 6 is a circuit diagram showing a configuration example of a low-pass filter according to a fourth embodiment of the present invention.
  • FIG. 7 is a diagram showing the relationship between the input voltage, the output voltage, the signal strength of the local signal, and the frequency.
  • FIG. 8 is a circuit diagram showing a configuration example of a low-pass filter according to a fifth embodiment of the present invention.
  • FIG. 9 is a circuit diagram of a second-order low-pass filter.
  • FIG. 10 is a graph showing noise characteristics of the amplifier circuit.
  • FIG. 11 is a graph showing noise characteristics at a filter output terminal.
  • FIG. 12 is a circuit diagram of a second-order low-pass filter according to Non-Patent Document 1.
  • FIG. 13 is a circuit diagram of an input impedance circuit.
  • FIG. 14 is a circuit diagram of a fourth-order low-pass filter according to Non-Patent Document 1.
  • FIG. 1 is a circuit diagram showing a configuration example of a low-pass filter according to the first embodiment of the present invention.
  • the input voltage signal source Vin is connected to a reference potential.
  • Filter resistance R is Connected between the input signal source Vin and the filter output terminal Vout.
  • the input impedance circuit 101 is connected to the filter output terminal Vout.
  • FIG. 2 is a circuit diagram showing a configuration example of the input impedance circuit 101.
  • the first to fourth differentiation circuits 201a, 201b, 201c, and 2 Old each have an input terminal VI, a non-inverting output terminal (positive output terminal) Vp, and an inverting output terminal (negative output terminal) Vn.
  • the first to fourth capacitors 202a, 202b, 202c, and 202d are respectively the inverting output terminal Vn of the first to fourth differentiation circuits 201a, 201b, 201c, and 201d and the input terminal of the first differentiation circuit 201a.
  • the input terminal VI of the first differentiating circuit 201a is a terminal of the input impedance circuit 101 and is connected to the output terminal Vout in FIG.
  • the second to fourth differentiating circuits 201b to 201d are connected in cascade to the non-inverted output terminals Vp of the preceding differentiating circuits 201a to 201c, respectively.
  • FIG. 3 is a circuit diagram showing a configuration example of the differentiating circuit 201a.
  • Differentiating circuits 201b to 201d have the same configuration as that of differentiating circuit 201a.
  • the differential amplifier circuit 301 has a non-inverting input terminal (positive input terminal), an inverting input terminal (negative input terminal), a non-inverting output terminal and an inverting output terminal, amplifies an input signal, and outputs a differential signal. To do.
  • the non-inverting output terminal and the inverting output terminal output differential signals that are inverted from each other.
  • the resistor 303 is connected between the inverting output terminal and the non-inverting input terminal of the differential amplifier circuit 301.
  • the capacitor 302 is connected between the input terminal VI of the differentiating circuit 201a and the non-inverting input terminal of the differential amplifier circuit 301.
  • the non-inverting output terminal is connected to the non-inverting output terminal Vp of the differentiating circuit 201a
  • the inverting output terminal is connected to the inverting output terminal Vn of the differentiating circuit 201a
  • the inverting input terminal is the reference potential. Connected to.
  • Differentiating circuits 201a to 201d output signals obtained by differentiating input signals. That is, the differentiating circuits 201a to 201d output a larger signal as the change in the input signal is larger.
  • the capacitors 202a to 202d have a smaller impedance as the frequency of the input signal is higher. Since the capacitors 202a to 202d are connected to the inverting output terminals Vn of the differentiating circuits 201a to 201d, the input impedance circuit 101 cancels the high frequency component of the output terminal Vout and leaves only the low frequency component. As a result, the filter of FIG. 1 functions as a low-pass filter.
  • the differentiating circuits 201b to 201d and the capacitors 202b to 202d may be deleted while leaving the differentiating circuit 201a and the capacity 202a.
  • the differential circuits 201a and 201b and the capacitors 202a and 202b are left, and the fine circuits 201c and 201d and the capacitors 202c and 202d are deleted.
  • the differentiating circuits 201a to 201c and the capacitors 202a to 202c may be left and the differentiating circuit 201d and the capacitor 202d may be deleted.
  • a combination of a differentiation circuit and a capacitor may be added and connected in cascade. If a higher-order low-pass filter is configured, increase the number of cascade connections as well.
  • the input impedance Zf of the input impedance circuit 101 is expressed by the following equation.
  • the ratio between the output voltage Vout and the input voltage Vin in FIG. 1 is expressed by the input impedance Zf and the filter resistance R by the following equation.
  • Vout / Vin Zf / (Zf + R)
  • n the order of the low-pass filter and the input impedance circuit.
  • n 5.
  • the orders of the input impedance circuit 101 and the low-pass filter can be made higher than the second order.
  • the reciprocal of the input impedance Zf of the terminal of the input impedance circuit 101 (the input terminal VI of the differentiation circuit 2 Ola) is expressed by a second or higher order polynomial of s of Laplace transform, as shown in the above equation. That is, the reciprocal of the input impedance Zf at the terminal of the input impedance circuit 101 exhibits a second-order or higher differential frequency characteristic.
  • the output signals / input signals of the differentiating circuits 201a to 201d are 20 dB / dec
  • two differentiating circuits 201a, 201b In the case of the third order using only three, 40 dBZdec, and in the case of the fourth order using only the three differentiating circuits 201a to 201c, it becomes 60 dBZdec.
  • dec (decade) indicates that the frequency ratio is 10 times. The higher the order, the steeper the output signal Z input signal with respect to the frequency, and the frequency selection ability improves.
  • the low-pass filter is used for channel selection in the wireless communication receiver circuit. When using a filter, it is preferable that the order is high (about 5th order) to eliminate adjacent interference.
  • the differential amplifier circuit 301 When the differential amplifier circuit 301 is configured with a bipolar transistor, low frequency noise is not generated, but when the differential amplifier circuit 301 is configured with a CMOS process, low frequency noise is generated in the differential amplifier circuit 301.
  • the low-frequency noise of the amplifier circuits connected in series is connected. Are added and do not become a big noise. In the present embodiment, even if the order is increased, noise does not increase. Therefore, even in a high-order low-pass filter, low-frequency noise can be reduced.
  • the capacitive element realizes the first-order attenuation.
  • the high-order input impedance circuit 101 is configured by connecting differential circuits 201a to 201d with inverted output terminals Vn in cascade, and connecting each inverted output terminal Vn and the input terminal VI of the differential circuit 20 la to capacitors 202a to 202d. It can be realized by combining with 202d.
  • the amplifier circuit 301 serving as a noise source and the output terminal of the filter All connections to Vout are configured via capacitance. For this reason, as the frequency is lower, the noise of the amplifier circuit 301 is more difficult to be transmitted to the filter output terminal Vout. Therefore, the leakage of the low frequency noise of the amplifier circuit 301 to the filter output terminal Vout can be reduced.
  • FIG. 4 is a circuit diagram showing a configuration example of the low-pass filter according to the second embodiment of the present invention.
  • the input impedance circuit 101 is connected to the filter output terminal Vout.
  • the filter resistor R is connected between the filter output terminal Vout and the reference potential.
  • the input current signal source Iin is connected between the filter output terminal Vout and the reference potential.
  • the resistor R converts the current of the input current signal source Iin into a voltage.
  • the input impedance circuit 101 has the same configuration as that shown in FIGS. This embodiment differs from the first embodiment in that an input current signal source Iin is used instead of the input voltage signal source Vin, and the other points are the same.
  • the ratio of the output voltage Vout and the input current lin is expressed by the following equation by the input impedance Zf and the resistance R of the input impedance circuit 101.
  • Vout / Iin RZf / (Zf + R)
  • a low-pass filter when the signal source is the voltage source Vin is shown, and in this embodiment, a low-pass filter when the signal source is the current source lin is shown.
  • This embodiment can also reduce low-frequency noise as in the first embodiment.
  • FIG. 5 is a circuit diagram showing a configuration example of a low-pass filter according to the third embodiment of the present invention.
  • a low-pass filter for a single-ended signal one-line grounding of the input of the differential amplifier circuit 301
  • a low-pass filter for a differential signal is used. Will be explained. Differential signals have a strong noise advantage over single-ended signals.
  • the fifth-order low-pass filter 501 has a non-inverting input terminal Vinp, an inverting input terminal Vinn, a non-inverting output terminal Vop, and an inverting output terminal Von.
  • the input voltage signal source 506 outputs differential signals that are inverted to each other to the input terminals Vinp and Vinn.
  • the fifth-order low-pass filter 501 has resistors 507 ⁇ and 507 ⁇ and a fifth-order input impedance circuit 502.
  • the resistor 507 ⁇ is connected between the non-inverting input terminal Vinp and the non-inverting output terminal Vop.
  • the resistor 507 ⁇ is connected between the inverting input terminal Vinn and the inverting output terminal Von.
  • the fifth-order input impedance circuit 502 includes differentiating circuits 503a to 503d, capacitors 504a to 504d, and capacitors 505a to 505d.
  • Differentiating circuits 503a to 503d each have a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal, and amplify and output a differential signal.
  • Capacitors 504a to 504d are connected between the inverting output terminal and the filter non-inverting output terminal Vop of the differentiating circuits 503a to 503d, respectively.
  • the capacitors 505a to 505d are connected between the non-inverting output terminal and the filter inverting output terminal Von of the differentiating circuits 503a to 503d, respectively.
  • the non-inverting input terminal is connected to the filter non-inverting output terminal Vop
  • the inverting input terminal is connected to the filter inverting output terminal Von.
  • the non-inverting input terminal is connected to the non-inverting output terminal of the preceding differentiating circuit 503a to 503c
  • the inverting input terminal is connected to the inverting output terminal of the preceding differentiating circuit 503a to 503c. That is, the differentiation circuits 503a to 503d are connected in cascade.
  • Differentiating circuits 503a to 503d include a differential amplifier circuit 513, resistors 513 and 514, and capacitors, respectively.
  • the capacitor 511 is connected between the non-inverting input terminals of the differentiating circuits 503a to 503d and the non-inverting input terminal of the differential amplifier circuit 513.
  • the capacitor 512 is connected between the inverting input terminals of the differentiation circuits 503a to 503d and the inverting input terminal of the differential amplifier circuit 513.
  • the resistor 514 is connected between the inverting output terminal and the non-inverting input terminal of the differential amplifier circuit 513.
  • the resistor 515 is connected between the non-inverting output terminal and the inverting input terminal of the differential amplifier circuit 513.
  • the differential amplifier circuit 513 has a non-inverting output terminal connected to the non-inverting output terminals of the differentiating circuits 503a to 503d, and an inverting output terminal connected to the inverting output terminals of the differentiating circuits 503a to 503d.
  • the configuration of a single-ended low-pass filter in which the input of the differential amplifier circuit 301 is grounded on one side is shown.
  • a low-pass filter as an LSI
  • a configuration is shown in which the fifth-order input impedance circuit 502 and the low-pass filter 501 for the voltage signal source using the fifth-order input impedance circuit 502 are fully differential.
  • low-frequency noise can also be reduced for the low-pass filter for the differential signal, as in the first embodiment. Also, by using differential signals, it is possible to make them more resistant to external noise than single-ended signals.
  • FIG. 6 is a circuit diagram showing a configuration example of a low-pass filter according to the fourth embodiment of the present invention.
  • a switch 601 is added to the first embodiment (FIG. 1).
  • the switch 601 is connected between the input voltage signal source Vin and the output terminal Vout. On / off control is performed according to the cull signal Sr.
  • FIG. 7 is a diagram showing the relationship between the input voltage Vin, the output voltage Vout, the signal intensity of the local signal Sr, and the frequency.
  • the frequency fin is the frequency of the input voltage Vin
  • the frequency fout is the frequency of the output voltage Vout
  • the frequency fr is the frequency of the local signal Sr. If the difference between the frequency fr of the local signal Sr and the frequency fin of the input voltage Vin is ⁇ f, the frequency fout of the output voltage Vout is
  • the frequency fr of the local signal Sr may be fin- or fin + ⁇ ⁇ .
  • switch 601 it is possible to convert the high frequency fin to the low frequency fout.
  • the signal frequency fout of the output voltage Vout becomes lower than the signal frequency fin of the input voltage Vin according to the signal frequency fr that controls the switch 601. That is, this embodiment has a down conversion mixer function.
  • FIG. 8 is a circuit diagram showing a configuration example of a low-pass filter according to the fifth embodiment of the present invention.
  • a switch 801 is added to the second embodiment (FIG. 4).
  • the switch 801 is connected between the input current signal source Iin and the output terminal Vout, and is turned on / off according to the low power signal Sr.
  • the signal high frequency fin of the input current source Iin can be converted to the signal low frequency fout of the output voltage terminal Vout.
  • the signal frequency fout of the output voltage terminal Vout becomes lower than the signal frequency fin of the input current signal source Iin in accordance with the signal frequency fr that controls the switch 801. That is, this embodiment has a down conversion mixer function.
  • An input impedance circuit and a low-pass filter circuit that prevent low-frequency noise from leaking to the output terminal of the filter even in a high-order low-pass filter can be provided.

Abstract

An input impedance circuit characterized by comprising a first differentiation circuit (201a) having an input terminal and an inverted output terminal, and a first capacitor (202a) connected between the inverted output terminal and the input terminal of the first differentiation circuit. A low-pass filter circuit characterized by comprising the input impedance circuit, a filter output terminal connected with the input terminal of the first differentiation circuit in the input impedance circuit, and a filter resistor connected between a voltage signal source and the filter output terminal is also provided.

Description

明 細 書  Specification
入力インピーダンス回路及び低域通過フィルタ回路  Input impedance circuit and low-pass filter circuit
技術分野  Technical field
[0001] 本発明は、入力インピーダンス回路及び低域通過フィルタ回路に関する。  [0001] The present invention relates to an input impedance circuit and a low-pass filter circuit.
背景技術  Background art
[0002] 近年、携帯無線器機の小型化要求により受信システムの集積化が進んでいる。こ れに伴い、受信方式はスーパーヘテロダイン方式からダイレクトコンバージョン方式 へ、チャネル選択フィルタは個別素子としてのバンドパスフィルタから集積化された低 域通過フィルタへ、 LSIテクノロジーもバイポーラ技術から CMOS技術へと移行しつ つある。  In recent years, integration of receiving systems has been progressing due to demands for downsizing portable wireless devices. Along with this, the reception method has changed from superheterodyne method to direct conversion method, the channel selection filter has changed from a bandpass filter as an individual element to an integrated low-pass filter, and LSI technology has also shifted from bipolar technology to CMOS technology. There is always.
[0003] 図 9は、 2次低域通過フィルタの回路図である。入力信号源 901の信号は、 2次低 域通過フィルタにより低域周波数のみが通過し、出力端子 902から出力される。この 低域通過フィルタは、増幅回路 911、 912及び 913を有する。増幅回路 911〜913 は、 CMOSプロセスにより製造される。  FIG. 9 is a circuit diagram of a second-order low-pass filter. The signal of the input signal source 901 passes only the low frequency through the secondary low pass filter and is output from the output terminal 902. This low-pass filter has amplifier circuits 911, 912 and 913. The amplifier circuits 911 to 913 are manufactured by a CMOS process.
[0004] 図 10は各増幅回路 91:!〜 913のノイズ特性を示すグラフであり、図 11は図 9のフィ ルタ出力端子 902におけるノイズ特性を示すグラフである。低域通過フィルタのノイズ 特性 1101は、 3つの CMOS増幅回路 911〜913のノイズ特性 1001が加算されたも のとなり、大きなノイズが発生する。  FIG. 10 is a graph showing the noise characteristics of each of the amplifier circuits 91:! To 913, and FIG. 11 is a graph showing the noise characteristics at the filter output terminal 902 of FIG. The noise characteristic 1101 of the low-pass filter is the sum of the noise characteristics 1001 of the three CMOS amplifier circuits 911 to 913, and a large noise is generated.
[0005] 集積密度とコストに優れた CMOSプロセスを用いてアクティブフィルタを製造した場 合、 CMOS増幅回路 911〜913が持つ大きな低周波数ノイズ(lZfノイズ) 1002に よりフィルタのノイズ特性 1101が劣化してしまう。特に、無線通信の受信回路でチヤ ネル選択に用いられる低域通過フィルタでは、 P 接妨害波除去のために次数が高く (5次程度)、増幅回路の個数も多いため、低周波数ノイズも増大してしまう。  [0005] When an active filter is manufactured using a CMOS process with excellent integration density and cost, the noise characteristics 1101 of the filter deteriorates due to the large low-frequency noise (lZf noise) 1002 of the CMOS amplifier circuits 911 to 913. End up. In particular, a low-pass filter used for channel selection in a radio communication receiver circuit has a high order for removing P-junction interference (about 5th order), and a large number of amplifier circuits, resulting in an increase in low-frequency noise. Resulting in.
[0006] 図 12は下記の非特許文献 1による CMOS増幅回路の低周波数ノイズがフィルタの 通過域のノイズとして漏洩しない 2次低域通過フィルタの回路図であり、図 13は入力 インピーダンス回路 1202の回路図である。 2次低域通過フィルタは、入力端子 1211 、 Gmアンプ(OTA) 1201、入力インピーダンス回路 1202、抵抗 1203及び出力端 子 1212を有する。この 2次低域通過フィルタは、図 9のものに比べ、低周波数ノイズ を低減すること力 Sできる。 FIG. 12 is a circuit diagram of a second-order low-pass filter in which the low-frequency noise of the CMOS amplifier circuit according to the following Non-Patent Document 1 does not leak as noise in the pass band of the filter, and FIG. 13 is a circuit diagram of the input impedance circuit 1202. It is a circuit diagram. The secondary low-pass filter consists of an input terminal 1211, Gm amplifier (OTA) 1201, input impedance circuit 1202, resistor 1203, and output Has children 1212. This second-order low-pass filter can reduce low-frequency noise compared to the one shown in Fig. 9.
[0007] 2次入力インピーダンス回路 1202の入力インピーダンス Zfは、次式で表すことがで きる。 [0007] The input impedance Zf of the secondary input impedance circuit 1202 can be expressed by the following equation.
Zf = (l + a - s2) / (b - s + c - s2) Zf = (l + a-s 2 ) / (b-s + c-s 2 )
[0008] 図 14は、非特許文献 1による 4次低域通過フィルタの回路図である。 4次低域通過 フィノレタは、図 12の 2次低域通過フィルタに比べ、 Gmアンプ 1201、入力インピーダ ンス回路 1202及び抵抗 1203の組みを縦列接続したものである。この場合、縦列接 続された 2組のフィルタのノイズが加算されてしまレ、、フィルタのノイズが増大してしま う。 FIG. 14 is a circuit diagram of a fourth-order low-pass filter according to Non-Patent Document 1. Compared to the second-order low-pass filter of FIG. 12, the fourth-order low-pass finoleta is a series connection of a Gm amplifier 1201, an input impedance circuit 1202, and a resistor 1203. In this case, the noise of the two sets of filters connected in cascade will be added and the noise of the filter will increase.
[0009] 非特許文献 1は、 2次低域通過フィルタではノイズを低減することができる力 S、より高 次のフィルタ構成とするには、 2次フィルタ構成の縦列接続となるため、ノイズが加算 されていき、フィルタのノイズを増大させてしまう。  [0009] Non-Patent Document 1 shows that a second-order low-pass filter has a force S that can reduce noise, and a higher-order filter configuration is a cascade connection of a second-order filter configuration. Addition will increase the noise of the filter.
[0010] 非特許文献 1: A. Zolfaghari, B. Razavi, "ALow-Power 2.4GHz Transmitter/Receive r CMOS IC," IEEE Journal of Solid-StateCircuits, VOL 38, pp.176-183, Feb. 2003 発明の開示  [0010] Non-Patent Document 1: A. Zolfaghari, B. Razavi, "ALow-Power 2.4GHz Transmitter / Receiver CMOS IC," IEEE Journal of Solid-State Circuits, VOL 38, pp.176-183, Feb. 2003 Invention Disclosure of
[0011] 本発明の目的は、高次の低域通過フィルタにおいても低周波数ノイズがフィルタの 出力端子に漏洩することを防止する入力インピーダンス回路及び低域通過フィルタ 回路を提供することである。  An object of the present invention is to provide an input impedance circuit and a low-pass filter circuit that prevent low-frequency noise from leaking to the output terminal of the filter even in a high-order low-pass filter.
[0012] 本発明の一観点によれば、入力端子及び反転出力端子を有する第 1の微分回路と 、前記第 1の微分回路の反転出力端子及び入力端子間に接続される第 1の容量とを 有することを特徴とする入力インピーダンス回路が提供される。  [0012] According to one aspect of the present invention, a first differentiating circuit having an input terminal and an inverting output terminal, and a first capacitor connected between the inverting output terminal and the input terminal of the first differentiating circuit, An input impedance circuit is provided.
[0013] 本発明の他の観点によれば、上記の入力インピーダンス回路と、前記入力インピー ダンス回路内の前記第 1の微分回路の入力端子に接続されるフィルタ出力端子と、 電圧信号源及び前記フィルタ出力端子間に接続されるフィルタ抵抗とを有することを 特徴とする低域通過フィルタ回路が提供される。  [0013] According to another aspect of the present invention, the input impedance circuit, a filter output terminal connected to an input terminal of the first differentiating circuit in the input impedance circuit, a voltage signal source, and the A low-pass filter circuit having a filter resistor connected between the filter output terminals is provided.
[0014] 本発明のさらに他の観点によれば、上記の入力インピーダンス回路と、前記入カイ ンピーダンス回路内の前記第 1の微分回路の入力端子に接続されるフィルタ出力端 子と、前記フィルタ出力端子及び基準電位間に接続されるフィルタ抵抗とを有し、前 記フィルタ出力端子は、電流信号源に接続されることを特徴とする低域通過フィルタ 回路が提供される。 [0014] According to still another aspect of the present invention, a filter output terminal connected to the input impedance circuit and the input terminal of the first differentiating circuit in the input impedance circuit. And a filter resistor connected between the filter output terminal and a reference potential, wherein the filter output terminal is connected to a current signal source. .
図面の簡単な説明  Brief Description of Drawings
[0015] [図 1]図 1は、本発明の第 1の実施形態による低域通過フィルタの構成例を示す回路 図である。  FIG. 1 is a circuit diagram showing a configuration example of a low-pass filter according to a first embodiment of the present invention.
[図 2]図 2は、入力インピーダンス回路の構成例を示す回路図である。  FIG. 2 is a circuit diagram showing a configuration example of an input impedance circuit.
[図 3]図 3は、微分回路の構成例を示す回路図である。  FIG. 3 is a circuit diagram showing a configuration example of a differentiating circuit.
[図 4]図 4は、本発明の第 2の実施形態による低域通過フィルタの構成例を示す回路 図である。  FIG. 4 is a circuit diagram showing a configuration example of a low-pass filter according to a second embodiment of the present invention.
[図 5]図 5は、本発明の第 3の実施形態による低域通過フィルタの構成例を示す回路 図である。  FIG. 5 is a circuit diagram showing a configuration example of a low-pass filter according to a third embodiment of the present invention.
[図 6]図 6は、本発明の第 4の実施形態による低域通過フィルタの構成例を示す回路 図である。  FIG. 6 is a circuit diagram showing a configuration example of a low-pass filter according to a fourth embodiment of the present invention.
[図 7]図 7は、入力電圧、出力電圧及びローカル信号の信号強度及び周波数の関係 を示す図である。  [FIG. 7] FIG. 7 is a diagram showing the relationship between the input voltage, the output voltage, the signal strength of the local signal, and the frequency.
[図 8]図 8は、本発明の第 5の実施形態による低域通過フィルタの構成例を示す回路 図である。  FIG. 8 is a circuit diagram showing a configuration example of a low-pass filter according to a fifth embodiment of the present invention.
[図 9]図 9は、 2次低域通過フィルタの回路図である。  FIG. 9 is a circuit diagram of a second-order low-pass filter.
[図 10]図 10は、増幅回路のノイズ特性を示すグラフである。  FIG. 10 is a graph showing noise characteristics of the amplifier circuit.
[図 11]図 11は、フィルタ出力端子におけるノイズ特性を示すグラフである。  FIG. 11 is a graph showing noise characteristics at a filter output terminal.
[図 12]図 12は、非特許文献 1による 2次低域通過フィルタの回路図である。  FIG. 12 is a circuit diagram of a second-order low-pass filter according to Non-Patent Document 1.
[図 13]図 13は、入力インピーダンス回路の回路図である。  FIG. 13 is a circuit diagram of an input impedance circuit.
[図 14]図 14は、非特許文献 1による 4次低域通過フィルタの回路図である。  FIG. 14 is a circuit diagram of a fourth-order low-pass filter according to Non-Patent Document 1.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0016] (第 1の実施形態) [0016] (First embodiment)
図 1は、本発明の第 1の実施形態による低域通過(ローパス)フィルタの構成例を示 す回路図である。入力電圧信号源 Vinは、基準電位に接続される。フィルタ抵抗 Rは 、入力信号源 Vin及びフィルタ出力端子 Vout間に接続される。入力インピーダンス 回路 101は、フィルタ出力端子 Voutに接続される。 FIG. 1 is a circuit diagram showing a configuration example of a low-pass filter according to the first embodiment of the present invention. The input voltage signal source Vin is connected to a reference potential. Filter resistance R is Connected between the input signal source Vin and the filter output terminal Vout. The input impedance circuit 101 is connected to the filter output terminal Vout.
[0017] 図 2は、入力インピーダンス回路 101の構成例を示す回路図である。図 2の 5次入 力インピーダンス回路 101を図 1の低域通過フィルタに使用することにより、 5次低域 通過フィルタを実現することができる。第 1〜第 4の微分回路 201a, 201b, 201c, 2 Oldは、それぞれ入力端子 VI、非反転出力端子(正出力端子) Vp及び反転出力端 子(負出力端子) Vnを有する。第 1〜第 4の容量 202a, 202b, 202c, 202dは、そ れぞれ第 1〜第 4の微分回路 201a, 201b, 201c, 201dの反転出力端子 Vn及び 第 1の微分回路 201aの入力端子 VI間に接続される。第 1の微分回路 201aの入力 端子 VIは、入力インピーダンス回路 101の端子であり、図 1の出力端子 Voutに接続 される。第 2〜第 4の微分回路 201b〜201dは、それぞれ前段の微分回路 201a〜2 01cの非反転出力端子 Vpに縦列接続される。  FIG. 2 is a circuit diagram showing a configuration example of the input impedance circuit 101. By using the fifth-order input impedance circuit 101 in FIG. 2 for the low-pass filter in FIG. 1, a fifth-order low-pass filter can be realized. The first to fourth differentiation circuits 201a, 201b, 201c, and 2 Old each have an input terminal VI, a non-inverting output terminal (positive output terminal) Vp, and an inverting output terminal (negative output terminal) Vn. The first to fourth capacitors 202a, 202b, 202c, and 202d are respectively the inverting output terminal Vn of the first to fourth differentiation circuits 201a, 201b, 201c, and 201d and the input terminal of the first differentiation circuit 201a. Connected between VIs. The input terminal VI of the first differentiating circuit 201a is a terminal of the input impedance circuit 101 and is connected to the output terminal Vout in FIG. The second to fourth differentiating circuits 201b to 201d are connected in cascade to the non-inverted output terminals Vp of the preceding differentiating circuits 201a to 201c, respectively.
[0018] 図 3は、微分回路 201aの構成例を示す回路図である。微分回路 201b〜201dは、 微分回路 201aと同じ構成を有する。差動増幅回路 301は、非反転入力端子 (正入 力端子)、反転入力端子 (負入力端子)、非反転出力端子及び反転出力端子を有し 、入力信号を増幅し、差動信号を出力する。非反転出力端子及び反転出力端子は、 相互に反転した差動信号を出力する。抵抗 303は、差動増幅回路 301の反転出力 端子及び非反転入力端子間に接続される。容量 302は、微分回路 201aの入力端 子 VI及び差動増幅回路 301の非反転入力端子間に接続される。差動増幅回路 30 1は、非反転出力端子が微分回路 201aの非反転出力端子 Vpに接続され、反転出 力端子が微分回路 201aの反転出力端子 Vnに接続され、反転入力端子が基準電 位に接続される。  FIG. 3 is a circuit diagram showing a configuration example of the differentiating circuit 201a. Differentiating circuits 201b to 201d have the same configuration as that of differentiating circuit 201a. The differential amplifier circuit 301 has a non-inverting input terminal (positive input terminal), an inverting input terminal (negative input terminal), a non-inverting output terminal and an inverting output terminal, amplifies an input signal, and outputs a differential signal. To do. The non-inverting output terminal and the inverting output terminal output differential signals that are inverted from each other. The resistor 303 is connected between the inverting output terminal and the non-inverting input terminal of the differential amplifier circuit 301. The capacitor 302 is connected between the input terminal VI of the differentiating circuit 201a and the non-inverting input terminal of the differential amplifier circuit 301. In the differential amplifier circuit 301, the non-inverting output terminal is connected to the non-inverting output terminal Vp of the differentiating circuit 201a, the inverting output terminal is connected to the inverting output terminal Vn of the differentiating circuit 201a, and the inverting input terminal is the reference potential. Connected to.
[0019] 微分回路 201a〜201dは、入力信号を微分した信号を出力する。すなわち、微分 回路 201a〜201dは、入力信号の変化が大きいほど、大きな信号を出力する。容量 202a〜202dは、入力信号の周波数が高いほど、インピーダンスが小さくなる。容量 202a〜202dは、微分回路 201a〜201dの反転出力端子 Vnに接続されるので、入 力インピーダンス回路 101は出力端子 Voutの高周波数成分を打ち消し、低周波数 成分のみを残す。その結果、図 1のフィルタは、低域通過フィルタとして機能する。 [0020] 2次低域通過フィルタを構成する場合には、微分回路 201a及び容量 202aを残し、 微分回路 201b〜201d及び容量 202b〜202dを削除すればよい。 3次低域通過フ ィルタを構成する場合には、微分回路 201a, 201b及び容量 202a, 202bを残し、微 分回路 201c, 201d及び容量 202c, 202dを削除すればよレ、。 4次低域通過フィル タを構成する場合には、微分回路 201a〜201c及び容量 202a〜202cを残し、微分 回路 201d及び容量 202dを削除すればよい。 6次低域通過フィルタを構成する場合 には、微分回路及び容量の組みを追加して、縦列接続すればよい。より高次の低域 通過フィルタを構成する場合は、同様に縦列接続する数を増加すればょレ、。 Differentiating circuits 201a to 201d output signals obtained by differentiating input signals. That is, the differentiating circuits 201a to 201d output a larger signal as the change in the input signal is larger. The capacitors 202a to 202d have a smaller impedance as the frequency of the input signal is higher. Since the capacitors 202a to 202d are connected to the inverting output terminals Vn of the differentiating circuits 201a to 201d, the input impedance circuit 101 cancels the high frequency component of the output terminal Vout and leaves only the low frequency component. As a result, the filter of FIG. 1 functions as a low-pass filter. [0020] When configuring a second-order low-pass filter, the differentiating circuits 201b to 201d and the capacitors 202b to 202d may be deleted while leaving the differentiating circuit 201a and the capacity 202a. When configuring a third-order low-pass filter, the differential circuits 201a and 201b and the capacitors 202a and 202b are left, and the fine circuits 201c and 201d and the capacitors 202c and 202d are deleted. When configuring a fourth-order low-pass filter, the differentiating circuits 201a to 201c and the capacitors 202a to 202c may be left and the differentiating circuit 201d and the capacitor 202d may be deleted. When configuring a 6th-order low-pass filter, a combination of a differentiation circuit and a capacitor may be added and connected in cascade. If a higher-order low-pass filter is configured, increase the number of cascade connections as well.
[0021] 入力インピーダンス回路 101の入力インピーダンス Zfは、次式で表される。  [0021] The input impedance Zf of the input impedance circuit 101 is expressed by the following equation.
Zf = l/ (kl - s + k2 - s2H hkn- sn) Zf = l / (kl-s + k2-s 2 H hkn- s n )
[0022] また、図 1の出力電圧 Vout及び入力電圧 Vinの比は、次式により、入力インピーダ ンス Zf及びフィルタ抵抗 Rにより表される。  Further, the ratio between the output voltage Vout and the input voltage Vin in FIG. 1 is expressed by the input impedance Zf and the filter resistance R by the following equation.
Vout/Vin = Zf/ (Zf +R)  Vout / Vin = Zf / (Zf + R)
= l/ { l +R (kl - s + k2 - s2H +kn - sn) = l / {l + R (kl-s + k2-s 2 H + kn-s n )
[0023] ここで、 nは、低域通過フィルタ及び入力インピーダンス回路の次数を示す。 5次入 力インピーダンス回路及びそれを用いた 5次低域通過フィルタの場合は、 n= 5にな る。  Here, n represents the order of the low-pass filter and the input impedance circuit. In the case of a 5th-order input impedance circuit and a 5th-order low-pass filter using the same, n = 5.
[0024] 本実施形態では、入力インピーダンス回路 101及び低域通過フィルタの次数を 2次 以上にすることができる。その場合、入力インピーダンス回路 101の端子 (微分回路 2 Olaの入力端子 VI)の入力インピーダンス Zfの逆数は、上式のように、ラプラス変換 の sの 2次以上の多項式で表現される。すなわち、入力インピーダンス回路 101の端 子の入力インピーダンス Zfの逆数は、 2次以上の微分周波数特性を示す。  In the present embodiment, the orders of the input impedance circuit 101 and the low-pass filter can be made higher than the second order. In that case, the reciprocal of the input impedance Zf of the terminal of the input impedance circuit 101 (the input terminal VI of the differentiation circuit 2 Ola) is expressed by a second or higher order polynomial of s of Laplace transform, as shown in the above equation. That is, the reciprocal of the input impedance Zf at the terminal of the input impedance circuit 101 exhibits a second-order or higher differential frequency characteristic.
[0025] 各微分回路 201a〜201dの出力信号/入力信号が 20dB/decの場合、 1個の微 分回路 201aのみを用いた 2次の場合は 20dB/dec、 2個の微分回路 201a, 201b のみを用いた 3次の場合は 40dBZdec、 3個の微分回路 201a〜201 cのみを用レヽ た 4次の場合は 60dBZdecとなる。ここで、 dec (decade)は、周波数比が 10倍である ことを示す。次数が高いほど、出力信号 Z入力信号が周波数に対して急な傾きとなり 、周波数選択能力が向上する。無線通信の受信回路でチャネル選択に低域通過フ ィルタを用いる場合には、隣接妨害波除去のために次数が高レヽ(5次程度)ことが好 ましい。 [0025] When the output signals / input signals of the differentiating circuits 201a to 201d are 20 dB / dec, in the second order using only one subtracting circuit 201a, 20 dB / dec, two differentiating circuits 201a, 201b In the case of the third order using only three, 40 dBZdec, and in the case of the fourth order using only the three differentiating circuits 201a to 201c, it becomes 60 dBZdec. Here, dec (decade) indicates that the frequency ratio is 10 times. The higher the order, the steeper the output signal Z input signal with respect to the frequency, and the frequency selection ability improves. The low-pass filter is used for channel selection in the wireless communication receiver circuit. When using a filter, it is preferable that the order is high (about 5th order) to eliminate adjacent interference.
[0026] 差動増幅回路 301をバイポーラトランジスタで構成した場合には低周波数ノイズは 発生しないが、 CMOSプロセスにより構成した場合には差動増幅回路 301に低周波 数ノイズが発生する。しかし、本実施形態では、図 1に示すように、入力インピーダン ス回路 101の端子が出力端子 Voutに接続されるので、図 9及び図 14のように、縦列 接続された増幅回路の低周波数ノイズが加算され、大きなノイズになることがない。本 実施形態では、次数を高くしても、ノイズが増加することがないので、高次の低域通 過フィルタにおいても、低周波数ノイズを低減することができる。  When the differential amplifier circuit 301 is configured with a bipolar transistor, low frequency noise is not generated, but when the differential amplifier circuit 301 is configured with a CMOS process, low frequency noise is generated in the differential amplifier circuit 301. However, in this embodiment, as shown in FIG. 1, since the terminal of the input impedance circuit 101 is connected to the output terminal Vout, as shown in FIGS. 9 and 14, the low-frequency noise of the amplifier circuits connected in series is connected. Are added and do not become a big noise. In the present embodiment, even if the order is increased, noise does not increase. Therefore, even in a high-order low-pass filter, low-frequency noise can be reduced.
[0027] 1次の低域通過フィルタの構成において、 1次の減衰を実現しているのは容量素子 である。本実施形態では、この容量素子の部分を 3次以上の高次の入力インピーダ ンス回路 101を持つ回路に置き換えることにより、高次の低域通過フィルタを構成す ること力 Sできる。高次入力インピーダンス回路 101は、図 2に示すように、反転出力端 子 Vn付の微分回路 201a〜201dを縦列接続し、各反転出力端子 Vnと微分回路 20 laの入力端子 VIを容量 202a〜202dで結合することにより実現することができる。  [0027] In the configuration of the first-order low-pass filter, the capacitive element realizes the first-order attenuation. In the present embodiment, it is possible to construct a high-order low-pass filter by replacing this capacitive element with a circuit having a third-order or higher-order input impedance circuit 101. As shown in FIG. 2, the high-order input impedance circuit 101 is configured by connecting differential circuits 201a to 201d with inverted output terminals Vn in cascade, and connecting each inverted output terminal Vn and the input terminal VI of the differential circuit 20 la to capacitors 202a to 202d. It can be realized by combining with 202d.
[0028] 図 2に示した高次入力インピーダンス回路(アクティブ回路) 101を用いて、図 1に示 す高次低域通過フィルタを構成した場合、ノイズ源となる増幅回路 301とフィルタの 出力端子 Voutとの結合は全て容量を介した構成となる。このため、周波数が低いほ ど、増幅回路 301のノイズはフィルタ出力端子 Voutに伝達しずらくなるため、増幅回 路 301の低周波数ノイズのフィルタ出力端子 Voutへの漏洩を低減できる。  [0028] When the high-order low-pass filter shown in FIG. 1 is configured using the high-order input impedance circuit (active circuit) 101 shown in FIG. 2, the amplifier circuit 301 serving as a noise source and the output terminal of the filter All connections to Vout are configured via capacitance. For this reason, as the frequency is lower, the noise of the amplifier circuit 301 is more difficult to be transmitted to the filter output terminal Vout. Therefore, the leakage of the low frequency noise of the amplifier circuit 301 to the filter output terminal Vout can be reduced.
[0029] (第 2の実施形態)  [0029] (Second Embodiment)
図 4は、本発明の第 2の実施形態による低域通過フィルタの構成例を示す回路図 である。入力インピーダンス回路 101は、フィルタ出力端子 Voutに接続される。フィ ルタ抵抗 Rは、フィルタ出力端子 Vout及び基準電位間に接続される。入力電流信号 源 Iinは、フィルタ出力端子 Vout及び基準電位間に接続される。抵抗 Rは、入力電 流信号源 Iinの電流を電圧に変換する。入力インピーダンス回路 101は、図 2及び図 3と同じ構成を有する。本実施形態は、第 1の実施形態に対し、入力電圧信号源 Vin の代わりに入力電流信号源 Iinを用いた点が異なり、その他の点は同じである。 [0030] 出力電圧 Vout及び入力電流 linの比は、入力インピーダンス回路 101の入力イン ピーダンス Zf及び抵抗 Rにより、次式で表される。 FIG. 4 is a circuit diagram showing a configuration example of the low-pass filter according to the second embodiment of the present invention. The input impedance circuit 101 is connected to the filter output terminal Vout. The filter resistor R is connected between the filter output terminal Vout and the reference potential. The input current signal source Iin is connected between the filter output terminal Vout and the reference potential. The resistor R converts the current of the input current signal source Iin into a voltage. The input impedance circuit 101 has the same configuration as that shown in FIGS. This embodiment differs from the first embodiment in that an input current signal source Iin is used instead of the input voltage signal source Vin, and the other points are the same. The ratio of the output voltage Vout and the input current lin is expressed by the following equation by the input impedance Zf and the resistance R of the input impedance circuit 101.
Vout/Iin = R · Zf/ (Zf + R)  Vout / Iin = RZf / (Zf + R)
=R/{ l +R (kl - s + k2 - s2H hkn- s") = R / {l + R (kl-s + k2-s 2 H hkn- s ")
[0031] 第 1の実施形態では、信号源が電圧源 Vinの場合の低域通過フィルタを示し、本実 施形態では、信号源が電流源 linの場合の低域通過フィルタを示した。本実施形態も 、第 1の実施形態と同様に、低周波数ノイズを低減することができる。  [0031] In the first embodiment, a low-pass filter when the signal source is the voltage source Vin is shown, and in this embodiment, a low-pass filter when the signal source is the current source lin is shown. This embodiment can also reduce low-frequency noise as in the first embodiment.
[0032] (第 3の実施形態)  [0032] (Third embodiment)
図 5は、本発明の第 3の実施形態による低域通過フィルタの構成例を示す回路図 である。第 1の実施形態では、シングルエンド(差動増幅回路 301の入力の片線接地 )の信号についての低域通過フィルタを説明したが、本実施形態では、差動信号に ついての低域通過フィルタを説明する。差動信号は、シングルエンド信号に対し、ノ ィズに強い利点がある。  FIG. 5 is a circuit diagram showing a configuration example of a low-pass filter according to the third embodiment of the present invention. In the first embodiment, a low-pass filter for a single-ended signal (one-line grounding of the input of the differential amplifier circuit 301) has been described. However, in this embodiment, a low-pass filter for a differential signal is used. Will be explained. Differential signals have a strong noise advantage over single-ended signals.
[0033] 5次低域通過フィルタ 501は、非反転入力端子 Vinp、反転入力端子 Vinn、非反転 出力端子 Vop及び反転出力端子 Vonを有する。入力電圧信号源 506は、相互に反 転した差動信号を入力端子 Vinp及び Vinnに出力する。  [0033] The fifth-order low-pass filter 501 has a non-inverting input terminal Vinp, an inverting input terminal Vinn, a non-inverting output terminal Vop, and an inverting output terminal Von. The input voltage signal source 506 outputs differential signals that are inverted to each other to the input terminals Vinp and Vinn.
[0034] 5次低域通過フィルタ 501は、抵抗 507ρ, 507η及び 5次入力インピーダンス回路 5 02を有する。抵抗 507ρは、非反転入力端子 Vinp及び非反転出力端子 Vop間に接 続される。抵抗 507ηは、反転入力端子 Vinn及び反転出力端子 Von間に接続され る。  The fifth-order low-pass filter 501 has resistors 507ρ and 507η and a fifth-order input impedance circuit 502. The resistor 507ρ is connected between the non-inverting input terminal Vinp and the non-inverting output terminal Vop. The resistor 507η is connected between the inverting input terminal Vinn and the inverting output terminal Von.
[0035] 5次入力インピーダンス回路 502は、微分回路 503a〜503d、容量 504a〜504d 及び容量 505a〜505dを有する。微分回路 503a〜503dは、それぞれ非反転入力 端子、反転入力端子、非反転出力端子及び反転出力端子を有し、差動信号を増幅 して出力する。容量 504a〜504dは、それぞれ微分回路 503a〜503dの反転出力 端子及びフィルタ非反転出力端子 Vop間に接続される。容量 505a〜505dは、それ ぞれ微分回路 503a〜503dの非反転出力端子及びフィルタ反転出力端子 Von間に 接続される。  The fifth-order input impedance circuit 502 includes differentiating circuits 503a to 503d, capacitors 504a to 504d, and capacitors 505a to 505d. Differentiating circuits 503a to 503d each have a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal, and amplify and output a differential signal. Capacitors 504a to 504d are connected between the inverting output terminal and the filter non-inverting output terminal Vop of the differentiating circuits 503a to 503d, respectively. The capacitors 505a to 505d are connected between the non-inverting output terminal and the filter inverting output terminal Von of the differentiating circuits 503a to 503d, respectively.
[0036] 微分回路 503aは、非反転入力端子がフィルタ非反転出力端子 Vopに接続され、 反転入力端子がフィルタ反転出力端子 Vonに接続される。微分回路 503b〜503d は、それぞれ非反転入力端子が前段の微分回路 503a〜503cの非反転出力端子 に接続され、反転入力端子が前段の微分回路 503a〜503cの反転出力端子に接続 される。すなわち、微分回路 503a〜503dは、縦列接続される。 [0036] In the differentiation circuit 503a, the non-inverting input terminal is connected to the filter non-inverting output terminal Vop, The inverting input terminal is connected to the filter inverting output terminal Von. In the differentiating circuits 503b to 503d, the non-inverting input terminal is connected to the non-inverting output terminal of the preceding differentiating circuit 503a to 503c, and the inverting input terminal is connected to the inverting output terminal of the preceding differentiating circuit 503a to 503c. That is, the differentiation circuits 503a to 503d are connected in cascade.
[0037] 微分回路 503a〜503dは、それぞれ差動増幅回路 513、抵抗 513, 514及び容量 Differentiating circuits 503a to 503d include a differential amplifier circuit 513, resistors 513 and 514, and capacitors, respectively.
511 , 512を有する。容量 511は、微分回路 503a〜503dの非反転入力端子及び 差動増幅回路 513の非反転入力端子間に接続される。容量 512は、微分回路 503a 〜503dの反転入力端子及び差動増幅回路 513の反転入力端子間に接続される。 抵抗 514は、差動増幅回路 513の反転出力端子及び非反転入力端子間に接続さ れる。抵抗 515は、差動増幅回路 513の非反転出力端子及び反転入力端子間に接 続される。差動増幅回路 513は、非反転出力端子が微分回路 503a〜503dの非反 転出力端子に接続され、反転出力端子が微分回路 503a〜503dの反転出力端子 に接続される。  511, 512. The capacitor 511 is connected between the non-inverting input terminals of the differentiating circuits 503a to 503d and the non-inverting input terminal of the differential amplifier circuit 513. The capacitor 512 is connected between the inverting input terminals of the differentiation circuits 503a to 503d and the inverting input terminal of the differential amplifier circuit 513. The resistor 514 is connected between the inverting output terminal and the non-inverting input terminal of the differential amplifier circuit 513. The resistor 515 is connected between the non-inverting output terminal and the inverting input terminal of the differential amplifier circuit 513. The differential amplifier circuit 513 has a non-inverting output terminal connected to the non-inverting output terminals of the differentiating circuits 503a to 503d, and an inverting output terminal connected to the inverting output terminals of the differentiating circuits 503a to 503d.
[0038] 上記では、 5次入力インピーダンス回路 502及びそれを用いた 5次低域通過フィノレ タ 501の例を説明したが、第 1の実施形態と同様に、微分回路の縦列接続数を変え ることにより、他の次数の低域通過フィルタを構成することができる。  In the above, the example of the fifth-order input impedance circuit 502 and the fifth-order low-pass finolator 501 using the fifth-order input impedance circuit 502 has been described, but the number of cascade connections of the differentiating circuit is changed as in the first embodiment. Thus, low-pass filters of other orders can be configured.
[0039] 第 1の実施形態では、差動増幅回路 301の入力を片側接地したシングノレエンドの 低域通過フィルタの構成を示した。低域通過フィルタを LSIとして集積ィヒする場合、 他の回路からのノイズの伝播を低減するために、信号を差動構成で処理することが 望ましい。本実施形態では、 5次入力インピーダンス回路 502及びそれを用いた電 圧信号源用低域通過フィルタ 501を全差動化した構成を示した。  In the first embodiment, the configuration of a single-ended low-pass filter in which the input of the differential amplifier circuit 301 is grounded on one side is shown. When integrating a low-pass filter as an LSI, it is desirable to process the signal in a differential configuration in order to reduce noise propagation from other circuits. In the present embodiment, a configuration is shown in which the fifth-order input impedance circuit 502 and the low-pass filter 501 for the voltage signal source using the fifth-order input impedance circuit 502 are fully differential.
[0040] 本実施形態では、差動信号についての低域通過フィルタについても、第 1の実施 形態と同様に、低周波数ノイズを低減することができる。また、差動信号を使用するこ とにより、シングルエンド信号に対し、外来ノイズに対して強くすることができる。  In the present embodiment, low-frequency noise can also be reduced for the low-pass filter for the differential signal, as in the first embodiment. Also, by using differential signals, it is possible to make them more resistant to external noise than single-ended signals.
[0041] (第 4の実施形態)  [0041] (Fourth embodiment)
図 6は、本発明の第 4の実施形態による低域通過フィルタの構成例を示す回路図 である。本実施形態は、第 1の実施形態(図 1)に対し、スィッチ 601を追加したもので ある。スィッチ 601は、入力電圧信号源 Vin及び出力端子 Vout間に接続され、ロー カル信号 Srに応じて、オン/オフ制御がされる。 FIG. 6 is a circuit diagram showing a configuration example of a low-pass filter according to the fourth embodiment of the present invention. In the present embodiment, a switch 601 is added to the first embodiment (FIG. 1). The switch 601 is connected between the input voltage signal source Vin and the output terminal Vout. On / off control is performed according to the cull signal Sr.
[0042] 図 7は、入力電圧 Vin、出力電圧 Vout及びローカル信号 Srの信号強度及び周波 数の関係を示す図である。周波数 finは入力電圧 Vinの周波数、周波数 foutは出力 電圧 Voutの周波数、周波数 frはローカル信号 Srの周波数である。ローカル信号 Sr の周波数 frと入力電圧 Vinの周波数 finとの差分を Δ fとすると、出力電圧 Voutの周 波数 foutは となる。ローカル信号 Srの周波数 frは、 fin- であっても、 fin+ ^ ϊ であってもよい。スィッチ 601を用いることにより、高周波数 finを低周波数 foutに変 換すること力 Sできる。出力電圧 Voutの信号周波数 foutは、スィッチ 601を制御する 信号周波数 frに応じて、入力電圧 Vinの信号周波数 finより低くなる。すなわち、本実 施形態は、ダウンコンバージョンミキサ機能を有する。  FIG. 7 is a diagram showing the relationship between the input voltage Vin, the output voltage Vout, the signal intensity of the local signal Sr, and the frequency. The frequency fin is the frequency of the input voltage Vin, the frequency fout is the frequency of the output voltage Vout, and the frequency fr is the frequency of the local signal Sr. If the difference between the frequency fr of the local signal Sr and the frequency fin of the input voltage Vin is Δf, the frequency fout of the output voltage Vout is The frequency fr of the local signal Sr may be fin- or fin + ^ ϊ. By using switch 601, it is possible to convert the high frequency fin to the low frequency fout. The signal frequency fout of the output voltage Vout becomes lower than the signal frequency fin of the input voltage Vin according to the signal frequency fr that controls the switch 601. That is, this embodiment has a down conversion mixer function.
[0043] (第 5の実施形態)  [0043] (Fifth embodiment)
図 8は、本発明の第 5の実施形態による低域通過フィルタの構成例を示す回路図 である。本実施形態は、第 2の実施形態(図 4)に対し、スィッチ 801を追加したもので ある。スィッチ 801は、入力電流信号源 Iin及び出力端子 Vout間に接続され、ロー力 ル信号 Srに応じて、オン/オフ制御がされる。  FIG. 8 is a circuit diagram showing a configuration example of a low-pass filter according to the fifth embodiment of the present invention. In the present embodiment, a switch 801 is added to the second embodiment (FIG. 4). The switch 801 is connected between the input current signal source Iin and the output terminal Vout, and is turned on / off according to the low power signal Sr.
[0044] 第 4の実施形態と同様に、スィッチ 801を用いることにより、入力電流源 Iinの信号 高周波数 finを出力電圧端子 Voutの信号低周波数 foutに変換することができる。出 力電圧端子 Voutの信号周波数 foutは、スィッチ 801を制御する信号周波数 frに応 じて、入力電流信号源 Iinの信号周波数 finより低くなる。すなわち、本実施形態は、 ダウンコンバージョンミキサ機能を有する。  Similar to the fourth embodiment, by using the switch 801, the signal high frequency fin of the input current source Iin can be converted to the signal low frequency fout of the output voltage terminal Vout. The signal frequency fout of the output voltage terminal Vout becomes lower than the signal frequency fin of the input current signal source Iin in accordance with the signal frequency fr that controls the switch 801. That is, this embodiment has a down conversion mixer function.
[0045] なお、上記実施形態は、何れも本発明を実施するにあたっての具体化の例を示し たものに過ぎず、これらによって本発明の技術的範囲が限定的に解釈されてはなら ないものである。すなわち、本発明はその技術思想、またはその主要な特徴から逸脱 することなぐ様々な形で実施することができる。  It should be noted that the above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed as being limited thereto. It is. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.
産業上の利用可能性  Industrial applicability
[0046] 高次の低域通過フィルタにおいても低周波数ノイズがフィルタの出力端子に漏洩す ることを防止する入力インピーダンス回路及び低域通過フィルタ回路を提供すること ができる。 [0046] An input impedance circuit and a low-pass filter circuit that prevent low-frequency noise from leaking to the output terminal of the filter even in a high-order low-pass filter can be provided.

Claims

請求の範囲  The scope of the claims
[1] 入力端子及び反転出力端子を有する第 1の微分回路と、  [1] a first differentiating circuit having an input terminal and an inverting output terminal;
前記第 1の微分回路の反転出力端子及び入力端子間に接続される第 1の容量と を有することを特徴とする入力インピーダンス回路。  An input impedance circuit comprising: a first capacitor connected between an inverting output terminal and an input terminal of the first differentiating circuit.
[2] 前記第 1の微分回路は非反転出力端子を有し、  [2] The first differentiating circuit has a non-inverting output terminal,
さらに、前記第 1の微分回路の非反転出力端子に縦列接続され、入力端子及び反 転出力端子を有する一又は複数の第 2の微分回路と、  And one or more second differentiating circuits connected in series to the non-inverting output terminal of the first differentiating circuit and having an input terminal and an inverted output terminal;
前記一又は複数の第 2の微分回路の反転出力端子及び前記第 1の微分回路の入 力端子間に接続される一又は複数の第 2の容量と  One or more second capacitors connected between the inverting output terminal of the one or more second differentiating circuits and the input terminal of the first differentiating circuit;
を有することを特徴とする請求項 1記載の入力インピーダンス回路。  The input impedance circuit according to claim 1, further comprising:
[3] 前記第 1の微分回路の入力端子の入力インピーダンスの逆数は、ラプラス変換の s の 2次以上の多項式で表現されることを特徴とする請求項 1記載の入力インピーダン ス回路。 [3] The input impedance circuit according to [1], wherein the reciprocal of the input impedance of the input terminal of the first differentiating circuit is expressed by a second-order or higher polynomial of s of Laplace transform.
[4] 前記第 1の微分回路は、  [4] The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、  A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の入力端子及び前記第 1の差動増幅回路の非反転入力端子 間に接続される第 2の容量とを有し、  A second capacitor connected between the input terminal of the first differentiating circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れることを特徴とする請求項 1記載の入力インピーダンス回路。  The first differential amplifier circuit has a non-inverting output terminal connected to the non-inverting output terminal of the first differentiating circuit and an inverting output terminal connected to the inverting output terminal of the first differentiating circuit. The input impedance circuit according to claim 1.
[5] 前記第 1の微分回路は、 [5] The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、 前記第 1の差動増幅回路の非反転出力端子及び反転入力端子間に接続される第 2の抵抗と、 A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit; A second resistor connected between the non-inverting output terminal and the inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の非反転入力端子及び前記第 1の差動増幅回路の非反転入 力端子間に接続される第 2の容量と、  A second capacitor connected between the non-inverting input terminal of the first differentiating circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の反転入力端子及び前記第 1の差動増幅回路の反転入力端 子間に接続される第 3の容量とを有し、  A third capacitor connected between the inverting input terminal of the first differential circuit and the inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れ、  The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, an inverting output terminal connected to an inverting output terminal of the first differentiating circuit,
前記第 1の容量は、前記第 1の微分回路の非反転入力端子に接続され、 さらに、前記第 1の微分回路の非反転出力端子及び反転入力端子間に接続される 第 4の容量を有することを特徴とする請求項 1記載の入力インピーダンス回路。 前記第 1の微分回路は、  The first capacitor is connected to a non-inverting input terminal of the first differentiating circuit, and further includes a fourth capacitor connected between the non-inverting output terminal and the inverting input terminal of the first differentiating circuit. The input impedance circuit according to claim 1. The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、  A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の入力端子及び前記第 1の差動増幅回路の非反転入力端子 間に接続される第 3の容量とを有し、  A third capacitor connected between the input terminal of the first differential circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れ、  The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, an inverting output terminal connected to an inverting output terminal of the first differentiating circuit,
前記第 2の微分回路は、  The second differentiation circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 2の差動増幅回路と、  A second differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 2の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 2の抵抗と、  A second resistor connected between the inverting output terminal and the non-inverting input terminal of the second differential amplifier circuit;
前記第 2の微分回路の入力端子及び前記第 2の差動増幅回路の非反転入力端子 間に接続される第 4の容量とを有し、 Input terminal of the second differential circuit and non-inverting input terminal of the second differential amplifier circuit A fourth capacity connected between and
前記第 2の差動増幅回路は、非反転出力端子が前記第 2の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 2の微分回路の反転出力端子に接続さ れることを特徴とする請求項 2記載の入力インピーダンス回路。  The second differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the second differentiating circuit, and an inverting output terminal connected to an inverting output terminal of the second differentiating circuit. The input impedance circuit according to claim 2.
[7] 請求項 1記載の入力インピーダンス回路と、 [7] The input impedance circuit according to claim 1,
前記入力インピーダンス回路内の前記第 1の微分回路の入力端子に接続されるフ ィルタ出力端子と、  A filter output terminal connected to an input terminal of the first differentiating circuit in the input impedance circuit;
電圧信号源及び前記フィルタ出力端子間に接続されるフィルタ抵抗と  A filter resistor connected between the voltage signal source and the filter output terminal;
を有することを特徴とする低域通過フィルタ回路。  A low-pass filter circuit characterized by comprising:
[8] さらに、前記電圧信号源及び前記フィルタ出力端子間に接続されるスィッチを有し 前記フィルタ出力端子の信号周波数は、前記スィッチを制御する信号周波数に応 じて、前記電圧信号源の信号周波数より低くなることを特徴とする請求項 7記載の低 域通過フィルタ回路。 [8] Further, a switch connected between the voltage signal source and the filter output terminal has a signal frequency of the filter output terminal in accordance with a signal frequency for controlling the switch. The low-pass filter circuit according to claim 7, wherein the low-pass filter circuit is lower than the frequency.
[9] 前記第 1の微分回路は非反転出力端子を有し、 [9] The first differentiating circuit has a non-inverting output terminal,
さらに、前記第 1の微分回路の非反転出力端子に縦列接続され、入力端子及び反 転出力端子を有する一又は複数の第 2の微分回路と、  And one or more second differentiating circuits connected in cascade to the non-inverting output terminal of the first differentiating circuit and having an input terminal and an inverted output terminal;
前記一又は複数の第 2の微分回路の反転出力端子及び前記第 1の微分回路の入 力端子間に接続される一又は複数の第 2の容量と  One or more second capacitors connected between the inverting output terminal of the one or more second differentiating circuits and the input terminal of the first differentiating circuit;
を有することを特徴とする請求項 7記載の低域通過フィルタ回路。  The low-pass filter circuit according to claim 7, further comprising:
[10] 前記第 1の微分回路の入力端子の入力インピーダンスの逆数は、ラプラス変換の s の 2次以上の多項式で表現されることを特徴とする請求項 7記載の低域通過フィルタ 回路。 10. The low-pass filter circuit according to claim 7, wherein the reciprocal of the input impedance of the input terminal of the first differentiating circuit is expressed by a second or higher order polynomial of s of Laplace transform.
[11] 前記第 1の微分回路は、  [11] The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、 前記第 1の微分回路の入力端子及び前記第 1の差動増幅回路の非反転入力端子 間に接続される第 2の容量とを有し、 A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit; A second capacitor connected between the input terminal of the first differentiating circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れることを特徴とする請求項 7記載の低域通過フィルタ回路。  The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, and an inverting output terminal connected to an inverting output terminal of the first differentiating circuit. The low-pass filter circuit according to claim 7.
[12] 前記第 1の微分回路は、 [12] The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、  A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路の非反転出力端子及び反転入力端子間に接続される第 2の抵抗と、  A second resistor connected between the non-inverting output terminal and the inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の非反転入力端子及び前記第 1の差動増幅回路の非反転入 力端子間に接続される第 2の容量と、  A second capacitor connected between the non-inverting input terminal of the first differentiating circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の反転入力端子及び前記第 1の差動増幅回路の反転入力端 子間に接続される第 3の容量とを有し、  A third capacitor connected between the inverting input terminal of the first differential circuit and the inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れ、  The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, an inverting output terminal connected to an inverting output terminal of the first differentiating circuit,
前記第 1の容量は、前記第 1の微分回路の非反転入力端子に接続され、 さらに、前記第 1の微分回路の非反転出力端子及び反転入力端子間に接続される 第 4の容量を有することを特徴とする請求項 7記載の低域通過フィルタ回路。  The first capacitor is connected to a non-inverting input terminal of the first differentiating circuit, and further includes a fourth capacitor connected between the non-inverting output terminal and the inverting input terminal of the first differentiating circuit. The low-pass filter circuit according to claim 7, wherein:
[13] 前記第 1の微分回路は、 [13] The first differentiation circuit includes:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、  A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の入力端子及び前記第 1の差動増幅回路の非反転入力端子 間に接続される第 3の容量とを有し、 Input terminal of the first differentiating circuit and non-inverting input terminal of the first differential amplifier circuit A third capacity connected between,
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れ、  The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, an inverting output terminal connected to an inverting output terminal of the first differentiating circuit,
前記第 2の微分回路は、  The second differentiation circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 2の差動増幅回路と、  A second differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 2の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 2の抵抗と、  A second resistor connected between the inverting output terminal and the non-inverting input terminal of the second differential amplifier circuit;
前記第 2の微分回路の入力端子及び前記第 2の差動増幅回路の非反転入力端子 間に接続される第 4の容量とを有し、  A fourth capacitor connected between the input terminal of the second differential circuit and the non-inverting input terminal of the second differential amplifier circuit;
前記第 2の差動増幅回路は、非反転出力端子が前記第 2の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 2の微分回路の反転出力端子に接続さ れることを特徴とする請求項 9記載の低域通過フィルタ回路。  The second differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the second differentiating circuit, and an inverting output terminal connected to an inverting output terminal of the second differentiating circuit. The low-pass filter circuit according to claim 9.
[14] 請求項 1記載の入力インピーダンス回路と、 [14] The input impedance circuit according to claim 1,
前記入力インピーダンス回路内の前記第 1の微分回路の入力端子に接続されるフ ィルタ出力端子と、  A filter output terminal connected to an input terminal of the first differentiating circuit in the input impedance circuit;
前記フィルタ出力端子及び基準電位間に接続されるフィルタ抵抗とを有し、 前記フィルタ出力端子は、電流信号源に接続されることを特徴とする低域通過フィ ルタ回路。  And a filter resistor connected between the filter output terminal and a reference potential, wherein the filter output terminal is connected to a current signal source.
[15] さらに、前記電流信号源及び前記フィルタ出力端子間に接続されるスィッチを有し 前記フィルタ出力端子の信号周波数は、前記スィッチを制御する信号周波数に応 じて、前記電流信号源の信号周波数より低くなることを特徴とする請求項 14記載の 低域通過フィルタ回路。  [15] Further, a switch connected between the current signal source and the filter output terminal has a signal frequency of the filter output terminal according to a signal frequency for controlling the switch. 15. The low-pass filter circuit according to claim 14, wherein the low-pass filter circuit is lower than the frequency.
[16] 前記第 1の微分回路は非反転出力端子を有し、 [16] The first differentiating circuit has a non-inverting output terminal;
さらに、前記第 1の微分回路の非反転出力端子に縦列接続され、入力端子及び反 転出力端子を有する一又は複数の第 2の微分回路と、 前記一又は複数の第 2の微分回路の反転出力端子及び前記第 1の微分回路の入 力端子間に接続される一又は複数の第 2の容量と And one or more second differentiating circuits connected in series to the non-inverting output terminal of the first differentiating circuit and having an input terminal and an inverted output terminal; One or more second capacitors connected between the inverting output terminal of the one or more second differentiating circuits and the input terminal of the first differentiating circuit;
を有することを特徴とする請求項 14記載の低域通過フィルタ回路。  15. The low-pass filter circuit according to claim 14, further comprising:
[17] 前記第 1の微分回路の入力端子の入力インピーダンスの逆数は、ラプラス変換の s の 2次以上の多項式で表現されることを特徴とする請求項 14記載の低域通過フィル タ回路。 17. The low-pass filter circuit according to claim 14, wherein the reciprocal of the input impedance of the input terminal of the first differentiating circuit is expressed by a second or higher order polynomial of s of Laplace transform.
[18] 前記第 1の微分回路は、  [18] The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、  A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の入力端子及び前記第 1の差動増幅回路の非反転入力端子 間に接続される第 2の容量とを有し、  A second capacitor connected between the input terminal of the first differentiating circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れ、反転入力端子が基準電位に接続されることを特徴とする請求項 14記載の低域 通過フィルタ回路。  The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, an inverting output terminal connected to an inverting output terminal of the first differentiating circuit, 15. The low-pass filter circuit according to claim 14, wherein the inverting input terminal is connected to a reference potential.
[19] 前記第 1の微分回路は、 [19] The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、  A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路の非反転出力端子及び反転入力端子間に接続される第 2の抵抗と、  A second resistor connected between the non-inverting output terminal and the inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の非反転入力端子及び前記第 1の差動増幅回路の非反転入 力端子間に接続される第 2の容量と、  A second capacitor connected between the non-inverting input terminal of the first differentiating circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の反転入力端子及び前記第 1の差動増幅回路の反転入力端 子間に接続される第 3の容量とを有し、 前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れ、 A third capacitor connected between the inverting input terminal of the first differential circuit and the inverting input terminal of the first differential amplifier circuit; The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, an inverting output terminal connected to an inverting output terminal of the first differentiating circuit,
前記第 1の容量は、前記第 1の微分回路の非反転入力端子に接続され、 さらに、前記第 1の微分回路の非反転出力端子及び反転入力端子間に接続される 第 4の容量を有することを特徴とする請求項 14記載の低域通過フィルタ回路。  The first capacitor is connected to a non-inverting input terminal of the first differentiating circuit, and further includes a fourth capacitor connected between the non-inverting output terminal and the inverting input terminal of the first differentiating circuit. 15. The low-pass filter circuit according to claim 14, wherein:
前記第 1の微分回路は、  The first differentiating circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 1の差動増幅回路と、  A first differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 1の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 1の抵抗と、  A first resistor connected between an inverting output terminal and a non-inverting input terminal of the first differential amplifier circuit;
前記第 1の微分回路の入力端子及び前記第 1の差動増幅回路の非反転入力端子 間に接続される第 3の容量とを有し、  A third capacitor connected between the input terminal of the first differential circuit and the non-inverting input terminal of the first differential amplifier circuit;
前記第 1の差動増幅回路は、非反転出力端子が前記第 1の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 1の微分回路の反転出力端子に接続さ れ、  The first differential amplifier circuit has a non-inverting output terminal connected to a non-inverting output terminal of the first differentiating circuit, an inverting output terminal connected to an inverting output terminal of the first differentiating circuit,
前記第 2の微分回路は、  The second differentiation circuit is:
非反転入力端子、反転入力端子、非反転出力端子及び反転出力端子を有する第 2の差動増幅回路と、  A second differential amplifier circuit having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
前記第 2の差動増幅回路の反転出力端子及び非反転入力端子間に接続される第 2の抵抗と、  A second resistor connected between the inverting output terminal and the non-inverting input terminal of the second differential amplifier circuit;
前記第 2の微分回路の入力端子及び前記第 2の差動増幅回路の非反転入力端子 間に接続される第 4の容量とを有し、  A fourth capacitor connected between the input terminal of the second differential circuit and the non-inverting input terminal of the second differential amplifier circuit;
前記第 2の差動増幅回路は、非反転出力端子が前記第 2の微分回路の非反転出 力端子に接続され、反転出力端子が前記第 2の微分回路の反転出力端子に接続さ れることを特徴とする請求項 16記載の低域通過フィルタ回路。  The second differential amplifier circuit has a non-inverting output terminal connected to the non-inverting output terminal of the second differentiating circuit, and an inverting output terminal connected to the inverting output terminal of the second differentiating circuit. The low-pass filter circuit according to claim 16, wherein:
PCT/JP2006/305523 2006-03-20 2006-03-20 Input impedance circuit and low-pass filter circuit WO2007119264A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102721691A (en) * 2011-04-08 2012-10-10 南京分析仪器厂有限公司 Wave-reduction circuit used for magneto-dynamic mechanical oxygen analyzer

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS576725B2 (en) * 1975-11-03 1982-02-06
JPH09148880A (en) * 1995-09-18 1997-06-06 Toshiba Corp Electronic circuit, filter device using it and radio equipment
JP2005514806A (en) * 2001-05-25 2005-05-19 トロピアン・インコーポレーテッド Quadrature phase alignment method in communication receiver

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS576725B2 (en) * 1975-11-03 1982-02-06
JPH09148880A (en) * 1995-09-18 1997-06-06 Toshiba Corp Electronic circuit, filter device using it and radio equipment
JP2005514806A (en) * 2001-05-25 2005-05-19 トロピアン・インコーポレーテッド Quadrature phase alignment method in communication receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102721691A (en) * 2011-04-08 2012-10-10 南京分析仪器厂有限公司 Wave-reduction circuit used for magneto-dynamic mechanical oxygen analyzer

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