WO2007106660A3 - Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system - Google Patents

Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system

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Publication number
WO2007106660A3
WO2007106660A3 PCT/US2007/062841 US2007062841W WO2007106660A3 WO 2007106660 A3 WO2007106660 A3 WO 2007106660A3 US 2007062841 W US2007062841 W US 2007062841W WO 2007106660 A3 WO2007106660 A3 WO 2007106660A3
Authority
WO
Grant status
Application
Patent type
Prior art keywords
dielectric
high
form
gate
layer
Prior art date
Application number
PCT/US2007/062841
Other languages
French (fr)
Other versions
WO2007106660A2 (en )
Inventor
Thai Cheng Chua
Steven Hung
Patricia M Liu
Tatsuya Sato
Alex M Paterson
Valentin Todorov
John P Holland
Original Assignee
Applied Materials Inc
Thai Cheng Chua
Steven Hung
Patricia M Liu
Tatsuya Sato
Alex M Paterson
Valentin Todorov
John P Holland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/3105After-treatment
    • H01L21/3115Doping the insulating layers
    • H01L21/31155Doping the insulating layers by ion implantation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes, e.g. for surface treatment of objects such as coating, plating, etching, sterilising or bringing about chemical reactions
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes, e.g. for surface treatment of objects such as coating, plating, etching, sterilising or bringing about chemical reactions
    • H01J37/34Gas-filled discharge tubes, e.g. for surface treatment of objects such as coating, plating, etching, sterilising or bringing about chemical reactions operating with cathodic sputtering
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/314Inorganic layers
    • H01L21/3143Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31683Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of metallic layers, e.g. Al deposited on the body, e.g. formation of multi-layer insulating structures
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Abstract

Methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. A method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. An apparatus adapted to 'implant' metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then treating the deposited material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform desirable post treatment steps, and form a gate layers.
PCT/US2007/062841 2006-03-09 2007-02-27 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system WO2007106660A3 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
US78150806 true 2006-03-09 2006-03-09
US60/781,508 2006-03-09
US11614022 US20070209930A1 (en) 2006-03-09 2006-12-20 Apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US11/614,027 2006-12-20
US11/614,019 2006-12-20
US11/614,022 2006-12-20
US11614027 US7837838B2 (en) 2006-03-09 2006-12-20 Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus
US11614019 US7678710B2 (en) 2006-03-09 2006-12-20 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20087024385A KR101117450B1 (en) 2006-03-09 2007-02-27 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
JP2008558451A JP4931939B2 (en) 2006-03-09 2007-02-27 Method of forming a semiconductor device
CN 200780008358 CN101401194B (en) 2006-03-09 2007-02-27 Method and apparatus for producing a plasma system using a low-energy high-k gate of the transistor
KR20117011387A KR101216199B1 (en) 2006-03-09 2007-02-27 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system

Publications (2)

Publication Number Publication Date
WO2007106660A2 true WO2007106660A2 (en) 2007-09-20
WO2007106660A3 true true WO2007106660A3 (en) 2007-12-13

Family

ID=38510145

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US2007/062841 WO2007106660A3 (en) 2006-03-09 2007-02-27 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
PCT/US2007/063702 WO2007121007A3 (en) 2006-03-09 2007-03-09 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/US2007/063702 WO2007121007A3 (en) 2006-03-09 2007-03-09 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system

Country Status (3)

Country Link
KR (2) KR101117450B1 (en)
CN (1) CN101401194B (en)
WO (2) WO2007106660A3 (en)

Cited By (1)

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US9012030B2 (en) 2002-01-08 2015-04-21 Applied Materials, Inc. Process chamber component having yttrium—aluminum coating

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US7758763B2 (en) 2006-10-31 2010-07-20 Applied Materials, Inc. Plasma for resist removal and facet control of underlying features
JP5221121B2 (en) * 2007-12-27 2013-06-26 キヤノン株式会社 Method for forming the insulating film
JP5264163B2 (en) * 2007-12-27 2013-08-14 キヤノン株式会社 Method for forming the insulating film
US8540851B2 (en) * 2009-02-19 2013-09-24 Fujifilm Corporation Physical vapor deposition with impedance matching network
US8223534B2 (en) 2009-04-03 2012-07-17 Taiwan Semiconductor Manufacturing Company, Ltd. Raising programming currents of magnetic tunnel junctions using word line overdrive and high-k metal gate
CN102479708B (en) * 2010-11-25 2015-06-03 中芯国际集成电路制造(北京)有限公司 Preparation method of metal oxide semiconductor (MOS) transistor
US9315900B2 (en) 2012-01-27 2016-04-19 Applied Materials, Inc. Isolation of microwave sources through bellows
US9177787B2 (en) * 2013-03-15 2015-11-03 Applied Materials, Inc. NH3 containing plasma nitridation of a layer of a three dimensional structure on a substrate
CN104103548B (en) * 2013-04-02 2018-02-13 中芯国际集成电路制造(上海)有限公司 An active region wafer front pad oxide pre-cleaning method

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US20020177293A1 (en) * 1999-02-26 2002-11-28 Wilk Glen D. Hafnium nitride gate dielectric
US20030143328A1 (en) * 2002-01-26 2003-07-31 Applied Materials, Inc. Apparatus and method for plasma assisted deposition
US20030205772A1 (en) * 2000-09-18 2003-11-06 Schaeffer James K. Semiconductor structure and process for forming a metal oxy-nitride dielectric layer
US20030230549A1 (en) * 2002-06-13 2003-12-18 International Business Machines Corporation Method for etching chemically inert metal oxides
US20040242021A1 (en) * 2003-05-28 2004-12-02 Applied Materials, Inc. Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
US20060042755A1 (en) * 2004-08-30 2006-03-02 Plasmamed, Llc Large surface area dry etcher

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US20020177293A1 (en) * 1999-02-26 2002-11-28 Wilk Glen D. Hafnium nitride gate dielectric
US20030205772A1 (en) * 2000-09-18 2003-11-06 Schaeffer James K. Semiconductor structure and process for forming a metal oxy-nitride dielectric layer
US20030143328A1 (en) * 2002-01-26 2003-07-31 Applied Materials, Inc. Apparatus and method for plasma assisted deposition
US20030230549A1 (en) * 2002-06-13 2003-12-18 International Business Machines Corporation Method for etching chemically inert metal oxides
US20040242021A1 (en) * 2003-05-28 2004-12-02 Applied Materials, Inc. Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
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Publication number Priority date Publication date Assignee Title
US9012030B2 (en) 2002-01-08 2015-04-21 Applied Materials, Inc. Process chamber component having yttrium—aluminum coating

Also Published As

Publication number Publication date Type
CN101401194B (en) 2011-12-28 grant
KR20080100386A (en) 2008-11-17 application
WO2007121007A3 (en) 2008-10-02 application
WO2007106660A2 (en) 2007-09-20 application
CN101401194A (en) 2009-04-01 application
KR101117450B1 (en) 2012-03-13 grant
WO2007121007A2 (en) 2007-10-25 application
KR20110074602A (en) 2011-06-30 application
KR101216199B1 (en) 2012-12-27 grant

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