WO2007102192A1 - 半導体デバイス製造方法 - Google Patents
半導体デバイス製造方法 Download PDFInfo
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- WO2007102192A1 WO2007102192A1 PCT/JP2006/304286 JP2006304286W WO2007102192A1 WO 2007102192 A1 WO2007102192 A1 WO 2007102192A1 JP 2006304286 W JP2006304286 W JP 2006304286W WO 2007102192 A1 WO2007102192 A1 WO 2007102192A1
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- exposure
- waveform
- substrate
- semiconductor device
- semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
- H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
- H01J37/3174—Particle-beam lithography, e.g. electron beam lithography
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/7055—Exposure light control in all parts of the microlithographic apparatus, e.g. pulse length control or light interruption
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/7065—Defects, e.g. optical inspection of patterned layer for defects
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates to a semiconductor device manufacturing method, and more particularly to a method suitable for optimizing a photoresist process using an electron beam.
- This microfabrication process includes an exposure process for transferring CAD data or a fine pattern formed on a mask to a photoresist, which is a photosensitive resin applied on a silicon substrate (wafer). It is out.
- This exposure process is a fine processing technique using the principle of photography and comprises the following processes.
- First step A photoresist is uniformly coated on a silicon substrate and dried.
- Second step The photoresist on the silicon substrate is irradiated with light through a mask on which a pattern corresponding to the shape of the microstructure is formed.
- Third step The photoresist is developed to separate the unexposed portion from the exposed portion.
- Step 4 To fix the shape of the developed photoresist, it is baked at a high temperature to complete the photoresist structure.
- the shape of the photoresist structure is not sharp and an error occurs with respect to the target mask dimension.
- the photoresist structure remains thick. Conversely, if the amount of exposure is large, the photoresist structure becomes thin, and part of the photoresist structure is lost after development. There is a fear. In such a case, the intended photoresist structure cannot be obtained, which causes defects in the fine structure formed on the silicon substrate.
- the optimization of the exposure process is to combine the two parameters of force and exposure so that the desired device structure can be obtained.
- robust exposure conditions in which stable processing results can be obtained even if the state of the apparatus slightly fluctuates ( It is practically important to obtain a process window.
- a fine structure formed on a silicon substrate has a simple geometric shape, and accordingly, a structure transferred by an exposure process has a simple geometric shape.
- contact holes and via holes for conducting electricity were simply circular, and transistor gates were rectangular.
- CDSEM Cross-section Scanning Electron Microscope
- the CDSEM described above is a device that obtains a fine-structured image by irradiating an object with an accelerated focused electron beam and detecting the amount of electrons bounced back.
- One of the typical structures is a damascene structure, in which a trench for wiring is formed on a conventional hole structure.
- OPC Optical Proximity Correction
- an inspection apparatus for this purpose, an actual device that does not require a test pattern is manufactured, and an apparatus that inspects all the surface structures at high speed is used.
- the number of processed silicon substrates per hour of the exposure apparatus is 60 or 120, and the exposure apparatus has a high-speed processing capability.
- the production capacity is further improved.
- a plurality of exposure apparatuses are installed. Because there are differences in the power lenses and mechanical solids that are designed and managed so that the characteristics of each exposure apparatus are the same, it is inevitable that characteristic differences will occur depending on the exposure apparatus. Further, since the characteristics of the resist material change, the exposure conditions set in advance under ideal conditions are not necessarily the optimum conditions even in a mass production factory.
- the optimum value of the above parameter values varies depending on the device that is not simply determined by the two parameters of focus and exposure amount, because the exposure result in a mass production factory is not simply determined. Therefore, in order to optimize the exposure conditions, it is necessary to inspect the exposure results of all the exposure apparatuses, and it takes a very long time.
- Photoresist is resistant to the chemical process of the subsequent process, and no chemical reaction takes place where it is covered with photoresist. Rather than being determined by the surface shape (top surface shape) of the photoresist, it is determined by the shape of the bottom surface portion that contacts the base to be protected. Therefore, it is most important to grasp and control the shape of the bottom surface portion of the photoresist in contact with the base.
- FIGS. 13A and 13B and FIGS. 14A and 14B show that the shape of the photoresist 132 gives to the etching process when the gate material 131 formed on the silicon substrate 133 is etched. It is a figure for demonstrating an influence.
- FIG. 13A shows a state in which the photoresist 132 is well formed, and shows a case where the exposure conditions are appropriate.
- the side surface of the resist 132 is formed vertically.
- FIG. 13B shows the shape of the photoresist 132 when the exposure conditions are inappropriate.
- the top surface shape of the resist 132 is substantially the same as FIG. 13A, but the bottom surface shape is completely different because it has a skirt! /
- FIGS. 14A and 14B show cross-sectional structures obtained by etching the gate material 131 using the photoresists 132 shown in FIGS. 13A and 13B as a mask, respectively.
- the gate material 131 is satisfactorily etched to obtain a desired gate shape.
- the etching amount of the gate material 131 is insufficient in the bottom region of the resist 132 as shown in FIG.
- the gate material 131 also has a skirted shape, which causes a problem of short-circuiting between gate wirings.
- FIGS. 15A and 15B and FIGS. 16A and 16B show that the shape of the photoresist 153 is etched when a hole is formed by etching the oxide film 151 and the hard mask 152 formed on the silicon substrate 154. It is a figure for demonstrating the influence which acts on a process.
- FIG. 15A shows a state in which the photoresist 153 is well formed, and shows a case where the exposure conditions are appropriate.
- FIG. 15B shows the case where the exposure conditions are inappropriate, and the resist 153 has a bottomed shape.
- FIGS. 16A and 16B show cross-sectional structures obtained by etching the oxide film 151 and the hard mask 152 using the photoresist 153 shown in FIGS. 15A and 15B as a mask, respectively.
- the oxide film 151 is uniformly etched to the bottom of the hole HI 6A as shown in FIG. 16A.
- a desired hole shape can be obtained.
- the photoresist 153 having an inappropriate shape shown in FIG. For example, since part of the resist 153 remains at the interface with the hard mask 152, the etching rate of the oxide film 151 becomes non-uniform. For this reason, as shown in FIG. 16B, there is a problem that the size of the hole H16B formed in the oxide film 151 is reduced, or that the hole does not reach the underlying silicon substrate 154. Produce.
- FIG. 17 shows an example of the effect of exposure conditions on the bottom shape of a hole.
- a non-defective product that is, when the exposure conditions are optimized, the bottom surface shape of the hole exhibits a shape A corresponding to the pattern on the mask, as shown in FIG.
- an elliptical shape B is exhibited as shown in (b) of the figure, or a distorted shape C is obtained as shown in (c) of the figure. May present.
- the resist structure obtained in the exposure process is irradiated with an electron beam to obtain a secondary electron waveform, and the similarity of the process result is compared with a reference secondary electron waveform.
- a method for evaluating and judging whether the process result is good or not is known (see Patent Document 2). However, for this reason, the use of this method is not sufficient for optimizing the exposure process because the definition of the reference state itself is not accurate.
- a method shown in the flowchart of FIG. 18 is known (see Patent Document 3). That is, a resist is applied to one wafer (Step S181), and exposure is performed in the above-mentioned wafer with different exposure conditions using a test mask formed with various patterns (Step S182), and the wafer is developed. And dry (step S183), and then CDSEM surface Dimension measurement (step SI 84) and surface pattern check by defect inspection equipment (step S185) are performed, and a process window is obtained from these results (step S186), thereby optimizing the exposure process.
- the defect inspection apparatus measures the shape using light or secondary electrons, in principle, only the surface shape of the resist can be measured. Therefore, even if this method is used, information on the true bottom shape of the photoresist structure cannot be obtained.
- Patent Document 1 Japanese Patent Laid-Open No. 2005-64023
- Patent Document 2 Japanese Patent Laid-Open No. 11-345754
- Patent Document 3 Japanese Patent Laid-Open No. 2005-236060
- the exposure process is a process that can be reprocessed. When a failure is found, the exposure process can be performed again after removing the resist. Therefore, the second exposure condition is generally corrected based on the first exposure condition.
- the exposure process In the method of observing only the surface shape, it is impossible to determine whether the focus shifts in the plus or minus direction, and the exposure conditions are optimal for the focus. There was a big problem that it was not possible.
- the present invention has been made in view of the above circumstances, and an object of the present invention is to better manage the photoresist process and improve the manufacturing efficiency of semiconductor devices.
- a semiconductor device manufacturing method uses a step of forming a photoresist film on a semiconductor substrate and a mask on which a predetermined pattern for process evaluation is formed. Exposing the photoresist film under different exposure conditions for each shot; developing the photoresist film under predetermined conditions to form a photoresist structure on the semiconductor substrate; and Irradiating the surface of the semiconductor substrate on which the resist structure is formed with an electron beam; measuring a substrate current generated in the semiconductor substrate with the irradiation of the electron beam; and a waveform force process of the substrate current Calculating a window number.
- a step of forming a photoresist structure on a semiconductor substrate, and a step of irradiating a surface of the semiconductor substrate on which the photoresist structure is formed with an electron beam A step of measuring a substrate current generated in the semiconductor substrate with the irradiation of the electron beam, a step of comparing a process evaluation value obtained from the waveform of the substrate current with a process window, and a result of the comparison And determining whether the exposure process is good or bad.
- a step of forming a photoresist film on a semiconductor substrate and a mask on which a predetermined pattern for process evaluation is formed are used for different exposure conditions for each shot. Exposing the photoresist film, developing the photoresist film under predetermined conditions to form a photoresist structure on the semiconductor substrate, and the semiconductor on which the photoresist structure is formed. The electronic Irradiating a beam, measuring a substrate current generated in the semiconductor substrate upon irradiation of the electron beam, secondary electrons or reflected electrons, and a waveform of the substrate current and secondary or reflected electrons. And a step of calculating the process window from the waveform.
- a step of forming a photoresist structure on a semiconductor substrate and a step of irradiating a surface of the semiconductor substrate on which the photoresist structure is formed with an electron beam Obtained from the substrate current generated in the semiconductor substrate upon irradiation of the electron beam, the step of measuring secondary electrons or reflected electrons, and the waveform of the substrate current and the waveform of secondary electrons or reflected electrons.
- the waveform is compared with a reference waveform to determine whether the exposure process is good or bad.
- the semiconductor device manufacturing method further includes a step of extracting a feature amount of the photoresist structure from the waveform.
- the semiconductor device manufacturing method includes a step of outputting the exposure condition or determination result of the exposure step to any one of a computer screen, paper, and a file.
- an electron beam is irradiated to a photoresist structure having a first pattern formed on a first semiconductor substrate by changing an exposure condition for each shot, and the first The first substrate current generated in the semiconductor substrate is measured, the waveform of the first substrate current is associated with the exposure conditions and recorded in a database, and the first semiconductor current is fabricated on the second semiconductor substrate through an exposure process. Irradiating the photoresist structure having the second pattern with an electron beam to measure a second substrate current generated in the second semiconductor substrate; and a second substrate obtained from the second pattern. Compare the waveform of the current with the waveform of the first substrate current recorded in the database.
- the method includes a step of obtaining an exposure condition associated with the waveform as a matching output, and a step of calculating an exposure amount and a focus amount from the matching output.
- the waveform force of the substrate current obtained from the second pattern the step of obtaining the feature amount of the photoresist structure, the feature amount and the reference process condition And a step of obtaining a difference between the feature amount and the reference process condition, and a step of changing a set value of the exposure apparatus by the difference.
- the photoresist structure formed by the exposure step includes a gate structure pattern and a hole structure pattern.
- the secondary electron waveform and the reflected electron waveform are obtained from the photoresist structure on the semiconductor substrate, and the secondary electron waveform and the reflected electron waveform are obtained.
- An evaluation value is determined from both of the substrate current waveforms.
- the semiconductor device manufacturing method is characterized in that after forming a conductive film on a measurement target, a resist is applied and used for measurement.
- the photoresist process can be managed well and the manufacturing efficiency of the semiconductor device can be improved.
- FIG. 1 is a block diagram of a semiconductor device measuring apparatus used for carrying out a semiconductor device manufacturing method according to an embodiment of the present invention.
- FIG. 2 is a diagram showing the relationship between electron beam scanning coordinates, substrate current, and secondary electron intensity in the semiconductor measurement apparatus according to the present embodiment.
- FIG. 3 is a diagram showing the relationship between the electron beam irradiation time, the substrate current, and the intensity of secondary electrons in the semiconductor measuring apparatus according to the present embodiment.
- FIG. 5 is a diagram for explaining exposure conditions for determining process conditions in the semiconductor device manufacturing method according to the present embodiment.
- FIG. 6 is a diagram showing a pattern arrangement example for determining process conditions in the semiconductor device manufacturing method according to the present embodiment.
- FIG. 7 is a diagram showing the relationship between the focus amount and the hole shape when holes are sparsely arranged.
- FIG. 8 is a diagram showing the relationship between the focus amount and the hole shape when the holes are densely arranged.
- FIG. 9 is a diagram showing a relationship between a focus amount and a resist hole size.
- FIG. 10 is a flowchart showing a procedure of a method for managing a photoresist structure in the semiconductor device manufacturing method according to the embodiment of the present invention.
- FIG. 11 is a diagram showing a configuration of a database used for determining exposure conditions in the semiconductor device manufacturing method according to the present embodiment.
- FIG. 12 is a diagram showing a relationship between a process margin and a non-defective product in the semiconductor device manufacturing method according to the present embodiment.
- FIG. 13A is a diagram showing a resist formation example (appropriate exposure conditions) when processing a gate material.
- FIG. 13B is a diagram showing a resist formation example (inappropriate exposure conditions) when processing a gate material.
- FIG. 14A is a diagram showing a gate material processed using a resist formed under appropriate exposure conditions.
- FIG. 14B is a diagram showing a gate material processed using a resist formed under inappropriate exposure conditions.
- FIG. 15A Example of resist formation when contact holes are formed in an acid film (appropriate exposure)
- FIG. 15B is a diagram showing a resist formation example (inappropriate exposure condition) when a contact hole is formed in an acid film.
- FIG. 16A is a diagram showing a contact hole formed in an oxide film using a resist formed under appropriate exposure conditions.
- FIG. 16B is a diagram showing a contact hole formed in an acid film using a resist formed under inappropriate exposure conditions.
- FIG. 17 is a view showing a bottom shape of a hole formed in a resist.
- FIG. 18 is a flowchart showing a procedure of an exposure condition determination method according to the prior art. Explanation of symbols
- Pattern matching engine 150 Waveform processor
- FIG. 1 shows a semiconductor measuring apparatus used for carrying out a semiconductor device manufacturing method according to the present invention.
- This semiconductor measuring device irradiates a semiconductor substrate 23, which is an object to be measured (sample), with an electron beam EB, measures a substrate current induced by the electron beam EB, and is formed on the semiconductor substrate 23 from the substrate current.
- the basic principle is to obtain evaluation values for fine structures such as holes.
- an electron gun 10 that generates an electron beam EB is attached to an upper portion of a vacuum chamber 20 that houses a semiconductor substrate 23 that is a measurement object (sample).
- the electron gun 10 includes an electron beam source 11, and a high voltage power source 40 is connected to the electron beam source 11.
- a lens 12, an aperture 13, a deflecting device 14, and an objective lens 15 are arranged in this order along the emission direction of the electron flow from the electron beam source 11.
- the energy, current amount, and focus state of the electron beam EB can be controlled arbitrarily.
- an XY stage 21 for supporting the semiconductor substrate 23 and a tray 22 fixed on the XY stage 21 are accommodated inside the vacuum chamber 20, an XY stage 21 for supporting the semiconductor substrate 23 and a tray 22 fixed on the XY stage 21 are accommodated.
- the semiconductor substrate 23 is placed on the tray 22. It is placed.
- the irradiation direction of the electron beam EB emitted from the electron gun 10 is directed to the surface of the semiconductor substrate 23 placed on the tray 22, and by moving the position of the tray 22 with the XY stage 21, The irradiation position of the electron beam EB on the semiconductor substrate 23 can be adjusted. You may have a Z stage if necessary.
- a secondary electron detector 24 for detecting secondary electrons emitted from the surface force of the semiconductor substrate 23 upon irradiation of the electron beam EB or a backscattered electron detection (not shown).
- a vessel is provided.
- an electrode (not shown) for applying a bias voltage to the semiconductor substrate 23 is provided inside the vacuum chamber 20.
- a voltage applying device for supplying a bias voltage to the outside is provided outside the vacuum chamber 20. The degree of vacuum inside the vacuum chamber 20 is maintained at, for example, about 10 to the sixth power [torr].
- the electron beam EB emitted from the electron gun 10 is applied to the irradiation axis of the fixed electron beam EB.
- the position of the semiconductor substrate 23 is relatively moved by the XY stage 21.
- a driving device for the XY stage 21 a pulse motor, a linear motor, an ultrasonic motor or a piezoelectric element is used.
- high-precision position measurement technology such as a laser length measuring device and laser scale, the position accuracy of the semiconductor substrate 23 placed on the XY stage 21 is controlled to about several nm.
- a device for measuring the height of the electron beam irradiation position, or conversely, the height is increased.
- a stage that can move the semiconductor substrate 23 along the Z-axis may be used.
- a current measuring device 30 is connected to the tray 22, and a substrate current induced in the semiconductor substrate 23 is measured by the current measuring device 30 via the tray 22.
- the current measuring device 30 includes an AZD converter that converts the measured substrate current value into a digital signal, and outputs the measured value as digital data. All data is stored in the database.
- the semiconductor measurement apparatus includes a sequence control device 100, a focus control device 110, a secondary electron image waveform recording device 120, a substrate current image waveform recording device 130, a pattern matching engine 140, a waveform processing device 150, a display.
- a device 160 and a database device 170 are provided, and these are constructed on an information processing device (CPU, memory, disk, DSP, etc.) such as a computer.
- the sequence control device 100 controls the deflection device 14 so that the wafer to be measured is transported or the electron beam EB scans the surface of the semiconductor substrate 23 when measuring the substrate current, and the semiconductor substrate.
- the pattern matching controls the pattern matching to adjust the irradiation position of the electron beam EB with high accuracy.
- a supplementary explanation will be given for pattern matching.
- the positions of patterns such as holes formed on a semiconductor substrate are slightly different for each semiconductor substrate even in the same lot.
- pattern matching is performed to compare the actual pattern and the reference pattern for each semiconductor substrate so that the actual pattern matches the reference pattern. Shift the irradiation position of electron beam EB. This makes it possible to accurately adjust the irradiation position of the electron beam with an accuracy of several nm for each semiconductor substrate.
- the focus control device 110 controls the focus position of the objective lens 15 and controls the focus amount of the electron beam EB by controlling the focus position of the objective lens 15 during measurement. This is for setting the tip of the tube to a desired size and shape.
- a method of setting the focus amount of the electron beam EB focus position of the objective lens 15
- the distance of the wafer surface force is obtained optically or electrically
- the focus amount is set based on the distance, or the electron beam A state where the image obtained by scanning is the clearest, or a state force that maximizes the contrast of the secondary electrons
- a method of setting the amount of focus, and a substrate current value when the electron beam is irradiated It is possible to use a method of setting a state force focus amount in a state where the image is clearest or a state where the substrate current contrast is maximized. Laser optical and electrostatic capacity can also be obtained.
- the secondary electron image waveform recording device 120 records an image formed by secondary electrons detected by the secondary electron detector 24.
- the substrate current image waveform recording device 130 stores an image formed by the substrate current measured by the current measuring device 30.
- the pattern matching engine 140 compares an actual pattern with a reference pattern.
- the waveform processing device 150 shapes the substrate current waveform to remove unnecessary noise components, and calculates a waveform evaluation value (such as a hole diameter).
- the display device 160 displays the evaluation value.
- the database device 170 stores the evaluation values calculated by the waveform processing device 150 in a database.
- a predetermined region on the surface of the semiconductor substrate 23 is two-dimensionally scanned by the electron beam EB.
- the electron beam axis irradiated to the measurement target is kept at a constant distance and incident angle with respect to the measurement target surface.
- the electron beam parallel to the measurement object it is necessary to move the electron beam parallel to the measurement object. Therefore, in this two-dimensional scanning, the electron beam EB is irradiated perpendicularly to the surface of the semiconductor substrate 23, and the focus position of the objective lens 15 is controlled and deflected so that the tip of the electron beam EB has a desired size.
- scanning is repeated in a line at regular intervals and at a constant speed.
- other electron lenses are simultaneously operated to correct lens nonlinearity.
- secondary electrons and reflected electrons are generated from a minute region on the surface of the semiconductor substrate 23 irradiated with the electron beam EB, and a substrate current is induced in the semiconductor substrate 23.
- the substrate current induced in the semiconductor substrate 23 by the above-described scanning is measured by the current measuring device 30 and converted into an electrical signal having a necessary dynamic range.
- This electrical signal is immediately sampled and converted to a digital signal with the required resolution so that the signal quality is not degraded.
- the resolution of this digital signal is 16 bits and its sampling frequency is 400 MHz.
- the measured value of the substrate current obtained by scanning the electron beam EB in this manner includes information on the bottom structure of the hole, and coordinates (electron beam irradiation position) or measurement time (electron beam EB irradiation time). ) Is digitally recorded on the substrate current image waveform recording device 130 (for example, a memory or a hard disk).
- secondary electrons generated from a minute region on the surface of the semiconductor substrate 23 by the above-described scanning are detected by the secondary electron detector 24.
- the secondary electrons can be detected by using a well-known photomultiplier, multichannel plate, or simple electrode to directly collect secondary electrons and use them as current signals.
- the important thing is that a relationship in which the amount of secondary electrons detected by the secondary electron detector 24 is proportional to the amount of secondary electrons actually generated can be obtained.
- the output value of the secondary electron detector 24 is set to be exactly proportional to the number of input electrons. This allows large signals from small signal areas Secondary electrons are detected linearly up to the region.
- V is used for the purpose of expressing secondary electrons as a binary image, so that the detected value has a large difference between when there is a signal and when there is no signal. It is set!
- the amplifier has a nonlinear characteristic such that the detection value is 0 when very few electrons are input to the detector and a large detection value is generated when electrons exceeding a certain threshold are input. It has become.
- the measurement value of the secondary electrons obtained by the above-described scanning includes information on the surface structure of the semiconductor substrate 23, and the measurement coordinates (electron beam irradiation position) or measurement time (electron beam EB irradiation time). ) Is digitally recorded in the secondary electron image waveform recording device 120 (for example, a memory or a hard disk).
- the backscattered electrons that have generated micro-region forces on the surface of the semiconductor substrate 23 are detected by a backscattered electron detector (not shown), and the backscattered electron image obtained from the detected value is digitally recorded on a backscattered electron image recording device (not shown). Is done.
- secondary electrons and reflected electrons can be distinguished by differences in energy and emission direction, they can be handled together without being distinguished depending on the type of detection device.
- a plurality of units may be arranged. In that case, information can be recorded independently according to the number of detectors. It is desirable.
- each of the secondary electron detector 24 and the backscattered electron detector may be arranged one by one.
- the waveform of the substrate current measured as described above is shaped by the waveform processing device 150 in order to remove unnecessary noise and high frequency components.
- Examples of the waveform processing include moving average filter processing, waveform processing for removing a specific frequency, or filter processing for extracting only a signal of a specific frequency. These waveform shaping processes can be performed in hardware or software.
- the waveform processing device 150 extracts a waveform-shaped waveform edge using an edge extraction algorithm, and applies an approximation function to the edge coordinate value, thereby obtaining a two-dimensional shape of the waveform.
- an approximation function to the edge coordinate value, thereby obtaining a two-dimensional shape of the waveform.
- an approximate function of a circle or an ellipse is applied to the above-mentioned edge coordinate value, and the value of this approximate function and the coordinate value of the edge are calculated. Fitting various parameters that define the approximation function so that the error is minimized
- the waveform processing device 150 calculates the evaluation value of the waveform using the above approximate function with the fitted parameters and the calculation result of the plurality of waveforms. For example, the line width, hole diameter, hole short diameter, hole center position, hole tilt angle, hole rotation angle, hole roundness, hole distortion, edge roughness, etc. are calculated as evaluation values. .
- This waveform processing includes direct comparison with a reference waveform, and includes, for example, pattern matching between waveforms or evaluation of approximation using a correlation function.
- These evaluation values are displayed as numerical values, tables, graphs, and figures on a display device 160 such as a computer display, or stored as a digital data file in the database device 170. It is also possible to print on paper using an external printer (not shown).
- the photoresist process is managed using the semiconductor measuring apparatus shown in FIG.
- FIG. 2 shows the intensity of the substrate current Ik measured by the current measuring device 30 and the intensity of the secondary electron Ie detected by the secondary electron detector as a function of the irradiation coordinates of the electron beam EB. These are shown in association with measurement sites.
- a resist 201 is formed on a silicon substrate 200, and an opening H is formed in a part of the resist 201. In this opening H, the surface of the silicon substrate 200 is exposed!
- the substrate current Ik increases when the electron beam EB scans the opening H. This is because the electron beam EB enters the silicon substrate 200 at the opening H. At this time, the region where the electron beam is incident on the silicon substrate 200 is limited to the region corresponding to the bottom surface of the opening H. Therefore, it is possible to grasp the bottom shape of the opening H from the waveform of the substrate current Ik. Since the boundary between the bottom shape of the opening H and the bottom shape of the resist 201 coincides, the bottom shape of the opening H also represents the bottom shape of the resist 201.
- the secondary electrons Ie increase while the electron beam EB scans the surface of the resist 201, and the secondary electrons Ie decrease at the opening H. Therefore, the secondary electron Ie wave
- the surface shape of the resist 201 can be grasped from the shape. Since the boundary between the surface shape of the resist 201 and the upper part of the opening H coincides, the surface shape of the resist 201 also represents the shape of the upper part of the opening H.
- FIG. 3 shows the intensity of the substrate current Ik and the secondary electron Ie as a function of time by irradiating the entire surface of the semiconductor substrate with the electron beam EB described above as an electron beam shower EBS.
- the intensity of each current increases at the start of irradiation, and the intensity of each current decreases at the end of irradiation.
- the intensity of the secondary electrons Ie varies depending on the surface shape and size of the resist 201, and the intensity of the substrate current Ik varies depending on the shape and size of the bottom surface of the opening H or the presence / absence or amount of residue.
- the formation state of the resist structure can be grasped from these current intensities.
- Step Sl prepare a silicon wafer, SOI (Silicon On Insulator) or a sample wafer on which oxide, metal, etc. are deposited. If necessary, a conductive antireflection film is formed on the sample wafer, and then a photoresist is applied (Step Sl).
- This photoresist can be applied by various methods such as spin coating or ink jet coating.
- the photoresist material nanostrength or various latest non-resist materials may be used in addition to the conventionally used resin.
- the resist is dried in a beta furnace (Step Sl). That is, the sample wafer is heated to about 80 to 90 degrees in a baking furnace, for example, to evaporate the solvent contained in the resist.
- the dried sample wafer is exposed by changing the focus amount and the exposure amount for each shot using a mask having the same pattern (step SST).
- step SST the dried sample wafer is exposed by changing the focus amount and the exposure amount for each shot using a mask having the same pattern.
- the focus amount is changed independently for each shot so that the focus amount is ⁇ 0.3 microns and the exposure amount is ⁇ 15%.
- the exposure parameters are not limited to shot units, but may be changed in finer units and widths.
- the sample wafer is introduced into a resist automatic imager set to predetermined development conditions, and the resist is developed and dried (step S3). Further, as necessary, ultraviolet irradiation, electron beam irradiation, or heating is performed to cure the resist. This As a result, the resist has a stronger shape.
- the resist structure formed on the surface of the sample wafer through the above process is measured using the above-described semiconductor measuring device.
- an electron beam is scanned or collectively irradiated on the measurement object, and the substrate current Ik, the secondary electron Ie, or the position information waveform or time information waveform of the reflected electrons as described above is captured.
- Waveform force incorporated as needed Extracts features such as resist surface dimensions, surface shapes, bottom dimensions, bottom shapes, residues, etc. (step S4).
- a process window is obtained (step S5).
- the pattern matching method is based on a predetermined standard waveform, which serves as an evaluation standard for determining the process window, and a measurement waveform obtained from the resist structure (a waveform obtained from the above-mentioned feature amount). Measure the deviation of the measured waveform from the standard waveform (correlation coefficient, or some distance) by directly calculating the correlation using the As this standard waveform, for example, a waveform obtained in advance by applying standard exposure conditions (just focus and just exposure amount) is used. In advance, by setting an acceptable waveform for the process as the distance range, the process window can be determined using the correlation value.
- the above measurement result is compared with a predetermined process error tolerance (margin), and the exposure condition range in which the measured value falls within the range to obtain a good product is determined in the exposure process.
- the process window may be the same.
- the photoresist process can be properly managed, and by setting the exposure conditions so as to be within such a process window, the photoresist process can be stabilized.
- the device can be manufactured normally and stably.
- test pattern is used as a mask in order to quantitatively evaluate standard exposure conditions.
- Figure 6 shows an example.
- a hole structure or a gate structure formed with various sizes and densities is used as the test pattern.
- a large size gate pattern is placed in region 611
- a standard size gate pattern is placed in region 612 at the target process technology node
- a small size gate pattern is placed in region 613.
- Pattern is arranged.
- a pattern for evaluating the influence of the hole arrangement density is arranged in the area 621
- a pattern for evaluating the influence of the hole size is arranged in the area 622
- a pattern according to the hole shape is arranged in the area 623. Patterns to assess the impact are placed.
- an exposure amount distribution is generated in the area.
- an evaluation pattern is placed symmetrically or asymmetrically with respect to the shot range so that the influence of the exposure device distribution within the shot can be evaluated.
- FIG. 7 shows a specific method for optimizing the exposure process in consideration of the distribution of the focus amount F.
- a resist 71 is applied to the silicon substrate 70, and holes 71 corresponding to the mask pattern are formed in the resist 71 !.
- FIG. 8 shows a case where the focus amount F is changed in the exposure process for densely producing a plurality of holes.
- the hole surface size is larger than in the case of just focus, and the hole bottom size is reduced.
- the size al on the hole surface is larger than the size bl on the bottom surface of the hole.
- the size of the hole surface is the same as the size of the bottom of the hole.
- overfocus F> 0
- the size of the hole surface is slightly reduced and the size of the hole bottom is slightly increased.
- a resist structure changes more sensitively to a focus setting amount in a structure such as an isolated hole than in a line structure such as a gate structure or a wiring structure. It has been found. In other words, when the focus process window is determined, the results are obtained more strictly when the isolated hole structure is used than when the line structure is used.
- FIG. 9 shows the relationship between the focus amount (F) and the measured hole size (a, b) for the hole.
- each graph shows the characteristics of the axis object, and by comparing the state of the hole surface with the state of the bottom surface of the hole, it is possible to know whether the focus is under or over. Note that the focus conditions shown in FIGS. 7 and 8 correspond to the focus range FR shown in FIG.
- FIG. 10 is a flowchart showing a technique for managing a photoresist structure using the semiconductor measurement apparatus described above.
- various types of photoresist structures can be measured.
- a case where a hole structure is measured is shown as an example.
- the irradiation position of the electron beam EB is moved to the position of the management target hole, and the electron beam EB is scanned to acquire an SEM image (step Sl 1).
- the acquired image data is stored in the database device 170.
- a separate line scan is performed to collect secondary electron waveforms, and the hole surface dimensions are measured and recorded in the database device 170 (step S12).
- various constants hole diameter, hole short diameter, hole center position, etc.
- a substrate current image (waveform) is acquired and stored in the database device 170 (step S13).
- a separate line scan is performed to obtain the substrate current waveform, and the hole bottom size is measured and recorded in the database device 170 (step S14).
- various evaluation values hole diameter, hole short diameter, hole center position, etc.
- a shape comparison evaluation is performed using a comparison method (step S15). Specifically, we evaluate the geometric features of all shapes such as shape matching, area matching, orientation matching, and distortion matching. Then, a pattern mattress score or a correlation coefficient indicating how similar to the reference image is calculated.
- the size of the hole surface and the size of the bottom surface of the hole, which are measured in advance as reference values are compared with the measurement values obtained by the line scan measurement in steps S12 and S14 (step S16). ). From the comparison so far, it is possible to determine whether the surface shape and bottom surface shape of the hole to be measured match the reference value or not. That is, it is determined whether or not the exposure amount and the focus amount match the reference value.
- step S17 the range set in advance as the determination criterion and each evaluation value described above are compared, and the exposure condition determined to be within the reference value is used as the exposure condition within the process margin. Is determined (step S17). For example, by using a sample wafer prepared under various exposure conditions as described in FIG. 5 above, a series of steps are repeated at all measurement target points in the wafer to obtain a process window. Is possible.
- the measurement operation of the shape of the hole surface and the shape of the bottom surface of the hole has been described separately, but these may be measured simultaneously when the electron beam is irradiated. Further, it is possible to acquire only the hole bottom shape by measuring only the substrate current without measuring the secondary electrons. In that case, only the focus amount is to be compared.
- the information obtained from the evaluation target is not necessarily information that forms a complete image, and the waveform itself obtained by scanning several electron beams on the structure of the measurement target is a pattern.
- the waveform itself obtained by scanning several electron beams on the structure of the measurement target is a pattern.
- the method described above can also be applied to process condition management. For example, if the exposure conditions of an exposure device deviate from the optimum value for some reason, such as at a factory line, or if there are many exposure devices, it is easy to determine, check, or optimize the exposure conditions of each device. Can be performed. By plotting the exposure amount and focus used for exposure over time, it is possible to know changes over time in the apparatus parameters of the exposure apparatus. By summing up the same points on the wafer, the stability of the exposure system can be measured. By measuring the change in parameters that can be placed in the exposure apparatus, the shot dependency of the exposure apparatus can be measured. In this embodiment, it is possible to manage photoresist structures of various shapes. Here, a case where the hole structure is managed is shown as an example.
- FIG. 11 shows a method for independently acquiring the measurement data force exposure amount and the focus amount at the management target point using the database.
- the database 310 stores each substrate current waveform data when the exposure amount and the focus amount are changed.
- the measurement data 300 is obtained by measuring the substrate current waveform in the measurement target hole, and the measurement data 300 is compared with the substrate current waveform data for each exposure condition recorded in the database 310.
- the method described with reference to FIG. 10 can be applied to this comparison.
- the exposure amount and the focus amount corresponding to the substrate current waveform data having the highest matching degree are output as the matching output 320.
- the exposure amount E and the focus amount F are expressed as (E, F), (4, 4) is output as the matching output 320.
- the exposure conditions of the exposure apparatus can be optimized by calculating the deviation (value difference) of the optimum value power of the exposure amount and focus amount of the apparatus. For example, when the exposure amount 4 and focus amount 4 are found to be the optimum conditions in the database, the result of pattern matching between the measurement result at the control point and the waveform recorded in the database results in the measurement result. Assume that the exposure amount is 6 and the focus amount is 6, and it is judged as defective. In this case, the optimum condition can be obtained by resetting the exposure amount and focus amount to the condition that the initial set value force is also minus 2.
- the substrate current waveform data recorded in the database 310 is used to obtain the exposure amount and the focus amount.
- the substrate current waveform data force The characteristic amount of the process structure (hole bottom size, The amount of residue etc. It may be compared with the source.
- by using secondary electrons or reflected electrons rather than using only the substrate current waveform for comparison it is also possible to obtain feature quantities such as the hole surface size, which can be combined for more accurate evaluation. The value can be acquired.
- These evaluation values can be displayed on a computer screen, printed on paper, or output as a file.
- FIG. 12 shows a process window obtained by the semiconductor manufacturing method according to the present invention described so far.
- the surface observation using the conventional SEM if the surface shape and size are within the allowable range, it was determined that it was within the process window.
- the shape and size of the bottom surface, and the amount of a very small amount of resist residue on the bottom of the structure are within the process window only after entering the allowable value.
- the amount of residues can be determined by observing the waveform and amplitude of the substrate current.
- the exposure parameters actually used from the resist structure obtained by the exposure process Therefore, it is possible to optimize the conditions of the second exposure process that is taken as a measure when the exposure process fails. Therefore, the yield can be improved.
- the exposure conditions can be finely controlled, so variations in the resulting devices can be drastically reduced and only devices with the desired performance can be manufactured in large quantities.
- the defect in the resist process is related to various process defects such as etching, cleaning, and ion implantation, which are the subsequent processes, but it can be prevented and the yield is improved.
- edge roughness at the interface between the resist and the base which is one important parameter for setting exposure conditions, so that true roughness can be defined. This makes it possible to measure the amount of roughness directly related to processes that were previously unknown.
- the present invention is expressed as a semiconductor device manufacturing method.
- the present invention is not limited thereto, and is expressed as a semiconductor device inspection method, a semiconductor device analysis method, a semiconductor device analysis method, a semiconductor device evaluation method, and the like. May be.
- display devices such as LCDs are also the subject of the present invention.
- the present invention is suitable for use in optimizing resist exposure conditions in a semiconductor device manufacturing process.
Abstract
Description
Claims
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PCT/JP2006/304286 WO2007102192A1 (ja) | 2006-03-06 | 2006-03-06 | 半導体デバイス製造方法 |
KR1020087020589A KR101018724B1 (ko) | 2006-03-06 | 2006-03-06 | 반도체 디바이스의 제조 방법 |
CN200680053348.0A CN101405836B (zh) | 2006-03-06 | 2006-03-06 | 半导体器件制造方法 |
JP2008503692A JP4754623B2 (ja) | 2006-03-06 | 2006-03-06 | 半導体デバイス製造方法 |
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JP2014146426A (ja) * | 2013-01-26 | 2014-08-14 | Horon:Kk | アライメント測定装置およびアライメント測定方法 |
JP2020046507A (ja) * | 2018-09-18 | 2020-03-26 | 株式会社ニューフレアテクノロジー | マスク検査装置及びマスク検査方法 |
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KR101442401B1 (ko) * | 2013-03-20 | 2014-09-23 | (주) 아이씨티케이 | Puf를 생성하는 장치 및 방법 |
CN114326313B (zh) * | 2020-09-29 | 2024-01-23 | 长鑫存储技术有限公司 | 同时监测多种照明条件的方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11345754A (ja) * | 1998-06-01 | 1999-12-14 | Matsushita Electron Corp | 半導体装置の検査方法及び製造方法 |
WO2002029870A1 (fr) * | 2000-10-05 | 2002-04-11 | Nikon Corporation | Procede de determination des conditions d'exposition, procede d'exposition, dispositif de realisation dudit procede et support d'enregistrement |
JP2005064023A (ja) * | 2003-08-12 | 2005-03-10 | Hitachi Ltd | 露光プロセスモニタ方法 |
JP2005236060A (ja) * | 2004-02-20 | 2005-09-02 | Ebara Corp | リソグラフィマージン評価方法 |
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JP2001044096A (ja) * | 1999-07-13 | 2001-02-16 | Promos Technol Inc | 臨界寸法を制御する方法と装置 |
JP3749107B2 (ja) * | 1999-11-05 | 2006-02-22 | ファブソリューション株式会社 | 半導体デバイス検査装置 |
JP4060143B2 (ja) * | 2002-07-31 | 2008-03-12 | 株式会社トプコン | 非破壊測定装置および半導体装置製造方法 |
JP4255657B2 (ja) * | 2002-08-01 | 2009-04-15 | 株式会社トプコン | 半導体製造工程管理方法 |
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JPH11345754A (ja) * | 1998-06-01 | 1999-12-14 | Matsushita Electron Corp | 半導体装置の検査方法及び製造方法 |
WO2002029870A1 (fr) * | 2000-10-05 | 2002-04-11 | Nikon Corporation | Procede de determination des conditions d'exposition, procede d'exposition, dispositif de realisation dudit procede et support d'enregistrement |
JP2005064023A (ja) * | 2003-08-12 | 2005-03-10 | Hitachi Ltd | 露光プロセスモニタ方法 |
JP2005236060A (ja) * | 2004-02-20 | 2005-09-02 | Ebara Corp | リソグラフィマージン評価方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014146426A (ja) * | 2013-01-26 | 2014-08-14 | Horon:Kk | アライメント測定装置およびアライメント測定方法 |
JP2020046507A (ja) * | 2018-09-18 | 2020-03-26 | 株式会社ニューフレアテクノロジー | マスク検査装置及びマスク検査方法 |
JP7135637B2 (ja) | 2018-09-18 | 2022-09-13 | 株式会社ニューフレアテクノロジー | マスク検査装置及びマスク検査方法 |
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JPWO2007102192A1 (ja) | 2009-07-23 |
CN101405836A (zh) | 2009-04-08 |
KR20080097434A (ko) | 2008-11-05 |
JP4754623B2 (ja) | 2011-08-24 |
CN101405836B (zh) | 2010-09-08 |
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