WO2007055447A1 - Capteur d'image à nombre élevé de pixels - Google Patents

Capteur d'image à nombre élevé de pixels Download PDF

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Publication number
WO2007055447A1
WO2007055447A1 PCT/KR2006/001334 KR2006001334W WO2007055447A1 WO 2007055447 A1 WO2007055447 A1 WO 2007055447A1 KR 2006001334 W KR2006001334 W KR 2006001334W WO 2007055447 A1 WO2007055447 A1 WO 2007055447A1
Authority
WO
WIPO (PCT)
Prior art keywords
image sensor
signal
data
picture element
image
Prior art date
Application number
PCT/KR2006/001334
Other languages
English (en)
Inventor
Hoon Kim
Kwang Sue Park
Original Assignee
Planet82 Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Planet82 Inc. filed Critical Planet82 Inc.
Publication of WO2007055447A1 publication Critical patent/WO2007055447A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • H04N25/41—Extracting pixel data from a plurality of image sensors simultaneously picking up an image, e.g. for increasing the field of view by combining the outputs of a plurality of sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/767—Horizontal readout lines, multiplexers or registers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements

Definitions

  • the present invention relates to an image sensor having high pixels, specifically to an image sensor which is capable of taking a moving picture by parallel processing data signals outputted from unit pixels (picture element part) with pluralities of analog blocks.
  • An image sensor is a device which captures images by utilizing the characteristics of a semiconductor, which reacts on external energy such as light energy. Light being generated from an object present in the nature has a characteristic inherent value in properties such as wavelength. A pixel of an image sensor detects the light generated from each object and converts it into a certain electric value.
  • the pixel of an image sensor responds to the light energy generated from an object, and then generates an electric value corresponding to the wavelength of the light received.
  • CCD Charge Coupled Device
  • CMOS image sensor is a device which has a pixel array formed by utilizing CMOS integrated circuit fabrication technique and employs a switching mode for detecting output of the pixel array one after another.
  • CMOS image sensors have an important advantage of lower power consumption, thereby being very usefully applied to a personal mobile system such as a mobile phone.
  • Fig.l represents a conventional 3-transistor CMOS active pixel, which illustrates the cross-section of a photodiode comprising circuits for peripheral components.
  • Fig. 2 is an equivalent circuit diagram of the conventional 3-transistor CMOS active pixel represented in Fig. 1.
  • an N+ type impurity region (11) and an N+ type floating diffusion region (13) which constitute a junction of a photodiode at one side, contact to each other.
  • the capacitance component of a photodiode is substantially the sum of the capacitor components formed by the N+ type impurity region (11) and the N+ type floating diffusion region (13).
  • CMOS active pixel For making up such problem of a 3-transistor CMOS active pixel, 4-transistor CMOS active pixel has been suggested.
  • Fig. 3 represents a conventional 4-transistor CMOS active pixel, which illustrates the cross-section of a photodiode comprising circuits for peripheral components.
  • Fig. 4 is an equivalent circuit diagram of the conventional 4-transistor CMOS active pixel represented in Fig. 3.
  • a transfer transistor (25) which is controlled by a transfer control signal (Tx) is used for removing noises generated from a 3-transistor CMOS active pixel.
  • Tx transfer control signal
  • the N+ type impurity region (21) and the N+ type floating diffusion region (23) which constitute a junction of a photodiode on one side are separated from each other.
  • the sensitivity of an image sensor and the quality of the image can be improved in conventional 4-transistor CMOS active pixels.
  • the 4-transistor CMOS active pixel also has a problem of having a reduced light receiving area, owing to the addition of a transfer transistor (25).
  • a conventional 3-transistor CMOS active pixel has a problem of low sensitivity, and a conventional 4-transistor CMOS active pixel also has a problem of a reduced light receiving area.
  • Fig. 5 is a circuit diagram connected to the unit pixels represented in Figs. 1 and 3.
  • the picture element part (30) used herein refers to one column comprised of unit pixels.
  • the picture element part (30) is provided as many as the number of the columns, and the number of the unit pixels in the picture element is provided as many as the number of the rows.
  • '1280x1024 SXGA' refer to the image resolution of '640 columns x 80 rows' '1024 columns x 768 rows' and '1280 columns x 1024 rows'. Meanwhile, each number of columns and rows practically used in the processes is more than the numbers above represented.
  • Fig. 6 represents the signals applied to the unit pixels of Figs. 1 and 3.
  • Image data signals include data signals corresponding to various levels of illumination depending on the surrounding environment, from a high illumination signal which is the data signal of bright light to a low illumination signal which is the data signal of dimmed light.
  • Fig. 7 represents the voltage drop of a data signal according to the illumination level. Three levels are disclosed in Fig. 7, for the sake of convenience; however data signals at more various levels may be present in practical.
  • the 'A' and 'C sections are the stable sections where the fluctuations in signal voltage are not present, and 'B' section is the section where a drop in signal voltage occurs.
  • a row enable signal (R_en) is disabled, a reset sampling operation signal (SR) is applied to a switch b (32b) of a CDS (36) during the reset sampling section (A) so that the reset voltage is stored in a capacitor b (33b).
  • the image processing data values corresponding to each level are determined by the level of differences in potential of the image stored in each capacitor during the reset sampling section 'A' and the data sampling section 'C. Therefore, in the case of high illumination, the image processing data value is relatively large, while in the case of low illumination, the image processing data value is relatively small.
  • the present invention has been developed to solve the general problems of prior arts as described above, which uses pluralities of analog blocks for parallel processing the data signals outputted from unit pixels, since the image delivered from a unit pixel is too fast owing to the elimination of integration time. Therefore, it can be possible to provide an image sensor having high pixels, which is capable of taking a moving picture and minimizes false representation of image owing to leak current.
  • the object of the present invention is achieved by an image sensor having high pixels, which comprises an analog block comprised of CDS, MUX, SHA, PGA and ADC, and is characterized by comprising a picture element; and two or more of analog blocks which divide and parallel output the image data signals applied from the picture element part.
  • FIG. 1 is a view illustrating a conventional 3-transistor CMOS active pixel.
  • FIG. 2 is an equivalent circuit diagram illustrating a conventional 3-transistor
  • CMOS active pixel CMOS active pixel
  • FIG. 3 is a view illustrating a conventional 4-transistor CMOS active pixel.
  • Fig. 4 is an equivalent circuit diagram illustrating a conventional 4-transistor
  • CMOS active pixel CMOS active pixel
  • Fig. 5 is a circuit diagram connected to unit pixels represented in Figs. 1 and 3.
  • Fig. 6 is a signal applied to the unit pixels represented in Figs. 1 and 3.
  • Fig. 7 represents the voltage drop of a data signal according to the illumination level in conventional techniques.
  • Figs. 8 and 9 represent the image sensor with high pixels according to the present invention.
  • Fig.10 is a timing diagram of operation signals applied to the signal processing circuit of an image sensor according to the present invention.
  • Fig. 11 is a view comparing the image processing procedure of an image sensor according to the present invention with that of a conventional image sensor.
  • Fig. 12 is a view illustrating the current changes in PMOS according to the changes in the light intensity in CMOS unit pixel according to the present invention.
  • FIG. 8 to 11 Although the operation process is explained with four analog blocks, it is also possible to apply it to an image sensor using two or more of analog blocks.
  • FIGs. 8 and 9 simultaneously, upon the application of a select signal to a row consisting of a large number of unit pixels, the image data signals captured in the large number of unit pixels during the row enable (R_en) section are applied from the common junction of a column, divisionally to CDS (Correlated double sampling) of a first block (420); CDS of a second block (430) (in Fig. 8); CDS of a first block (420); CDS of a second block (430); CDS of a third block (440); and CDS of a fourth block (450) (in Fig.
  • CDS Correlated double sampling
  • the image data signals include many data signals having various levels of illumination depending on the circumstances, ranged from a high illumination signal that is a signal of bright light to a low illumination signal that is a signal of dimmed light.
  • the data signals according to various levels of illumination drop the image data voltage applied to a circuit comprising CDSs in each analog block (420 to 450), according to each level.
  • Load+CDS+MUX+SHA+PGA+ADC are used at each divisional point on the column so as to parallel processing signals.
  • Fig. 8 shows an example which uses 2 analog blocks
  • Fig. 9 shows an example which uses 4 analog blocks.
  • each unit pixel in L ⁇ 1> ⁇ L ⁇ 1024> at n' row is connected to an analog block 1 (420) for signal processing
  • each unit pixel in L ⁇ 1025> ⁇ L ⁇ 2048> at n row is connected an analog block2 (430) for signal processing.
  • each unit pixel is 4M pixel, it is divided into each IM and signal processing is carried out in each analog block (420 ⁇ 450).
  • the unit pixel 'A' is a unit pixel having the 2-transistor structure of 1 PMOS (400) and 1 NMOS (405), wherein the PMOS (400) utilizing a photoelectric conversion mode upon light entrance forms a light receiving area, and the NMOS (405) is used as a switch by being connected to the PMOS (400).
  • the present invention since the present invention does not require integration time and thus the image delivered from a unit pixel is too fast, it is possible to process a digital circuit at high speed by using pluralities of analog blocks for processing image without using conventional division process. Accordingly, the present invention makes possible to obtain a 30-frame image which is capable of taking a moving picture, since it can process not only 4M pixel, but also 8M, 12M or more pixels through a general analog circuit.
  • the analog block (420) is comprised of: 1024 current mirror-and-CDS parts (B); 1 MUX (C) and 1 SHA/PGA/ADA (D)
  • the analog block (430) is comprised of: 1024 current mirror-and-CDS parts (B); 1 MUX (B); and 1 SHA/PGA/ADA (D).
  • the present invention divides the column of one row into multiple numbers, and disposes analog blocks on the divided columns. Therefore, the signal processing on one row according to the present invention can be reduced to 1/4, thereby being possible to process signals at high speed (See Fig. 10).
  • a row enable (R_en) signal is applied to each unit pixel of a row and then the image data signal stored in the unit pixel is applied to the common junction of a column
  • a first switch of CDS in the first block (420), a first switch of CDS in the second block (430), a first switch of CDS in the third block (440), a first switch of CDS in the fourth block (450), all of which are connected to each divided column, are turned on by a reset sampling operation signal applied from outside.
  • the reset sampling voltage (SR) is stored to a first capacitor of each analog block (420 ⁇ 450), passes through a buffer a to MUX.
  • a second switch of CDS in each analog block (420 ⁇ 450) is turned on by a data sampling operation signal, and then the sampled data voltage is stored to a second capacitor and passes through a buffer b to MUX.
  • a reset signal (RST) is applied.
  • the image sensor having high pixels of the present invention is possible to take a moving picture and to minimize the distortion or errors in a disposed image owing to leak current, by parallel processing data signals outputted from unit pixels with pluralities of analog blocks.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

L'invention concerne un capteur d'image comprenant un nombre élevé de pixels. Plus particulièrement, elle concerne un capteur d'image capable de capturer une image animée par traitement parallèle de signaux de données produits à partir de pixels unitaires (partie d'élément d'image) comprenant des pluralités de blocs analogiques. Le capteur d'image à nombre élevé de pixels de la présente invention, qui comprend un bloc analogique constitué par un système CDS, un MUX, un SHA, un PGA et un CAN, se caractérise en ce qu'il comprend un élément d'image et deux ou plusieurs blocs analogiques divisant et produisant en parallèle les signaux de données d'image appliqués à partir de la partie d'élément d'image.
PCT/KR2006/001334 2005-11-08 2006-04-12 Capteur d'image à nombre élevé de pixels WO2007055447A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050106708A KR100722692B1 (ko) 2005-11-08 2005-11-08 고화소를 갖는 이미지 센서
KR10-2005-0106708 2005-11-08

Publications (1)

Publication Number Publication Date
WO2007055447A1 true WO2007055447A1 (fr) 2007-05-18

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Publication number Priority date Publication date Assignee Title
KR102074948B1 (ko) 2013-07-19 2020-02-07 삼성전자 주식회사 아날로그 디지털 컨버터 및 이를 포함하는 이미지 센서

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000032344A (ja) * 1998-06-22 2000-01-28 Eastman Kodak Co Ｃｍｏｓアクティブピクセルセンサのための並列出力ア―キテクチャ
JP2002252338A (ja) * 2000-12-18 2002-09-06 Canon Inc 撮像装置及び撮像システム
KR20050012558A (ko) * 2003-07-25 2005-02-02 삼성전자주식회사 증폭기 및 그 증폭방법과 이를 이용한 아날로그 처리회로및 이미지 픽업회로

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001309242A (ja) 2000-04-19 2001-11-02 Natl Inst Of Advanced Industrial Science & Technology Meti 画像信号処理システム
US6870209B2 (en) * 2003-01-09 2005-03-22 Dialog Semiconductor Gmbh CMOS pixel with dual gate PMOS

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000032344A (ja) * 1998-06-22 2000-01-28 Eastman Kodak Co Ｃｍｏｓアクティブピクセルセンサのための並列出力ア―キテクチャ
JP2002252338A (ja) * 2000-12-18 2002-09-06 Canon Inc 撮像装置及び撮像システム
KR20050012558A (ko) * 2003-07-25 2005-02-02 삼성전자주식회사 증폭기 및 그 증폭방법과 이를 이용한 아날로그 처리회로및 이미지 픽업회로

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ZHANG W. ET AL.: "A High Gain N-Well/Gate Tied PMOSFET Image Sensor Fabriecated from a Standard CMOS Process", IEEE TRANSACTION ON ELECTRON DEVICES, vol. 48, no. 6, June 2001 (2001-06-01), pages 1097 - 1102 *

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KR100722692B1 (ko) 2007-05-29
KR20070049520A (ko) 2007-05-11

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