WO2007044232A2 - Pre-treatment to eliminate the defects formed during electrochemical plating - Google Patents

Pre-treatment to eliminate the defects formed during electrochemical plating Download PDF

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Publication number
WO2007044232A2
WO2007044232A2 PCT/US2006/037697 US2006037697W WO2007044232A2 WO 2007044232 A2 WO2007044232 A2 WO 2007044232A2 US 2006037697 W US2006037697 W US 2006037697W WO 2007044232 A2 WO2007044232 A2 WO 2007044232A2
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Prior art keywords
substrate
oxygen
layer
containing gas
plating
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PCT/US2006/037697
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French (fr)
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WO2007044232A3 (en
Inventor
Haiyang Gu
Jeff Yang
Ho Sun Wee
Ming Xi
Glen T. Mori
Yohan Zondak
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Applied Materials, Inc.
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Publication of WO2007044232A2 publication Critical patent/WO2007044232A2/en
Publication of WO2007044232A3 publication Critical patent/WO2007044232A3/en

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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14Metallic material, boron or silicon
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58After-treatment
    • C23C14/5846Reactive treatment
    • C23C14/5853Oxidation
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/02Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material
    • C23C28/023Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material only coatings of metal elements only
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/32Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/34Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
    • C23C28/345Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates with at least one oxide layer
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    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/34Pretreatment of metallic surfaces to be electroplated
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors first coated with a seed layer or a conductive layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76874Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating

Definitions

  • Embodiments of the invention generally relate to a method for processing a semiconductor substrate to reduce defects formed during an electroplating process.
  • VLSI very large scale integration
  • ULSI ultra large scale integration
  • the multilevel interconnects that lie at the heart of this technology require the filling of contacts, vias, lines, and other features formed in high aspect ratio apertures. Reliable formation of these features is very important to the success of both VLSI and ULSI as well as to the continued effort to increase circuit density and quality on individual substrates and die.
  • Elemental aluminum and aluminum alloys have been the traditional metals used to form vias and lines in semiconductor devices because aluminum has a low electrical resistivity, superior adhesion to most dielectric materials, and ease of patterning, and the aluminum in a highly pure form is readily available.
  • aluminum has a higher electrical resistivity than other more conductive metals, such as copper (Cu).
  • Cu copper
  • Aluminum can also suffer from electromigration, leading to the formation of voids in the conductor.
  • Copper and copper alloys have lower resistivities than aluminum, as well as a significantly higher electromigration resistance compared to aluminum. These characteristics are important for supporting the higher current densities experienced at high levels of integration and increased device speed. Copper also has good thermal conductivity. Therefore, copper is becoming a choice metal for filling sub- quarter micron, high aspect ratio interconnect features on semiconductor substrates.
  • CVD chemical vapor deposition
  • PVD physical vapor deposition
  • ECP electrochemical plating
  • electroless plating have emerged as viable processes for filling sub-quarter micron sized high aspect ratio interconnect features in integrated circuit manufacturing processes.
  • ECP plating processes are generally two stage processes, wherein a seed layer is first formed over the surface features of the substrate and then the surface features of the substrate are filled via an ECP process.
  • Conventional non-ECP type processes that are used to deposit the diffusion barrier layer and seed layer include depositing the seed layer (e.g., copper) by physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD) onto a diffusion barrier layer (e.g., tantalum or tantalum nitride), generally in a separate substrate processing tool.
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • the surface features of the substrate are then exposed to an electrolyte solution in the ECP tool, while an electrical bias is applied between the seed layer and a copper anode positioned within the electrolyte solution.
  • the electrolyte solution generally contains a source of metal that is be plated onto the surface of the substrate and, therefore, the application of the electrical bias causes the metal source to be plated onto the biased seed layer, thus depositing a layer of the ions on the substrate surface that may fill the features.
  • Two defect types commonly found on the substrate surface are individual voids in the ECP layer, known as "pit” defects, and arrays of multiple voids, known as “dot line void” defects.
  • Each of these void-type defects consist of small regions, e.g., ⁇ 0.1 ⁇ m in diameter, of the plated film where no ECP deposited layer is formed and thus these areas only have the seed layer and barrier over the exposed feature surfaces.
  • Such void-type defects formed in the ECP deposited layer may affect the yield and electromigration results and are a real concern to electronic device manufacturers.
  • Embodiments of the invention generally provide methods for reducing the formation of void-type defects on the surface of a substrate during electrochemical processing. More particularly, embodiments of the invention provide methods to improve the wetting of a substrate surface prior to immersion and thereby minimize adhesion of bubbles to the substrate surface during substrate immersion.
  • a thin, uniform metal oxide is formed on the surface of the substrate immediately prior to immersion of the substrate to improve wetting of the substrate by the plating solution.
  • the metal oxide is formed by exposing the substrate to an oxygen-containing gas, e.g., air, for several hours. No forced convective flow is used.
  • the metal oxide is formed by flowing an oxygen-containing gas over the surface of the substrate.
  • the metal oxide is formed by rotating the substrate at a relatively high rate in the presence of an oxygen-containing gas.
  • a thin, uniform metal oxide layer is formed on the surface of the substrate immediately prior to immersion by first removing any metal oxides formed thereon and then reforming a uniform metal oxide layer in a controlled manner.
  • the original metal oxide layer is removed via an anneal process wherein the heated substrate is held in a low oxygen, hydrogen-enriched environment.
  • the uniform metal oxide layer is then formed by maintaining a constant, uniform substrate temperature while exposing the substrate to an oxygen- containing gas.
  • an optimized substrate immersion method involving a first tilt angle and a second tilt angle is used in conjunction with a substrate with improved wettability to further reduce void defects.
  • the procedure is designed to immerse a substrate into a plating solution with minimal bubble formation.
  • the metal oxide layer is formed by exposure to an oxygen- containing gas while the substrate is rotated at a relatively high rate.
  • the substrate is initially stripped of any metal oxides by an anneal process in a hydrogen-enriched environment.
  • the wettability of the substrate surface is improved by exposing the substrate to an oxygen-containing gas with no forced convective flow for several hours.
  • Figure 1 (Prior Art) is a schematic side view of a void-type defect in a copper layer plated on an unpatterned substrate.
  • Figure 1A is a schematic top-down partial view of a copper-plated substrate surface, illustrating pit defects and dot-line void defects.
  • Figure 2 is a graph of the number of total defects detected on copper- plated substrates vs. exposure time of the substrate seed layer to ambient air prior to the plating process.
  • Figure 3 is a schematic cross-sectional view of a solid-liquid system consisting of a drop of liquid on a solid surface.
  • Figure 3A illustrates a droplet of an aqueous solution in contact with a solid surface and forming a contact angle that is greater than 90°.
  • Figure 3B illustrates a droplet of an aqueous solution in contact with a solid surface and forming a contact angle that is equal to 90°.
  • Figure 3C illustrates a droplet of an aqueous solution in contact with a solid surface and forming a contact angle that is less than 90°.
  • Figure 4 is a graph of the percent concentration of Cu2 and 01 atoms, as measured by X-ray Photoelectron Spectroscopy.
  • Figure 4A illustrates a flowchart of one process sequence for reducing void-type defects on plated substrates.
  • Figure 4B illustrates a flowchart another process sequence for reducing void-type defects on plated substrates.
  • Figure 5 illustrates a sectional view of an exemplary plating cell.
  • Figures 6-10 illustrate sectional views of an exemplary plating cell and plating head assembly.
  • identical reference numerals have been used, where applicable, to designate identical elements that are common between figures.
  • Embodiments of the invention generally provide various methods for processing a substrate to reduce the number of void-type defects formed on the substrate when an electrochemical plating process is performed on the substrate.
  • the method of the invention is designed to minimize plating defects by performing one or more preprocessing steps on a substrate prior to performing the ECP process.
  • Platinum refers to any deposition process that includes electrochemical plating, electroless plating, or a combination of both.
  • Percent concentrations of gas mixtures refer to volume percent.
  • Ambient air refers to air that contains about 21% O 2 (by volume).
  • a volume of air that has been sealed in a container that also contains substances that spontaneously react with the gaseous oxygen therein, such as un-oxidized copper is not considered “ambient air” after any significant period of time has elapsed. This is due to the depletion of oxygen that takes place in such a sealed container via reaction with the substances therein.
  • a gas may vary from standard temperature and/or pressure, i.e., 20 0 C and 760 Torr (absolute pressure) and still be considered “ambient air” as long as it consists of about 21% O 2 and 79% N 2 and other trace components.
  • Oxygen-containing gas refers to any gas mixture that contains from about 1% to about 100% O 2 .
  • Oxygen-depleted refers to having less than about 21% O 2 .
  • Low-oxygen refers to having no significant amount of oxygen present, i.e., trace quantities of oxygen at a maximum.
  • Hydrogen-enriched refers to having a concentration of H 2 greater than about 0.5%.
  • Figure 1 is a schematic side view of one example of a void defect 100 that has been formed in a copper layer 104 that is formed on a substrate surface 101 via an ECP or electroless plating process.
  • Substrate surface 101 may be any substrate or material surface formed on a substrate upon which film processing is performed.
  • a substrate surface on which processing may be performed include materials such as monocrystalline, polycrystalline or amorphous silicon, strained silicon, silicon on insulator (SOI), doped silicon, silicon germanium, germanium, gallium arsenide, glass, sapphire, silicon oxide, silicon nitride, silicon oxynitride and/or carbon doped silicon oxides, such as SiO x Cy, for example, BLACK DIAMONDTM low-k dielectric, available from Applied Materials, Inc., located in Santa Clara, California.
  • substrate 101 is a silicon substrate.
  • substrate 101 is illustrated to be unpatterned, i.e., without typical substrate features such as apertures, vias, trenches, etc.
  • a diffusion barrier layer 102 and a plating seed layer 103 are deposited on substrate 101 prior to the plating process wherein copper layer 104 is deposited.
  • the diffusion barrier layer 102 and seed layer 103 are typically deposited by conventional deposition techniques, such as PVD, ALD or CVD in a separate substrate processing tool. It has been shown that void defects in plated copper layer 104, such as void defect 100, are formed only in copper layer 104 and do not originate from a void or other defect in underlying layers on the substrate, such as diffusion barrier layer 102 or plating seed layer 103. This is illustrated in Figure 1 , wherein the bottom 100a of void defect 100 ends at plating seed layer 103. Void defects 100 are substantially cylindrical in shape and are commonly less than 0.1 ⁇ m in diameter.
  • Void defect 100 may occur in very large numbers on plated substrates, either individually, in which case they are referred to as "pit” defects, or they may be formed into arrays of void defects, which are referred to as "dot line void” defects.
  • Figure 1A is a schematic top-down partial view of a copper-plated substrate surface 110, illustrating each.
  • Region 111 which is 10 ⁇ m square, contains a plurality of pit defects 111a.
  • Region 112 which is also 10 ⁇ m square, contains part of a dot-line void defect 111b, i.e., a substantially linear array of a large number of pit defects.
  • Pit defects 111a and dot-line void defects 111 b may both affect device yield and electromigration results.
  • FIG. 2 is a graph of the number of total defects detected on copper-plated substrates vs. exposure time of the substrate seed layer to ambient air prior to the plating process.
  • the abscissa represents the time, in minutes, that a freshly deposited copper seed layer on a substrate was exposed to air prior to electrochemical plating.
  • the ordinate represents the total number of defects (void-type and all others) detected on a substrate surface after the plating process.
  • the total number of pit and dot-line void defects on an ECP-plated silicon substrate 200 mm in diameter may range from as high as the 10's of thousands to as low as approximately 100 or lower, depending on copper seed layer exposure time.
  • the number of void defects is highest, typically in the 10's of thousands.
  • pit and dot-line defects occur on a plated wafer in large numbers, i.e., in the thousands and higher, they typically appear in a distinctive swirl pattern on the substrate and are collectively referred to as a "swirl" defect. Void defect counts per substrate quickly drop in magnitude for copper seed layers exposed to ambient air for longer times.
  • the swirl pattern is not present and defect counts repeatably stabilize at approximately 100 per substrate and do not decrease with further exposure to air.
  • copper seed layers exposed for more than approximately 24 hours to ambient air begin showing other defect types when plated.
  • FIG. 3 is a schematic cross-sectional view of a solid-liquid system 300 consisting of a droplet 305 on a solid 302.
  • the contact angle 301 of solid-liquid system 300 is a measurement of the angle formed between the surface of solid 302 and the line 303 tangent to the radius 304 of droplet 305 on the solid 302 from the point of contact 306 with the solid 302.
  • the solid 302 typically is a flat, horizontal surface, as shown in Figure 3.
  • the contact angle 301 will vary for different systems of liquids and solids, resulting from the interaction of the surface tension of the droplet 305 and the surface chemistry of the solid 302.
  • contact angle 301 is less than 90° for a solid-liquid system 300, good wetting is produced and the droplet 305 tends to spread across the surface of solid 302.
  • contact angle 301 is greater than 90°, wetting is poor, i.e., droplet 305 is repelled by the surface of solid 302, and droplet 302 tends to bead or shrink away from solid 302.
  • a surface or material that creates a contact angle smaller than 90° is referred to as hydrophilic and a surface or material that creates a contact angle larger 90° than is referred to as hydrophobic.
  • Figure 3A illustrates a droplet 305a of an aqueous solution in contact with a solid surface 302a and forming a contact angle 301a that is greater than 90°. Surface 302a is considered highly hydrophobic.
  • Figure 3B illustrates a droplet 305b of an aqueous solution in contact with a solid surface 302b and forming a contact angle 301b that is equal to 90°.
  • Droplet 305b demonstrates significant beading on surface 302b and therefore surface 302b is considered hydrophobic.
  • Figure 3C illustrates a droplet 305c of an aqueous solution in contact with a solid surface 302c and forming a contact angle 301c that is less than 90°. Droplet 305c spreads out across surface 302c, therefore surface 302c is considered hydrophilic.
  • FIG. 4 is a graph of the percent concentration of Cu2 and 01 atoms, as measured by X-ray Photoelectron Spectroscopy (XPS).
  • the abscissa represents exposure time to ambient air of a fresh, PVD-deposited copper seed layer on a substrate.
  • the ordinate represents measured concentration, in atomic percent, of elements present on the surface of the seed layer.
  • Data set 401 represents the concentration of Cu2 atoms present on the surface of the substrate.
  • Data set 402 represents the concentration of O1 atoms present on the surface of the substrate. As shown in Figure 4, the concentration of Cu2 drops quickly in the first 300 seconds, i.e., 5 minutes, of exposure to ambient air from 48.7% at data point 401a to 32.5% at data point 401b. A corresponding increase in the concentration of O1 atoms takes place in the first 300 seconds of exposure from 24.3% at data point 402a to 35.6% at data point 402b, indicating oxidation of the copper seed layer.
  • cuprous oxide (Cu 2 O) layer brought about by oxidation It is believed that this is due to the formation of the cuprous oxide (Cu 2 O) layer brought about by oxidation. Further, it is known that increasing the roughness of a metal oxide surface reduces the contact angle of liquids thereon and improves the wettability of the surface (see Physical Chemistry of Surfaces, 5 th edition, by Arthur W. Adamson, John Wiley & Sons, Inc. p. 388). Hence, it is believed that the reduced numbers of void-type defects detected on substrates that have been exposed to ambient air for at least about 80 minutes prior to plating is due to improved wettability brought about by the thin, uniform cuprous oxide layer that forms after about 80 minutes of exposure to ambient air.
  • micro- roughness associated with a fully developed metal oxide layer improves wettability of the substrate surface and reduces the tendency of gas bubbles to adhere to the surface of the substrate. With improved wettability, bubbles are less likely to adhere to the surface of the substrate during immersion and void-type defects are not formed. It is also believed that a non-uniform copper surface, such as a freshly deposited copper seed layer that has only partially oxidized regions, or oxide islands, on its surface, may be more likely to drag gas bubbles from the air-liquid interface during immersion of the substrate. A copper seed layer that has not formed a 10-20 A thick cuprous oxide layer is such a non-uniform copper surface.
  • Embodiments of the invention provide two methods for producing a thin, uniform cuprous oxide layer on a copper seed layer quickly and consistently: anneal followed by metal oxide re-growth and metal oxide growth via forced air exposure.
  • an optimized substrate immersion method is also used to further reduce void defects.
  • the optimized tilt method is designed to immerse a substrate into a plating solution with minimal bubble formation.
  • FIG. 4A illustrates a flowchart of one process sequence 450 for reducing void-type defects on plated substrates.
  • an anneal process described below, is performed on the substrate to remove metal oxides from the surface of a substrate with a freshly deposited seed layer.
  • a suitable metal oxide layer is formed on the surface of the seed layer via exposure of the seed layer to an oxygen-containing gas.
  • the substrate is immersed in a plating solution.
  • the substrate is plated.
  • the substrate is immersed in step 453 using an optimized tilt method, described below, to minimize bubbles created during immersion and to discourage adhesion of bubbles to the surface of the substrate.
  • FIG. 4B illustrates a flowchart of another process sequence 460 for reducing void-type defects on plated substrates.
  • a dry spin process described below, is performed on the substrate to quickly and consistently form a suitable metal oxide on the surface of a substrate with a freshly deposited seed layer.
  • the substrate is immersed in a plating solution.
  • the substrate is plated.
  • the substrate is immersed in step 462 using an optimized tilt method, described below, to minimize bubbles created during immersion and to discourage adhesion of bubbles to the surface of the substrate.
  • One method that may be included in embodiments of the invention involves the removal of metal oxides formed on the surface of a freshly deposited metal layer, followed by the controlled formation of a more suitable metal oxide layer prior to plating.
  • a thin, i.e., 10-20 A thick, uniform, cuprous oxide layer is desired.
  • An anneal chamber may be used to remove metal oxides formed on a copper seed layer prior to the plating process. Shortly before plating, the substrate is heated in an air-tight chamber in a low-oxygen environment. Because metal oxides are being removed from the surface of the substrate, it is important that the oxygen concentration in the environment during this process step is very low, for example at most no more than about 1 % and preferably no more than about 0.1%.
  • the anneal chamber is mounted on the same substrate processing platform that performs the substrate plating process to minimize the time between the formation of the metal oxide layer and the plating process.
  • the low-oxygen environment may be achieved through pump-down of the chamber via a vacuum pump and subsequent back-fill of the chamber with a low-oxygen gas, such as nitrogen or argon. It has been shown that heat treatments greater than about 150 0 C tend to damage seed layers via recrystallization, resulting in other defects, such as copper grain pullout during subsequent processes. Heat treatments less than about 50 0 C are generally not effective for oxide reduction. Hence, in a preferred aspect of the invention, an anneal process at a temperature less than about 150 0 C and more than about 50 0 C, such as 100 0 C for example, is used to remove metal oxides from the surface of a copper seed layer.
  • a low-oxygen gas such as nitrogen or argon.
  • the substrate annealing environment includes a forming gas, such as hydrogen, to more completely remove metal oxide layers on the substrate.
  • a forming gas such as hydrogen
  • the process temperatures are relatively low, i.e. no greater than about 100 0 C
  • the use of a forming gas greatly increased the effectiveness of the anneal process for removing metal oxides.
  • a 4% concentration of hydrogen is used because that is the lower explosive limit of hydrogen.
  • use of higher concentrations of hydrogen is contemplated for faster or more effective removal of metal oxides during this process step.
  • a substrate is positioned in an anneal chamber.
  • the chamber is pumped down to about 0.1 kPa or less and back-filled with a purge gas, such as N 2 , at about 8 kPa for about 20 seconds.
  • a purge gas such as N 2
  • a forming gas consisting of 4% H 2 /96% N 2 is flowed into the chamber at a flow rate that maintains the pressure in the chamber at about 2 kPa.
  • the substrate is then heated to about 100 0 C for between about 60 seconds and about 120 seconds.
  • the anneal time may be reduced if a forming gas containing more than 4% H 2 is used.
  • the substrate is cooled and then exposed to an oxygen-containing gas in a controlled manner.
  • the exposure to the oxygen-containing gas takes place in the same chamber wherein the anneal process takes place.
  • the substrate is cooled with a purge gas, such as nitrogen.
  • a temperature-controlled substrate pedestal may be used to cool the substrate to the desired oxidation temperature.
  • ambient air is used to form the desired metal oxide layer on the surface of the seed layer, which, in the case of a copper seed layer, is a cuprous oxide layer 10-20 A thick.
  • an oxygen-depleted gas mixture may be used, such as a 50% ambient air/50% N 2 mixture.
  • a gas mixture with less oxygen than ambient air may be used to form the desired metal oxide on the substrate.
  • An oxygen-containing gas with more than about 21% oxygen may also be used to form the metal oxide layer on the surface of the substrate.
  • the substrate is then plated with an electrochemical or electroless plating process. Forced Air Exposure
  • Another method that may be included in embodiments of the invention involves the formation of a suitable metal oxide layer on the surface of a freshly deposited metal layer by causing an oxygen-containing gas to flow across the surface of the metal layer. It has been shown that in the case of a copper seed layer, a 10-20 A thick cuprous oxide layer may be formed thereon in less than two minutes if ambient air is flowed across the copper seed layer under certain conditions.
  • the substrate is rotated at high rpm in a process chamber that is purged with ambient air.
  • a process chamber that is purged with ambient air.
  • This is also known as a "dry spin" process. It is known in the art that the rotation of a substrate in a chamber at a relatively high speed, e.g. at least 500 rpm for a 300 mm circular substrate, creates a vortex that forces air or any other gases present in the chamber radially outward across the surface of the substrate. This forced convection of oxygen-containing gas across the freshly deposited metal layer greatly increases the rate at which the metal oxide is formed.
  • a cuprous oxide layer of about 10-20 A thickness is formed in less than two minutes, rather than the at least 80 minutes required when the copper seed layer is exposed to ambient air without forced convection.
  • the dry spin chamber must be continually refreshed with enough ambient air or other oxygen-containing gas to prevent the environment inside the processing chamber from becoming oxygen-depleted. In situations wherein the flow rate of ambient air into the chamber is marginally adequate, an increase of as little as 30% in the flow rate of ambient air into the chamber may have a measurable effect on the number of void-type defects detected on plated substrates.
  • the chamber in which the dry spin takes place is open to ambient air and a continuous supply of ambient air is provided during the dry spin process via a process exhaust system, wherein oxygen-depleted air is removed from the dry spin chamber and ambient air is drawn in to the process chamber during substrate processing.
  • the minimum required exhaust flow for a given chamber varies depending on several factors, including substrate size, chamber volume, process chamber humidity and substrate spin speed, but in general a minimum of three air changes per minute is desired.
  • One skilled in the art upon reading the disclosure herein, can determine the required process exhaust volume for a given dry spin chamber.
  • a rotatable substrate support spins the substrate at a desired rpm.
  • the dry spin chamber is mounted on the same substrate processing platform that performs the substrate plating process and is used for other process steps associated with the plating process, such as a pre- rinse chamber, a spin-rinse-dry chamber, a plating cell or a bevel clean chamber. Any substrate processing chamber with a rotatable substrate support and exposure to ambient air may be used for this embodiment.
  • the substrate may be oriented face-up or face-down during the dry spin process.
  • a chamber that contains 50% to 70% humidity when processing substrates is used for the dry spin process, such as a plating cell or spin-rinse-dry chamber.
  • Humidity of at least about 50% to 70% has been shown to reduce the time required for metal oxide formation during the dry spin process step.
  • the substrate is held in place on a rotatable substrate support during the dry spin process with a vacuum chuck.
  • the substrate is held in place via centrifugal clips on the rotatable substrate support. Both methods are known in the art.
  • the rotatable substrate support may be adapted with air vanes or impellors to enhance forced convection in the dry spin chamber. This aspect is useful for situations in which the process chamber being used for the dry spin process is unable to adequately perform the dry spin process.
  • Chambers with marginal exhaust, low humidity and/or no high rpm capability may benefit from the enhanced forced convection generated with air vanes or impellers.
  • the optimal rpm and spin time for formation of a given metal oxide formation varies as a function humidity and airflow rate.
  • the preferred rpm is from about 500 rpm to about 2000 rpm and the spin time is from about 1 minute to about 2 minutes.
  • Lower humidity in the dry spin chamber than 50% may require a longer spin time and/or a higher rpm.
  • the spin time may need to be as long as about 4 minutes or longer to produce a suitable metal oxide layer on a copper substrate.
  • an oxygen-containing gas is fed into the dry spin chamber in addition to or in lieu of ambient air.
  • This makes it possible to vary oxygen content in the dry spin chamber as a means for controlling the formation of a suitable metal oxide on the surface of a freshly deposited metal layer.
  • other parameters of the dry spin process are easier to control, such as substrate rpm, exhaust flow rate and spin time.
  • variation of oxygen content in the dry spin chamber is one method that may be used for tuning the dry spin process. For example, if a 50% oxygen/50%ambient air mixture is introduced into the dry spin chamber, the dry spin time required to form a suitable metal oxide layer on a freshly deposited seed layer may be reduced.
  • an oxygen-containing gas is flowed across the surface of the metal layer on a stationary substrate by forced convection to form a suitable metal oxide prior to plating.
  • the process may be a single substrate process or batch substrate process.
  • ambient air is flowed across the surface of the substrate.
  • An oxygen-containing gas of higher or lower oxygen content than ambient air may also be used.
  • the forced convection of the oxygen-containing gas is generated by a fan.
  • the forced convection of the oxygen-containing gas is caused by releasing the gas from a pressurized vessel or other gas source.
  • the velocity of the oxygen-containing gas is used as a process parameter for controlling the formation of the desired metal oxide.
  • a higher velocity will reduce the time required for formation of a metal oxide on the surface of a freshly deposited metal layer.
  • the optimal velocity and oxygen content of the oxygen-containing gas for formation of metal oxide formation varies depending on the metal layer present and relative humidity of the oxygen- containing gas.
  • the preferred incident velocity of ambient air on the substrate surface is at least about 3 m/s to about 10 m/s and the air flow time is from about 1 minute to about 3 minutes.
  • Lower relative humidity than 50% in the ambient air or other oxygen-containing gas may require a longer flow time and/or a higher incident velocity.
  • embodiments of the invention include a method for immersing a substrate into a processing fluid that generates minimal bubbles and discourages any bubbles that are formed from adhering to the substrate surface.
  • the immersion method incorporated in some embodiments of the invention generally includes driving or actuating the substrate into the plating solution using a combination of a tilt and swing immersion process. More particularly, the substrate may be tilted at an angle with respect to horizontal, and then vertically actuated toward the plating solution while being rotated, which immerses the substrate and maintains a constant angle between the substrate and the upper surface of the plating solution. The combination of the tilt and rotation causes bubbles to be dislodged from the substrate surface and carried away from the substrate surface as a result of the buoyancy of the bubbles. Further, the tilt angle of the substrate may be adjusted during the immersion process, thus generating a swing or pendulum type motion, which also urges bubbles attached to the substrate surface to be dislodged therefrom.
  • FIG. 5 illustrates a sectional view of an exemplary plating cell, hereinafter referred to as plating cell 500, that will illustrate immersion with optimized tilt.
  • the plating cell 500 generally includes a plating head assembly 600, a frame member 503, an outer basin 501 and an inner basin 502 positioned within outer basin 501.
  • the plating head assembly 600 includes a receiving member 601 for supporting and rotating a substrate during immersion into the plating bath and during plating.
  • receiving member 601 includes a contact ring 602 and a thrust plate assembly 604 that are separated by a loading space 606.
  • the contact ring 602 may be adapted to make electrical contact around the periphery of the substrate so that the necessary electrical plating bias may be applied to the substrate.
  • a more detailed description of the contact ring 602 and thrust plate assembly 604 may be found in commonly assigned U.S. Patent Application Serial No. 10/278,527, filed on October 22, 2002 and entitled “Plating Uniformity Control By Contact Ring Shaping", and commonly assigned United States Patent No. 6,251 ,236 entitled Cathode Contact Ring for Electrochemical Deposition, both of which are hereby incorporated by reference in their entirety to the extent not inconsistent with the present invention.
  • the frame member 503 of plating cell 500 supports an annular base member 504 on an upper portion thereof. Since frame member 503 is elevated on one side, the upper surface of base member 504 is generally tilted from the horizontal at an angle that corresponds to the tilt angle of frame member 503 relative to a horizontal position.
  • Base member 504 includes a disk-shaped anode 505.
  • Plating cell 500 may be positioned at a tilt angle, i.e., the frame portion 503 of plating cell 500 may be elevated on one side such that the components of plating cell 500 are tilted between about 3° and about 30°.
  • Inner basin 502 is generally configured to contain a plating solution that is used to plate a metal, e.g., copper, onto a substrate during an electrochemical plating process.
  • the plating solution is generally continuously supplied to inner basin 502, and therefore, the plating solution continually overflows the uppermost point 502a, generally termed a "weir", of inner basin 502 and is collected by outer basin 501 and drained therefrom for chemical management and recirculation.
  • the exemplary plating cell is further illustrated in commonly assigned United States Patent Application Serial No. 10/268,284, filed on October 9, 2002, and entitled “Electrochemical Processing Cell", claiming priority to United States Provisional Application Serial No. 60/398,345, which was filed on July 24, 2002, both of which are incorporated herein by reference in their entireties.
  • a substrate may be transferred into a plating cell, such as plating cell 500 for example, and positioned face-down on contact ring 602.
  • Thrust plate assembly 604 holds the substrate in place as described below in conjunction with Figure 6.
  • the substrate is then immersed in the catholyte solution filling inner basin 502 using the optimized tilt immersion method described below in conjunction with Figures 6-10, typically while being rotated by the contact ring 602 between about 5 rpm and about 60 rpm.
  • the catholyte solution may have between about 5 g/l and 50 g/l of sulfuric acid, a copper concentration between about 25 g/l and 70 g/l, and a chlorine concentration between about 30 ppm and about 60 ppm.
  • the catholyte solution may also include additional additives, such as levelers, suppressors or accelerators.
  • a plating bias typically between about 1 VDC and about 10 VDC, is applied to the substrate.
  • the substrate may be rotated between about 10 rpm and about 100 rpm during the plating process step by contact ring 602.
  • Plating takes place for between about 30 sec and about 5 minutes, depending on the thickness of plated film desired.
  • the plating bias is then removed and the substrate is positioned above the catholyte solution and uppermost point 502a of inner basin 502 for removal from plating cell 500.
  • the substrate Prior to removal from plating cell 500, the substrate may be rotated between about 100 and 1000 rpm for between about 1 second and about 10 seconds in order to remove excess catholyte solution from the substrate.
  • An exemplary ECP cell and plating process is further described in commonly assigned United States Patent Application Serial No. 10/627,336 entitled “Electrochemical Processing Cell,” filed on July 24, 2003, which is hereby incorporated by reference in its entirety to the extent not inconsistent with the present invention.
  • the optimized immersion method begins with loading a substrate into plating head assembly 600.
  • a wafer handling robot is used to position a substrate on the contact ring 602 via access space 606.
  • the substrate is placed in a face down, i.e. production surface facing down, orientation.
  • thrust plate assembly 604 may be lowered into a processing position, i.e., thrust plate 604 may be actuated vertically in the direction indicated by arrow 610 in Figure 6, to engage the backside of the substrate positioned on the contact ring 602.
  • the lower portion of the plating head assembly 600 i.e., the combination of the contact ring 602 and the thrust plate 604, may be positioned at a tilt angle.
  • the lower portion of the plating head assembly is pivoted to the tilt angle via pivotal actuation of the plating head assembly 600 about a pivot point 608.
  • the lower portion of plating head assembly 600 is actuated about pivot point 608, which causes pivotal movement of the lower portion of plating head assembly 600 in the direction indicated by arrow 609 in Figure 6.
  • the lower portion of plating head assembly 600 and the plating surface of the substrate positioned on the contact ring 602 are tilted to the tilt angle as a result of the movement of plating head assembly 600, wherein the tilt angle is defined as the angle between horizontal and the plating surface/production surface of the substrate secured to the contact ring 602.
  • the tilt angle is generally between about 3° and about 30°.
  • pivot point 608 is generally positioned such that when the plating head assembly 600 is tilted, a central vertical axis of the substrate remains in substantially the same location as when the substrate was positioned horizontally, i.e., the pivot point 608 is generally positioned proximate contact ring 602.
  • the plating head assembly 600 may be actuated in the Z- direction, i.e., in the direction indicated by arrow 701 , as illustrated in Figure 7 to begin the immersion process.
  • Plating head assembly 600 is actuated to bring the substrate positioned in the contact ring 602 toward the plating solution contained within the plating cell 500 positioned below plating head assembly 600.
  • the direction indicated by arrow 701 may be parallel to the central axis of the substrate, or alternatively, the direction indicated by arrow 701 may be substantially vertical.
  • the tilting process may be conducted simultaneously with the Z- direction actuation.
  • the lower side of contact ring 602 i.e., the side of contact ring 602 positioned closest to plating cell 500 as a result of the tilt angle, contacts the plating solution as the plating head assembly 600 is actuated toward inner basin 502 of plating cell 500.
  • the process of actuating plating head assembly 600 toward inner basin 502 may further include imparting rotational movement to contact ring 602.
  • contact ring 602 is being actuated in a vertical or Z-direction, while also being rotated about a central axis that intersects the radial center of the substrate, which is also generally orthogonal to the substrate surface.
  • the Z-motion of plating head assembly 600 may be slowed and/or terminated and the tilt position of contact ring 602 is returned to horizontal, as illustrated in Figure 8.
  • the slowing or termination of the vertical, or the Z-direction, movement is calculated to maintain the substrate in the plating solution contained in cell 500 when the tilt angle is reduced.
  • the optimized tilt method may include the removal of the tilt angle, i.e., the return of contact ring 602 to a substantially horizontal position, simultaneously with the vertical movement of contact ring 602 into the plating solution.
  • a substrate immersed by this method may first contact the plating solution with the substrate being positioned at a tilt angle, and then the tilt angle may be returned to horizontal while the substrate continues to be immersed into the plating solution.
  • This process generates a unique swinging or pendulum type movement that includes both vertical actuation and tilt angle actuation, which has been shown to reduce bubble formation and adherence to the substrate surface during the immersion process.
  • the vertical and pivotal actuation of the substrate during immersion process may also include rotational movement of contact ring 602, which has been shown to further minimize bubble formation and adherence to the substrate surface during the immersion process.
  • plating head assembly 600 may be further actuated in a vertical direction, i.e., downward, to further immerse the substrate into the plating solution, i.e., to position the substrate further or deeper into the plating solution, as illustrated in Figure 9. This process may also include rotating the substrate, which operates to dislodge any bubbles formed during the immersion process from the substrate surface.
  • the plating head assembly 600 may again be pivoted about pivot point 608, so the substrate surface may be positioned in parallel relationship to the upper surface of the anode 505, as illustrated in Figure 10.
  • This final tilting motion of plating head assembly 600 generally corresponds to positioning contact ring 602 in a processing position, i.e., a position where the substrate supported by contact ring 602 is generally parallel to anode 505 positioned in a lower portion of the plating cell 500, which corresponds to positioning the substrate at a processing angle.
  • the processing angle generally corresponds to the angle that the upper surface of the anode 505 makes with respect to horizontal.

Abstract

Embodiments of the invention provide methods for reducing formation of void-type defects on the surface of a substrate during electrochemical plating. Embodiments of the invention provide methods to improve the wetting of a substrate surface prior to immersion and thereby minimize adhesion of bubbles to the substrate surface during immersion. A thin uniform metal oxide is formed on a metal layer on the substrate immediately prior to substrate immersion. In one aspect, exposing the substrate to an oxygen-containing gas, e.g. air, forms the metal oxide. The oxygen-containing gas may be flowed over the substrate or the substrate may be rotated at a high rate in the presence of an oxygen-containing gas. In another aspect, non-uniform metal oxides are first removed from the substrate in an anneal process and a thin uniform metal oxide is subsequently re-formed. An optimized substrate immersion method may also be used to further reduce void defects.

Description

PRE-TREATMENT TO ELIMINATE THE DEFECTS FORMED DURING ELECTROCHEMICAL PLATING
BACKGROUND OF THE INVENTION
Field of the Invention
[0001] Embodiments of the invention generally relate to a method for processing a semiconductor substrate to reduce defects formed during an electroplating process.
Description of the Related Art
[0002] Sub-quarter micron, multi-level metallization is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI) semiconductor devices. The multilevel interconnects that lie at the heart of this technology require the filling of contacts, vias, lines, and other features formed in high aspect ratio apertures. Reliable formation of these features is very important to the success of both VLSI and ULSI as well as to the continued effort to increase circuit density and quality on individual substrates and die.
[0003] As circuit densities increase, the widths of contacts, vias, lines and other features, as well as the dielectric materials between them, are continually decreasing as the device feature sizes decrease from 65 nm to 32 nm and beyond. Many conventional deposition processes do not consistently fill structures with narrow openings or difficult aspect ratios. As such, there is a great amount of ongoing effort being directed at the void-free filling of nanometer-sized structures with narrow opening and/or high aspect ratios features wherein the ratio of feature height to feature width could be 4:1 or higher.
[0004] Additionally, as the feature widths decrease, the device current typically remains constant or increases, which results in an increased current density for such features. Elemental aluminum and aluminum alloys have been the traditional metals used to form vias and lines in semiconductor devices because aluminum has a low electrical resistivity, superior adhesion to most dielectric materials, and ease of patterning, and the aluminum in a highly pure form is readily available. However, aluminum has a higher electrical resistivity than other more conductive metals, such as copper (Cu). Aluminum can also suffer from electromigration, leading to the formation of voids in the conductor.
[0005] Copper and copper alloys have lower resistivities than aluminum, as well as a significantly higher electromigration resistance compared to aluminum. These characteristics are important for supporting the higher current densities experienced at high levels of integration and increased device speed. Copper also has good thermal conductivity. Therefore, copper is becoming a choice metal for filling sub- quarter micron, high aspect ratio interconnect features on semiconductor substrates.
[0006] Conventionally, deposition techniques such as chemical vapor deposition (CVD) and physical vapor deposition (PVD) have been used to fill these interconnect features. However, as the interconnect sizes decrease and aspect ratios increase, void-free interconnect feature fill by conventional metallization techniques becomes increasingly difficult using CVD and/or PVD. As a result thereof, plating techniques, such as electrochemical plating (ECP) and electroless plating, have emerged as viable processes for filling sub-quarter micron sized high aspect ratio interconnect features in integrated circuit manufacturing processes.
[0007] In an ECP process, for example, sub-quarter micron sized high aspect ratio features formed into the surface of a substrate (or a layer deposited thereon) may be efficiently filled with a conductive material. ECP plating processes are generally two stage processes, wherein a seed layer is first formed over the surface features of the substrate and then the surface features of the substrate are filled via an ECP process. Conventional non-ECP type processes that are used to deposit the diffusion barrier layer and seed layer include depositing the seed layer (e.g., copper) by physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD) onto a diffusion barrier layer (e.g., tantalum or tantalum nitride), generally in a separate substrate processing tool. The surface features of the substrate are then exposed to an electrolyte solution in the ECP tool, while an electrical bias is applied between the seed layer and a copper anode positioned within the electrolyte solution. The electrolyte solution generally contains a source of metal that is be plated onto the surface of the substrate and, therefore, the application of the electrical bias causes the metal source to be plated onto the biased seed layer, thus depositing a layer of the ions on the substrate surface that may fill the features.
[0008] However, the decreasing size of features being filled by ECP processes in semiconductor processing requires that the plating process generate minimal void- type defects in order to produce viable devices. Research has shown that one cause of void-type plating defects is the presence of air bubbles on the surface of the substrate being plated. Generally, air bubbles are formed on the surface of the substrate during the process of immersing the substrate into the plating solution. More particularly, as the substrate is transitioned from the air into the plating solution, small bubbles often adhere to the surface of the substrate. These air bubbles prevent the electrolyte solution from contacting the substrate surface at that particular location and, therefore, prevent plating at that location. This forms a void- type defect in the plated layer.
[0009] Conventional immersion schemes have attempted to address this issue by optimizing the way the substrate is introduced into the ECP electrolyte, such as titling the substrate into the electroplating bath. The tilting process is generally completed by loading the substrate into substrate contact ring, or receiving member, that is pivotally attached to a location next to the processing solution into which the substrate is to be immersed, such that the contact ring member may be pivoted to bring the substrate into the electrolyte gradually. The substrate and contact ring may also be rotated to reduce the effects seen on the substrate surface. These processes have not been reliable or completely effective in removing the void-type defects seen on the substrate.
[0010] Two defect types commonly found on the substrate surface are individual voids in the ECP layer, known as "pit" defects, and arrays of multiple voids, known as "dot line void" defects. Each of these void-type defects consist of small regions, e.g., < 0.1 μm in diameter, of the plated film where no ECP deposited layer is formed and thus these areas only have the seed layer and barrier over the exposed feature surfaces. Such void-type defects formed in the ECP deposited layer may affect the yield and electromigration results and are a real concern to electronic device manufacturers.
[0011] Therefore, there is a need for a method for processing a substrate, wherein the process is configured to minimize the formation of defects on the surface of the substrate during electrochemical processing.
SUMMARY OF THE INVENTION
[0012] Embodiments of the invention generally provide methods for reducing the formation of void-type defects on the surface of a substrate during electrochemical processing. More particularly, embodiments of the invention provide methods to improve the wetting of a substrate surface prior to immersion and thereby minimize adhesion of bubbles to the substrate surface during substrate immersion.
[0013] In one embodiment, a thin, uniform metal oxide is formed on the surface of the substrate immediately prior to immersion of the substrate to improve wetting of the substrate by the plating solution. In one aspect, the metal oxide is formed by exposing the substrate to an oxygen-containing gas, e.g., air, for several hours. No forced convective flow is used. In another aspect, the metal oxide is formed by flowing an oxygen-containing gas over the surface of the substrate. In yet another aspect, the metal oxide is formed by rotating the substrate at a relatively high rate in the presence of an oxygen-containing gas. [0014] In another embodiment, a thin, uniform metal oxide layer is formed on the surface of the substrate immediately prior to immersion by first removing any metal oxides formed thereon and then reforming a uniform metal oxide layer in a controlled manner. The original metal oxide layer is removed via an anneal process wherein the heated substrate is held in a low oxygen, hydrogen-enriched environment. The uniform metal oxide layer is then formed by maintaining a constant, uniform substrate temperature while exposing the substrate to an oxygen- containing gas.
[0015] In another embodiment, an optimized substrate immersion method involving a first tilt angle and a second tilt angle is used in conjunction with a substrate with improved wettability to further reduce void defects. The procedure is designed to immerse a substrate into a plating solution with minimal bubble formation. In one aspect, the metal oxide layer is formed by exposure to an oxygen- containing gas while the substrate is rotated at a relatively high rate. In another aspect, the substrate is initially stripped of any metal oxides by an anneal process in a hydrogen-enriched environment. In another aspect, the wettability of the substrate surface is improved by exposing the substrate to an oxygen-containing gas with no forced convective flow for several hours.
BRIEF DESCRIPTION OF THE DRAWINGS
[0016] So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
[0017] Figure 1 (Prior Art) is a schematic side view of a void-type defect in a copper layer plated on an unpatterned substrate. [0018] Figure 1A is a schematic top-down partial view of a copper-plated substrate surface, illustrating pit defects and dot-line void defects.
[0019] Figure 2 is a graph of the number of total defects detected on copper- plated substrates vs. exposure time of the substrate seed layer to ambient air prior to the plating process.
[0020] Figure 3 is a schematic cross-sectional view of a solid-liquid system consisting of a drop of liquid on a solid surface.
[0021] Figure 3A illustrates a droplet of an aqueous solution in contact with a solid surface and forming a contact angle that is greater than 90°.
[0022] Figure 3B illustrates a droplet of an aqueous solution in contact with a solid surface and forming a contact angle that is equal to 90°.
[0023] Figure 3C illustrates a droplet of an aqueous solution in contact with a solid surface and forming a contact angle that is less than 90°.
[0024] Figure 4 is a graph of the percent concentration of Cu2 and 01 atoms, as measured by X-ray Photoelectron Spectroscopy.
[0025] Figure 4A illustrates a flowchart of one process sequence for reducing void-type defects on plated substrates.
[0026] Figure 4B illustrates a flowchart another process sequence for reducing void-type defects on plated substrates.
[0027] Figure 5 illustrates a sectional view of an exemplary plating cell.
[0028] Figures 6-10 illustrate sectional views of an exemplary plating cell and plating head assembly. [0029] For clarity, identical reference numerals have been used, where applicable, to designate identical elements that are common between figures.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0030] Embodiments of the invention generally provide various methods for processing a substrate to reduce the number of void-type defects formed on the substrate when an electrochemical plating process is performed on the substrate. The method of the invention is designed to minimize plating defects by performing one or more preprocessing steps on a substrate prior to performing the ECP process.
[0031] "Plating" as used herein, refers to any deposition process that includes electrochemical plating, electroless plating, or a combination of both.
[0032] Percent concentrations of gas mixtures, as used herein, refer to volume percent.
[0033] "Ambient air" as used herein, refers to air that contains about 21% O2 (by volume). For example, a volume of air that has been sealed in a container that also contains substances that spontaneously react with the gaseous oxygen therein, such as un-oxidized copper, is not considered "ambient air" after any significant period of time has elapsed. This is due to the depletion of oxygen that takes place in such a sealed container via reaction with the substances therein. A gas may vary from standard temperature and/or pressure, i.e., 200C and 760 Torr (absolute pressure) and still be considered "ambient air" as long as it consists of about 21% O2 and 79% N2 and other trace components.
[0034] "Oxygen-containing gas" as used herein, refers to any gas mixture that contains from about 1% to about 100% O2. "Oxygen-depleted" as used herein, refers to having less than about 21% O2. "Low-oxygen" as used herein, refers to having no significant amount of oxygen present, i.e., trace quantities of oxygen at a maximum. "Hydrogen-enriched", as used herein, refers to having a concentration of H2 greater than about 0.5%.
[0035] Figure 1 is a schematic side view of one example of a void defect 100 that has been formed in a copper layer 104 that is formed on a substrate surface 101 via an ECP or electroless plating process. Substrate surface 101 may be any substrate or material surface formed on a substrate upon which film processing is performed. For example, a substrate surface on which processing may be performed include materials such as monocrystalline, polycrystalline or amorphous silicon, strained silicon, silicon on insulator (SOI), doped silicon, silicon germanium, germanium, gallium arsenide, glass, sapphire, silicon oxide, silicon nitride, silicon oxynitride and/or carbon doped silicon oxides, such as SiOxCy, for example, BLACK DIAMOND™ low-k dielectric, available from Applied Materials, Inc., located in Santa Clara, California., substrate 101 is a silicon substrate. For clarity, in the example shown in Figure 1, substrate 101 is illustrated to be unpatterned, i.e., without typical substrate features such as apertures, vias, trenches, etc.
[0036] A diffusion barrier layer 102 and a plating seed layer 103 are deposited on substrate 101 prior to the plating process wherein copper layer 104 is deposited. The diffusion barrier layer 102 and seed layer 103 are typically deposited by conventional deposition techniques, such as PVD, ALD or CVD in a separate substrate processing tool. It has been shown that void defects in plated copper layer 104, such as void defect 100, are formed only in copper layer 104 and do not originate from a void or other defect in underlying layers on the substrate, such as diffusion barrier layer 102 or plating seed layer 103. This is illustrated in Figure 1 , wherein the bottom 100a of void defect 100 ends at plating seed layer 103. Void defects 100 are substantially cylindrical in shape and are commonly less than 0.1 μm in diameter.
[0037] Void defect 100 may occur in very large numbers on plated substrates, either individually, in which case they are referred to as "pit" defects, or they may be formed into arrays of void defects, which are referred to as "dot line void" defects. Figure 1A is a schematic top-down partial view of a copper-plated substrate surface 110, illustrating each. Region 111 , which is 10 μm square, contains a plurality of pit defects 111a. Region 112, which is also 10 μm square, contains part of a dot-line void defect 111b, i.e., a substantially linear array of a large number of pit defects. Pit defects 111a and dot-line void defects 111 b may both affect device yield and electromigration results.
[0038] Occurrence of void defects, i.e., pit and dot-line void defects, has been shown to be a strong function of how long the copper seed layer has been exposed to ambient air. This trend is illustrated in Figure 2. Figure 2 is a graph of the number of total defects detected on copper-plated substrates vs. exposure time of the substrate seed layer to ambient air prior to the plating process. The abscissa represents the time, in minutes, that a freshly deposited copper seed layer on a substrate was exposed to air prior to electrochemical plating. The ordinate represents the total number of defects (void-type and all others) detected on a substrate surface after the plating process. The total number of pit and dot-line void defects on an ECP-plated silicon substrate 200 mm in diameter may range from as high as the 10's of thousands to as low as approximately 100 or lower, depending on copper seed layer exposure time. When the copper seed layer on the substrate is exposed to ambient air for less than 10 minutes, the number of void defects is highest, typically in the 10's of thousands. When pit and dot-line defects occur on a plated wafer in large numbers, i.e., in the thousands and higher, they typically appear in a distinctive swirl pattern on the substrate and are collectively referred to as a "swirl" defect. Void defect counts per substrate quickly drop in magnitude for copper seed layers exposed to ambient air for longer times. For copper seed layers exposed to ambient air for more than approximately 70 or 80 minutes, the swirl pattern is not present and defect counts repeatably stabilize at approximately 100 per substrate and do not decrease with further exposure to air. However, copper seed layers exposed for more than approximately 24 hours to ambient air begin showing other defect types when plated.
[0039] Further, when substrates freshly deposited with copper seed layers are stored for up to a week in an airtight container, a similar trend for void defect counts is seen. The first substrates to be plated, i.e., those with the shortest exposure time to ambient air, uniformly show the highest void defect counts in the swirl defect pattern — although at a lower magnitude than substrates that are plated immediately after seed layer deposition. As with substrates that are plated with a very fresh seed layer, void defect counts on stored substrates quickly trend down as a function of exposure time to ambient air. This indicates that exposure to ambient air is the most effective measure for eliminating pit and dot-line defects.
[0040] Tests involving different methods of the immersing substrates into a plating bath, such as varying substrate rotation speed and direction, confirm that the swirl defect is primarily produced during the substrate immersion step of the plating process. It is believed that gas bubbles trapped on the surface of the copper seed layer during immersion are the foremost cause of void defect formation. Hence, the swirl defect can be reduced or eliminated by minimizing the amount of bubbles generated during substrate immersion, improving the wetting action of the plating fluid, and increasing substrate surface wettability.
[0041] Substantial and on-going effort has been directed to minimizing bubble creation during substrate immersion into plating baths. Methods developed to date include optimized substrate tilt angle, substrate rotation speed and substrate velocity during immersion in the plating solution for minimal flow disturbance and bubble formation. Optimized substrate immersion methods used in aspects of the invention are described below in conjunction with Figures 5, 6, 7, 8, 9 and 10.
[0042] Increasing the wetting action of the plating fluid, i.e. altering the chemistry of the plating fluid so that it more readily wets the surface of the substrate during immersion, is another approach for eliminating the swirl defect. Testing has been performed involving a medium acidity and low acidity plating fluid and the swirl defect occurs with either plating solution. Further changes to plating fluid chemistry that improve the wetting of the plating fluid, such as the addition of surfactants, is problematic. Such changes may eliminate the swirl defect but create other serious problems, such as organic contamination of the plated copper film and/or poor gap fill capabilities. Hence, aspects of the invention generally do not contemplate altering plating fluid chemistry.
[0043] It is known that a surface with a higher wettability will have fewer bubbles adhering to the surface when immersed in a given liquid, hence, increasing substrate surface wettability is the third approach for eliminating void-type defects on plated substrates. Wettability is usually quantified in terms of the contact angle, also known as the wetting angle, for a drop of a liquid on a solid in a vapor. Figure 3 is a schematic cross-sectional view of a solid-liquid system 300 consisting of a droplet 305 on a solid 302. The contact angle 301 of solid-liquid system 300 is a measurement of the angle formed between the surface of solid 302 and the line 303 tangent to the radius 304 of droplet 305 on the solid 302 from the point of contact 306 with the solid 302. For ease of measurement of the contact angle 301 , the solid 302 typically is a flat, horizontal surface, as shown in Figure 3. The contact angle 301 will vary for different systems of liquids and solids, resulting from the interaction of the surface tension of the droplet 305 and the surface chemistry of the solid 302. When contact angle 301 is less than 90° for a solid-liquid system 300, good wetting is produced and the droplet 305 tends to spread across the surface of solid 302. When contact angle 301 is greater than 90°, wetting is poor, i.e., droplet 305 is repelled by the surface of solid 302, and droplet 302 tends to bead or shrink away from solid 302.
[0044] For aqueous solutions, such as plating solutions, a surface or material that creates a contact angle smaller than 90° is referred to as hydrophilic and a surface or material that creates a contact angle larger 90° than is referred to as hydrophobic. Figure 3A illustrates a droplet 305a of an aqueous solution in contact with a solid surface 302a and forming a contact angle 301a that is greater than 90°. Surface 302a is considered highly hydrophobic. Figure 3B illustrates a droplet 305b of an aqueous solution in contact with a solid surface 302b and forming a contact angle 301b that is equal to 90°. Droplet 305b demonstrates significant beading on surface 302b and therefore surface 302b is considered hydrophobic. Figure 3C illustrates a droplet 305c of an aqueous solution in contact with a solid surface 302c and forming a contact angle 301c that is less than 90°. Droplet 305c spreads out across surface 302c, therefore surface 302c is considered hydrophilic.
[0045] It is known that the formation of metal oxide on a freshly deposited copper seed layer is very fast in the first five minutes of exposure to ambient air but reaches a saturation depth of about 10 to 20 A after approximately 90 minutes of exposure. Metal oxide growth thereafter is relatively slow, as illustrated in Figure 4. Figure 4 is a graph of the percent concentration of Cu2 and 01 atoms, as measured by X-ray Photoelectron Spectroscopy (XPS). The abscissa represents exposure time to ambient air of a fresh, PVD-deposited copper seed layer on a substrate. The ordinate represents measured concentration, in atomic percent, of elements present on the surface of the seed layer. Data set 401 represents the concentration of Cu2 atoms present on the surface of the substrate. Data set 402 represents the concentration of O1 atoms present on the surface of the substrate. As shown in Figure 4, the concentration of Cu2 drops quickly in the first 300 seconds, i.e., 5 minutes, of exposure to ambient air from 48.7% at data point 401a to 32.5% at data point 401b. A corresponding increase in the concentration of O1 atoms takes place in the first 300 seconds of exposure from 24.3% at data point 402a to 35.6% at data point 402b, indicating oxidation of the copper seed layer. After 5400 seconds, i.e., 90 minutes, of exposure to ambient air, the concentration of Cu2 has only decreased slightly at data point 401c to 29.7% and the oxygen concentration has only increased slightly at data point 402c to 40.6%, indicating that the oxidation process has essentially stopped. [0046] Referring to Table 1 , it is clear that the surface roughness of a fresh copper seed layer increases significantly with exposure to ambient air. After 11 minutes of exposure to ambient air, the root-mean-square (RMS) surface roughness of a PVD-deposited layer of copper on a substrate is measured to be 0.309 nm. 16 minutes later, i.e., after 27 minutes of exposure to ambient air, the RMS surface roughness increases to 0.327 nm. It is believed that this is due to the formation of the cuprous oxide (Cu2O) layer brought about by oxidation. Further, it is known that increasing the roughness of a metal oxide surface reduces the contact angle of liquids thereon and improves the wettability of the surface (see Physical Chemistry of Surfaces, 5th edition, by Arthur W. Adamson, John Wiley & Sons, Inc. p. 388). Hence, it is believed that the reduced numbers of void-type defects detected on substrates that have been exposed to ambient air for at least about 80 minutes prior to plating is due to improved wettability brought about by the thin, uniform cuprous oxide layer that forms after about 80 minutes of exposure to ambient air. The micro- roughness associated with a fully developed metal oxide layer improves wettability of the substrate surface and reduces the tendency of gas bubbles to adhere to the surface of the substrate. With improved wettability, bubbles are less likely to adhere to the surface of the substrate during immersion and void-type defects are not formed. It is also believed that a non-uniform copper surface, such as a freshly deposited copper seed layer that has only partially oxidized regions, or oxide islands, on its surface, may be more likely to drag gas bubbles from the air-liquid interface during immersion of the substrate. A copper seed layer that has not formed a 10-20 A thick cuprous oxide layer is such a non-uniform copper surface.
Figure imgf000015_0001
Table 1 Surface Roughness of Fresh Copper Seed Layer After Exposure to Air [0047] Embodiments of the invention provide two methods for producing a thin, uniform cuprous oxide layer on a copper seed layer quickly and consistently: anneal followed by metal oxide re-growth and metal oxide growth via forced air exposure. In some aspects, an optimized substrate immersion method is also used to further reduce void defects. The optimized tilt method is designed to immerse a substrate into a plating solution with minimal bubble formation.
[0048] Figure 4A illustrates a flowchart of one process sequence 450 for reducing void-type defects on plated substrates. In step 451 , an anneal process, described below, is performed on the substrate to remove metal oxides from the surface of a substrate with a freshly deposited seed layer. In step 452, a suitable metal oxide layer is formed on the surface of the seed layer via exposure of the seed layer to an oxygen-containing gas. In step 453, the substrate is immersed in a plating solution. In step 454, the substrate is plated. Alternatively, the substrate is immersed in step 453 using an optimized tilt method, described below, to minimize bubbles created during immersion and to discourage adhesion of bubbles to the surface of the substrate.
[0049] Figure 4B illustrates a flowchart of another process sequence 460 for reducing void-type defects on plated substrates. In step 461 , a dry spin process, described below, is performed on the substrate to quickly and consistently form a suitable metal oxide on the surface of a substrate with a freshly deposited seed layer. In step 462, the substrate is immersed in a plating solution. In step 463, the substrate is plated. Alternatively, the substrate is immersed in step 462 using an optimized tilt method, described below, to minimize bubbles created during immersion and to discourage adhesion of bubbles to the surface of the substrate.
Anneal and Metal oxide Re-Growth
[0050] One method that may be included in embodiments of the invention involves the removal of metal oxides formed on the surface of a freshly deposited metal layer, followed by the controlled formation of a more suitable metal oxide layer prior to plating. In the case of a copper seed layer, a thin, i.e., 10-20 A thick, uniform, cuprous oxide layer is desired.
[0051] An anneal chamber may be used to remove metal oxides formed on a copper seed layer prior to the plating process. Shortly before plating, the substrate is heated in an air-tight chamber in a low-oxygen environment. Because metal oxides are being removed from the surface of the substrate, it is important that the oxygen concentration in the environment during this process step is very low, for example at most no more than about 1 % and preferably no more than about 0.1%. In one aspect, the anneal chamber is mounted on the same substrate processing platform that performs the substrate plating process to minimize the time between the formation of the metal oxide layer and the plating process. The low-oxygen environment may be achieved through pump-down of the chamber via a vacuum pump and subsequent back-fill of the chamber with a low-oxygen gas, such as nitrogen or argon. It has been shown that heat treatments greater than about 1500C tend to damage seed layers via recrystallization, resulting in other defects, such as copper grain pullout during subsequent processes. Heat treatments less than about 500C are generally not effective for oxide reduction. Hence, in a preferred aspect of the invention, an anneal process at a temperature less than about 1500C and more than about 500C, such as 1000C for example, is used to remove metal oxides from the surface of a copper seed layer.
[0052] In one aspect, the substrate annealing environment includes a forming gas, such as hydrogen, to more completely remove metal oxide layers on the substrate. When the process temperatures are relatively low, i.e. no greater than about 1000C, the use of a forming gas greatly increased the effectiveness of the anneal process for removing metal oxides. In a preferred aspect of the invention, a 4% concentration of hydrogen is used because that is the lower explosive limit of hydrogen. However, use of higher concentrations of hydrogen is contemplated for faster or more effective removal of metal oxides during this process step. [0053] In one typical anneal process for removing metal oxides from the surface of a substrate, a substrate is positioned in an anneal chamber. The chamber is pumped down to about 0.1 kPa or less and back-filled with a purge gas, such as N2, at about 8 kPa for about 20 seconds. A forming gas consisting of 4% H2/96% N2 is flowed into the chamber at a flow rate that maintains the pressure in the chamber at about 2 kPa. The substrate is then heated to about 1000C for between about 60 seconds and about 120 seconds. The anneal time may be reduced if a forming gas containing more than 4% H2 is used.
[0054] After removal of some or all metal oxides from the surface of a substrate, the substrate is cooled and then exposed to an oxygen-containing gas in a controlled manner. Preferably, the exposure to the oxygen-containing gas takes place in the same chamber wherein the anneal process takes place. In one aspect, the substrate is cooled with a purge gas, such as nitrogen. In another aspect, a temperature-controlled substrate pedestal may be used to cool the substrate to the desired oxidation temperature. In the preferred embodiment, ambient air is used to form the desired metal oxide layer on the surface of the seed layer, which, in the case of a copper seed layer, is a cuprous oxide layer 10-20 A thick. In another embodiment, an oxygen-depleted gas mixture may be used, such as a 50% ambient air/50% N2 mixture. Because it is believed that too-rapid oxidation of a metal layer may result in non-uniform growth of a metal oxide layer, a gas mixture with less oxygen than ambient air may be used to form the desired metal oxide on the substrate. An oxygen-containing gas with more than about 21% oxygen may also be used to form the metal oxide layer on the surface of the substrate. However, it is more difficult to control the uniformity of the resultant metal oxide layer.
[0055] After removal of unwanted metal oxides via an anneal process and the subsequent formation of a desired metal oxide on the surface of the substrate, the substrate is then plated with an electrochemical or electroless plating process. Forced Air Exposure
[0056] Another method that may be included in embodiments of the invention involves the formation of a suitable metal oxide layer on the surface of a freshly deposited metal layer by causing an oxygen-containing gas to flow across the surface of the metal layer. It has been shown that in the case of a copper seed layer, a 10-20 A thick cuprous oxide layer may be formed thereon in less than two minutes if ambient air is flowed across the copper seed layer under certain conditions.
[0057] In one embodiment, the substrate is rotated at high rpm in a process chamber that is purged with ambient air. This is also known as a "dry spin" process. It is known in the art that the rotation of a substrate in a chamber at a relatively high speed, e.g. at least 500 rpm for a 300 mm circular substrate, creates a vortex that forces air or any other gases present in the chamber radially outward across the surface of the substrate. This forced convection of oxygen-containing gas across the freshly deposited metal layer greatly increases the rate at which the metal oxide is formed. In the case of a PVD-deposited copper seed layer, a cuprous oxide layer of about 10-20 A thickness is formed in less than two minutes, rather than the at least 80 minutes required when the copper seed layer is exposed to ambient air without forced convection.
[0058] It is important to note that the dry spin chamber must be continually refreshed with enough ambient air or other oxygen-containing gas to prevent the environment inside the processing chamber from becoming oxygen-depleted. In situations wherein the flow rate of ambient air into the chamber is marginally adequate, an increase of as little as 30% in the flow rate of ambient air into the chamber may have a measurable effect on the number of void-type defects detected on plated substrates. In the preferred aspect, the chamber in which the dry spin takes place is open to ambient air and a continuous supply of ambient air is provided during the dry spin process via a process exhaust system, wherein oxygen-depleted air is removed from the dry spin chamber and ambient air is drawn in to the process chamber during substrate processing. The minimum required exhaust flow for a given chamber varies depending on several factors, including substrate size, chamber volume, process chamber humidity and substrate spin speed, but in general a minimum of three air changes per minute is desired. One skilled in the art, upon reading the disclosure herein, can determine the required process exhaust volume for a given dry spin chamber.
[0059] In one embodiment, a rotatable substrate support spins the substrate at a desired rpm. In one aspect, the dry spin chamber is mounted on the same substrate processing platform that performs the substrate plating process and is used for other process steps associated with the plating process, such as a pre- rinse chamber, a spin-rinse-dry chamber, a plating cell or a bevel clean chamber. Any substrate processing chamber with a rotatable substrate support and exposure to ambient air may be used for this embodiment. The substrate may be oriented face-up or face-down during the dry spin process. In a preferred aspect, a chamber that contains 50% to 70% humidity when processing substrates is used for the dry spin process, such as a plating cell or spin-rinse-dry chamber. Humidity of at least about 50% to 70% has been shown to reduce the time required for metal oxide formation during the dry spin process step. In one aspect, the substrate is held in place on a rotatable substrate support during the dry spin process with a vacuum chuck. In another aspect the substrate is held in place via centrifugal clips on the rotatable substrate support. Both methods are known in the art. In another aspect, the rotatable substrate support may be adapted with air vanes or impellors to enhance forced convection in the dry spin chamber. This aspect is useful for situations in which the process chamber being used for the dry spin process is unable to adequately perform the dry spin process. Chambers with marginal exhaust, low humidity and/or no high rpm capability, such as a plating chamber, may benefit from the enhanced forced convection generated with air vanes or impellers. The optimal rpm and spin time for formation of a given metal oxide formation varies as a function humidity and airflow rate. For the formation of a 10- 20 A thick cuprous oxide layer on a copper seed layer, the preferred rpm is from about 500 rpm to about 2000 rpm and the spin time is from about 1 minute to about 2 minutes. Lower humidity in the dry spin chamber than 50% may require a longer spin time and/or a higher rpm. For example, when a dry spin process takes place in a dry chamber, i.e. less than 40% relative humidity, the spin time may need to be as long as about 4 minutes or longer to produce a suitable metal oxide layer on a copper substrate.
[0060] In another embodiment, an oxygen-containing gas is fed into the dry spin chamber in addition to or in lieu of ambient air. This makes it possible to vary oxygen content in the dry spin chamber as a means for controlling the formation of a suitable metal oxide on the surface of a freshly deposited metal layer. In general, other parameters of the dry spin process are easier to control, such as substrate rpm, exhaust flow rate and spin time. However, variation of oxygen content in the dry spin chamber is one method that may be used for tuning the dry spin process. For example, if a 50% oxygen/50%ambient air mixture is introduced into the dry spin chamber, the dry spin time required to form a suitable metal oxide layer on a freshly deposited seed layer may be reduced.
[0061] In another embodiment, an oxygen-containing gas is flowed across the surface of the metal layer on a stationary substrate by forced convection to form a suitable metal oxide prior to plating. The process may be a single substrate process or batch substrate process. In the preferred aspect, ambient air is flowed across the surface of the substrate. An oxygen-containing gas of higher or lower oxygen content than ambient air may also be used. In one aspect, the forced convection of the oxygen-containing gas is generated by a fan. In another aspect, the forced convection of the oxygen-containing gas is caused by releasing the gas from a pressurized vessel or other gas source. [0062] In one aspect, the velocity of the oxygen-containing gas is used as a process parameter for controlling the formation of the desired metal oxide. Generally, a higher velocity will reduce the time required for formation of a metal oxide on the surface of a freshly deposited metal layer. The optimal velocity and oxygen content of the oxygen-containing gas for formation of metal oxide formation varies depending on the metal layer present and relative humidity of the oxygen- containing gas. For the formation of a 10-20 A thick cuprous oxide layer on a copper seed layer, the preferred incident velocity of ambient air on the substrate surface is at least about 3 m/s to about 10 m/s and the air flow time is from about 1 minute to about 3 minutes. Lower relative humidity than 50% in the ambient air or other oxygen-containing gas may require a longer flow time and/or a higher incident velocity.
Immersion with Optimized Tilt
[0063] As noted above, in order to minimize void-type defects in plated films, bubbles adhering to the substrate surface during the process of immersing a substrate into a plating solution contained in a plating cell should be minimized. Therefore, embodiments of the invention include a method for immersing a substrate into a processing fluid that generates minimal bubbles and discourages any bubbles that are formed from adhering to the substrate surface.
[0064] The immersion method incorporated in some embodiments of the invention generally includes driving or actuating the substrate into the plating solution using a combination of a tilt and swing immersion process. More particularly, the substrate may be tilted at an angle with respect to horizontal, and then vertically actuated toward the plating solution while being rotated, which immerses the substrate and maintains a constant angle between the substrate and the upper surface of the plating solution. The combination of the tilt and rotation causes bubbles to be dislodged from the substrate surface and carried away from the substrate surface as a result of the buoyancy of the bubbles. Further, the tilt angle of the substrate may be adjusted during the immersion process, thus generating a swing or pendulum type motion, which also urges bubbles attached to the substrate surface to be dislodged therefrom.
[0065] Figure 5 illustrates a sectional view of an exemplary plating cell, hereinafter referred to as plating cell 500, that will illustrate immersion with optimized tilt. The plating cell 500 generally includes a plating head assembly 600, a frame member 503, an outer basin 501 and an inner basin 502 positioned within outer basin 501.
[0066] The plating head assembly 600 includes a receiving member 601 for supporting and rotating a substrate during immersion into the plating bath and during plating. In this example, receiving member 601 includes a contact ring 602 and a thrust plate assembly 604 that are separated by a loading space 606. The contact ring 602 may be adapted to make electrical contact around the periphery of the substrate so that the necessary electrical plating bias may be applied to the substrate. A more detailed description of the contact ring 602 and thrust plate assembly 604 may be found in commonly assigned U.S. Patent Application Serial No. 10/278,527, filed on October 22, 2002 and entitled "Plating Uniformity Control By Contact Ring Shaping", and commonly assigned United States Patent No. 6,251 ,236 entitled Cathode Contact Ring for Electrochemical Deposition, both of which are hereby incorporated by reference in their entirety to the extent not inconsistent with the present invention.
[0067] The frame member 503 of plating cell 500 supports an annular base member 504 on an upper portion thereof. Since frame member 503 is elevated on one side, the upper surface of base member 504 is generally tilted from the horizontal at an angle that corresponds to the tilt angle of frame member 503 relative to a horizontal position. Base member 504 includes a disk-shaped anode 505. Plating cell 500 may be positioned at a tilt angle, i.e., the frame portion 503 of plating cell 500 may be elevated on one side such that the components of plating cell 500 are tilted between about 3° and about 30°.
[0068] Inner basin 502 is generally configured to contain a plating solution that is used to plate a metal, e.g., copper, onto a substrate during an electrochemical plating process. During the plating process, the plating solution is generally continuously supplied to inner basin 502, and therefore, the plating solution continually overflows the uppermost point 502a, generally termed a "weir", of inner basin 502 and is collected by outer basin 501 and drained therefrom for chemical management and recirculation. The exemplary plating cell is further illustrated in commonly assigned United States Patent Application Serial No. 10/268,284, filed on October 9, 2002, and entitled "Electrochemical Processing Cell", claiming priority to United States Provisional Application Serial No. 60/398,345, which was filed on July 24, 2002, both of which are incorporated herein by reference in their entireties.
[0069] In an exemplary ECP process, a substrate may be transferred into a plating cell, such as plating cell 500 for example, and positioned face-down on contact ring 602. Thrust plate assembly 604 holds the substrate in place as described below in conjunction with Figure 6. The substrate is then immersed in the catholyte solution filling inner basin 502 using the optimized tilt immersion method described below in conjunction with Figures 6-10, typically while being rotated by the contact ring 602 between about 5 rpm and about 60 rpm. The catholyte solution may have between about 5 g/l and 50 g/l of sulfuric acid, a copper concentration between about 25 g/l and 70 g/l, and a chlorine concentration between about 30 ppm and about 60 ppm. The catholyte solution may also include additional additives, such as levelers, suppressors or accelerators. During plating, a plating bias, typically between about 1 VDC and about 10 VDC, is applied to the substrate. The substrate may be rotated between about 10 rpm and about 100 rpm during the plating process step by contact ring 602. Plating takes place for between about 30 sec and about 5 minutes, depending on the thickness of plated film desired. The plating bias is then removed and the substrate is positioned above the catholyte solution and uppermost point 502a of inner basin 502 for removal from plating cell 500. Prior to removal from plating cell 500, the substrate may be rotated between about 100 and 1000 rpm for between about 1 second and about 10 seconds in order to remove excess catholyte solution from the substrate. An exemplary ECP cell and plating process is further described in commonly assigned United States Patent Application Serial No. 10/627,336 entitled "Electrochemical Processing Cell," filed on July 24, 2003, which is hereby incorporated by reference in its entirety to the extent not inconsistent with the present invention.
[0070] The optimized immersion method that may be used in some aspects of the invention begins with loading a substrate into plating head assembly 600. A wafer handling robot is used to position a substrate on the contact ring 602 via access space 606. The substrate is placed in a face down, i.e. production surface facing down, orientation. Once the substrate is positioned on the contact ring 602, thrust plate assembly 604 may be lowered into a processing position, i.e., thrust plate 604 may be actuated vertically in the direction indicated by arrow 610 in Figure 6, to engage the backside of the substrate positioned on the contact ring 602.
[0071] Once the substrate is secured to the contact ring 602 by the thrust plate 604, the lower portion of the plating head assembly 600, i.e., the combination of the contact ring 602 and the thrust plate 604, may be positioned at a tilt angle. The lower portion of the plating head assembly is pivoted to the tilt angle via pivotal actuation of the plating head assembly 600 about a pivot point 608. The lower portion of plating head assembly 600 is actuated about pivot point 608, which causes pivotal movement of the lower portion of plating head assembly 600 in the direction indicated by arrow 609 in Figure 6. The lower portion of plating head assembly 600 and the plating surface of the substrate positioned on the contact ring 602 are tilted to the tilt angle as a result of the movement of plating head assembly 600, wherein the tilt angle is defined as the angle between horizontal and the plating surface/production surface of the substrate secured to the contact ring 602. The tilt angle is generally between about 3° and about 30°. Further, pivot point 608 is generally positioned such that when the plating head assembly 600 is tilted, a central vertical axis of the substrate remains in substantially the same location as when the substrate was positioned horizontally, i.e., the pivot point 608 is generally positioned proximate contact ring 602.
[0072] Once the plating head assembly 600 is tilted, it may be actuated in the Z- direction, i.e., in the direction indicated by arrow 701 , as illustrated in Figure 7 to begin the immersion process. Plating head assembly 600 is actuated to bring the substrate positioned in the contact ring 602 toward the plating solution contained within the plating cell 500 positioned below plating head assembly 600. The direction indicated by arrow 701 may be parallel to the central axis of the substrate, or alternatively, the direction indicated by arrow 701 may be substantially vertical. Alternatively, the tilting process may be conducted simultaneously with the Z- direction actuation.
[0073] As plating head assembly 600 is moved toward plating cell 500, the lower side of contact ring 602, i.e., the side of contact ring 602 positioned closest to plating cell 500 as a result of the tilt angle, contacts the plating solution as the plating head assembly 600 is actuated toward inner basin 502 of plating cell 500. The process of actuating plating head assembly 600 toward inner basin 502 may further include imparting rotational movement to contact ring 602. Thus, during the initial stages of the immersion process, contact ring 602 is being actuated in a vertical or Z-direction, while also being rotated about a central axis that intersects the radial center of the substrate, which is also generally orthogonal to the substrate surface.
[0074] As the substrate becomes immersed in the plating solution contained within plating cell 500, the Z-motion of plating head assembly 600 may be slowed and/or terminated and the tilt position of contact ring 602 is returned to horizontal, as illustrated in Figure 8. The slowing or termination of the vertical, or the Z-direction, movement is calculated to maintain the substrate in the plating solution contained in cell 500 when the tilt angle is reduced. Further, the optimized tilt method may include the removal of the tilt angle, i.e., the return of contact ring 602 to a substantially horizontal position, simultaneously with the vertical movement of contact ring 602 into the plating solution. As such, a substrate immersed by this method may first contact the plating solution with the substrate being positioned at a tilt angle, and then the tilt angle may be returned to horizontal while the substrate continues to be immersed into the plating solution. This process generates a unique swinging or pendulum type movement that includes both vertical actuation and tilt angle actuation, which has been shown to reduce bubble formation and adherence to the substrate surface during the immersion process. Further, the vertical and pivotal actuation of the substrate during immersion process may also include rotational movement of contact ring 602, which has been shown to further minimize bubble formation and adherence to the substrate surface during the immersion process.
[0075] Once the substrate is completely immersed into the plating solution contained within cell 500, plating head assembly 600 may be further actuated in a vertical direction, i.e., downward, to further immerse the substrate into the plating solution, i.e., to position the substrate further or deeper into the plating solution, as illustrated in Figure 9. This process may also include rotating the substrate, which operates to dislodge any bubbles formed during the immersion process from the substrate surface. Once the substrate is positioned deeper within the plating solution, the plating head assembly 600 may again be pivoted about pivot point 608, so the substrate surface may be positioned in parallel relationship to the upper surface of the anode 505, as illustrated in Figure 10. This final tilting motion of plating head assembly 600 generally corresponds to positioning contact ring 602 in a processing position, i.e., a position where the substrate supported by contact ring 602 is generally parallel to anode 505 positioned in a lower portion of the plating cell 500, which corresponds to positioning the substrate at a processing angle. The processing angle generally corresponds to the angle that the upper surface of the anode 505 makes with respect to horizontal.
[0076] The optimized tilt method is further described in commonly assigned United States Patent Application Serial No. 10/781 ,040 [APPM8266], filed on February 18, 2004, and entitled "Method For Immersing A Substrate," which is hereby incorporated by reference in its entirety to the extent not inconsistent with the present invention.
[0077] While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

Claims:
1. A method for forming a layer on an electronic device substrate, comprising: depositing a first metal layer on a substrate; forming a metal oxide layer on the first metal layer by flowing an oxygen- containing gas across the first metal layer at a velocity between about 3 m/sec and about 10 m/s; and plating a second metal layer on the metal oxide layer.
2. The method of claim 1 , wherein the oxygen-containing gas comprises atmospheric air.
3. The method of claim 1 , wherein the humidity of the oxygen-containing is between about 50% and about 70%.
4. The method of claim 1 , wherein the first metal layer is a copper-containing layer.
5. The method of claim 1 , wherein the metal oxide layer formed on the first metal layer is between about 10 A and about 20 A thick.
6. The method of claim 1, wherein the substrate may include a material selected from the group consisting of monocrystalline silicon, polycrystalline silicon, amorphous silicon, strained silicon, silicon on insulator, doped silicon, silicon germanium, germanium, gallium arsenide, glass, sapphire, silicon oxide, silicon nitride, silicon oxynitride and/or carbon doped silicon oxide.
7. The method of claim 1 , further comprising: immersing the first metal layer into a plating solution using an optimized tilt method, wherein the optimized tilt method comprises: positioning the substrate at a first tilt angle from horizontal above the plating solution; vertically displacing the substrate to immerse the first metal layer into the plating solution while maintaining the substrate at the first tilt angle from horizontal; and positioning the substrate substantially parallel to an anode prior to plating.
8. The method of claim 7, wherein the optimized tilt method further comprises rotating the substrate during the immersing the first metal layer step.
9. The method of claim 7, wherein the optimized tilt method further comprises altering the position of the substrate from the first tilt angle from horizontal toward horizontal during said vertical displacing.
10. The method of claim 7, wherein the optimized tilt method further comprises altering the position of the substrate to a second tilt angle measured from horizontal when the substrate contacts the plating solution.
11. A method for forming a layer on an electronic device substrate, comprising: depositing a first metal layer on a substrate; forming a metal oxide layer on the first metal layer by rotating the substrate from about 500 rpm to about 2000 rpm in the presence of an oxygen-containing gas; and plating a second metal layer on the metal oxide layer.
12. The method of claim 11 , wherein the oxygen-containing gas comprises atmospheric air.
13. The method of claim 11 , wherein the humidity of the oxygen-containing is between about 50% and about 70%.
14. The method of claim 11 , wherein the first metal layer is a copper-containing layer.
15. The method of claim 11 , wherein the metal oxide layer formed on the first metal layer is between about 10 A and about 20 A thick.
16. The method of claim 11 , wherein the substrate may include a material selected from the group consisting of monocrystalline silicon, polycrystalline silicon, amorphous silicon, strained silicon, silicon on insulator, doped silicon, silicon germanium, germanium, gallium arsenide, glass, sapphire, silicon oxide, silicon nitride, silicon oxynitride and/or carbon doped silicon oxide.
17. The method of claim 11 , further comprising: immersing the first metal layer into a plating solution using an optimized tilt method, wherein the optimized tilt method comprises: positioning the substrate at a first tilt angle from horizontal above the plating solution; vertically displacing the substrate to immerse the metal layer into the plating solution while maintaining the substrate at the first tilt angle from horizontal; and positioning the substrate substantially parallel to an anode prior to plating.
18. The method of claim 17, wherein the optimized tilt method further comprises rotating the substrate during the immersing the first metal layer step.
19. The method of claim 17, wherein the optimized tilt method further comprises altering the position of the substrate from the first tilt angle from horizontal toward horizontal during said vertical displacing.
20. The method of claim 17, wherein the optimized tilt method further comprises altering the position of the substrate to a second tilt angle measured from horizontal when the substrate contacts the plating solution.
21. A method for improving the wettability of a substrate with a metal surface layer, comprising: exposing the metal surface layer of the substrate to an oxygen-containing gas until a metal oxide layer that is between about 10 A and about 20 A thick is formed on the metal surface layer of the substrate.
22. The method of claim 21 , wherein the process of exposing the metal surface layer of the substrate to an oxygen-containing gas comprises exposing the metal surface layer of the substrate to atmospheric air for longer than about 80 minutes and less than about 24 hours.
23. The method of claim 22, wherein the metal surface layer is a copper- containing surface layer.
24. The method of claim 21 , wherein the process of exposing the metal surface layer of the substrate to an oxygen-containing gas comprises flowing an oxygen- containing gas over the metal surface layer of the substrate at a velocity of between about 3 m/sec and about 10 m/s.
25. The method of claim 24, wherein the oxygen-containing gas is atmospheric air.
26. The method of claim 24, wherein the metal surface layer is a copper- containing surface layer.
27. The method of claim 21 , wherein the process of exposing the metal surface layer of the substrate to an oxygen-containing gas comprises rotating the substrate from about 500 rpm to about 2000 rpm in the presence of an oxygen-containing gas.
28. The method of claim 27, wherein the oxygen-containing gas is atmospheric air.
29. The method of claim 27, wherein the metal surface layer is a copper- containing surface layer.
30. The method of claim 27, wherein the humidity of the oxygen-containing gas is between about 50% and about 70%.
31. A method of processing a substrate that has a metal layer formed thereon, comprising: positioning the substrate in a first process chamber; causing an oxygen-containing gas to flow across the substrate until a metal oxide layer about 10 to about 20 A thick is formed on the metal layer; immersing the substrate in a plating solution; and plating a second metal layer on the substrate.
32. The method of claim 31 , wherein the process of causing an oxygen- containing gas to flow across the substrate comprises flowing an oxygen-containing gas over the metal surface layer of the substrate at a velocity between about 3 m/sec and about 10 m/s.
33. The method of claim 31 , wherein positioning the substrate comprises positioning the substrate on a rotatable substrate support and causing an oxygen- containing gas to flow across the substrate comprises rotating the substrate from about 500 rpm to about 2000 rpm in the presence of an oxygen-containing gas.
34. The method of claim 31 , wherein the metal layer is a copper-containing layer.
35. The method of claim 31 , wherein the oxygen-containing gas is ambient air.
36. The method of claim 31 , wherein the process of immersing the substrate in a plating solution comprises: positioning the substrate at a first tilt angle above a plating solution positioned in a process chamber; vertically displacing the substrate to immerse the metal layer into the plating solution while maintaining the substrate at the first tilt angle; and positioning the substrate substantially parallel to an anode positioned in the plating solution prior to plating.
37. The method of claim 36, further comprising rotating the substrate during immersion.
38. The method of claim 36, further comprising altering the position of the substrate from the first tilt angle toward horizontal during said vertical displacing.
39. The method of claim 36, further comprising altering the position of the substrate to a second tilt angle when the substrate contacts the plating solution.
40. The method of claim 31 , further comprising positioning the substrate in a second process chamber prior to the immersing the substrate in a plating solution step, wherein the second process chamber is adapted to perform the immersing the substrate in a plating solution step and the plating a second metal layer on the substrate step.
41. The method of claim 31 , wherein causing an oxygen-containing gas to flow across the substrate further comprises: holding the substrate in a low-oxygen, hydrogen-enriched environment; increasing the temperature of the substrate to between about 500C and about 1000C; and exposing the substrate to an oxygen-containing gas.
42. A method for forming a layer on an electronic device substrate, comprising: depositing a first metal layer on a substrate; forming a metal oxide layer between about 10 Λ and about 20 A thick on the metal layer by exposing the metal layer to an oxygen-containing gas for longer than about 80 minutes and less than about 24 hours; and plating a second metal layer on the metal oxide layer.
PCT/US2006/037697 2005-10-07 2006-09-28 Pre-treatment to eliminate the defects formed during electrochemical plating WO2007044232A2 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10002781B2 (en) 2014-11-10 2018-06-19 Brooks Automation, Inc. Tool auto-teach method and apparatus

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070084730A1 (en) * 2005-10-13 2007-04-19 Taiwan Semiconductor Manufacturing Co., Ltd. Plating apparatuses and processes
JP4783261B2 (en) * 2006-10-30 2011-09-28 株式会社東芝 Manufacturing method of semiconductor device
US11225727B2 (en) 2008-11-07 2022-01-18 Lam Research Corporation Control of current density in an electroplating apparatus
US10011917B2 (en) 2008-11-07 2018-07-03 Lam Research Corporation Control of current density in an electroplating apparatus
US8273233B2 (en) * 2009-07-17 2012-09-25 Headway Technologies, Inc. Method to reduce void formation during trapezoidal write pole plating in perpendicular recording
US20110094888A1 (en) * 2009-10-26 2011-04-28 Headway Technologies, Inc. Rejuvenation method for ruthenium plating seed
US9385035B2 (en) 2010-05-24 2016-07-05 Novellus Systems, Inc. Current ramping and current pulsing entry of substrates for electroplating
TWI476299B (en) * 2010-06-23 2015-03-11 Ind Tech Res Inst Chemical bath deposition apparatuses and fabrication methods for compound thin films
US9028666B2 (en) * 2011-05-17 2015-05-12 Novellus Systems, Inc. Wetting wave front control for reduced air entrapment during wafer entry into electroplating bath
US20130249096A1 (en) * 2012-03-23 2013-09-26 Texas Instruments Incorporated Through silicon via filling
US9988713B2 (en) * 2013-03-12 2018-06-05 Arizona Board Of Regents On Behalf Of Arizona State University Thin film devices and methods for preparing thin film devices
US20140262795A1 (en) * 2013-03-14 2014-09-18 Applied Materials, Inc. Electroplating processor with vacuum rotor
US20160111342A1 (en) * 2014-10-17 2016-04-21 Lam Research Corporation Method and apparatus for characterizing metal oxide reduction
US10443146B2 (en) 2017-03-30 2019-10-15 Lam Research Corporation Monitoring surface oxide on seed layers during electroplating

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3502949A (en) * 1967-04-15 1970-03-24 Nippon Electric Co Thin film solid electrolyte capacitor
US3573973A (en) * 1967-11-13 1971-04-06 Ibm High speed additive circuit process
US4019902A (en) * 1974-06-10 1977-04-26 Xerox Corporation Photoreceptor fabrication
US4692997A (en) * 1984-12-19 1987-09-15 Eaton Corporation Method for fabricating MOMOM tunnel emission transistor
US6194032B1 (en) * 1997-10-03 2001-02-27 Massachusetts Institute Of Technology Selective substrate metallization
US20040192066A1 (en) * 2003-02-18 2004-09-30 Applied Materials, Inc. Method for immersing a substrate
US20040235294A1 (en) * 2002-04-23 2004-11-25 Toru Imori Method of electroless plating and semiconductor wafer having metal plating layer formed thereon
US20050089293A1 (en) * 2001-12-14 2005-04-28 Applied Materials, Inc. HDP-CVD film for uppercladding application in optical waveguides
US20050130439A1 (en) * 2003-12-10 2005-06-16 Juseon Goo Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device
US20050153537A1 (en) * 2004-01-08 2005-07-14 Taiwan Semiconductor Manufacturing Co. Novel nitride barrier layer to prevent metal (Cu) leakage issue in a dual damascene structure
US20050196523A1 (en) * 2002-10-07 2005-09-08 Tokyo Electron Limited Electroless plating method and apparatus, and computer storage medium storing program for controlling same

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3502949A (en) * 1967-04-15 1970-03-24 Nippon Electric Co Thin film solid electrolyte capacitor
US3573973A (en) * 1967-11-13 1971-04-06 Ibm High speed additive circuit process
US4019902A (en) * 1974-06-10 1977-04-26 Xerox Corporation Photoreceptor fabrication
US4692997A (en) * 1984-12-19 1987-09-15 Eaton Corporation Method for fabricating MOMOM tunnel emission transistor
US6194032B1 (en) * 1997-10-03 2001-02-27 Massachusetts Institute Of Technology Selective substrate metallization
US20050089293A1 (en) * 2001-12-14 2005-04-28 Applied Materials, Inc. HDP-CVD film for uppercladding application in optical waveguides
US20040235294A1 (en) * 2002-04-23 2004-11-25 Toru Imori Method of electroless plating and semiconductor wafer having metal plating layer formed thereon
US20050196523A1 (en) * 2002-10-07 2005-09-08 Tokyo Electron Limited Electroless plating method and apparatus, and computer storage medium storing program for controlling same
US20040192066A1 (en) * 2003-02-18 2004-09-30 Applied Materials, Inc. Method for immersing a substrate
US20050130439A1 (en) * 2003-12-10 2005-06-16 Juseon Goo Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device
US20050153537A1 (en) * 2004-01-08 2005-07-14 Taiwan Semiconductor Manufacturing Co. Novel nitride barrier layer to prevent metal (Cu) leakage issue in a dual damascene structure

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10002781B2 (en) 2014-11-10 2018-06-19 Brooks Automation, Inc. Tool auto-teach method and apparatus
US10381252B2 (en) 2014-11-10 2019-08-13 Brooks Automation, Inc. Tool auto-teach method and apparatus
US10770325B2 (en) 2014-11-10 2020-09-08 Brooks Automation, Inc Tool auto-teach method and apparatus
US11469126B2 (en) 2014-11-10 2022-10-11 Brooks Automation Us, Llc Tool auto-teach method and apparatus
US11908721B2 (en) 2014-11-10 2024-02-20 Brooks Automation Us, Llc Tool auto-teach method and apparatus

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