WO2006119327A3 - Method and system for program pulse generation during programming of nonvolatile electronic devices - Google Patents
Method and system for program pulse generation during programming of nonvolatile electronic devices Download PDFInfo
- Publication number
- WO2006119327A3 WO2006119327A3 PCT/US2006/016902 US2006016902W WO2006119327A3 WO 2006119327 A3 WO2006119327 A3 WO 2006119327A3 US 2006016902 W US2006016902 W US 2006016902W WO 2006119327 A3 WO2006119327 A3 WO 2006119327A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- pulse
- verify
- electronic devices
- nonvolatile electronic
- during programming
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
Abstract
Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT000798A ITMI20050798A1 (en) | 2005-05-03 | 2005-05-03 | METHOD AND SYSTEM FOR THE GENERATION OF PROGRAMMING IMPULSES DURING THE PROGRAMMING OF NON-VOLATILE ELECTRONIC DEVICES |
ITMI2005A000798 | 2005-05-03 | ||
US11/230,358 US7570519B2 (en) | 2005-05-03 | 2005-09-19 | Method and system for program pulse generation during programming of nonvolatile electronic devices |
US11/230,358 | 2005-09-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2006119327A2 WO2006119327A2 (en) | 2006-11-09 |
WO2006119327A3 true WO2006119327A3 (en) | 2007-12-13 |
Family
ID=37308653
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2006/016902 WO2006119327A2 (en) | 2005-05-03 | 2006-05-03 | Method and system for program pulse generation during programming of nonvolatile electronic devices |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2006119327A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ITMI20050798A1 (en) | 2005-05-03 | 2006-11-04 | Atmel Corp | METHOD AND SYSTEM FOR THE GENERATION OF PROGRAMMING IMPULSES DURING THE PROGRAMMING OF NON-VOLATILE ELECTRONIC DEVICES |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5991200A (en) * | 1989-02-06 | 1999-11-23 | Hitachi, Ltd. | Nonvolatile semiconductor memory device |
US6522580B2 (en) * | 2001-06-27 | 2003-02-18 | Sandisk Corporation | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states |
US6768676B2 (en) * | 2002-01-24 | 2004-07-27 | Sharp Kabushiki Kaisha | Nonvolatile semiconductor memory device |
US20060039207A1 (en) * | 2004-08-17 | 2006-02-23 | Marylene Combe | Self-adaptive program delay circuitry for programmable memories |
-
2006
- 2006-05-03 WO PCT/US2006/016902 patent/WO2006119327A2/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5991200A (en) * | 1989-02-06 | 1999-11-23 | Hitachi, Ltd. | Nonvolatile semiconductor memory device |
US6522580B2 (en) * | 2001-06-27 | 2003-02-18 | Sandisk Corporation | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states |
US6768676B2 (en) * | 2002-01-24 | 2004-07-27 | Sharp Kabushiki Kaisha | Nonvolatile semiconductor memory device |
US20060039207A1 (en) * | 2004-08-17 | 2006-02-23 | Marylene Combe | Self-adaptive program delay circuitry for programmable memories |
Also Published As
Publication number | Publication date |
---|---|
WO2006119327A2 (en) | 2006-11-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200719346A (en) | Method and system for program pulse generation during programming of nonvolatile electronic devices | |
TW200703338A (en) | Memory structure and method of programming | |
TW200702996A (en) | Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable | |
TW200707458A (en) | Wordline driver circuit | |
TW200615957A (en) | Method and apparatus for a dual power supply to embedded non-volatile memory | |
TW200802384A (en) | Method of programming and erasing a P-channel BE-SONOS nand flash memory | |
TW200710857A (en) | Programming memory devices | |
DE602005004027D1 (en) | NON-VOLATILE STORAGE SYSTEM WITH PROGRAM TIME CONTROL | |
GB2436055B (en) | Multi-level ono flash program algorithm for threshold width control | |
TW200606948A (en) | Charge packet metering for coarse/fine programming of non-volatile memory | |
TW200608408A (en) | Efficient verification for coarse/fine programming of non-volatile memory | |
TW200739332A (en) | Method and apparatus for a zero voltage processor sleep state | |
TW200802390A (en) | Programmable cell | |
TW200605084A (en) | Variable current sinking for coarse/fine programming of non-volatile memory | |
ATE429014T1 (en) | CURRENT LIMITED LATCH | |
MY159000A (en) | Control device, control method, program, and recording medium | |
ATE547755T1 (en) | ELECTRONIC DEVICE AND CONTROL METHOD THEREOF | |
TW200614428A (en) | Low-voltage single-layer polysilicon eeprom memory cell | |
TW200622892A (en) | Safe flashing | |
TW200509137A (en) | Flash memory program control circuit and method for controlling bit line voltage level during programming operations | |
WO2005038542A3 (en) | Method and apparatus for reprogramming a programmed controller of a power driven wheelchair | |
TW200721158A (en) | Flash memory programming using an indication bit to interpret state | |
WO2006119327A3 (en) | Method and system for program pulse generation during programming of nonvolatile electronic devices | |
WO2008070578A3 (en) | Method for reducing charge loss in analog floating gate cell | |
EP2672486A3 (en) | Clocked memory with word line activation during a first portion of the clock cycle |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
NENP | Non-entry into the national phase |
Ref country code: DE |
|
NENP | Non-entry into the national phase |
Ref country code: RU |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 06758956 Country of ref document: EP Kind code of ref document: A2 |