WO2006102845A1

WO2006102845A1 - A method of program postpone execution with delay and a device thereof

Info

Publication number: WO2006102845A1
Application number: PCT/CN2006/000551
Authority: WO
Inventors: Xiaobo Li
Original assignee: Xiaobo Li
Priority date: 2005-03-30
Filing date: 2006-03-30
Publication date: 2006-10-05
Also published as: CN1652083A; CN100514301C

Abstract

A method of program postpone execution and a device thereof. The said method includes: “program postpone execution” takes the place of “program interruption”; a program is placed in a queue of postpone execution and is not normally executed temporarily when the program needs being interrupted, so another programs which much need being executed can be executed; the postpone executed program in the queue of postpone execution moves from entrance of the queue to the exit of the queue gradually according to a certain rule and completes the interruption similar to the traditional interruption; the program at the exit of the queue can successively return to the normal executing state of itself. The said device includes: the queue of postpone execution storing program driver, a administrating and controlling component and a counter for stack movement.

Description

Method and device for slow execution of program

Technical field

The present invention relates to the field of computer technology, and in particular to a method and apparatus for slow execution of a program. Background technique

Interrupt processing is one of the most important functions of a computer, because with the interrupt processing function, the computer can implement multi-program functions, real-time control functions, and so on.

The traditional interrupt processing method, because of the limitations of the von Neumann architecture, can only perform single-channel program characteristics at the same time in one CPU, not only requires multiple program switching and transfer, but also requires multiple visits. Store operations, such as taking interrupt handler instructions, and saving and restoring the scene, etc., require a lot of system time and system resources. In modern computer applications where frequent interruptions occur, the efficiency of the entire system is undoubtedly significantly reduced. In the computer of the von Neumann architecture, this system overhead is unavoidable because it can only perform the characteristics of a single program at the same time in the same CPU.

However, in the L-structured CPU, since the characteristics of the multi-program can be executed at the same time, the demand for the interrupt is relatively reduced. Therefore, a less expensive and efficient interrupt handling mechanism is needed to replace the traditional interrupt handling mechanism. Summary of the invention

A new type of computer architecture has been invented. The main features of this new type of computer architecture are: Multiple programs can be executed concurrently and concurrently at the same time in the same central processing unit (CPU). Hereinafter, the architecture that can execute multiple programs at the same time in the same CPU is the L computer architecture, and the CPU using the L computer architecture is called the L-structure CPU. However, the handling of interrupts is not covered in the relevant patent documents.

In view of the above, the present invention proposes a method for slow execution of a program, which is simply referred to as a program mitigation method, and a device using the method, which is simply referred to as a program easing device. Its purpose is mainly to provide a low-cost, high-efficiency method and device for the L-structure CPU for implementing the traditional interrupt function. In the process of interrupt processing, this method not only can eliminate multiple switching and transfer of the program, but also can avoid a large number of memory access operations, thereby greatly improving the overall efficiency of the computer. A program easing method as described above and a program easing apparatus using the method, characterized in that the "interrupted execution" processing of the program is used instead of the "interrupt" processing of the program.

When a program needs to be interrupted, it does not actually suspend execution or interrupt execution as in the traditional interrupt processing method, but instead puts it into a state of slow execution, that is, put it into a The queue, called the continuation queue, temporarily does not participate in the normal execution of the program, so that other programs can execute. The deferred program moves from the entry of the easing queue to the exit of the queue in a continuation queue according to a certain rule, completing the interrupt waiting similar to the traditional interrupt processing. Programs at the exit of the continuation queue can return to the normal program execution state on their own.

According to the characteristics of a computer capable of executing a plurality of programs in parallel on a single CPU at the same time, the method and apparatus for procedural slow-moving proposed by the present invention replace the conventional interrupt processing, and the program can be removed multiple times. Switching and transferring, and avoiding a large number of memory access operations, can significantly improve the overall efficiency of the computer.

A program easing method as described above and a program easing device using the method, wherein:

1. There are one or more queues for caching program drivers, called slow queues;

2. The continuation queue has an N stack, that is, the length of the easing queue is N; the 0th stack is the tail of the easing queue, and is also the input buffer register of the program easing device; the N-1 stack is the header of the easing queue. , is also the output buffer register of the program easing device; also called N is the mitigation depth of the program slow execution device;

3. Each stack of the mitigation queue has a busy and idle flag; 'When a stack of the mitigation queue holds a program driver, the busy and idle flag corresponding to the stack will be set to a busy flag; otherwise it is idle. Sign

4. Every n beats, the stack marked as busy flag detects whether the busy and idle flag of its next stack is idle.

Flag; if yes, save the program driver saved on the stack to the next stack, set the busy idle flag to the busy flag, and set the busy idle flag of the stack to the idle flag; where _{n is} greater than or equal to _1; Let _n be the program cycle of the program execution time; the slow execution time of the program slow execution device is equal to the delay depth multiplied by the stack cycle, that is, N*n _;

5. There are one or more stack cycle counters, the initial value is 0, and each beat is incremented by i, where i≥l.

1. The program input buffer register of the slow-running execution device, that is, the tail of the queue of the program slow-running queue, is connected to the program driver transmission output portion of the program control device in the L-structure CPU;

2. The program output buffer register of the program slow execution time, that is, the queue header of the program easing queue, is connected to the program driver input receiving portion of the instruction fetching device in the L-structure CPU.

A program easing method as described above and a program easing device using the method, wherein -

1. When a program needs to be interrupted for some reason, the program control device of the L-structure CPU first checks Whether the receiving buffer of the program easing device is idle, that is, whether the busy idle flag of the 0th stack of the easing queue is idle; if it is idle, the program driver of the program is sent to the receiving buffer register of the program easing device, The busy flag of the stack is set to a busy flag;

2. When a program driver ends the interrupt waiting to leave the output buffer register of the program easing device, that is, when the busy flag of the N-1桟 of the easing queue is a busy flag, the program easing device first detects the L structure CPU. Whether the receiving buffer of the instruction fetching device is idle; if idle, the program slowing device sends the program driver saved in the output buffer register to the receiving buffer register of the instruction fetching device of the L-structure CPU, and sets the N-1th stack The busy sign is a free sign.

A program easing method and a program using the method as described above are arranged, wherein: a plurality of program easing devices that can be operated in parallel can be set as needed, or can be set in a program easing device Multiple mitigation queues, each of which may have different mitigation depths N and stack periods n.

A program easing method as described above and a program easing device using the same, characterized in that: the value of the stack period n can be dynamically adjusted as needed; the stack period n of a larger value means a longer delay Lag time, longer waiting time, and vice versa means shorter lag time, faster dequeue rate; occurrence of certain events, or certain conditions, state changes may cause some in a slow state The program driver needs to end the lag state as soon as possible. At this point, the program easing device can be notified in some way to lower the value of the stack period n of the corresponding easing queue to speed up the program driver waiting in the easing queue. The dequeue rate; since there are at most N program drivers in the continuation queue, after the speed N is taken, the program easing device can automatically adjust the stack period n back to the normal value.

The core idea of the present invention for replacing the traditional interrupt processing method is: When a program needs to be interrupted, it does not actually stop the execution as in the conventional interrupt processing method, but puts it into a In the slow state, it is placed in the slow queue for every n beats, so that it does not participate in the normal execution of the program at least in the n*N beat, so that other programs that need to execute more are executed.

Here, "so" means: 1. If the program that needs to be executed is not executed, it has a chance to be executed; 2. If the program that needs to be executed is in execution, its chances of obtaining the required resources for execution will be greater than The program that was slowed down.

The deferred program moves from the entry of the easing queue to the exit of the queue in a continuation queue according to a certain rule, completing the interrupt waiting similar to the traditional interrupt processing.

When an interrupt occurs, it is only necessary to send the program driver of the corresponding program to the program easing device, and the processing of the interrupt ends. Since the delayed program was not actually suspended, Rather, it is slow, so there is no need to change the way to the system management program, and save the scene and other operations. Also, when the interrupt waits for the end, that is, when the suspended program ends the easing, it will detect whether it can return to the normal execution state by itself. If it can, return, otherwise wait in the queue. Therefore, there is no overhead required by the hypervisor to select the next program and resume its operations on the site and finally the lane change.

The description herein is only some basic descriptions of the technical idea of the present invention. Based on the technical idea, various implementation methods are available. For example, the program slow execution queue can adopt FIFO or the like, and therefore any equivalent transformation according to the technical idea of the present invention should fall within the protection scope of the present invention. The application of the present invention is not limited to only the fields referred to herein. DRAWINGS

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing the hardware configuration of a program slow time executing device of the present invention.

2 is a flow chart showing the operation of the program slow execution method of the present invention.

Figure 3 is a flow chart showing the program driver driving of the L-structure CPU.

Fig. 4 is a flow chart showing the drive of the program driver of the L-structure CPU after the program slow-running apparatus of the present invention is added. detailed description

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing the hardware configuration of a program slow time executing device of the present invention. The hardware composition of the program slow-running device and its corresponding main functions are described. The connection between the components of the program that is slow to execute is shown in the figure. The main component of the program slow execution device is the program slow execution queue for storing the program driver. It consists of a stack of N. The number of bits per stack is the same as the number of bits of the program driver. Each stack is denoted by reference numeral 10. Each stack is equipped with a free/busy flag indicating the current free/busy state of the stack, ie whether a program driver is currently stored in the stack. The stack shift counter 20 is incremented per beat, and is reset to zero when a specified value is reached, giving a shift permission signal. The management control component 30 of the program slow execution device is mainly used for managing and controlling various operations of the device, such as determining whether the input buffer of the program execution device is not empty, according to the transfer permission signal, and the free/busy flag of each stack. The bit control program driver executes the movement between the stacks of the queue when the program is slow.

2 is a workflow diagram of the program slow execution method of the present invention:

Step 21: 桟 The depth counter is incremented by one; if the current value of the stack depth counter is less than the stack depth, continue this step; otherwise, go to step 21;

Step 22: The stack depth counter is set to 0; Step 23: The program slow-running execution queues simultaneously detect whether the stack is full; any stack that detects that the stack is empty has no operation; and the stack is detected to be full until step 24;

Step 24: The program slow execution execution queue meets the above conditions, and each stack detects whether the lower stack is empty; if it detects that the lower stack is full, no operation; and detects that the lower stack is empty, step 25;

Step 25: The program execution queue queues satisfying the above conditions, and the program driver saved in the stack is stored in the lower stack, and the stack flag is set to full, and the stack flag is empty. Go to step 21.

Figure 3 is a schematic diagram of the program driver driving process of the L-structure CPU. When the program execution method and the apparatus using the same are not used, in the L-structure CPU, the main drive flow executed by the program driver driver, in the L-structure CPU, multiple program drivers can be simultaneously at the same time Drive parallel execution of multiple programs. A program driver drives the drive flow of a program from the program control device, through the instruction fetching device, the instruction decoding device, to the command execution device, and finally back to the program control device, and repeats. The specific process is as follows:

Step 31: The program control device generates the address of the next instruction by using the PC in the APC update program driver in the program driver and completes other related settings; if the program is detected without interruption, the updated program is The driver is sent to the instruction fetching device of the L-structure CPU in some way, that is, step 32 is performed; Step 32: The fetching device fetches the corresponding instruction into the program memory according to the PC address in the program driver and saves it to the current program driver. In the corresponding unit; afterwards, the program driver carrying the current instruction is sent to the instruction decoding device, that is, step 33;

Step 33: The instruction decoding device decodes the instruction carried by the current program driver and saves it to the corresponding unit of the current program driver; then sends the program driver carrying the decoded current instruction to the instruction execution device, ie Go to step 34;

Step 34: The instruction execution device executes the instruction according to the operation specified by the instruction, forms an execution state such as APC, and saves them to the corresponding unit of the current program driver; finally, the program driver is sent to the program control device in some manner, To execute the next instruction of the program, go to step 31.

In the L-structured CPU, the interrupt processing is performed in accordance with the conventional method, and is provided by some dedicated system programs under the condition of providing some hardware support. When a program needs to be interrupted for some reason, the program control device saves the relevant scene of the program driver to be interrupted, and starts a dedicated system program to save the relevant field information of the interrupted program driver to a certain memory, and According to the program scheduling rule, another program is selected, and the relevant scene of the program driver is restored, and the program control device starts execution.

4 is a program driver driving flow of the L-structure CPU after adding the program slow-time execution device of the present invention. Schematic. It is a new driving flow executed by the program driver driver in the L-structure CPU after using the program slow execution method and the device using the same.

When no interruption occurs, the program driver drives a program to drive the same process as shown in Figure 3. The difference is: When a program needs to be interrupted for some reason, the corresponding interrupt processing is completed by the program slow execution device. The specific steps are as follows:

Step 41: The program control device generates the address of the next instruction by using the PC in the APC update program driver in the program driver and completes other related settings; if the program is detected without interruption, the updated program is The driver is sent to the instruction fetching device of the L-structure CPU in some manner, that is, to step 42; if it is detected that the program needs to perform interrupt processing, the updated program driver is sent to the L-structure CPU in some manner. The program is executed slowly, that is, step 45;

Step 42: The instruction fetching device fetches the corresponding instruction into the program memory according to the PC address in the program driver and saves it to the corresponding unit of the current program driver; after that, the program driver carrying the current instruction is sent to the instruction decoding. Device, that is, step 43;

Step 43: The instruction decoding device decodes the instruction carried by the current program driver and saves it to the corresponding unit of the current program driver; then sends the program driver carrying the decoded current instruction to the instruction execution device, ie Go to step 44;

Step 44: The instruction execution device executes the instruction according to the operation specified by the instruction, forms an execution state such as APC, and saves them to the corresponding unit of the current program driver; finally, the program driver is sent to the program control device in some manner, To execute the next instruction of the program, go to step 41;

Step 45: After receiving the program driver that needs to perform interrupt processing, the program slow execution device stores the program driver in the 0th stack of the program easing queue; after that, the program driver of the program program is dynamically locked in the program execution time. Dynamic waiting in the device; every n beats, if the stack is idle, move the stack; until the interrupted program driver has moved to the queue of the program slow queue by stack, that is, the Nth of the program slow queue -1 stack; At this point, the interrupted program driver has been interrupted for a period of time and can be returned to the normal program driver flow; at this point, the program easing device will be stored in the program continuation queue in some way. The interrupted program driver of the N-1th stack is sent to the instruction fetching device to cause the program to go to the normal execution flow, that is, to step 42.

Claims

Claim

1. A device for slow execution of a program, characterized in that:

· A program driver with one or more related information for storing program execution is stored in the continuation queue;

• The easing queue has N桟, the length of which is N; the 0th stack is the tail of the easing queue, and is also the input buffer register of the program slow execution device; the N-1 stack is the first part of the easing queue, and is also slow. Execution device output buffer register; program slow execution execution device mitigation depth is N;

Each stack of the mitigation queue has a busy idle flag; when a stack of the mitigation queue holds a program driver, the busy and idle flag corresponding to the 将 queue will be set to a busy flag; otherwise, it is an idle flag;

• Every n beats, the stack marked as busy flag detects whether the busy and idle flag of the next stack is idle; if yes, saves the program driver saved on the stack to the next stack, and the busy flag of the stack Set to the busy flag, set the busy and idle flag of the stack to the idle flag; where n is greater than or equal to 1; also called n is the program cycle of the program execution device; the slow execution period of the program slow execution device is equal to the delay depth multiplication In the stack cycle, that is, N*n _;

• There are one or more stack period counters with an initial value of 0 and an increment of 1 per beat, where i≥l.

2. The program slow time execution device according to claim 1, wherein:

The input buffer register of the program slow execution device is connected to the program driver send output portion of the program control device in the L structure CPU;

The output buffer register of the program slow execution device is connected to the program driver input receiving portion of the instruction fetching device in the L structure CPU.

3. A method for slow execution of a program, characterized in that the "interruption" processing of the program is used instead of the "interrupt" processing of the program; the method comprises the steps of: when a program needs to be interrupted, placing it In a queue that is executed in a slow mode, it does not participate in the normal execution of the program for the time being, so that other programs that need to execute more are executed. The program that is executed slowly is moved step by step from the entry of the continuation queue in the slow execution queue according to a predetermined rule. To the exit of the queue; when the program is at the exit of the continuation queue, the program returns to the normal execution state.

4. The method according to claim 3, further comprising: a method driver driving method step of the L-structure CPU and a program driver driving of the L-structure CPU after adding the program-delay executing device Method steps.

The program slow execution method according to claim 3 or 4, characterized in that: When a program needs to be interrupted for some reason, the program control device of the L-structure CPU first stops the receiving buffer of the device from being idle based on the busy flag detection of the 0th stack of the easing queue; if it is idle, Sending the program driver of the program to the receive buffer register of the program slow execution device, and setting the busy idle flag of the stack to a busy flag;

When a certain program driver ends the interrupt waiting to leave the output buffer register of the program execution device, that is, when the busy idle flag of the N-1th stack of the easing queue is a busy flag, the program slow execution device first detects the L structure CPU. Whether the receiving buffer of the instruction fetching device is idle; if idle, the program slow execution device sends the program driver saved in the output buffer register to the receiving buffer register of the instruction fetching device of the L-structure CPU, and sets the N-1 The busy sign of the stack is a free sign.

The program slow execution method according to any one of claims 3 to 5, characterized in that: the number of the program slow execution devices is plural and works in parallel.

The program slow execution method according to any one of claims 3 to 6, characterized in that: a plurality of easing queues are set in a program easing execution device, and each mitigation queue has a different mitigation depth N And the stack period n.

The program slow execution method according to any one of claims 3 to 7, characterized in that: the value of the stack period n can be dynamically adjusted as needed; in the occurrence of certain events, or changes in certain conditions and states It may cause some program drivers in a slow state to end the buffer waiting state as soon as possible. The program may be notified in a predetermined manner to delay the execution of the stack period n of the corresponding easing queue to speed up the easing. The dequeue rate of the program driver in the queue waiting state; there are at most N program drivers in the continuation queue. After the speed up N shot, the program slow execution device can automatically adjust the stack period n back to the normal value.

9. The program slow execution method according to claim 3, wherein: the steps are as follows:

• Step 1: The stack depth counter is incremented by one; if the current value of the stack depth counter is less than the stack depth n, continue with this step; otherwise, go to step 2;

• Step 2: The stack depth counter is set to 0;

• Step 3: The program slows the execution of each stack of the queue and detects whether the stack is full. Any stack that detects that the stack is empty has no operation;

Step 4: The program slow execution execution queue meets the above conditions, and each stack detects whether the lower stack is empty; any stack that detects that the lower stack is full has no operation; and the stack that is detected to be empty is step 5;

• Step 5: The program execution queue queues satisfying the above two conditions and save the program driver saved on the stack to the lower stack. Set the stack flag to full, and set the stack flag to empty. Go to step 1.

The program slow execution method according to any one of claims 3 to 8, characterized in that the L-structure CPU The program driver driving method, the steps are as follows:

Step 1: The program control device generates the address of the next instruction and completes other related settings by using the PC in the APC update program driver in the program driver. If the program is detected without interruption, the updated program is executed. The drive is sent to the instruction fetching device of the L-structure CPU in some way, that is, step 2;

Step 2: The instruction fetching device fetches the corresponding instruction into the program memory according to the PC address in the program driver and saves it to the corresponding unit of the current program driver; after that, the program driver carrying the current instruction is sent to the instruction decoding. Device, that is, step 3;

Step 3: The instruction decoding device decodes the instruction carried by the current program driver and saves it to the corresponding unit of the current program driver; then sends the program driver carrying the decoded current instruction to the instruction execution device, ie Go to step 4;

Step 4: The instruction execution device executes the instruction according to the operation specified by the instruction, 'forms an execution state such as APC, and saves them to the corresponding unit of the current program driver; finally sends the program driver to the program control device in some manner To execute the next instruction of the program, go to step 1.

The program slow-running method according to any one of claims 3 to 8, characterized in that the program driver driving method of the L-structure CPU after the program-delayed execution device is added, the steps of which are as follows:

Step 1: The program control device generates the address of the next instruction and completes other related settings by using the PC in the APC update program driver in the program driver. If the program is detected without interruption, the updated program is executed. The driver is sent to the instruction fetching device of the L-structure CPU in some manner, that is, to step 2; if it is detected that the program needs to perform interrupt processing, the updated program driver is sent to the L-structure CPU in some manner. The program is executed slowly, that is, step 5;

Step 4: The instruction execution device executes the instruction according to the operation specified by the instruction, forms an APC execution state, and saves them to the corresponding unit of the current program driver; finally, the program driver is sent to the program control device in some manner to Execute the next instruction of the program, that is, go to step 1; Step 5: After the program execution device receives the program driver that needs to perform interrupt processing, it stores it in the 0th stack of the program easing queue; thereafter, the program driver of the program is dynamically locked in the program execution time. Dynamic waiting in the device; every n shots, if the stack is idle,

Move the stack down; until the interrupted program driver has moved to the beginning of the program easing queue by stack, that is, the N-1 stack of the program easing queue; at this point, the interrupted program driver has passed a section The interrupt waiting for time can be returned to the normal program-driven flow; at this time, the program-slowing execution device sends the interrupted program driver stored in the N-1th stack of the program continuation queue to the instruction fetching in some manner. The device moves the program to the normal execution flow, that is, to step 2.