WO2006055342A2 - Energy efficient inter-processor management method and system - Google Patents
Energy efficient inter-processor management method and system Download PDFInfo
- Publication number
- WO2006055342A2 WO2006055342A2 PCT/US2005/040437 US2005040437W WO2006055342A2 WO 2006055342 A2 WO2006055342 A2 WO 2006055342A2 US 2005040437 W US2005040437 W US 2005040437W WO 2006055342 A2 WO2006055342 A2 WO 2006055342A2
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- WO
- WIPO (PCT)
- Prior art keywords
- processors
- service application
- optimal
- processor
- inter
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5094—Allocation of resources, e.g. of the central processing unit [CPU] where the allocation takes into account power or heat criteria
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/50—Indexing scheme relating to G06F9/50
- G06F2209/509—Offload
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Definitions
- This invention relates generally to multi-processor systems, and more particularly to an energy efficient method and system for multi-processor architectures.
- Emerging mobile communications are increasingly multi-media rich and often involve concurrent processing and memory intensive operations like location-based services, navigation services, video (recording, playback, streaming), text-to-speech synthesizers, and speech recognition, just to name a few.
- multi ⁇ processor architectures such as, for example, an (possibly multi-core) ARM (Advanced Risk Machines) combined, or integrated, with a DSP (Digital Signal Processor) intercommunicating with conventional inter-processor protocols.
- DSP Digital Signal Processor
- Embodiments in accordance with the invention provide an apparatus and method for substantially improving the efficiency of a mobile device.
- a method in the inter- processor manager comprising the steps of receiving a request to delegate the service application to at least one of the plurality of processors, selecting an optimal one of the plurality of processors to execute the service application according to a plurality of projected energy consumptions of the service application corresponding to each of the plurality of processors, and delegating the service application to the optimal processor for execution.
- a mobile device including a processing system comprising an inter-processor manager, and a plurality of processors coupled to the inter-processor manager, and wherein two or more of the plurality of processors are capable of processing a service application
- the inter-processor manager is programmed to receive a request to delegate the service application to at least one of the plurality of processors, select an optimal one of the plurality of processors to execute the service application according to a plurality of projected energy consumptions of the service application corresponding to each of the plurality of processors, and delegate the service application to the optimal processor for execution.
- FIG. 1 is an illustration of a communication system communicating with a number of mobile devices in accordance with an embodiment of the present invention.
- FIG. 2 is a block diagram of the mobile device of FIG. 1 in accordance with an embodiment of the present invention.
- FIG. 3 is a block diagram of a processing system in accordance with an embodiment of the present invention.
- HG. 4 is a flow chart depicting a method for substantially improving the energy efficiency of the mobile device in accordance with an embodiment of the present invention.
- FIG. 1 an illustration of a communication system 100 communicating with a number of mobile devices 106 is shown.
- the communication system 100 is a conventional wireless network comprising a plurality of radio base stations 104, each covering a geographic cell site 102, which in the aggregate cover, for example, a metropolitan area.
- the mobile device 106 may take the form of a conventional cellular phone, or other radio communications device (e.g., a wireless PDA coupled to a wireless local area network). It would obvious to one of ordinary skill in the art, however, that the embodiments herein are applicable to a non-wireless mobile device 106 such as, for example, a portable gaming device (e.g., GameBoyTM), a DVD video player, and so on. More broadly speaking, the embodiments described below can be applicable to any device where energy efficiency brings economic value to a vendor of the mobile device 106 independent of the application.
- a portable gaming device e.g., GameBoyTM
- DVD video player e.g., DVD video player
- FIG. 2 shows a more detailed view of the mobile device 106.
- the mobile device
- 106 can include conventional components such as a wireless transceiver 202, a display 204, an input/output port 208, a battery supply 210, and an audio system 212.
- the hashed line next to the wireless transceiver 202 corresponds to an alternative embodiment characterized by a non-wireless mobile device 106 such as described above.
- a processing system 206 is the processing center for the mobile device 106, which controls operations of the foregoing components 202-212.
- the processing system 206 for instance controls voice processing (e.g., voice calls), multi-media processing (video MPEG 4 player), data message processing (e.g., application downloads, short message system exchanges, etc.) and other house-keeping functions of the mobile device 106.
- voice processing e.g., voice calls
- multi-media processing video MPEG 4 player
- data message processing e.g., application downloads, short message system exchanges, etc.
- FIG. 3 shows an expanded view of the processing system 106, comprising a conventional memory 302, a plurality of processors 304-306 (shown by way of example as first and second processors) and an inter-processor manager 308.
- the memory 303 may be a single or a combination of conventional memory devices (e.g., dynamic random access memory, flash memory, etc.) operated on individually or jointly by the elements 304-308 of the processing system 106.
- the plurality of processors 304-306 can employ conventional processing elements, each capable of executing in whole or in part software such as a service application employing any algorithm (e.g., a video player) or instructions in its most elemental form (e.g., microcode of a CISC processor).
- the inter-processor manager 308 may comprise a conventional application specific integrated circuit (ASIC), a microprocessor, a state machine, or other processing means that is capable of operating according to the method 400 of HG. 4 as described below.
- ASIC application specific integrated circuit
- the processing function of the inter-processor manager 308 can take the form of hardware, software or combinations thereof operating in whole or in part from the first or second processors 304, or independent hardware.
- the processing elements 302-308 of the processing system 206 are interconnected by a conventional communication bus 310.
- the bus 310 construction can be physical or logical.
- the physical connection may be a conventional serial or parallel bus for transmitting signals between devices sourced by a conventional transceiver (e.g., universal asynchronous receiver transmitter - UART, or universal serial bus - USB driver).
- a portion or whole of the communication bus 310 may represent a logical connection such as software components sharing data structures.
- the processing elements 302-308 coupled to the communication bus 310 can be represented in a single integrated circuit (IC) device with sub-elements operating therein, or a combination of ICs, each operating as a corresponding one of the elements 302-308 of the processing system 206.
- step 402 where the inter-processor manager 308 receives a request to delegate a service application to at least one of the plurality of processors 304-306.
- the delegation request can originate from any number of sources.
- the mobile device 106 may operate from a conventional operating system (OS) such as Linux (or a smaller customized kernel) designed to submit a request to the inter-processor manager 308 every time a service application has been invoked.
- OS operating system
- requests from the OS may come only part of the time such as when a service application is known to consume large amounts of processing cycles measured by, for example, MIPS (Million Instructions Per Second).
- MIPS Million Instructions Per Second
- the frequency of requests made to the inter-processor manager 308 is a design parameter that can be adjusted according to the application. The higher the frequency the more likely the embodiments of the invention will provide energy savings to the mobile device 106.
- step 404 if the service application can run on multiple processors, the inter- processor manager 308 proceeds to step 406; otherwise, it proceeds to step 405 where the service application is processed by the only available (or capable) processor in the processing system 206.
- the inter-processor manager 308 selects an optimal one of the first and second processors 304-306 to execute the service application according to a plurality of projected energy consumptions of the service application corresponding to each of the processors 304-306.
- the plurality of projected energy consumptions can be predetermined.
- each service application can be prescreened to determine the projected energy consumptions of the application on the components 202-212 of the mobile device 106.
- the plurality of projected energy consumptions are based on corresponding historical energy consumption data collected from real-time operation of the service application on at least one of the plurality of processors 304-306.
- the inter-processor manager 308 can use the predetermined energy consumptions if no historical data has been developed on the service applications that can be executed by the processing system 206. When sufficient data is gathered, however, the inter-processor manager 308 switches to a historical approach for determining the projected energy consumption of a particular service application.
- the historical data can be stored and maintained in a portion of the memory 302 in which case the inter-processor manager 302 applies the last known projected energy consumptions of corresponding service applications.
- the historical data can be processed by the inter-processor manager 308 (or a background process) by way of conventional statistical or straightforward mathematical methods for projecting energy consumption of a service application.
- several means for measuring energy consumption can be used by the inter-processor manager 308.
- a metric for measuring energy consumption can consist of projected MIPS of a service application. These metric may be predetermined according to products of conventional analysis software such as, for example, a CASE (Computer-Assisted Software Engineering) tool for examining the software components (or instructions) of the service applications that operate in the processing system 206.
- the inter-processor manager 308 with less sophisticated but similar software to the CASE tool may measure the MIPS for each service application in real-time.
- Another metric the inter-processor manager 308 can use in the selection method is a reading of the remaining energy in the battery 210 that supplies energy to components of the mobile device 106.
- This energy reading can be derived by conventional means such as a reading of the voltage level of the battery 210 under loading conditions and using known characterization data of the battery 210 to translate this voltage to a remaining energy level of the battery.
- the inter-processor manager 308 can weigh the selection decision among the first and second processors 304-306 versus the impact to battery life of the mobile device 106 in using this metric.
- the inter-processor manager 308 selects any one of the first and second processors 304-306 according to a plurality of loading conditions corresponding to the processors 304-306. Similar to the preceding description, the loading conditions can be predetermined, or historically developed from data gathered during real ⁇ time operation of each of the service applications on the processors 304-306. Additionally, these loading conditions may be translated into energy consumption rates (or running averages) of the processors 304-306, which can be used by the inter-processor manager 308 as additional energy consumption statistics to assist in the selection process.
- the inter-processor 308 can select either processor 304-306 according to an optimal pair of the projected energy consumptions of the service application and loading conditions of the processors 304-306.
- each projected energy consumption and loading condition may be weighted by predetermined criteria.
- the predetermined criteria can be based on, for example, a scoring system, which gives a score to each projected energy consumption and loading conditions of the processors 304-306.
- the score has positive and negative offsetting effects. For instance, a negative score may be driven by penalties (e.g., fast processing needs of the service application), while a positive score may be driven by order of importance, priority, and/or potential energy savings.
- the scoring system weighs loading conditions with greater importance than energy consumptions. For example, where a service application requires high MIPS, such as video processing to provide a good user experience by way of the display 204, the optimal processor may be chosen primarily on loading conditions and secondarily on energy consumption benefits. Where, however, both benefits (MIPS and energy savings) can be delivered equally, the scoring system used for loading and energy consumption can be weighted equally or nearly equal. It is up to the mobile device 106 designer to choose a scoring system that defines a scheme for selecting an optimal processor. [0032] In a simpler embodiment, however, the inter-processor manager 308 can be programmed to choose the optimal processor according to the processor 304 or 306 having the lowest projected energy consumption for processing the service application.
- the inter-processor manager 308 can be programmed to select an optimal processor according to an optimal combination of one of the projected energy consumptions of the service application and the group comprising singly or in combination a select one of the loading conditions, remaining energy in the battery 210, speed of processing the service application in each of the processors 304- 306, and a priority of the service application.
- step 408 proceeds to step 408 is straightforward. That is, the service application is delegated to the optimal processor selected in step 406 for execution such that energy efficiency can be substantially improved for the mobile device 106.
- a software implementation of a method and a hardware implementation of the same method may not be structural equivalents in that the software implementation is dependent on a processing system for execution, while the hardware implementation may have self-contained processing means. It is well known in the art, however, that software and hardware implementations may be designed to be equivalent structures generating the same results. Accordingly, all equivalent modifications and additions to the description above are intended to be inclusive of the scope the following claims.
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- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Telephone Function (AREA)
- Multi Processors (AREA)
- Power Sources (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/993,524 US20070208956A1 (en) | 2004-11-19 | 2004-11-19 | Energy efficient inter-processor management method and system |
| US10/993,524 | 2004-11-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2006055342A2 true WO2006055342A2 (en) | 2006-05-26 |
| WO2006055342A3 WO2006055342A3 (en) | 2006-08-03 |
Family
ID=36407621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2005/040437 Ceased WO2006055342A2 (en) | 2004-11-19 | 2005-11-08 | Energy efficient inter-processor management method and system |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20070208956A1 (en) |
| KR (1) | KR20070086363A (en) |
| CN (1) | CN101061459A (en) |
| AR (1) | AR051499A1 (en) |
| WO (1) | WO2006055342A2 (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102099788A (en) * | 2008-06-06 | 2011-06-15 | 苹果公司 | Application Programming Interface for Data-Parallel Computing on Multiprocessors |
| CN101802789B (en) * | 2007-04-11 | 2014-05-07 | 苹果公司 | Parallel runtime execution on multiple processors |
| CN103927150A (en) * | 2007-04-11 | 2014-07-16 | 苹果公司 | Parallel Runtime Execution On Multiple Processors |
| US9442757B2 (en) | 2007-04-11 | 2016-09-13 | Apple Inc. | Data parallel computing on multiple processors |
| US9720726B2 (en) | 2008-06-06 | 2017-08-01 | Apple Inc. | Multi-dimensional thread grouping for multiple processors |
| US9766938B2 (en) | 2007-04-11 | 2017-09-19 | Apple Inc. | Application interface on multiple processors |
| US11237876B2 (en) | 2007-04-11 | 2022-02-01 | Apple Inc. | Data parallel computing on multiple processors |
| US11836506B2 (en) | 2007-04-11 | 2023-12-05 | Apple Inc. | Parallel runtime execution on multiple processors |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010116047A1 (en) * | 2009-04-06 | 2010-10-14 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Method for optimising the operation of a multi-processor integrated circuit, and corresponding integrated circuit |
| US9092790B1 (en) * | 2011-02-24 | 2015-07-28 | Visualon, Inc. | Multiprocessor algorithm for video processing |
| KR102000295B1 (en) | 2012-04-11 | 2019-10-01 | 유니버시티 오브 써던 캘리포니아 | Runtime selection of most energy-efficient approach for services requested by mobile applications |
| CN104580728A (en) * | 2015-01-07 | 2015-04-29 | 宇龙计算机通信科技(深圳)有限公司 | Service processing method and device and terminal |
| US10855989B2 (en) * | 2016-06-09 | 2020-12-01 | Qualcomm Incorporated | Substream multiplexing for display stream compression |
| CN113918290B (en) * | 2020-07-09 | 2025-08-05 | 华为技术有限公司 | API calling method and device |
| JP7521065B1 (en) * | 2023-05-22 | 2024-07-23 | レノボ・シンガポール・プライベート・リミテッド | Information processing device and control method |
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| US5546343A (en) * | 1990-10-18 | 1996-08-13 | Elliott; Duncan G. | Method and apparatus for a single instruction operating multiple processors on a memory chip |
| JPH09138716A (en) * | 1995-11-14 | 1997-05-27 | Toshiba Corp | Electronic computer |
| US6002878A (en) * | 1997-07-01 | 1999-12-14 | Motorola, Inc. | Processor power consumption estimator that using instruction and action formulas which having average static and dynamic power coefficients |
| US6704308B2 (en) * | 1998-09-29 | 2004-03-09 | Cisco Technology, Inc. | Apparatus and method for processing signals in a plurality of digital signal processors |
| JP3892998B2 (en) * | 1999-09-14 | 2007-03-14 | 富士通株式会社 | Distributed processing device |
| US6789183B1 (en) * | 1999-09-28 | 2004-09-07 | Texas Instruments Incorporated | Apparatus and method for activation of a digital signal processor in an idle mode for interprocessor transfer of signal groups in a digital signal processing unit |
| NL1015579C1 (en) * | 2000-06-30 | 2002-01-02 | Thales Nederland Bv | Method for automatically distributing program tasks over a collection of processors. |
| JP2004171234A (en) * | 2002-11-19 | 2004-06-17 | Toshiba Corp | Task allocation method, task allocation program, and multiprocessor system in multiprocessor system |
| US7093147B2 (en) * | 2003-04-25 | 2006-08-15 | Hewlett-Packard Development Company, L.P. | Dynamically selecting processor cores for overall power efficiency |
-
2004
- 2004-11-19 US US10/993,524 patent/US20070208956A1/en not_active Abandoned
-
2005
- 2005-11-08 KR KR1020077013753A patent/KR20070086363A/en not_active Ceased
- 2005-11-08 CN CNA2005800398658A patent/CN101061459A/en active Pending
- 2005-11-08 WO PCT/US2005/040437 patent/WO2006055342A2/en not_active Ceased
- 2005-11-16 AR ARP050104830A patent/AR051499A1/en unknown
Cited By (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9442757B2 (en) | 2007-04-11 | 2016-09-13 | Apple Inc. | Data parallel computing on multiple processors |
| US11106504B2 (en) | 2007-04-11 | 2021-08-31 | Apple Inc. | Application interface on multiple processors |
| CN103927150A (en) * | 2007-04-11 | 2014-07-16 | 苹果公司 | Parallel Runtime Execution On Multiple Processors |
| US11836506B2 (en) | 2007-04-11 | 2023-12-05 | Apple Inc. | Parallel runtime execution on multiple processors |
| US9304834B2 (en) | 2007-04-11 | 2016-04-05 | Apple Inc. | Parallel runtime execution on multiple processors |
| US9436526B2 (en) | 2007-04-11 | 2016-09-06 | Apple Inc. | Parallel runtime execution on multiple processors |
| US11544075B2 (en) | 2007-04-11 | 2023-01-03 | Apple Inc. | Parallel runtime execution on multiple processors |
| US10552226B2 (en) | 2007-04-11 | 2020-02-04 | Apple Inc. | Data parallel computing on multiple processors |
| CN101802789B (en) * | 2007-04-11 | 2014-05-07 | 苹果公司 | Parallel runtime execution on multiple processors |
| US11237876B2 (en) | 2007-04-11 | 2022-02-01 | Apple Inc. | Data parallel computing on multiple processors |
| US9766938B2 (en) | 2007-04-11 | 2017-09-19 | Apple Inc. | Application interface on multiple processors |
| US9858122B2 (en) | 2007-04-11 | 2018-01-02 | Apple Inc. | Data parallel computing on multiple processors |
| US9471401B2 (en) | 2007-04-11 | 2016-10-18 | Apple Inc. | Parallel runtime execution on multiple processors |
| US10534647B2 (en) | 2007-04-11 | 2020-01-14 | Apple Inc. | Application interface on multiple processors |
| US9477525B2 (en) | 2008-06-06 | 2016-10-25 | Apple Inc. | Application programming interfaces for data parallel computing on multiple processors |
| US10067797B2 (en) | 2008-06-06 | 2018-09-04 | Apple Inc. | Application programming interfaces for data parallel computing on multiple processors |
| US9720726B2 (en) | 2008-06-06 | 2017-08-01 | Apple Inc. | Multi-dimensional thread grouping for multiple processors |
| CN102099788A (en) * | 2008-06-06 | 2011-06-15 | 苹果公司 | Application Programming Interface for Data-Parallel Computing on Multiprocessors |
| CN102099788B (en) * | 2008-06-06 | 2015-05-13 | 苹果公司 | Application Programming Interface for Data-Parallel Computing on Multiprocessors |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2006055342A3 (en) | 2006-08-03 |
| AR051499A1 (en) | 2007-01-17 |
| US20070208956A1 (en) | 2007-09-06 |
| CN101061459A (en) | 2007-10-24 |
| KR20070086363A (en) | 2007-08-27 |
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