WO2005066807A1 - Micro-ordinateur et procede de reception de donnees - Google Patents

Micro-ordinateur et procede de reception de donnees Download PDF

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Publication number
WO2005066807A1
WO2005066807A1 PCT/JP2003/016855 JP0316855W WO2005066807A1 WO 2005066807 A1 WO2005066807 A1 WO 2005066807A1 JP 0316855 W JP0316855 W JP 0316855W WO 2005066807 A1 WO2005066807 A1 WO 2005066807A1
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WO
WIPO (PCT)
Prior art keywords
data
ram
event
program
tcp
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Application number
PCT/JP2003/016855
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English (en)
Japanese (ja)
Inventor
Junichiro Takahashi
Original Assignee
Renesas Technology Corp.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp. filed Critical Renesas Technology Corp.
Priority to JP2005513090A priority Critical patent/JP4252577B2/ja
Priority to PCT/JP2003/016855 priority patent/WO2005066807A1/fr
Publication of WO2005066807A1 publication Critical patent/WO2005066807A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Definitions

  • the present invention relates to the realization of a protocol with a small program capacity. More specifically, the present invention relates to a method for receiving a micro computer with a TCP / IP protocol stack. The present invention relates to technology that is effective when applied to home appliances that can be connected to a network. Background art
  • TCP / IP Transmission 'Control Protocol / Internet Protocol
  • IETF Internal Network Engineering 'Task Force'
  • data communication using the TCP / IP protocol is conventionally performed by a software protocol stack processed by the CPU (central processing unit) and hardware that performs packet communication processing on the MAC (media 'access' control) layer. This is realized by the network interface.
  • Patent Document 1 Japanese Unexamined Patent Application Publication No. 2003-143221
  • Patent Document 1 Japanese Unexamined Patent Application Publication No. 2003-143221
  • Patent Document 2 Japanese Unexamined Patent Application Publication No. 2003-263323
  • mounting a protocol block together with 0S increases the program capacity.
  • a simple communication program and a self-rewriting program are included.
  • the self-rewriting program makes it possible to upgrade the download function and deal with advanced functions. Disclosure of the invention
  • the present inventor has studied support for the TCP / IP protocol in network home appliances and the like.
  • TCP / IP protocol protocols that can operate on internal ROM / RAM such as a 16-bit microcomputer for embedded control. According to this, there is no idea that the already defined protocols will save resources extremely.
  • Implementing the TCP / IP protocol according to the details of such a protocol requires a large storage ROM to store the protocol stack, and a large work RAM to execute the protocol stack. .
  • the technology described in the above-mentioned patent document differs from the technology studied by the present inventor in the point of view.
  • An object of the present invention is to make it possible to realize a network connection by a TCP / IP protocol for a small-scale system such as a network home appliance.
  • Another object of the present invention is to provide a data processing method that can contribute to the realization of a compact TCP / IP protocol stack.
  • a microcomputer is formed on one semiconductor chip including a central processing unit, a RAM, and a ROM, and the ROM is an operating system, an application program, and the application program.
  • a TCP / IP processing program called and executed by the content program is stored.
  • the TCP / IP processing program has a connection request, event waiting, data transmission, and connection disconnection processing programs.
  • the central processing unit reads a part of the packet data into the RAM in response to an evening switch command, for example, a data overnight reception interrupt during execution of the processing program waiting for the event, and reads the packet data and needs the packet data overnight. Wakes up from the event wait state, executes the application program, and loads the corresponding bucket data into RAM.
  • a part of the received packet data in the MAC layer can be fetched into the on-chip RAM of the microcomputer and analyzed, so there is no need to process all the bucket data into the work RAM and expand it.
  • the size of the work RAM to be used is small.
  • the process of loading the packet data into the on-chip RAM according to the result of the analysis is performed directly by the application program, and does not use the protocol block. Therefore, it can contribute to making the protocol stack compact.
  • a microcomputer includes a central processing unit, a RAM, and a ROM, and is formed on one semiconductor chip.
  • the ROM includes an operating system, an application program, and the application program.
  • the RAM is used as a work area when the CPU executes the program, and the TCP / IP processing program is called a service program. It has a start, connection request, event wait, data transmission, and disconnection processing programs.
  • the events to wait for the event wait may be a connection establishment, a connection disconnection, a data reception, and an event wait timeout.
  • the type of event to wait in the event waiting processing program is preferably specified by the application program.
  • the event waiting processing program needs to take a predetermined bucket of the packet data from the outside into the RAM in response to a predetermined interrupt, and check the received data for a corresponding bucket. It is determined whether the bucket is a proper bucket or not, and if it is determined that it is necessary, the event waiting state is ended. Then, the application program may take in the data of the corresponding reception bucket into the RAM in response to the end of the data reception event waiting state.
  • the storage capacity of the on-chip RAM can be about 2 to 4 kilobytes.
  • the data receiving method is a method of reading out a predetermined portion of packet data stored in a buffer memory of a communication device constituting a TCP / IP MAC layer, and reading the data from an on-chip RAM of a microcomputer.
  • a first process for storing the data in the on-chip RAM a second process for determining whether or not a corresponding bucket is necessary by checking the data stored in the on-chip RAM.
  • a part of the received bucket data can be fetched into the on-chip RAM of the microcomputer and analyzed in the second process, so that all the bucket data is fetched and expanded in the peak RAM. Where Requires no work, and the required work RAM size is small.
  • the first process and the second process are defined by the protocol stack
  • the third process is defined by the application program, so that the packet data is loaded into the on-chip RAM in accordance with the result of the analysis by the third process.
  • the processing is performed directly by the application program and does not use the protocol block, so it can contribute to making the protocol stack compact.
  • the data of the predetermined portion is data of 13 bytes to 42 bytes from the head of the packet format in the in-net protocol. It is evening.
  • ARP Adresor Resolution Protocol
  • I CMP Inner Network Control Message
  • FIG. 1 is a block diagram of a microcomputer according to the present invention.
  • Figure 2 shows the CUP's quadruple map.
  • Fig. 3 is an explanatory diagram showing the seven types of API programs held by the TCP / IP protocol.
  • FIG. 4 is an explanatory diagram showing a list of events recognized by the event waiting API program.
  • Fig. 5 is a flowchart of the bucket data overnight reception process by TCP / IP.
  • FIG. 6 is an illustration showing the packet format of the TCP / IP protocol in a broad sense.
  • FIG. 4 is an explanatory view schematically showing the appearance.
  • FIG. 8 is a flowchart showing details of the protocol analysis processing (S4) of FIG.
  • FIG. 9 is a flowchart of a passive connection process by TCP / IP.
  • FIG. 10 is a flowchart of the active connection processing by TCP / IP.
  • FIG. 11 is a flowchart of the overnight transmission processing by TCP / IP.
  • FIG. 12 is a flowchart of the forced disconnection for the TCP / IP connection.
  • Fig. 13 is a flowchart of normal disconnection for TCP / IP connection.
  • FIG. 1 shows a block diagram of a microcomputer according to the present invention.
  • the micro-computer 1 shown in the figure is not particularly limited, but is formed on a single semiconductor substrate such as single-crystal silicon by a complementary MOS integrated circuit manufacturing technology or the like, and is configured as a single chip or a single chip. Pelletized and packaged as needed.
  • the microcomputer 1 is not particularly limited, but is rewritten as a CPU (central processing unit) 2, a clock oscillator 3, an interrupt controller 4, a DMAC (direct 'memory'access' controller) 5, and a flash memory.
  • ROM read-only-memory
  • RAM 7 composed of SRAM (static random access memory), refresh controller 8, clock Abnormal operation of the system due to the number of cycles Monitor WD T (Watch 'Dog' evening) 9, TCU (East 'Counter' unit) 10, SCI (Serial 'Communication' interface) 1 1, US ⁇ (Universal 'Serial' It has a bus 12, an AD (analog-to-digital) converter 13, a bus controller 14, and an input / output port 15, which are connected to an internal bus represented by reference numeral 16.
  • the CPU 2 has an instruction control unit and an execution unit.
  • the instruction control unit accesses a program stored in the ROM 6 or the like to fetch an instruction, decodes the fetched instruction, and generates control information.
  • the execution unit executes an instruction by performing an operation, an operand access, or the like according to the control information. .
  • the input / output port 15 is connected to an Ethernet device 20 constituting a network interface card (NIC).
  • the Ethernet device 20 is connected to the Ethernet cable 21 and implements a network interface of hardware that performs bucket communication processing of the MAC layer.
  • the Ethernet device 20 includes an Ethernet controller 22, a buffer memory 23, and a transceiver / receiver 24 coupled to the Ethernet cable 21.
  • Micro-combination 1 is a protocol protocol for hardware that performs bucket communication processing and software that is processed by CPU 2 for data communication using the TCP / IP protocol.
  • Use a TCP / IP processing program also simply called TCP / IP protocol block).
  • the TCP / IP protocol stack is called from the application program and executed. What is an application program? Browser software Email software And so on.
  • the TCP / IP protocol and application programs are owned by the R0M6 together with the operating system (OS).
  • OS operating system
  • FIG. 2 illustrates an address map of the CPU 2.
  • OS work In the address space of R0M6, vectors, OS, TCP / IP protocol blocks, and application programs are arranged from the top.
  • Application programs include programs other than data communication, and may be understood as so-called user programs that are incorporated as needed by the user of the microcomputer.
  • RAM7 In the address space of RAM7, there are an OS work area (OS work), a work area, a work area for TCP / IP protocol work (TCPZIP work), and a work area for application programs (user work). Is assigned.
  • FIG. 3 shows the seven types of API programs held by the TCP / IP protocol.
  • the service start API program is a processing program that performs initial settings for TCP / IP communication.
  • the initial setting items include, for example, initialization of the Ethernet device 20, initialization of the TCP / IP work, and the like.
  • the passive connection setting API program is a processing program that sets the IP address and port number of its own port in order to wait for connection.
  • the active connection request API program is a processing program that sets the partner port that requests connection.
  • the event waiting API program is a processing program that waits for a response to a setting or request.
  • Data transmission API program is a processing program that transmits data.
  • the API program is a processing program that disconnects its own connection and leaves the disconnection of the partner to the partner. Forcibly disconnecting the connection
  • the API program is a processing program that forcibly cuts off both its own connection and the connection of the other side.
  • Awaiting event API program starts a specified event It is a processing program for waiting for life.
  • FIG. 4 shows a list of events recognized by the API program waiting for events.
  • the events to be recognized are: passive / active connection establishment to be confirmed after the execution of the passive connection setting API program or active connection API program, closing of the connection to be confirmed after execution of the closing API program, and forced disconnection of the connection API program To be confirmed after execution of data transmission, data reception indicating that data has been received, completion of data transmission to be confirmed after execution of the API program for data transmission, timeout of event waiting by event waiting API program (waiting) ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ) ⁇ ⁇ ⁇ . Which event to wait for is indicated from the application program by a flag or the like.
  • FIG. 5 illustrates a flow chart of the bucket data overnight receiving process by TCP / IP.
  • the service start API program is executed to complete the initialization of the communication settings, and then the passive connection setting or active connection setting API program is executed to establish the connection.
  • the application program sets a flag for the overnight reception event, and the API program is called and executed while waiting for the event. The content of the execution by this is the processing of FIG. 5. First, it waits for a packet data—evening reception interrupt from the Ethernet device 20 (S 1).
  • the Ethernet device 20 sequentially receives the received packet data into the buffer memory 23, and outputs a reception interrupt of the packet data to the microcomputer 1 in response to the data reception.
  • the Internet Protocol Protocol Purge 4 has the format shown in Fig. 6 and uses the ARP (address resolution solution protocol) included in the broadly defined TCP / IP protocol. Tokor), IC In the bucket format of MP (Internet 'control' message 'protocol), TCP, and UDP (user datagram protocol), the first 14 bytes are the MAC layer. This is followed by a header and necessary data.
  • ICMP is a protocol for transferring IP error messages and control messages, and is used to confirm the status of computers connected by TCP / IP.
  • TCP is a protocol of the network transport layer.
  • UDP is a transport layer communication protocol that does not guarantee reliability.
  • the last two bytes of the 14-byte MAC layer control information indicate the type of the bucket, from which a reference can be made by referring to the data of at least 42 bytes.
  • the protocol type, destination IP address, port number, etc. of the packet data are understood.
  • the packet data is a packet data required by the microcomputer as a function of the communication channel.
  • S2 the RAM 7
  • S3 From the read data, it is determined whether or not the bucket is data addressed to its own IP address (S3). Otherwise, the packet is discarded.
  • Discarding means that the bucket data is not read from the buffer memory 23 to the RAM 7. If it is determined in step S3 that the data is destined for its own IP address, the packet data is read from the buffer memory 23 into the RAM 7 and the protocol is analyzed (S4). According to this, a part of the received packet data in the MAC layer can be taken into the on-chip RAM 7 of the microcomputer 1 and analyzed, so that all the packet data is stored in the work area of the RAM 7. There is no need for processing to capture and deploy The size of the on-chip RAM 7 to be used can be small. Incidentally, the capacity of RAM 7 is about 2K to 4K bytes.
  • FIG. 7 schematically shows a state in which 42 bytes of a packet data are taken out from the buffer memory 23.
  • the buffer memory 23 operates as a ring buffer.
  • the packet data of the ring buffer is managed in page units.
  • the Ethernet controller 23 has an MMU function for the RAM 7, and the CPU 2 uses this to transfer the data from the 13th byte to the 42th byte of the packet data in the page from the 13th byte to the packet data in the page.
  • FIG. 8 illustrates details of the protocol analysis processing (S4) in FIG.
  • the CPU 2 determines whether the protocol of the packet data corresponds to ARP, I CMP, TCP, UDP, or the like.
  • ARP an ARP reply is transmitted
  • I CMP an I CMP reply is returned.
  • TCP the port number and IP address are checked, and if it is not addressed to its own address, the packet data is discarded.
  • TCP the port number and IP address are checked, and if it is not addressed to its own address, the packet data is discarded.
  • it is addressed to its own address if it is a control packet, it returns a TCP reply, and if it is a data packet, it wakes up from the event wait state.
  • connection establishment S LEV—CONNECT
  • connection request success data transmission complete
  • S LEV—TEND data transmission complete
  • SL EV—RST connection disconnection
  • SEV_CLS The disconnection request succeeded
  • the data reception event SEV—RX
  • the CPU wakes up from the corresponding event waiting state, and shifts the processing of the CPU 2 to the application program or shifts to another API program according to the event.
  • FIG. 8 does not particularly show the processing when the UDP is recognized, it can be considered in substantially the same manner as in the case of TCP. However, it is simpler than TCP. For other protocols not supported by the system, the bucket data is discarded.
  • FIG. 9 shows a flow chart of the passive connection processing by TCP / IP.
  • the API program for the passive connection setting is called from the protocol interface, and the IP address and port number of its own port are set. Then, it waits for the event of the connection establishment by executing the API waiting API program. When the event occurs, it wakes up from the event waiting state and the connection is established.
  • FIG. 10 illustrates a flow chart of the active connection processing by TCP / IP.
  • the API program of the active connection request is called from the protocol interface, and the IP address and port number of the partner port are set.
  • the event is set, and then the event waiting API program is executed to wait for an event to establish a connection.
  • the computer wakes up from the event waiting state and the connection is established.
  • FIG. 11 illustrates a flowchart of a data transmission process by TCP / IP. Wait for event Executes the API program and waits for the occurrence of an overnight reception event. When a data reception event occurs, it wakes up from the event wait state, performs the processing described in FIG. 5 according to the application program, and stores the reception page number and data length on the Ethernet device required for transmission in the buffer memory 23. From RAM 7 Next, the process shifts to execution of the data transmission API program, and transfers the data in the RAM 7 to the buffer memory 23 to be transmitted to the Ethernet device.
  • FIG. 12 illustrates a flowchart of the forced disconnection for the TCP / IP connection.
  • CPU 2 only needs to execute the API program forcibly disconnecting the connection.
  • FIG. 13 illustrates a flow chart of normal disconnection for the TCP / IP connection.
  • CPU 2 executes the API program to close the connection, waits for an event, executes the API program, and waits for the occurrence of a close completion event from the connection partner. The communication by the port number is terminated due to the occurrence of the close completion event.
  • the storage capacities of RAM and ROM are not limited to the above description and can be changed as appropriate.
  • the term “microcomputer” is a general term for a system-on-chip semiconductor integrated circuit having a CPU.
  • the CPU is not limited to a 16-bit CPU, but may be a 32-bit CPU or the like. From an application point of view, no specially sophisticated CPU is required.
  • the type and processing content of the protocol processing program can be changed as appropriate.
  • the task switching when transferring a part of the bucket data from the buffer memory to the on-chip RAM is not limited to the data reception interrupt, and may be performed in response to another task switch command. Industrial applicability
  • the present invention can be widely applied to a TCP / IP interface in a small-scale system with relatively low data processing performance typified by network home appliances and mobile terminals.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)

Abstract

L'invention concerne un micro-ordinateur (1) qui comprend une unité centrale (2), une mémoire RAM (7) et une mémoire ROM (6), et qui est formé dans une seule puce à semi-conducteurs. La mémoire ROM stocke un système d'exploitation, des programmes d'application, et des programmes TCP/IP pouvant être appelés par les programmes d'application à exécuter. Les programmes de traitement TCP/IP comprennent des programmes de traitement de demande de connexion, d'attente d'événement, de transmission de données et de déconnexion. Lorsque l'unité centrale demande des paquets de données par lecture d'une partie des paquets de données situés dans la mémoire RAM en réponse à une interruption de réception de données pendant l'exécution d'un programme de traitement de l'attente d'événement, elle démarre à partir de l'état d'attente d'événement afin d'exécuter un programme d'application pour importer les paquets de données correspondants dans la RAM.
PCT/JP2003/016855 2003-12-26 2003-12-26 Micro-ordinateur et procede de reception de donnees WO2005066807A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005513090A JP4252577B2 (ja) 2003-12-26 2003-12-26 マイクロコンピュータ及びデータ受信方法
PCT/JP2003/016855 WO2005066807A1 (fr) 2003-12-26 2003-12-26 Micro-ordinateur et procede de reception de donnees

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PCT/JP2003/016855 WO2005066807A1 (fr) 2003-12-26 2003-12-26 Micro-ordinateur et procede de reception de donnees

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010015984A1 (en) * 2000-02-23 2001-08-23 Dirk-Holger Lenz Creation of a protocol stack
JP2003518788A (ja) * 1999-10-22 2003-06-10 ローク マナー リサーチ リミテッド 完全統合型ウェブ作動式制御及びモニター装置
JP2003308262A (ja) * 2002-04-08 2003-10-31 Wiznot Corp ハードウェアプロトコルプロセシングロジックで実現されたインタネット通信プロトコル装置、及びその装置を用いたデータ並列処理方法
JP2003333066A (ja) * 2002-05-09 2003-11-21 Nippon Telegr & Teleph Corp <Ntt> Ｉｐネットワーク接続機能を備えたネットワークインターフェイスを用いる通信方式およびその装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003518788A (ja) * 1999-10-22 2003-06-10 ローク マナー リサーチ リミテッド 完全統合型ウェブ作動式制御及びモニター装置
US20010015984A1 (en) * 2000-02-23 2001-08-23 Dirk-Holger Lenz Creation of a protocol stack
JP2003308262A (ja) * 2002-04-08 2003-10-31 Wiznot Corp ハードウェアプロトコルプロセシングロジックで実現されたインタネット通信プロトコル装置、及びその装置を用いたデータ並列処理方法
JP2003333066A (ja) * 2002-05-09 2003-11-21 Nippon Telegr & Teleph Corp <Ntt> Ｉｐネットワーク接続機能を備えたネットワークインターフェイスを用いる通信方式およびその装置

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JP4252577B2 (ja) 2009-04-08

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