WO2005055435A1 - Linear approximation of the max* operation for log-map decoding - Google Patents

Linear approximation of the max* operation for log-map decoding Download PDF

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Publication number
WO2005055435A1
WO2005055435A1 PCT/IB2004/004420 IB2004004420W WO2005055435A1 WO 2005055435 A1 WO2005055435 A1 WO 2005055435A1 IB 2004004420 W IB2004004420 W IB 2004004420W WO 2005055435 A1 WO2005055435 A1 WO 2005055435A1
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modf
max
modulo
linear approximation
threshold value
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PCT/IB2004/004420
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WO2005055435B1 (en
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Gideon Kutz
Amir I Chass
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Freescale Semiconductor, Inc.
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Priority to EP04816632A priority Critical patent/EP1692770B1/en
Priority to JP2006542056A priority patent/JP2007514347A/en
Priority to DE602004013186T priority patent/DE602004013186T2/en
Priority to US10/596,205 priority patent/US7634703B2/en
Publication of WO2005055435A1 publication Critical patent/WO2005055435A1/en
Publication of WO2005055435B1 publication Critical patent/WO2005055435B1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H03M13/3911Correction factor, e.g. approximations of the exp(1+x) function
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/45Soft decoding, i.e. using symbol reliability information
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6577Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/6583Normalization other than scaling, e.g. by subtraction
    • H03M13/6586Modulo/modular normalization, e.g. 2's complement modulo implementations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0055MAP-decoding

Definitions

  • the present invention relates to a decoder for a wireless communication device.
  • Wireless communication systems are widely deployed to provide various types of communications such as voice and data.
  • One such system is wideband code division multiple access WCDMA, which has been adopted in various competing wireless communication standards, for example 3 rd generation partnership project 3GPP and 3GPP2.
  • the different wireless communication standards typically include some form of channel coding, where one common channel coding technique is turbo coding.
  • Turbo coding involves the use of a turbo encoder for encoding a code segment (i.e. a data packet) and a turbo decoder for the decoding of the encoded code segment.
  • a turbo encoder includes two convolutional encoders and an interleaver, where the interleaver shuffles (i.e. interleaves) the information bits in the packet in accordance with a specified interleaving scheme.
  • the turbo encoder uses a first convolutional encoder to encode information bits within a packet to generate a first sequence of parity bits in parallel to the interleaver shuffling the information bits, where the shuffled information bits are encoded by a second encoder to generate a second sequence of parity bits.
  • the information bits and the parity bits in the first and second sequence are then modulated and transmitted to a receiver.
  • the information bits and the first and second sequence of parity bits are received by a receiver and decoded by a turbo decoder.
  • the turbo decoder initially stores the received information bits and the parity bits in the first and second sequence in a buffer. Initially, the information bits and the first sequence of parity bits from the first convolutional encoder are retrieved from the buffer and decoded by a first soft input soft output SISO decoder to provide 'extrinsic' information indicative of adjustments in the confidence in the detected values for the information bits. Intermediate results that include the extrinsic information from the first SISO decoder are then stored in the buffer in an interleaved order matching the code interleaving used at the transmitter.
  • the intermediate results, the information bits and the second sequence of parity bits from the second encoder are retrieved from the buffer and decoded by a second SISO decoder to provide extrinsic information indicative of further adjustments in the confidence in the detected values for the information bits.
  • Intermediate results that comprise the extrinsic information from the second SISO decoder are then stored in the buffer in a deinterleaved order complementary to the code interleaving performed at the transmitter.
  • the intermediate results are used in a next decoding iteration performed by the turbo decoder.
  • the turbo decoder performs a predetermined number of decoding iterations before producing a decision on the value of the decoded information bit.
  • the log MAP decoding algorithm is analogues to the MAP decoding algorithm but performed in the logarithmic domain.
  • the MAP decoding algorithm uses forward state metrics, commonly referred to as alphas ⁇ , and backward state metrics, commonly referred to as betas ⁇ , to determine soft output results, where the forward state metrics ⁇ and backward state metrics ⁇ characterise a state in a trellis structure.
  • the MAX* function is used within the log-MAP algorithm and is represented by MAX*(a(n),b(n)), where a(n) and b(n) are inputs to the MAX* function.
  • the inputs a(n) and b(n) can be forward state metrics, backward state metrics or a combination of both.
  • the MAX*(a(n),b(n)) function is equal to MAX(a(n),b(n)) plus a correction value where the correction value is equal to log(1+exp(-
  • the MAX(a(n),b(n)) term of the equation is usually straight forward to calculate, however the correction value is relatively complicated to calculate and is usually approximated using either a linear approximation, a step approximation or a look-up table.
  • the modulo function as illustrated in figure 1, can be regarded as a sawtooth function.
  • modulo function An alternative implementation of the modulo function can be defined by:
  • Figure 1 illustrates a graphical representation of a first modulo function
  • Figure 2 illustrates a graphical representation of a second modulo function
  • Figure 3 illustrates a graphical representation of the variation in the MAX* correction term versus ;
  • Figure 4 illustrates a decoder according to an embodiment of the present invention.
  • the curve A in figure 3 illustrates the correction term for the MAX*(a(n),b(n)) function (i.e. MAX*(a(n),b(n)-MAX(a(n),b(n)) as a function of ), where is the absolute value of the difference between a(n) and b(n)).
  • an easy technique for approximating the correction term is the use of linear approximation, as illustrated by line B in figure 3.
  • the linear approximation provides a close approximation for the correction term for low values .
  • the intersection of the line B on the axis indicates th value above which the linear approximation correction term goes to zero. Consequently, using linear approximation, the intersection point determines a threshold value, designated C, for determining if a correction value is to be applied to , where the intersection point is defined by the linear approximation equation.
  • the MAX* function can be written as: MAX(a(n),b(n)) + MAX(0, ' C ⁇ a ⁇ h ⁇ ⁇
  • the modulo value F is preferable a value to the power of two.
  • the modF of a(n) becomes a(n)modF.
  • the modF of b(n) becomes b(n)modF.
  • Equation xmodF is equivalent to where the J_CJ term is the floor of 'x'.
  • This algorithm is easy to calculate in silicon as s involves only binary operations and F is chosen to be a power of two.
  • a decoder 400 for implementing the above MAX* equation is shown in figure 4 and is arranged to output MAX(a(n)modF,b(n)modF) when is greater than the threshold value C and to output -b(n) ⁇ is less than the threshold value C. If equals C then either MAX(a(n)modF,b(n)modF) or .
  • the decoder 400 includes a first substracting unit 401, a second substracting unit 402, a calculator 403 in the form of an adder unit and a selector 404 in the form of a multiplexer unit.
  • the first substracting unit 401 , the second substracting unit 402 and the adder unit 403 are each arranged to receive a(n)modF, b(n)modF and the threshold value C.
  • the first substracting unit 401 is arranged to generate the sign of
  • the second substracting unit 402 is arranged to generate the sign of (a(n)modF-b(n)modF-C)modF.
  • the adder unit 403 is , , , arranged to generate , where the division by two corresponds to a shift in bit position by one.
  • the modF operation is performed by ignoring the overflow (i.e. the carry bit of the msb bit addition is ignored).
  • the output from the first substracting unit 401, the second substracting unit 402 and the adding unit 403 i.e. the sign of (b(n)modF-a(n)modF-C)modF, the sign of (a(n)modF-b(n)modF-C)modF and
  • the multiplexer 404 is arranged to output a MAX*(a(n)modF, b(n)modF) equal to a(n)modF when the sign of (a(n)modF-b(n)modF-C)modF is positive and the sign of (b(n)modF-a(n)modF-C)modF is negative.
  • the multiplexer 404 is arranged to output a MAX*(a(n)modF, b(n)modF) equal to b(n)modF when the sign of (a(n)modF-b(n)modF-C)modF is negative and the sign of (b(n)modF-a(n)modF-C)modF is positive.
  • the multiplexer 404 is arranged to output a MAX * (a(n)modF, b(n)modF) equal to the sign of (a(n)modF-b(n)modF-C)modF is negative and the sign of (b(n)modF- a(n)modF-C)modF is negative.

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  • Engineering & Computer Science (AREA)
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  • Computer Networks & Wireless Communication (AREA)
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Abstract

A LOG-MAP decoder for a wireless communication device, which uses modulo arithmetic and comprises a calculator for calculating the modulo of a linear approximation of a MAX* function; and a selector for selecting a MAX* output value from the group a(n)modF, b(n)modF, and the calculated modulo based upon a determination as to wheather a predetermined threshold value for ′a(n) - b(n) ! has been met, where a(n) is a first state metric, b(n) is a second state metric, C is the predetermined threshold value and F is a value greater than ′a(n)-b(n) !.

Description

LINEAR APPROXIMATION OF THE MAX* OPERATION FOR LOG-MAP DECODING
The present invention relates to a decoder for a wireless communication device.
Wireless communication systems are widely deployed to provide various types of communications such as voice and data. One such system is wideband code division multiple access WCDMA, which has been adopted in various competing wireless communication standards, for example 3rd generation partnership project 3GPP and 3GPP2.
To overcome data corruption that can occur during RF transmission the different wireless communication standards typically include some form of channel coding, where one common channel coding technique is turbo coding.
Turbo coding involves the use of a turbo encoder for encoding a code segment (i.e. a data packet) and a turbo decoder for the decoding of the encoded code segment.
A turbo encoder includes two convolutional encoders and an interleaver, where the interleaver shuffles (i.e. interleaves) the information bits in the packet in accordance with a specified interleaving scheme.
The turbo encoder uses a first convolutional encoder to encode information bits within a packet to generate a first sequence of parity bits in parallel to the interleaver shuffling the information bits, where the shuffled information bits are encoded by a second encoder to generate a second sequence of parity bits. The information bits and the parity bits in the first and second sequence are then modulated and transmitted to a receiver. The information bits and the first and second sequence of parity bits are received by a receiver and decoded by a turbo decoder.
The turbo decoder initially stores the received information bits and the parity bits in the first and second sequence in a buffer. Initially, the information bits and the first sequence of parity bits from the first convolutional encoder are retrieved from the buffer and decoded by a first soft input soft output SISO decoder to provide 'extrinsic' information indicative of adjustments in the confidence in the detected values for the information bits. Intermediate results that include the extrinsic information from the first SISO decoder are then stored in the buffer in an interleaved order matching the code interleaving used at the transmitter.
The intermediate results, the information bits and the second sequence of parity bits from the second encoder are retrieved from the buffer and decoded by a second SISO decoder to provide extrinsic information indicative of further adjustments in the confidence in the detected values for the information bits. Intermediate results that comprise the extrinsic information from the second SISO decoder are then stored in the buffer in a deinterleaved order complementary to the code interleaving performed at the transmitter. The intermediate results are used in a next decoding iteration performed by the turbo decoder. The turbo decoder performs a predetermined number of decoding iterations before producing a decision on the value of the decoded information bit.
Commonly used algorithms used within SISO decoders are the maximum a posteriori MAP decoding algorithm and the log MAP decoding algorithm. The log MAP decoding algorithm is analogues to the MAP decoding algorithm but performed in the logarithmic domain. The MAP decoding algorithm uses forward state metrics, commonly referred to as alphas α, and backward state metrics, commonly referred to as betas β, to determine soft output results, where the forward state metrics α and backward state metrics β characterise a state in a trellis structure.
The MAX* function is used within the log-MAP algorithm and is represented by MAX*(a(n),b(n)), where a(n) and b(n) are inputs to the MAX* function. The inputs a(n) and b(n) can be forward state metrics, backward state metrics or a combination of both.
The MAX*(a(n),b(n)) function is equal to MAX(a(n),b(n)) plus a correction value where the correction value is equal to log(1+exp(-|α(«)-b(/z)| )).
The MAX(a(n),b(n)) term of the equation is usually straight forward to calculate, however the correction value is relatively complicated to calculate and is usually approximated using either a linear approximation, a step approximation or a look-up table.
As the state metric calculations are performed within the SISO decoder the values within the accumulated path metrics can overflow leading to incorrect results.
One solution to the overflow problem involves the use of modulo arithmetic. A modulo n operation on a number provides the remainder when the number is divided by n, for example 10(binary 1010)modulo 8 = 2(binary 010) and 28(binary 11100)modulo 16 = 12(binary 1100). Consequently, as can be seen from the examples, to determine a value for a modulo operation where the remainder is a value to the power of two is simply a question of masking off any unwanted bits. The modulo function, as illustrated in figure 1, can be regarded as a sawtooth function.
An alternative implementation of the modulo function can be defined by:
xmodF = which allows negative numbers to be accommodated.
Figure imgf000005_0001
This function is illustrated in figure 2.
It is desirable to have an apparatus and method for generating a linearly approximated MAX* log MAP algorithm that operates on modulo functions.
In accordance with a first aspect of the present invention there is provided a decoder for a wireless communication device according to claim 1.
In accordance with a second aspect of the present invention there is provided a method for generating a MAX* value according to claim 8.
An embodiment of the invention will now be described, by way of example, with reference to the drawings, of which:
Figure 1 illustrates a graphical representation of a first modulo function;
Figure 2 illustrates a graphical representation of a second modulo function;
Figure 3 illustrates a graphical representation of the variation in the MAX* correction term versus
Figure imgf000005_0002
; Figure 4 illustrates a decoder according to an embodiment of the present invention.
The curve A in figure 3 illustrates the correction term for the MAX*(a(n),b(n)) function (i.e. MAX*(a(n),b(n)-MAX(a(n),b(n)) as a function of
Figure imgf000006_0001
), where
Figure imgf000006_0002
is the absolute value of the difference between a(n) and b(n)).
As can be seen from curve A the correction term is greatest for low values of
Figure imgf000006_0003
and gradually decreases to zero as
Figure imgf000006_0004
increases.
As stated above, an easy technique for approximating the correction term is the use of linear approximation, as illustrated by line B in figure 3. As illustrated, the linear approximation provides a close approximation for the correction term for low values . The intersection of the line B on the
Figure imgf000006_0005
axis indicates th
Figure imgf000006_0006
value above which the linear approximation correction term goes to zero. Consequently, using linear approximation, the intersection point determines a threshold value, designated C, for determining if a correction value is to be applied to
Figure imgf000006_0007
, where the intersection point is defined by the linear approximation equation.
The use of the linear approximation technique allows easy calculation of the
MAX* function, as described below.
One suitable linear approximation equation (i.e. the correction term used) is given by MAX(0,( -|αW-δWj ).
Consequently, the MAX* function can be written as: MAX(a(n),b(n)) + MAX(0, 'C \a^ h^
=MAX(0+MAX(a(n),b(n)),
Figure imgf000007_0001
=MAX(a(n),b(n), 'C ^ δ^'% +MAX(a(n),b(n))
=MAX(a(n),b(n), («(») + *(") + )
To minimise the problem of accumulated state metric overflow, as discussed above, the above terms are converted into their corresponding 'modF' values where F is selected such that
Figure imgf000007_0002
<F. F is chosen by analysing the algorithm and determining what would be the maximum possible value of
Figure imgf000007_0003
for any a(n) and b(n) that can enter the MAX* function.
To ease the hardware implementation for handling the modulo value F is preferable a value to the power of two.
The modF of a(n) becomes a(n)modF.
The modF of b(n) becomes b(n)modF.
However, the modF of (a(n)+b(n)+C)/2 is
Figure imgf000007_0004
Figure imgf000008_0001
This is demonstrated by the following:
The equation xmodF is equivalent to where the J_CJ term is
Figure imgf000008_0002
the floor of 'x'.
Accordingly:
(a(n)+C)modF = (a(n)modF+C)modF and
(a(n)-b(n))modF = a(n) - b(n) if and only if
Figure imgf000008_0003
<F
Using these two identities proves:
a( ) + b(ή) + C
Figure imgf000008_0004
Figure imgf000008_0005
Figure imgf000008_0006
For values of C<F/2 an alternative implementation of the modulo of a linear approximation of a MAX function is equal to:
Figure imgf000009_0001
where s is calculated from the binary expression s=[a(m) xor b(m)] and [((a(m) xor a(m-1)) and ((b(m) xor b(m-1)], where a and b are represented by m bits so that a(m) is the most significant bit of a and a(m~1) is next to the most significant bit.
This algorithm is easy to calculate in silicon as s involves only binary operations and F is chosen to be a power of two.
A decoder 400 for implementing the above MAX* equation is shown in figure 4 and is arranged to output MAX(a(n)modF,b(n)modF) when
Figure imgf000009_0002
is greater than the threshold value C and to output -b(n)\ is
Figure imgf000009_0003
less than the threshold value C. If
Figure imgf000009_0004
equals C then either MAX(a(n)modF,b(n)modF) or .
Figure imgf000009_0005
The decoder 400 includes a first substracting unit 401, a second substracting unit 402, a calculator 403 in the form of an adder unit and a selector 404 in the form of a multiplexer unit. The first substracting unit 401 , the second substracting unit 402 and the adder unit 403 are each arranged to receive a(n)modF, b(n)modF and the threshold value C.
The first substracting unit 401 is arranged to generate the sign of
(b(n)modF-a(n)modF-C)modF. The second substracting unit 402 is arranged to generate the sign of (a(n)modF-b(n)modF-C)modF. The adder unit 403 is , , , arranged to generate ,
Figure imgf000010_0001
where the division by two corresponds to a shift in bit position by one.
The modF operation is performed by ignoring the overflow (i.e. the carry bit of the msb bit addition is ignored).
The output from the first substracting unit 401, the second substracting unit 402 and the adding unit 403 (i.e. the sign of (b(n)modF-a(n)modF-C)modF, the sign of (a(n)modF-b(n)modF-C)modF and
Figure imgf000010_0002
provided to the multiplex unit 404 along with the values of a(n)modF and b(n)modF.
The multiplexer 404 is arranged to output a MAX*(a(n)modF, b(n)modF) equal to a(n)modF when the sign of (a(n)modF-b(n)modF-C)modF is positive and the sign of (b(n)modF-a(n)modF-C)modF is negative. The multiplexer 404 is arranged to output a MAX*(a(n)modF, b(n)modF) equal to b(n)modF when the sign of (a(n)modF-b(n)modF-C)modF is negative and the sign of (b(n)modF-a(n)modF-C)modF is positive.
The multiplexer 404 is arranged to output a MAX*(a(n)modF, b(n)modF) equal to the
Figure imgf000011_0001
sign of (a(n)modF-b(n)modF-C)modF is negative and the sign of (b(n)modF- a(n)modF-C)modF is negative.
It will be apparent to those skilled in the art that the disclosed subject matter may be modified in numerous ways and may assume many embodiments other than the preferred forms specifically set out as described above, for example the above embodiments could be arranged such that the modulo for other linear approximation equations can be calculated and an additional substracting unit could be used to determine the sign of a(n)-b(n) to assist the selection process.

Claims

1. A decoder for a wireless communication device comprising a calculator for calculating the modulo of a linear approximation of a MAX* function; and a selector for selecting a MAX* output value from the group a(n)modF, b(n)modF, and the calculated modulo based upon a determination as to whether a predetermined threshold value for
Figure imgf000012_0001
has been met, where a(n) is a first state metric, b(n) is a second state metric, and F is a value greater than
Figure imgf000012_0002
.
2. A decoder according to claim 1 , wherein the calculator is arranged to calculate the modulo of a linear approximation of a MAX function using:
Figure imgf000012_0003
predetermined threshold value.
3. A decoder according to claim 1, wherein the calculator is arranged to calculate the modulo of a linear approximation of a MAX function using: , where s is equal to
Figure imgf000012_0004
[a(m) xor b(m)] and [((a(m) xor a(m-1)) and ((b(m) xor b(m-1)], and C is the predetermined threshold value.
4. A decoder according to claim any preceding claim, wherein the determination is based upon the sign of (a(n)modF-b(n)modF-C)modF and the sign of (b(n)modF-a(n)modF-C)modF, where C is the predetermined threshold value.
5. A decoder according to any preceding claim, wherein the selector is arranged to select and output the modular of the linear approximation of a MAX*function if the value
Figure imgf000013_0001
is less than the predetermined threshold value.
6. A decoder according to any preceding claim, wherein the value of F is to the power of two.
7. A decoder according to any preceding claim, wherein the selector is a multiplexer.
8. A decoder according to any preceding claim, wherein the calculator is an add module that is arranged to receive a(n)modF, b(n)modF and C, where C is the predetermined threshold value.
9. A method for generating a MAX* value, the method comprising the steps of: receiving a first modulo state metric a(n)modF, a second modulo state metric b(n)modF and a predetermined threshold value for | (n)-b(n)| ; calculating the modulo of a linear approximation of a MAX* function; and selecting a value from the group a(n)modF, b(n)modF, and the calculated modulo based upon a determination as to whether a predetermined threshold value for
Figure imgf000013_0002
has been met, where a(n) is a first state metric, b(n) is a second state metric, and F is a value greater than | a(n) - b(n)| .
10. A method according to claim 9, wherein the modulo of the linear approximation of a MAX function is calculated using:
Figure imgf000014_0001
predetermined threshold value, w
11. A method according to claim 9, wherein the modulo of the linear approximation of a MAX function is calculated using:
{ (a(n) mod F + C) mod F + b(n) mod F Λ modE + where s is equal to
Figure imgf000014_0002
[a(m) xor b(m)] and [((a(m) xor a(m-1)) and ((b(m) xor b(m-1)], and C is the predetermined threshold value.
PCT/IB2004/004420 2003-12-05 2004-12-03 Linear approximation of the max* operation for log-map decoding WO2005055435A1 (en)

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DE602004013186T DE602004013186T2 (en) 2003-12-05 2004-12-03 LINEAR APPROXIMATION OF MAX * OPERATION FOR LOG MAP DECODING
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