WO2005013359A1 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
WO2005013359A1
WO2005013359A1 PCT/JP2003/009729 JP0309729W WO2005013359A1 WO 2005013359 A1 WO2005013359 A1 WO 2005013359A1 JP 0309729 W JP0309729 W JP 0309729W WO 2005013359 A1 WO2005013359 A1 WO 2005013359A1
Authority
WO
Grant status
Application
Patent type
Prior art keywords
terminal
terminals
semiconductor
connected
semiconductor device
Prior art date
Application number
PCT/JP2003/009729
Other languages
French (fr)
Japanese (ja)
Inventor
Teruo Akashi
Katsuhiro Nakai
Tsuyoshi Nanba
Takehisa Hirano
Tomoaki Tezuka
Koji Mukai
Original Assignee
Matsushita Electric Industrial Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

A semiconductor device such that the wiring for mounting it on a board is facilitated even if the number of terminals of the semiconductor device is large, the pitches of the terminals are narrow, and the terminals are arranged in a plurality of lines. A semiconductor package body (3) is provided with a plurality of lines of terminals (7) arranged on its back in a matrix, at least two of which are electrically connected to a semiconductor chip (1). The terminals at the same potential, out of the terminals (7) electrically connected to the semiconductor chip (1), are electrically connected a conductive region (9) provided in the center of the back of the semiconductor package body (3). The semiconductor chip (1) can be connected to another element on a printed board (10) on which the semiconductor device is mounted, by using the wiring led out of a land corresponding only to one of the terminals connected to the conductive region (9), thus facilitating the wiring on the printed board (10).

Description

Akira fine manual semiconductor device technology field

The present invention relates to a semiconductor device, in particular, terminals provided on the package, multi-terminal, pitch, even a plurality of rows, a semiconductor that can facilitate the wiring on the printed board for mounting the semiconductor device to an apparatus. BACKGROUND

In recent years, the number of terminals of the semiconductor device, a semiconductor device provided with a plurality of terminals on the rear surface of the sealed package has been developed a semiconductor device.

A conventional semiconductor device will be described with reference first 6 diagram, and the first 7 FIG.

The first 6 figures of the semiconductor package body of a conventional semiconductor device, a diagram showing the backside of the structure. 3, the semiconductor package body, P 1 0, P 1 1, a plurality of terminals 7 arranged in a grid pattern on a back surface of the semiconductor package body 3 of the (indicated by 〇), indicates a particular terminal.

The first 7 Figure is part of a printed circuit board for mounting the semiconductor package body 3, it shows a peripheral portion of the connection terminal P 1 0 of semiconductors package body 3, P 1 1 and. L are arranged in a lattice pattern on the surface of the printed circuit board, a semiconductor package body 3 when mounted on printed circuit boards, the run-de, L 1 1 to be connected to the terminals 7 of the semiconductor package body 3, the terminal P 1 0 and connection lands, L 1 2, the terminal P 1 1 and the connection land, 8, wiring for connecting the elements on the land L and the printed circuit board, 1 1, for wiring between the multi-layer board which is the print vias on the board.

When configured as above, the semiconductor package body 3 terminal P 1 0 that is disposed on the rear surface is the other element and wiring on a printed circuit board through the lands L 1 1 than the wiring 8.

Patent Document

JP 1 1 one 2 9 7 8 7 9] However, the semiconductor package body 3 lands L 1 2 to be joined to the terminal P 1 1 disposed near the center of the back side, can not be the wiring to the outside, the terminal P 1 1 to be connected to other devices, it shall be used connecting means to the other layers, such as, for example, via 1 1. The more the number of terminals, via the semiconductor package body 3 the rear surface of the terminal 7 to La command L, and performing wiring to other devices on the printed circuit board is more difficult, such Tsutekuru.

Terminals of the semiconductor device, number of terminals, narrow pitch, and a plurality Stringified, in order to correspond to this, increase the wiring density of the semiconductor package body terminal mounted on a printed circuit board to another device or, it is necessary to use a small via of more diameters, this is limited. Further the density of terminals is increased, since the number of wiring lines increases, it becomes impossible wiring to be used more layers having a large number of printed circuit board. However, when a large printed circuit board number of layers, there is a problem that cost is increased.

The present invention has been made to solve this problem, terminals, multi-terminal, even narrow pitch, a plurality of rows on the printed circuit board, easily wire for connecting to other elements and to provide a semiconductor device which can perform. Disclosure of the Invention

In order to solve the conventional problems, a semiconductor equipment according to claim 1, wherein the present invention, a semiconductor device and, at least one pin is the semiconductor device of the plurality of terminals disposed on a surface and it is electrically connected, and a semiconductor package that have a region of the conductive to the central portion of the surface comprises, at least one terminal of said semiconductor device and electrically connected to the terminal, the conductive characterized by being electrically connected to the region. Therefore, by connecting via the same terminal area of ​​the conductive potential to each other, wherein at the semiconductor device mounting the printed circuit board, one of the terminals that are electrically connected to the conductive regions only applying wire for connecting to other elements to the terminal, wherein it is possible to connect the semiconductor element and other elements, it is possible to reduce the number of wiring, thereby facilitating wiring above, it is possible to reduce the manufacturing cost of the printed circuit board.

The semiconductor device according to claim 2 of the present invention is a semiconductor device range of serial mounting the first of claims, the terminal connected said conductive region and electrically, of the conductive characterized by being arranged in a position adjacent to the region. This makes it possible to easily connect the region and the terminal before Kishirube conductive.

The semiconductor device according to claim 3 of the present invention, or claim 1, wherein the semiconductor device according to claim 2, terminals for electrically connecting with the conductive regions and characterized by being connected to the power supply or ground of the semiconductor device. Thus, the Ki de to increase the number of terminals connectable to the conductive areas, the number of wiring on a printed board for mounting the semiconductor device, can be significantly reduced.

The semiconductor device according to claim 4 of the present invention includes a semiconductor element, a semiconductor package in which at least two terminals are electrically connected to the semiconductor device of the arranged plurality of terminals on a surface , wherein the one of the semiconductor elements and electrically connected to the terminal, the two or more terminals of the same potential, characterized in that connected the semiconductor element outside at electrical in the. Thus, the at mounting a semiconductor device was print substrate, only applying the wiring for connecting to other elements to one terminal of the terminal electrically connected outside of the semiconductor element in the semiconductor device and can be connected to the other elements, it is possible to reduce the number of wires, can be on the wiring becomes easy to reduce the manufacturing cost of the printed circuit board. The semiconductor device according to Claim 5 of the present invention is a semiconductor device of the mounting serial range to a fourth of claims, the pin that is electrically connected at the outside of the semiconductor device, with each other characterized in that arranged in adjacent positions. This makes it possible to easily connect the pin.

The semiconductor device according to claim 6 of the present invention, or claim 4 in the semiconductor device according to claim 5, external with electrical connecting of the semiconductor element it has been the terminal, characterized by being connected to the power supply or ground of the semiconductor device. Accordingly, the at the outside of the semiconductor device can be increased number of possible electrical connection terminals, the number of wiring on a printed board for mounting the semiconductor device, can be significantly reduced.

The semiconductor device according to claim 7 of the present invention includes a semiconductor element, at least two terminals among the arranged plurality of terminals on a surface thereof is connected the the semiconductor element and electrically, and the surface of the includes a semiconductor package having a conductive region in the central portion, wherein the semiconductor device and of the terminal electrically connected, two or more terminals at the same potential, which is arranged at a position not adjacent to one another, wherein characterized by being electrically connected to the conductive areas. Thus, in the semiconductor device of the mounted printed circuit board, only by performing the wiring for connecting to other elements to one terminal of the terminal electrically connected to the conductive regions the semiconductor element and can be connected to the other elements, it is possible to reduce the number of wires, on which the wiring is facilitated, it is possible to reduce the manufacturing cost of the printed circuit board.

The semiconductor device according to claim 8 of the present invention, a terminal for connecting the conductive regions and to electrical manner, characterized by being located adjacent to the conductive region. This makes it possible to easily connect the conductive region and the terminal. The semiconductor device according to claim 9, wherein the present invention, or Claim 7 in the semiconductor device according to claim 8, terminals electrically connected to the conductive regions and characterized by being connected to the power supply or ground of the semiconductor device. Thus, the Ki de to increase the number of terminals connectable to the conductive areas, the number of wiring on a printed board for mounting the semiconductor device, can be significantly reduced.

The semiconductor device according to a first 0 wherein the range of the claims of the present invention includes a semiconductor element, at least two terminals among the arranged plurality of terminals on a surface thereof is connected the the semiconductor element and electrically, and the surface in central, at least two, characterized in that and a semiconductor package having a conductive region not electrically connected to each other. Thus, it is possible to increase the number of connectable terminals via the conductive region.

The semiconductor device according to the first 1 wherein the claims of the present invention is a semiconductor device according to the first 0 wherein the claims, each of said at least two conductive regions, before Symbol semiconductor element and the electrical connected to the one or more that electrically connects the terminal to FEATURE:. Therefore, by connecting via the same terminal area of ​​the conductive potential to each other, in the semiconductor device of the mounted printed circuit board, of the terminal electrically connected to the realm of the conductive only applying wire for connecting to other elements to one terminal, the can be connected to the semiconductor element and other elements, it is possible to reduce the number of wires, easy wiring on made, it is possible to reduce the cost of manufacturing the printed circuit board.

A semiconductor device range according to the first two terms of the claims of the present invention is the semiconductor device according to the first 1 wherein the claims, the terminal connected said in region electrically of each conductive and the terminal characterized by being arranged in a position adjacent to the conductive region connected. This makes it possible to easily connect the region and the terminal of each conductive.

The semiconductor device according to the first three terms the scope of the claims of the present invention is the semiconductor device according to the first two terms scope first 1 wherein or claims, wherein said each conductive region and electrically the terminals to be connected, characterized by being connected to the power supply or ground of the semiconductor device. Thus, the conductive number of connectable terminals in the area can be increased, the number of wiring purine Bok substrate for mounting the semiconductor device, can be significantly reduced.

The semiconductor device according to the first 4 wherein the claims of the present invention includes a semiconductor element, the terminal on the surface are arranged in a plurality of rows grid pattern, at least one terminal is said semiconductor element and electrically one of said terminals It is connected, and a different surface from that of the terminals are disposed face, wherein the semiconductor device is electrically connected to at least one different surface terminals are equipped with a semi-conductor package arranged . Thus, said have use a different plane terminal, it is possible to connect the semiconductor element and other elements, on which it is possible to reduce the number of wiring a printed circuit board for mounting the semiconductor equipment, the printed it is possible to reduce the manufacturing cost of the substrate.

The semiconductor device according to the first 5 wherein the scope of the claims of the present invention, the semiconductor device according to the first item 4 claims, the different surfaces terminals were connected to the power supply or ground of the semiconductor element the features. Thus, it is possible to increase the number of terminals that can be different-surface terminals.

The semiconductor device according to the first 6 wherein the scope of the claims of the present invention includes a semiconductor element, the terminal on the surface are arranged in a plurality of rows grid pattern, at least one terminal is said semiconductor element and electrically one of said terminals and a semiconductor package which are connected, at least one side of said semiconductor package, the terminal number of terminal rows arranged in the outer periphery, with less than the number of terminals of the inner terminal string kicked set circumferentially, and the it is characterized in. Thus, in the printed board mounted with the semiconductor device, it is possible to perform a new wiring to the position where the run de for connection to a terminal not provided, becomes easier wiring.

The semiconductor device according to the first 7 wherein the scope of the claims of the present invention includes a semiconductor element, the terminal on the surface are arranged in a plurality of rows grid pattern, at least one terminal is said semiconductor element and electrically one of said terminals comprising a connected semiconductor package, the at least one side of the semiconductor package is that the terminal spacing terminal row provided on the outer periphery, wider than the pin spacing terminal row provided on the inner periphery thereof, and the the features. This ensures that, in the printed board mounted with the semiconductor device, since the intervals between the lands for connection to a terminal becomes wider, it becomes possible to perform more wires.

The semiconductor device according to the first 8 wherein the claims of the present invention includes a semiconductor element, the terminal on the surface are arranged in a plurality of rows grid pattern, at least one terminal is said semiconductor element and electrically one of said terminals comprising a connected semiconductor package, the at least one side of the semiconductor package is that the terminal spacing terminal row provided on the inner periphery, wider than the pin spacing of the terminal arrays provided on the outer periphery thereof, and the the features. This ensures that, in the printed board mounted with the semiconductor device, since the intervals between the lands for connection to a terminal becomes wider, on which it becomes possible to perform more wires, manufacture of the printed circuit board it is possible to reduce costs me.

A semiconductor device range according to the first 9 of claims of the present invention includes a semiconductor device, the surface, on each side except for at least one side, terminals are arranged in a plurality of rows grid pattern, at least one of said terminals terminals of the semiconductor element and electrically connected to the semiconductor package - characterized by comprising a di-, a. Thus, in the print board on which the semiconductor device is made possible to perform a new wiring to the position where the lands for connection to a terminal not provided, it becomes easier wiring.

The semiconductor device according to a second 0 term the claims of the present invention is a semiconductor device according to the first 9 wherein the claims, only two opposite sides of said semiconductor package, in that a pin and features. Thus, in the print board on which the semiconductor device is made possible to perform a new wiring to the position where the lands for connection to a terminal not provided, it becomes easier wiring.

The semiconductor device according to a second 1 wherein the claims of the present invention includes a semiconductor element, the terminal on the surface are arranged in a plurality of rows grid pattern, at least one terminal is said semiconductor element and electrically one of said terminals and a connected semiconductor package, the number of terminals of the at least one side of the semiconductor package is characterized in that the other sides in the arranged number of terminals fewer than half der shall, as. Thus, in the print board on which the semiconductor device is made possible to perform a new wiring to the position where the lands for connection to a terminal not provided, on the more wire is facilitated, the printed circuit board it is possible to reduce the cost of production.

The semiconductor device according to a second item 2 the claims of the present invention, at least one side, a semiconductor device having no pad for connection to an external electrical terminal on the surface a plurality of rows grid pattern It is disposed, and a least one terminal the pad and electrically connected to the semiconductor package of the semiconductor device of said terminal, of the semiconductor package corresponding to the side without the pad of the semiconductor element the number of terminals disposed on the sides, not more than half the number of terminals disposed on the other side, characterized in that the the. Thus, in the printed board mounted with the semiconductor device, terminal and Ri Do can be subjected to new wiring at a position where the land is not provided for connecting, on more wiring becomes easy, the printing it is possible to reduce the manufacturing cost of the substrate.

The semiconductor device according to a second three-term claims of the present invention includes a semiconductor element, the terminal on the surface are arranged in a plurality of rows grid pattern, at least one terminal is said semiconductor element and electrically one of said terminals and a connected semiconductor package, in order to increase the number of possible wiring terminals on the printed board mounted with the semiconductor device, the first non-connecting terminal which is not connected to the semiconductor element of the double several terminals , or the second non-connecting terminal that does not perform an external electrical connection, or a third non-connection terminal made more and the semiconductor device does not perform the unconnected pin and the external electrical connection to the terminal, the distributed to the semiconductor element and electrically connected to the terminal disposed, characterized in that a region that can be routed in the print substrate. Thus, by placing before Symbol first unconnected terminal or the second non-connecting terminal or said third non-connection terminal dispersed, the land that corresponds on a printed circuit board mounted with the semiconductor device the wiring to the other elements, on which it is possible to perform efficiently, it is possible to reduce the manufacturing cost of the previous SL PCB.

The semiconductor device according to a second item 4 the claims of the present invention is the semiconductor device according to the second item 3 claims, wherein the first non-connecting terminal or the second non-connecting end terminal or the a third non-connected terminals, and connected to a ground terminal connected to the power supply terminal and the ground power supply, the of the semiconductor elements and electrically connected to the terminals, terminals other than the power supply terminal and the Darando terminal characterized in that distributed and arranged with respect. Thus, by arranging the first non-connecting terminal or the second non-connecting terminal or the third non-connection terminal and the power supply terminal and the Darando terminal and dispersing the and mounting the semiconductor device printed the wiring from the corresponding lands on the board to the other elements, it is possible to perform efficiently.

The semiconductor device according to a second 5 wherein the scope of the claims of the present invention is the semiconductor device according to the second item 3 claims, wherein the first non-connecting terminal or the second non-connecting end terminal or the the third non-connected terminals, and feature in that arranged distributed outermost terminal row. Accordingly, the first or non-connecting terminal or the second non-connecting terminals by placing dispersed unconnected terminal of the third, corresponding land on the purine Bok substrate the semiconductor device was implemented the wiring from the other elements, it is possible to perform efficiently.

The semiconductor device according to a second 6 wherein the scope of the claims of the present invention is the semiconductor device according to any one of claims second item 3 or claims second item 5, wherein the first non-connecting terminal or the second terminal number n 1 of the non-connection terminal or the third unconnected terminal is 5 or more, and the first non-connecting terminal or the second non-connecting terminal or the third unconnected terminal characterized in that adjacent terminal number ml was arranged so that 25% or more of the terminal number n 1 to each other among the. Accordingly, another from the first by placing dispersed non connection terminal or non-connection terminal of the second non-connecting terminal or the third, corresponding land on the printed board mounted with the semiconductor device the wiring for the element, it is possible to perform efficiently. The semiconductor device according to a second item 7 scope of the claims of the present invention includes a semiconductor element, the terminal on the surface are arranged in a plurality of rows grid pattern, at least one terminal is said semiconductor element and electrically one of said terminals comprising a connected semiconductor package, and the to increase the number of possible wiring terminals on the printed board mounted with a semiconductor device, among the multiple several terminals, connected to a power supply terminal and a ground that is connected to a power source the Dara command terminal which is the dispersed and arranged with respect to the power supply terminal and other than the ground terminal pin of the semiconductor element electrically connected to a terminal, which can contact Keru wiring on the printed board characterized in that a region. Accordingly, by arranging to disperse the power supply pin and the Pi said Darando terminals, the wiring from the corresponding lands on the printed board mounted with the semiconductor device to another device, it can be performed efficiently and Become. A brief description of 'drawings

Figure 1 is a side view showing a state of mounting a semiconductor device on a printed circuit board according to the first embodiment of the present invention.

FIG. 2, the semiconductor device according to a first embodiment of the present invention, showing the configuration of a semiconductor package body backside.

Figure 3 is a printed circuit board for mounting a semiconductor device according to a first embodiment of the present invention, showing a part of the wiring shape.

Figure 4 is a semiconductor device according to a first embodiment of the present invention, it illustrates another configuration of a semiconductor package body back surface

Figure 5 is a side view showing a state of mounting a semiconductor device on a printed circuit board according to a second embodiment of the present invention.

Figure 6 is a semiconductor device according to a third embodiment of the present invention, showing the configuration of a semiconductor package body backside.

Figure 7 is a printed circuit board for mounting a semiconductor device according to a third embodiment of the present invention, showing a part of the wiring shape.

Figure 8 is a semiconductor device according to a third embodiment of the present invention, illustrating another configuration of a semiconductor package body backside. Figure 9 is a printed circuit board for mounting a semiconductor device according to a third embodiment of the present invention and showing a portion of another wire shape.

The first 0 illustration of a semiconductor package body of the semiconductor device according to a fourth embodiment of the present invention, showing the configuration of the mounting surface of the semiconductor element.

The first 1 figure of the printed circuit board for mounting the semiconductor device according to a fourth embodiment of the present invention, showing a part of the wiring shape.

The first FIG. 2 is a side view showing a state of mounting a semiconductor device on a printed circuit board according to a fifth embodiment of the present invention.

The first 3 figures of the semiconductor device according to a fifth embodiment of the present invention, showing the configuration of a semiconductor package Body backside.

The first 4 figures of the printed circuit board for mounting the semiconductor device according to a fifth embodiment of the present invention, showing a wiring form.

The first 5 figures of print substrate for mounting a semiconductor device that does not take the configuration of the fifth embodiment of the present invention, showing a wiring form.

The first 6 figures of a conventional semiconductor device, a diagram showing a configuration of a semiconductor package body backside.

The first 7 figures of printed circuit board mounting a conventional semiconductor device is a diagram showing a part of the wiring shape. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described with reference to FIG.

(Embodiment 1)

A semiconductor device according to a first embodiment of the present invention, described with reference to the drawings.

Figure 1 is a semiconductor device according to the first embodiment, is a diagram showing a state mounted on a printed circuit board.

1, the semiconductor element, 3 is a semiconductor package body 2, the bonding wires connecting pads of the semiconductor element 1 (not shown) and a semiconductor package body 3, 4 are formed on the semiconductor package body 3 surface that the wiring patterns, 6, the wiring patterns formed on the semiconductor package body 3 backside, 5, vias for electrically connecting the wiring pattern 4 and the wiring path evening over emissions 6, 7, the semiconductor package body 3 terminals, 1 0, printed board for mounting a semiconductor package body 3, 8, wiring on the printed circuit board, 9 is a conductive region provided in the semiconductor package body 3 backside. Contact name in the first diagram, it is omitted resin which seals the semiconductor package body 3.

The specific pads of the semiconductor element 1 by a bonding wire 2 is connected to the semiconductors package body 3, further than the wiring path evening one down 4 of the semiconductor package body 3, via 5, through the wiring pattern 6 , and it is connected to the terminal 7 of the semiconductor package body 3. Wire 8 is connected to one of the semiconductor package body 3 the rear surface of the terminal 7 via a land (detailed below) is further connected to the other element. Figure 2 is a rear surface of the structure of a semiconductor package body 3, also FIG. 3 shows a part of the wiring shape of the printed circuit board 1 0 for mounting a semiconductor package body 3. In FIG. 2, 7 (shown in 〇) is a plurality of terminals that are kicked set in the semiconductor package body 3 backside, P l, P 2 is a specific terminal among the plurality of terminals 7 shows. These terminals P l, P 2 is for inputting or outputting a signal of the same potential to the semiconductor element 1, the terminal P 1 is the wiring pattern 6 a, the terminal P 2 by wiring patterns 6 b, the conductive It is connected to the region 9.

In FIG. 3, L (those shown in 〇) is provided on the printed board 1 0 is connected when semiconductors package temporary body 3 is mounted, the terminals 7 of the semiconductor package temporary body 3 Land in and, L 1 is a land which is connected to the terminal P 1, L 2 is a land which is connected to the terminal P 2, L 3 represents a particular land. Further, 1 1 is provided on the PCB 1 0, the land L and the printed board 1 0 inside formed have that wires (not shown) and a via for electrically connecting the, indicated by black line ones is a wiring 8 connected to the terminal 7 via the La command L.

Next, the characteristics of the semiconductor device configured as will be described below. Terminal P 1 and the terminal P 2 is a structure as shown in FIG. 1, is connected between the pad and electrically semiconductor device 1. That is, the specific pads of the semiconductor element 1 by a bonding wire is connected to the semiconductor package body 3, further, the wiring pattern of the semiconductor body package body 3, via, to the terminal P 1 through the wiring pattern 6 a connected, the pad of the different semiconductor elements 1 and those connected to terminals P 1 and is a bonding wire is connected to the wiring pattern of the semiconductor package body 3, the terminal P 2 further through the via and the wiring pattern 6 b and it is connected to the. These terminals PI, P 2, using the wiring pattern 6 a, 6 b of the semiconductor package body 3 is connected to the conductive regions 9 provided in the central portion of the semiconductor package body 3. By connecting the terminal P 1 and the terminal P 2 through the region 9 of the conductive, when mounting the semiconductor package body 3 on the printed board 1 0, electrically connected to the lands L 1 and the run de L 2 is, the lands L 1 becomes the same potential as the land L 2. For this reason, by drawing lines 8 from the land L 2, the land L 2 which is connected to the land L 1 and the terminal P 2 that is connected to the terminal P 1 so that it can be connected with other elements Become.

This eliminates the need to connect the lands L 1 to the outside, because it is excess Hiroshi the wiring space in the region through the wiring from the land L 1, for example, it is possible to pass the wire from the land L 3.

Incidentally, when applying on the printed board 1 0 wires from the land L 1, eliminated can be applied to the printed circuit board 1 0 of the surface wiring for connecting the lands L 3 and other elements. Therefore, to form a new via the printed circuit board 1 0 internal wiring, La command L 3, via the said newly provided vias and printed board 1 0 internal wiring connected to the other element thing becomes, it becomes a cause of an increase in the manufacturing cost of the printed circuit board 1 0.

In contrast, as in the semiconductor device according to the first embodiment, the terminal 7 of the signal lifting one semiconductor package body 3 of the same potential, more be connected through a region 9 of the conductive, the same potential since the terminal PI, it is possible to electrically connect all lands corresponding to P 2, the terminal P l of the same potential and the wiring on the printed board 1 0 one at least of lands L corresponding to P 2 only, it is possible to connect the semiconductor package body 3 and other elements. This makes it possible to reduce the number of the printed board 1 0 on wire 8, thereby facilitating wiring.

As described above, in the semiconductor device according to the first embodiment, among the plurality of terminals 7 arranged on a surface, of the semiconductor package body 3 that connect the at least one terminal 7 semiconductor element 1 and electrically the central portion of the surface, the region 9 of the conductive provided, at least one terminal of the semiconductor element 1 and electrically connected to the terminals 7 (terminal P 1, P 2), in the region 9 of the conductive since electrically connected, the terminals 7 all connected to the region 9 of the conductive can be the same potential. Therefore, by mounting a semiconductor package body 3 on the printed board 1 0, when connected to other elements on the printed board 1 0, derive land L from the wire 8 on the printed circuit board 1 0, the conductive it is sufficient with at least one land corresponding to the terminal L of the terminal 7 is connected to the area 9, on which it is possible to facilitate wiring to the other elements of the printed circuit board 1 on 0, print it is possible to reduce the manufacturing cost of the substrate 1 0.

In the first embodiment, although the region 9 of the conductive provided one conductive region may provide a plurality. Fourth, as shown in FIG, two conductive areas 9 a, 9 b provided to connect the terminals P 1 and P 2 in the area 9 a conductive, a potential different from the terminals P 1 and P 2 terminals P 3 and P 4 of the may be connected to the region 9 b of the conductivity. Thus, the terminal having a plurality of potentials, by electrically connecting through a region of the conductive terminals to each other at the same potential, it is possible to further reduce the number of wiring on the printed circuit board, printed circuit board it is possible to further facilitate the wiring. Further, the first embodiment, the conductive regions 9 (9 a, 9 b) in not intended to limit the position of the terminal number Contact and terminals connected, any number of terminals 7 and any position pin it can be connected to 7 in a region 9 of the conductive. When connecting a number of terminals 7 in the region 9 of the conductive wiring area of ​​the printed board 1 0 (wiring lines) can be significantly reduced.

Further, the terminals having the same potential as the terminal P 1 and the terminal P 2, by the connected power supply terminal or connected to the ground terminal to the ground to the power supply, the number of terminals that can be connected to region 9 of the conductive it can be increased.

Further, a terminal connected to a region 9 of the conductive may be placed in a position close to a region 9 of the conductive. Accordingly, it is a child easily to connect the region 9 of the terminals 7 and conductivity.

In the second diagram, the terminal P 1 and the terminal P 2, the semiconductor package body 3 of the wiring pattern 6 a formed on the rear surface has been more electrically connected to the region 9 and the wiring pattern 6 b of the conductive the invention, terminals 7 (terminal P l, P 2) a method of connecting is not intended to limit the constant, it is possible to connect the terminal 7 by using a variety of means. For example, also be connected to terminal 7 through a wiring pattern 4 formed on the surface of the semiconductor package body 3, it can afford the wiring space of the printed circuit board 1 0 surface, to facilitate wiring to the other element be able to. In this case, the terminal 7 to connect through the wiring pattern 4, by said power supply terminal or the ground terminal, it is possible to increase the number of terminals can be connected via a wiring pattern 4. Further, the terminal 7 to be connected through the wiring pattern 4, Ri by the placing in positions close to each other, it is possible to connect the terminals 7 easily.

In the first view, but the semiconductor element 1 and the semiconductor package body 3 are connected via the bonding wires 2, the present invention is a form of connection between the semiconductor element 1 and the semiconductor package body 3 not limited, C-it can be similarly applied to a CSP semiconductor package body 3 connected by means other than Bondi Nguwaiya like.

(Embodiment 2)

A semiconductor device according to a second embodiment of the present invention, described with reference to the drawings.

Figure 5 is a semiconductor device according to the second embodiment is a view showing a state mounted on a printed circuit board. In Figure 5, components which are the same or corresponding with Figure 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

A semiconductor element 1 and the bonding wires 2, that has been sealed with resin 2 1. 2 2 is an electrode post provided inside the resin 2 1, the electrode posts 2 2, a wiring pattern 4 which is connected to a pad semiconductor element 1 via a carbon loading wire 2, the semiconductor package body 3 and the wiring pattern 2 3 provided in the sealed resin 2 1 of the upper surface are electrically coupled to.

Characteristics of the semiconductor device configured as described above will be described below.

Specific pads of the semiconductor element 1 via the wiring pattern 4 and the electrode post 2 2 is connected to the wiring pattern 2 3 provided on another surface. The wiring patterns 2 3, when connecting the semiconductor device according to the second embodiment in electrical other elements, can be used as an electrode.

As described above, in the semiconductor device according to the second embodiment, the specific pads of the semiconductor element 1, via the electrode posts 2 2, wiring patterns provided on a surface different from the surface on which the terminal 7 is located Having electrically connected to the 2 3, a semiconductor device and another device according to the second embodiment with reference to the wiring pattern 2 3 can be electrically connected. Thus, when connecting the semiconductor device and other elements, for Kunar necessary such to connect the pad semiconductor device 1 on the printed circuit board 1 0 through the terminals 7 of the semiconductor package body 3, the printed board 1 0 it is possible to reduce the number of wires 8 above, on which it is possible to facilitate the wiring on the print substrate 1 0, it is possible to reduce the manufacturing cost of the printed circuit board 1 0.

Note that to connect to the electrode post 2 2, it may also be any pads of the semiconductor element 1 Iga, may be a pad of the power supply and ground. Thus, on which can reduce the number of the printed board 1 0 on wire 8, the wiring can also be facilitated against the power supply terminal and the ground terminal.

(Embodiment 3)

A semiconductor device according to a third embodiment of the present invention, described with reference to the drawings.

Figure 6 is a rear surface of the structure of a semiconductor package body 3 of the semiconductor device according to the third embodiment, FIG. 7 is a print substrate 1 0 wiring shape for mounting a semiconductor package body 3 shown in FIG. 6 It shows a part of. The configuration of the semiconductor package body 3 is the same as that shown in FIG. 1 or FIG. 5, the illustration is omitted.

The semiconductor device according to the third embodiment, of the semiconductor package body 3 of terminals 7 arranged in a grid-like plurality of rows on the back, the number of terminals of the terminal array provided on the outer periphery, provided its inner periphery it is obtained as less than the number of terminals of the terminal array.

In Figure 6, the ones and P 5 are the indicated dispute, of the semiconductor package body 3 terminal 7 provided on the back surface, a non-connecting portion which is not connected to another device when mounted on the printed board 1 0. Note that FIG. 6, the case of providing the non-connecting portions to the outermost terminal row, unconnected portions may be provided in the innermost terminal row.

Characteristics of the semiconductor device configured as described above will be described below.

The back surface of the semiconductor package body 3, the number of terminals provided on the outermost terminal row, of which to be less than the number of terminals of the terminal array disposed in a circumferential, non-connection is provided. PCB 1 0 of mounting the semiconductor package body 3 having a non-connecting portion, since the need to portions corresponding to the non-connecting portion provided land L is eliminated, can be provided wiring 8 in that portion. As shown in FIG. 7, the printed circuit board 1 on 0, the land at a position corresponding to the non-connecting portion P 5 is provided, if provided wiring pattern connected to the land, either to the land L 4 without the L 6 or one process is not performed to draw a wiring pattern from the land because there is no room in the routable area of ​​the printed circuit board 1 on 0. However, by providing the non-connecting portion P 5, it is possible to use a position corresponding to the non-connecting portion P 5 of the printed circuit board 1 on 0 for wiring 8, the run de L 4 to the wiring from all L 6 it is possible to draw a pattern.

As described above, in the semiconductor device according to the third embodiment, the semiconductor package one di body 3 backside, by providing the non-connecting section which is not connected to another device when mounted on the printed board 1 0, printed the substrate 1 0 surface, the non-connecting portion may be provided with a wiring pattern by using the corresponding positions, the wiring can increase the number of possible land L pulled out at the surface of the printed circuit board 1 0, the printed circuit board 1 0 on that can facilitate the interconnection of the upper, it is possible to reduce the manufacturing cost of the printed circuit board 1 0.

In the FIG. 6, the number of terminals provided on the terminal row of outer circumference, such that among less than the number of terminals of the set kicked the terminal array on the periphery, the case of providing the non-connecting portion, as shown in FIG. 8, the terminal interval of terminal rows of the peripheral, it may be wider than the pin spacing terminal row provided on the inner periphery thereof.

In Figure 8, P 6, when mounted on the printed circuit board 1 0 shown in FIG. 9, the terminal, P 7 to be connected to the printed circuit board 1 0 lands L 7 is to connect to the land L 8 it is a terminal. Spacing of the terminals P 6 and P 7 are wider than the terminal spacing within the pin row from the terminal P 6 and P 7. Note that FIG. 8, the terminal spacing of the outermost terminal row, the case was wider than the terminal spacing the inner periphery of the terminal row, the intervals between terminals of the innermost pin rows, the outer periphery thereof of it may be wider than the terminal interval of terminal rows.

As the terminals P 6 and P 7, by arranging the terminal to wider than the distance between the inner periphery of the pin spacing of the outermost terminals, as shown in FIG. 9, the printed circuit board 1 0 on land it is possible to widen the spacing L, than between the land L 7 and L 8, it is possible to draw the wiring from the wiring and the lands L 1 0 from the land L 9. Thus, by Rukoto to place the terminal to wider than the distance between the inner periphery of the pin spacing of the outermost terminals, from between the lands L corresponding to the outermost terminals, bring out a number of wires 8 it since it is possible, it is possible to increase the number of possible land L pull the wire 8 on the surface of the printed circuit board 1 0, on the wiring of the printed circuit board 1 on 0 can be facilitated, the printed circuit board Ru can be reduced 1 0 cost of production.

(Embodiment 4)

A semiconductor device according to a fourth embodiment of the present invention, described with reference to the drawings.

The semiconductor device according to the fourth embodiment, at least one side of the semiconductor package body 3 is obtained by so as not to provide a wiring pattern 4 and the terminal 7. The first 0 illustration of a semiconductor package body 3, shows the configuration of the mounting surface of the semiconductor element 1, the first 1 figure wiring of the printed board 1 0 of mounting the semiconductor package body 3 shown in the first 0 Figure It shows a part of the shape.

In the first 0 Figure 3 1 is formed along two sides of the semiconductor element 1, a pad for electrically connecting the semi conductor device and an external device, each pad 3 1, It is connected to the wiring pattern 4 through the bonding wires 2, respectively. Each wiring pattern 4 is connected the rear surface of the terminal 7 of the semiconductor package body 3 (not shown) in one-to-one.

Further, the wiring pattern 4 is formed Te 沿Tsu in mutually parallel two sides of the semiconductor package body 3. As the first 0 diagram, when the sides of the semiconductor package body 3 and a clock times Rinihen 3 2 sides 35, a plurality of wiring patterns made of the fourth wiring pattern group 4 a, along the sides 3 2 formed Te, a plurality of wiring paths evening over emissions group 4 b consisting of the wiring pattern in the same manner is formed along the side 3 4, the remaining two sides, the sides 3 3 and sides 35, the wiring pattern 4 not formed.

Characteristics of the semiconductor device configured as described above will be described below.

The semiconductor element 1 is the pad 3 1 is formed for the two sides, two sides of the semiconductor package body 3 corresponding to the two sides of the pad 3 1 is formed, i.e. along the sides 3 2 and 3 4 Te, wiring patterns 4 connected to the semiconductor package body 3 the rear surface of the terminal one to one are formed. Yotsute thereto, the semiconductor package body 3 back side, and thus have two sides that do not exist in the pin, i.e. the sides 3 3 and 3 5. In the printed circuit board 1 0 implementing such semiconductors package body 3, the semiconductor package one di- body 3 sides 3 and second wiring patterns are formed along the groups 4 a and edges 3 4 wiring formed along the only at positions corresponding to the pattern group 4 b may be formed lands L, along with this, occurs region lands L are not formed. Accordingly, as shown in the first FIG. 1, pull out the wire with a non-existent area of ​​the land L, it is possible to connect the land L to the other element.

As described above, in the semiconductor device according to the fourth embodiment, at least one side of the semiconductor package one di- body 3, since the wiring pattern 4 and the terminal 7 were due not provided Unishi, printed circuit board 1 for mounting a semiconductor device 0, can be provided nonexistent area of ​​the land L, the lands L nonexistent with area since it is the this performing wiring, land can be pulled out wires on the surface of the printed circuit board 1 0 L the number can be increased, and it becomes easy wiring.

In the first 0 views, it showed that the formation of the wiring patterns 4 along two sides of the semiconductor package body 3, arranged Oite, the 該辺 at least one side of the semiconductor package body 3 also be the number of terminals is equal to or less than half the number of terminals disposed on the other side, it is possible to increase the number of possible land L pull the wire on the surface of the printed circuit board 1 0, the printed board 1 0 above the wiring on the as possible out to facilitate, it is possible to reduce the manufacturing cost of the printed circuit board 1 0.

(Embodiment 5)

A semiconductor device according to a fifth embodiment of the present invention, described with reference to the drawings.

The first 2 figures a semiconductor device according to the fifth embodiment, a diagram showing an implementation the state on a printed circuit board. In the first 2 diagram in Figure 1 and the same or corresponding components are denoted by the same reference numerals, and detailed description thereof will be omitted.

The semiconductor device according to the fifth embodiment, the terminal 7 on the surface are arranged in a grid pattern of multiple rows, and the particular pads of the semiconductor element 1 at least one of the terminals P 9 is a bonding wire 2 out of the terminal comprising a semiconductor package body 3 connected, the terminals P 8 not connected to the semiconductor element 1 of the plurality pieces arranged terminals, distributed and to the terminal P 9 connected to the semiconductor element 1 arranged one in which the.

Terminals P 8 not connected to the semiconductor element 1 can a child dispersedly arranged at any position. For example, the terminal P 8 in the innermost terminal row or the outermost terminal row may be arranged to be distributed, in the case of arranging the terminals P 8 to the innermost circumference, connect the teeth to the semiconductor element 1 and for the terminal P 9 are, an example of the arrangement of the terminals P 8, shown in the first 3 FIG. The first 3 figure shows the configuration of a back surface of the semiconductor package body 3, the innermost of the terminal row, a plurality of terminals P 8 adjacent to each other, and terminals P 9, are arranged alternately. In this case, the terminal number nl of terminals P 8 not connected to the semiconductor element 1 and 5 or more, and this is 25% or more terminal number ml of terminals of the terminal number n 1 to connect to each other among the terminals P 8 desirable.

The terminal arranging distributed to the terminal P 9 as terminal P 8 may be a terminal that does not perform an external electrical connection of the terminals disposed on the semiconductor package body 3 may be a terminal including a terminal that is not connected to the terminal P 8 to the external, may be a ground terminal connected to the power source and connected to the power supply terminal and ground, said power supply terminal and the terminal P 8 it may be a terminal including said ground terminal.

Backside semiconductor package body 3 is configured as shown in the first FIG. 3, for example, can be mounted on the printed board 1 0 having the configuration shown in the first 4 FIG. Oite the first 4 figures, those shown in 〇, land line 8 is pulled out, 4 1, the semiconductor element 1 and electrically unconnected lands corresponding to terminals P 8, 4 2 is of the lands corresponding to terminals P 9 connected semiconductor element 1 and electrically, a land that can not bring out the wire.

Characteristics of the semiconductor device configured as described above will be described below. As shown in the first 4 figures, the printed circuit board 1 0 that implements constituted semiconductor package body 3 as in the first 3 diagram, land 4 1 is formed at a portion where the terminal P 8 is connected, the terminal P 9 is a portion connected, lands and lands 4 2 wiring 8 is drawn out is formed. Land 4 2, because they are electrically connected to the semiconductor element 1 through the terminal P 9, is a land that must be connected to other elements, to interconnect available space print substrate 1 0 surface since there is no margin, it can not be connected to another element by using the wiring 8. To connect the lands 4 2 with other elements, the printed circuit boards 1 0, must be provided a wiring drawn out from the vias and the via. Here, consider the case of arranging distributed terminals P 8 not connected to the semiconductor element 1, the difference between when you disposed adjacent all of the terminals P 8.

The first 5 figure is an example of a configuration of a printed board for mounting a semiconductor package body 3 disposed adjacent all terminals P 8. In the first 5 diagrams, the one shown in 〇, land line 8 is pulled out, 4 3, the semiconductor element 1 and electrically unconnected lands corresponding to terminals P 8 ', 4 4, of the lands corresponding to terminals P 9 'which is connected the semiconductor element 1 and electrically, can not and this withdraw wiring on a printed board, provided with a wire drawing out from the vias and vias connected to the other element it is a land that need to be.

As in the first 5 diagram, the case of arranging for one six lands 4 1 and all are adjacent corresponding to the terminal P 8 'is not connected to the semiconductor element 1, printed circuit boards for connection to other elements land 4 4 that must be provided via the above becomes 1 0. In contrast, as in the first 4 view and the lands 4 1 was dispersed in 1 6 for a pin P 8 not connected to the semiconductor element 1 (the same number as those shown in the first 5 Figure) when placed, the land 4 2 that must be provided via is eight. That is, by arranging the dispersed lands 4 1 corresponding to the terminals P 8 and terminals P 8 not electrically connected to the semiconductor element 1, the wiring available space of the printed circuit board on a 0 to be used efficiently since so it cuts with, as possible out to increase the number of possible land pull the wires 8.

As described above, in the semiconductor device according to the fifth embodiment, in the semiconductor package one di disposed on the surface of the body 3 ^ number of terminals, the terminals P 8 not connected to the semiconductor element 1, a semiconductor element than was dispersed by arranging to the terminal P 9 connected to 1, the wiring available space of the printed circuit board 1 0 of mounting the semiconductor package body 3 can be commonly used efficiency, the printed circuit board 1 0 on that can be easily the wiring above, it is possible to reduce the manufacturing cost of the printed circuit board 1 0. Industrial Applicability

The semiconductor device of the present invention, when mounted on the printed circuit board, it is possible to perform the wiring order to connect with other devices efficient, or terminals of the semiconductor device can be more Stringified is walking number of terminals , even when the size of the accompanying terminal pitch of the semiconductor device, can be applied easily interconnect with print on the substrate; useful.

Claims

The scope of the claims
1. And the semiconductor element,
At least one terminal of the arranged plurality of terminals on a surface thereof is connected the the semiconductor element and electrically, comprising: a semiconductor package one di- having a conductive region in the central portion of the force ^ one surface and,
Wherein at least one of the terminals of the semiconductor element electrically connected to the terminal, electrically connected to the region before Kishirube conductive,
Wherein a.
2. The semiconductor device according to claim 1,
The terminal connecting the conductive regions and electrically and arranged in a position adjacent to the conductive region,
Wherein a.
3. The semiconductor device according to paragraph 2 range range of paragraph 1, wherein the billing, the terminal connected said conductive region and electrically, connected to the power supply or ground of the semiconductor element,
Wherein a.
4. and the semiconductor element,
A semiconductor package at least two terminals are electrically connected to the semiconductor device of the arranged plurality of terminals on a surface, comprising a,
Among the semiconductor elements and electrically connected to the terminal, the two or more terminals of the same potential, and electrically connected at the outside of said semiconductor device,
Wherein a.
5. The semiconductor device according to claim 4,
The terminal which is electrically connected at the outside of the semiconductor device was placed in position adjacent to each other,
Wherein a.
6. The semiconductor device according to item 4 or Claim 5 claims a terminal electrically connected with the outside of the semiconductor element was connected to the power supply or ground of the semiconductor element,
Wherein a.
7. And the semiconductor element,
At least two terminals among the plurality of terminals disposed on the surface of the are semiconductor elements electrically connected, and a semiconductor package one di- having regions of conductivity in the central portion of the Chikaratsu surface,
Among the semiconductor elements and electrically connected to the terminal, and wherein the distribution of the location are two or more terminals of the same potential are, electrically connected to the conductive regions, that a position not adjacent to one another semiconductor device.
8. The semiconductor device according to claim 7,
The terminal connecting the conductive regions and electrically and arranged in a position adjacent to the conductive region,
Wherein a.
9. The semiconductor device according to claim Paragraph 8 range paragraph 7 or claim claims a terminal connected said conductive region and electrically, connected to the power supply or ground of the semiconductor element,
Wherein a.
And 1 0. Semiconductor element,
At least two terminals among the arranged plurality of terminals on a surface thereof is connected the the semiconductor element and electrically, and the central portion of the surface, at least two, the conductive region not electrically connected to each other and a semiconductor package having,
A semiconductor device, comprising the.
The semiconductor device according to 1 1. The first 0 wherein claims,
Wherein each of the at least two conductive regions, and electrically connect one or more terminals, wherein is semiconductor element and electrically connected,
Wherein a.
The semiconductor device according to 1 2. The first 1 wherein the claims,
Wherein each conductive region and the terminal for electrically connecting and disposed adjacent to the region of the conductivity the terminal is connected, wherein a.
1 3. There Contact in a semiconductor device according to the first two terms scope first 1 wherein, wherein the billing,
Terminals for connecting the in region electrically of each conductive and connected to the power supply or ground of the semiconductor element,
Wherein a.
1 and 4. The semiconductor element,
Surface terminals are arranged in a plurality of rows lattice form, at least one terminal connected said to semiconductor elements electrically, and different surface from that of the terminals are arranged face of said terminal, said semiconductor element and the electrical a semiconductor package in which at least one different surface terminals are arranged connected in manner,
The semiconductor device according to JP al further comprising a.
The semiconductor device according to 1 5. The first four terms claims,
Wherein the different plane terminal was connected to the power supply or Darando of the semiconductor device, it wherein a.
And one 6. Semiconductor element,
Surface terminals are arranged in a plurality of rows lattice shape, and a semiconductor package at least one terminal connected said to semiconductor device electrically out of the terminal,
Wherein at least one side of the semiconductor package, the number of terminals of the terminal array provided on the outer periphery is smaller than the number of terminals of the terminal array disposed on the inner periphery thereof,
Wherein a.
And 1 7. Semiconductor element,
Surface terminals are arranged in a plurality of rows lattice shape, and a semiconductor package at least one terminal connected said to semiconductor device electrically out of the terminal,
Wherein at least one side of the semiconductor package, terminals interval terminal row provided on the outer periphery is wider than the pin spacing terminal row provided on the inner periphery thereof,
Wherein a.
And 1 8. Semiconductor element,
Surface terminals are arranged in a plurality of rows lattice shape, and a semiconductor package at least one terminal connected said to semiconductor device electrically out of the terminal, at least one side of said semiconductor package, provided on the inner peripheral terminal interval of obtained terminal row is wider than the pin spacing of the terminal arrays provided on the outer periphery thereof,
Wherein a.
And 1 9. Semiconductor element,
Surface, each side except for at least one side, terminals are arranged in a plurality of rows grid pattern, with a, a semiconductor package at least one terminal connected said to semiconductor device electrically out of the terminal,
Wherein a.
The semiconductor device according to 2 0. The first 9 wherein the claims,
Only two opposed sides of said semiconductor package, were placed terminals,
Wherein a.
And 2 1. Semiconductor element,
Surface terminals are arranged in a plurality of rows lattice shape, and a semiconductor package at least one terminal connected said to semiconductor device electrically out of the terminal,
Wherein at least the number of terminals of one side of the semiconductor package is less than half the number of terminals disposed on the other sides,
Wherein a.
2 2. At least one of the sides, and the semiconductor elements have Na comprises a pad for electrically connected to the outside,
Surface terminals are arranged in a plurality of rows lattice form, Bei example and a semiconductor package at least one terminal is said pad electrically connected to said semiconductor element of said terminal,
Wherein the number of terminals disposed on the sides of the semiconductor package to correspond to the sides is not provided pads of the semiconductor device is less than half the number of terminals disposed on the other sides,
Wherein a.
And 2 3. Semiconductor element,
Surface terminals are arranged in a plurality of rows lattice form, that can be routed in the printed circuit board at least one terminal is said includes a semiconductor element and electrically connected to the semiconductor package was mounted the semiconductor device of said terminal in order to increase the number of terminals, said first non-connecting terminal not connected to the semiconductor element or the second non-connecting terminal that does not perform an external electrical connection, among the plurality of terminals, or the semiconductor, the third non-connection terminal of the more the terminal does not perform the unconnected pin and the external electrical connection with the body element, distributed and arranged with respect to said semiconductor device and electrically connected to the terminal, the printed provided routable region in the substrate,
Wherein a.
2 4. The semiconductor device according to a second three-term claims,
Wherein a first non-connecting terminal or the second non-connecting terminal or the third unconnected pin, and a ground terminal connected to the connected power supply terminal and the ground to the power supply, the semiconductor element and the electrical of the connected terminal, the dispersion was placed against the power supply terminal and the ground terminal other than the terminal,
Wherein a.
The semiconductor device according to 2 5. The second three-term claims,
Said first non-connecting terminal or the second non-connecting terminal or the third unconnected pin, arranged dispersed in the outermost terminal row,
Wherein a.
In semiconductors according to any one of 2 6. Claims second item 3 to claims second 5 wherein,
The terminal number n 1 of the first non-connecting terminal or the second non-connecting terminal or the third unconnected end element is 5 or more, and the first non-connecting terminal or the second non-connected terminal number m 1 adjacent to each other among the terminals or the third non-connection terminals are arranged such that 25% or more of the terminal number n 1,
Wherein a.
And 2 7. Semiconductor element,
Surface terminals are arranged in a plurality of rows lattice shape, and a semiconductor package at least one terminal connected said to semiconductor device electrically out of the terminal,
In order to increase the number of possible wiring terminals on the printed board mounted with the semiconductor device, among the plurality of terminals, the ground terminal connected to the power supply terminal and a ground connected to the power source, and the semiconductor element electrically connected distributed disposed with respect to the power supply terminal and terminals other than the ground terminal of the terminal, provided routable area in the printed circuit board,
Wherein a.
\
\
PCT/JP2003/009729 2003-07-31 2003-07-31 Semiconductor device WO2005013359A1 (en)

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