WO2005006156A3 - Integrated circuit comprising an ordinary module and a secured module that are connected via a protected line - Google Patents

Integrated circuit comprising an ordinary module and a secured module that are connected via a protected line Download PDF

Info

Publication number
WO2005006156A3
WO2005006156A3 PCT/FR2004/001775 FR2004001775W WO2005006156A3 WO 2005006156 A3 WO2005006156 A3 WO 2005006156A3 FR 2004001775 W FR2004001775 W FR 2004001775W WO 2005006156 A3 WO2005006156 A3 WO 2005006156A3
Authority
WO
WIPO (PCT)
Prior art keywords
module
secured
connected via
ordinary
integrated circuit
Prior art date
Application number
PCT/FR2004/001775
Other languages
French (fr)
Other versions
WO2005006156A2 (en
Inventor
Arnaud Dehamel
Bruno Bernard
Frank Lhermet
Original Assignee
Innova Card
Arnaud Dehamel
Bruno Bernard
Frank Lhermet
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR03/08371 priority Critical
Priority to FR0308371A priority patent/FR2857534B1/en
Application filed by Innova Card, Arnaud Dehamel, Bruno Bernard, Frank Lhermet filed Critical Innova Card
Publication of WO2005006156A2 publication Critical patent/WO2005006156A2/en
Publication of WO2005006156A3 publication Critical patent/WO2005006156A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/82Protecting input, output or interconnection devices
    • G06F21/85Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices

Abstract

The invention relates to an integrated circuit comprising an ordinary module ORD and a secured module SEC that are connected via an interconnection link, said secured module SEC comprising at least one master element MS1, MS2 and at least one slave element SS1, SS2, SS3 that are connected via a secured bus SBUS. In addition, this interconnection link incorporates a protection module PROT that is connected to an ordinary module ORD and to the secured bus SBUS.
PCT/FR2004/001775 2003-07-09 2004-07-08 Integrated circuit comprising an ordinary module and a secured module that are connected via a protected line WO2005006156A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR03/08371 2003-07-09
FR0308371A FR2857534B1 (en) 2003-07-09 2003-07-09 Integrated circuit comprising a standard module and a secure module connected by a protected link

Publications (2)

Publication Number Publication Date
WO2005006156A2 WO2005006156A2 (en) 2005-01-20
WO2005006156A3 true WO2005006156A3 (en) 2005-06-30

Family

ID=33522879

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2004/001775 WO2005006156A2 (en) 2003-07-09 2004-07-08 Integrated circuit comprising an ordinary module and a secured module that are connected via a protected line

Country Status (2)

Country Link
FR (1) FR2857534B1 (en)
WO (1) WO2005006156A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2902213B1 (en) 2006-06-08 2008-10-17 Thomson Licensing Sas Electronic card endowed with safety features
CN104317752B (en) * 2014-11-21 2015-08-12 中国人民解放军国防科学技术大学 A passageway scalable high-speed synchronous acquisition trigger condition recording system

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5828753A (en) * 1996-10-25 1998-10-27 Intel Corporation Circuit and method for ensuring interconnect security within a multi-chip integrated circuit package
US5933854A (en) * 1995-05-31 1999-08-03 Mitsubishi Denki Kabushiki Kaisha Data security system for transmitting and receiving data between a memory card and a computer using a public key cryptosystem
EP1030237A1 (en) * 1999-02-15 2000-08-23 Hewlett-Packard Company Trusted hardware device in a computer
US20020169968A1 (en) * 1999-12-02 2002-11-14 Berndt Gammel Microprocessor configuration with encryption
US20030005313A1 (en) * 2000-01-18 2003-01-02 Berndt Gammel Microprocessor configuration with encryption
US6523118B1 (en) * 1998-06-29 2003-02-18 Koninklijke Philips Electronics N.V. Secure cache for instruction and data protection
US20030048900A1 (en) * 2001-08-30 2003-03-13 Samsung Electronics Co., Ltd. Semiconductor integrated circuit having encrypter/decrypter function for protecting input/output data transmitted on internal bus

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5933854A (en) * 1995-05-31 1999-08-03 Mitsubishi Denki Kabushiki Kaisha Data security system for transmitting and receiving data between a memory card and a computer using a public key cryptosystem
US5828753A (en) * 1996-10-25 1998-10-27 Intel Corporation Circuit and method for ensuring interconnect security within a multi-chip integrated circuit package
US6523118B1 (en) * 1998-06-29 2003-02-18 Koninklijke Philips Electronics N.V. Secure cache for instruction and data protection
EP1030237A1 (en) * 1999-02-15 2000-08-23 Hewlett-Packard Company Trusted hardware device in a computer
US20020169968A1 (en) * 1999-12-02 2002-11-14 Berndt Gammel Microprocessor configuration with encryption
US20030005313A1 (en) * 2000-01-18 2003-01-02 Berndt Gammel Microprocessor configuration with encryption
US20030048900A1 (en) * 2001-08-30 2003-03-13 Samsung Electronics Co., Ltd. Semiconductor integrated circuit having encrypter/decrypter function for protecting input/output data transmitted on internal bus

Also Published As

Publication number Publication date
FR2857534A1 (en) 2005-01-14
FR2857534B1 (en) 2005-10-28
WO2005006156A2 (en) 2005-01-20

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