WO2004109756A2 - Method and system for using ion implantation for treating a low-k dielectric film - Google Patents

Method and system for using ion implantation for treating a low-k dielectric film Download PDF

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WO2004109756A2
WO2004109756A2 PCT/US2004/015577 US2004015577W WO2004109756A2 WO 2004109756 A2 WO2004109756 A2 WO 2004109756A2 US 2004015577 W US2004015577 W US 2004015577W WO 2004109756 A2 WO2004109756 A2 WO 2004109756A2
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low
film
dielectric film
forming
dielectric
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WO2004109756A3 (en
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Kenneth Duerksen
David A. Vidusek
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/40—Ion implantation into wafers, substrates or parts of devices into insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/08—Planarisation of organic insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6342—Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6536—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
    • H10P14/6539—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light by exposure to corpuscular radiation, e.g. exposure to electrons, alpha-particles, protons or ions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/665—Porous materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6684—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H10P14/6686—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
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    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H10P14/6925—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising hydrogen silsesquioxane, e.g. HSQ
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H10P14/6926—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ

Definitions

  • the present invention relates to a method and system for treating a low-k dielectric film, and, more particularly, to a method and system for using ion implantation to treat a low-k dielectric film.
  • interconnect delay is a major limiting factor in the drive to improve the speed and performance of integrated circuits (lC).
  • One way to minimize interconnect delay is to reduce interconnect capacitance by using low dielectric constant (low-k) materials during production of the IC.
  • low-k materials have been developed to replace relatively high dielectric constant insulating materials, such as silicon dioxide, utilized for inter-level and intra-level dielectric layers between metal layers of semiconductor devices.
  • Such low-k materials can be deposited by a spin-on dielectric (SOD) method similar to the application of photo-resist, or by chemical vapor deposition (CVD).
  • SOD spin-on dielectric
  • CVD chemical vapor deposition
  • One aspect of the present invention is to reduce or eliminate any or all of the above-described problems.
  • Another object of the present invention is to increase the mechanical stability of a low-k dielectric film.
  • Yet another object of the present invention is to increase the mechanical stability of a low-k dielectric film while achieving a dielectric constant substantially equivalent to or less than the original dielectric constant of the film.
  • Another object of the present invention is to reduce a dielectric constant of a low-k dielectric film.
  • a low- k dielectric film as well as a system and method for forming the low-k dielectric film.
  • the inventive method of producing a low-k dielectric film on a substrate includes forming the low-k dielectric film on the substrate, and performing an ion implantation process on a surface of the low-k dielectric film in order to create a hardened surface layer on the low-k dielectric film.
  • the low-k dielectric film has a nominal dielectric constant less than a dielectric constant of SiO 2 . Additionally, the ion implantation process maintains substantially the same dielectric constant or less than the nominal dielectric constant of the low-k dielectric film.
  • the inventive hardened low-k dielectric film includes a low-k dielectric film having a nominal dielectric constant less than the dielectric constant of SiO 2 , and a hardened surface layer on the low-k dielectric film.
  • the hardened surface layer is formed by subjecting a surface of the low-k dielectric film to an ion implantation process. Additionally, the low-k dielectric layer with the hardened surface layer maintains substantially the same dielectric constant or less than the nominal dielectric constant of the low-k dielectric film without the hardened surface layer.
  • the inventive processing system for producing a hardened low-k dielectric film includes a film forming system configured to form the low-k dielectric film on a substrate, and an ion implant system coupled to the film forming system and configured to treat the low-k dielectric film in order to form a hardened surface layer in the low-k dielectric film.
  • a controller is coupled to the film forming system and the ion implant system and configured to control a process for forming the low-k dielectric film and treating the low-k dielectric film using ion implantation.
  • the inventive method of producing the low-k dielectric film on a substrate comprises: forming the low-k dielectric film on the substrate, the low-k dielectric film having a nominal dielectric constant less than a dielectric constant of SiO 2 ; and performing an ion implantation process on the low-k dielectric film in order to produce a treated low-k dielectric film having a dielectric constant less than the nominal dielectric constant.
  • the inventive treated low-k dielectric film includes a low-k dielectric film comprising inert ions, wherein the inert ions are implanted by subjecting the low-k dielectric film to an ion implantation process.
  • the inventive processing system for producing a treated low-k dielectric film includes a film forming system configured to form the low-k dielectric film on a substrate, and an ion implant system coupled to the film forming system and configured to treat the low-k dielectric film in order to reduce a dielectric constant of the low-k dielectric film.
  • a controller is coupled to the film forming system and the ion implant system and configured to control a process for forming the low-k dielectric film and treating the low-k dielectric film using ion implantation.
  • Figures 1 A through 1 D present a simplified schematic representation of a method of forming and treating a low-k dielectric film in accordance with an embodiment of the present invention
  • Figure 2 presents a method of producing a low-k dielectric film according to an embodiment of the present invention
  • Figure 3 presents an exemplary method of forming a low-k dielectric film on a substrate in accordance with an embodiment of the present invention
  • Figure 4 presents a processing system for producing a low-k dielectric film according to another embodiment of the present invention.
  • Figures 5A and 5B show scanning electron microscope (SEM) views of a JSR low-k dielectric film ion implanted with a dose of 5 15 at 20KEV Argon ions, according to an embodiment of the present invention
  • Figure 6 shows an SEM view of a JSR low-k dielectric film without implantation, for comparison with Figures 5A and 5B;
  • FIGS. 7A and 7B show SEM views of a Silk D low-k dielectric film ion implanted with a dose of 5 15 at 20KEV Argon ions, according to an embodiment of the present invention
  • Figures 8A and 8B show an SEM view of a Silk D dielectric film without implantation, for comparison with Figures 7A and 7B;
  • Figure 9 presents hardness data for a Silk dielectric film and a JSR dielectric film with and without treatment.
  • Figure 10 presents a computer system upon which an embodiment of the present invention can be implemented.
  • Figures 1A through 1 D present a schematic representation of a method of forming a low-k dielectric film and treating the film to improve the mechanical strength of the film, according to an embodiment of the present invention.
  • a low-k dielectric film 20 is formed on an upper surface of a substrate 10 that may or may not include additional layers.
  • the substrate 10 may be a semiconductor, a metallic conductor, or any other substrate to which the low-k film is to be formed upon.
  • the low-k dielectric film has a nominal dielectric constant value less than the dielectric constant of SiO 2 , which is approximately 4 (e.g., the dielectric constant for thermal silicon dioxide can range from 3.8 to 3.9). More specifically, the low-k dielectric film 20 may have a dielectric constant of less than 3.0, or a dielectric constant ranging from 1.6 to 2.7.
  • the low-k dielectric film 20 may include at least one of an organic, inorganic, and inorganic-organic hybrid material. Additionally, the low-k dielectric film 20 may be porous or non-porous.
  • the low-k dielectric film may include an inorganic, silicate-based material, such as oxidized organosilane (or organo siloxane), deposited using CVD techniques. Examples of such films include Black DiamondTM CVD organosilicate glass (OSG) films commercially available from Applied Materials, Inc., or CoralTM CVD films commercially available from Novellus Systems.
  • OSG Black DiamondTM CVD organosilicate glass
  • the low-k dielectric film 20 may include an inorganic, silicate-based material, such as hydrogen silsesquioxane (HSQ) or methyl silsesquioxane (MSQ), deposited using SOD techniques.
  • HSQ hydrogen silsesquioxane
  • MSQ methyl silsesquioxane
  • examples of such films include FOx HSQ commercially available from Dow Corning, XLK porous HSQ commercially available from Dow Corning, and JSR LKD-5109 commercially available from JSR Microelectronics.
  • the low-k dielectric film 20 can comprise an organic material deposited using SOD techniques.
  • the film 20 is treated by exposure to an ion implantation process 25, wherein the upper surface of the low-k dielectric film is subjected to ion bombardment as shown in Figure 1C.
  • Ions used for the implantation process are preferably selected such that the implantation process does not cause a substantial increase in the nominal dielectric constant value of the low-k dielectric film 20.
  • inert ions such as an ionized Noble gas (e.g.
  • argon may be used in the implantation process to minimize chemical bonding of the ion to the film 20.
  • any ion that does not cause a substantial increase in the dielectric constant of the low-k dielectric film 20 may be used.
  • the term "substantial increase” means an increase that results in the dielectric constant of the film being permanently higher than a dielectric constant of 4.0 or preferably 3.5.
  • subjecting the low-k dielectric film 20 to ion implantation forms a "crust", or hardened layer 30, on the upper surface of the film 20 due to the ions locally imparting energy to the low-k dielectric film. Inert ions may or may not reside as part of the hardened layer.
  • this hardened surface 30 increases the overall mechanical strength of the low-k dielectric film 20.
  • the hardened surface 30 reduces the likelihood that the low-k film 20 will be damaged during further processing of the substrate and film.
  • the mechanically strengthened film will still provide enhanced performance characteristics for ICs and other devices in which the film is used.
  • the present inventors have also discovered that the ion implantation process of Figure 1C may result in the low-k film 20 of Figure 1 D having a reduced dielectric constant.
  • the ion implantation process for forming a reduced dielectric constant low-k film may or may not cause the formation of a hardened surface layer useful for improving mechanical strength, as will be described below.
  • Ions used for the implantation process are preferably inert ions such as the ionized Nobel gas (e.g. Argon) noted above with respect to the increased mechanical strength feature. However, it is sufficient that the ions are selected such that the implantation process causes a reduction in the nominal dielectric constant value of the low-k dielectric film 20.
  • FIG. 2 is a flow chart 100 illustrating a method of producing a low-k dielectric film in order to increase the mechanical strength of the film, in accordance with an embodiment of the present invention.
  • flow chart 100 begins with forming the low-k dielectric film on a substrate as shown by step 110.
  • the low-k dielectric film has a nominal dielectric constant, and may include organic, inorganic, and inorganic-organic hybrid materials.
  • the low-k dielectric film can be formed using CVD techniques, or SOD techniques such as those offered in the Clean Track ACT 8 SOD and ACT 12 SOD coating systems commercially available from Tokyo Electron Limited (TEL).
  • the Clean Track ACT 8 (200 mm) and ACT 12 (300 mm) coating systems provide coat, bake, and cure tools for SOD materials.
  • Other systems and methods for forming a low-k dielectric film on a substrate are well known to those skilled in the art of both spin-on dielectric technology and CVD dielectric technology.
  • the low-k dielectric film 20 on substrate 10 is subjected to ion implantation in order to perform at least one of forming the hardened surface layer 30, or treating substantially the entire low-k dielectric film 20 to decrease the overall value of the dielectric constant, as shown by step 120.
  • the ion implantation may be performed in a commercially available ion implant tool, such as an Axcelis GSD 200, GSD 200 HE, GSD 200 EE, HC3, GSD lll/LED, MC3, and HE3, offered by Axcelis Technologies, Inc.; a Varian ES00, Varian VllSta 80, VllSta 810 HP, VllSta 3000, and a Varian VllSion, offered by Varian Semiconductor Equipment Associates; or an AMAT xR120, offered by Applied Materials, Inc.
  • a commercially available ion implant tool such as an Axcelis GSD 200, GSD 200 HE, GSD 200 EE, HC3, GSD lll/LED, MC3, and HE3, offered by Axcelis Technologies, Inc.; a Varian ES00, Varian VllSta 80, VllSta 810 HP, VllSta 3000, and a Varian VllSion
  • the ion used in the implantation process is preferably an inert ion, which either minimizes or reduces changes in the dielectric properties of the low-k dielectric film when forming a hardened surface layer, or reduces the dielectric constant of the low-k dielectric film when treating the film.
  • the ion implantation process is preferably performed at relatively low energy and high flux to minimize the change in dielectric constant of the film 20, or reduce the dielectric constant of the film 20.
  • the ion beam energy may, for example, range from 0.2 to 200 keV or 5 to 50 keV, and preferably ranges from 10 to 20 keV.
  • the ion beam dose may range from 5x10 12 to 1x10 16 atoms/cm 2 or .5x10 15 to 1 x10 16 atoms/cm 2 , and preferably ranges from 1x10 15 to 1 x10 16 atoms/cm 2 .
  • any energy and dose that does not cause a permanent and substantial increase in the dielectric constant of the low-k dielectric film 20 may be used in accordance with the present invention.
  • Implantation process parameters other than ion type, energy and dose may also vary as long as such variance does not cause a permanent and substantial increase in the dielectric constant of the low-k dielectric film 20.
  • the ion implantation process is preferably performed with inert ions at a relatively high energy and low flux to implant the inert ions deep into the low-k film 20.
  • the ion beam energy may, for example, range from 0.2 to 200 keV, and is preferably greater than 50 keV, and more preferably greater than 100 50 keV.
  • the ion beam dose may range from 5x10 12 to 1x10 16 atoms/cm 2 , and more preferably ranges from 5x10 12 to 1 x10 15 atoms/cm 2 .
  • any energy and dose that causes a decrease in the dielectric constant of the low-k dielectric film 20 may be used in accordance with the present invention.
  • Implantation process parameters other than ion type, energy and dose may also vary as long as such variance does not destroy the effect of decreasing the dielectric constant of the low-k film 20.
  • the present inventors have recognized that providing ion implantation within the beam energy range of 0.2 to 200 keV and the ion beam dose range of 5x10 12 to 1x10 16 atoms/cm 2 forms a hardened surface layer of the low-k film and can actually reduce the dielectric constant of the low-k dielectric film. That is, hardening of the surface layer and reducing the dielectric constant are not mutually exclusive to the ion implantation process of the present invention.
  • the present inventors have realized that within the beam energy range of 0.2 to 200 keV and the ion beam dose range of 5x10 12 to 1x10 16 atoms/cm 2 , as the beam energy is decreased and the beam dose is increased, the formation of a hardened surface layer is enhanced and the reduction of the low-k dielectric constant is not enhanced. Conversely, within this same range, as the beam energy is increased, and the beam dose is decreased, the reduction of the low-k dielectric constant is enhanced and the formation of the hardened surface layer is not enhanced.
  • the process parameters of a single ion implantation process step can be chosen to provide a desired level of surface hardening and reduced dielectric constant of the low-k film.
  • processes performed at extreme endpoints of the ranges may result in a hardening or reduced dielectric feature that is not practically useful.
  • a single ion implantation step is undesirable, and the low-k dielectric film may be treated with an ion implantation process having two or more steps each having parameters ideal for enhancing a desired characteristic.
  • the precise parameters of the ion implantation process will depend on the desired characteristics of the low-k film and are readily determinable by one of ordinary skill in the art having the benefit of the inventor's realization of how the process parameters affect the surface hardening and dielectric constant features, and the preferred parameter ranges for each feature described above.
  • FIG. 3 shows an example of an SOD process 300 that may be used to perform the forming step 110 of Figure 2.
  • the process begins in step 310 with the application of an adhesion promoter to the substrate 10, if necessary. For instance, when forming a SiLK-based low-k dielectric film, an adhesion promoter is recommended.
  • the substrate is baked at 150 to 300C, if an adhesion promoter is applied.
  • step 330 once the adhesion promoter is applied and baked, the substrate 10 is spin coated with the low-k dielectric film 20.
  • step 340 the low-k dielectric film 20 is baked at a temperature of 150 to 300C, and, in step 350, the low-k dielectric film is cured at 400 to 450C in a furnace or a hot-plate bake tool.
  • the ion implantation process is performed following the cure step 350. In an alternate embodiment, the ion implantation process is performed prior to the cure step 350.
  • FIG. 4 is a block diagram of a processing system for producing a low- k dielectric film in order to treat the film.
  • the processing system 1 includes a film forming system 210 and an ion implant system 220 coupled to the film forming system 210.
  • a controller 230 is coupled to the film forming system 210 and the ion implant system 220 to exchange data and information with these systems, as well as control the operation of each system according to a process recipe.
  • the film forming system 210 and the ion implant system 220 may be directly coupled to one another, or each system can constitute a process module appended from a cluster tool substrate transfer configuration or a serial tool substrate transfer configuration.
  • the film forming system 210 may be a spin-on dielectric system, or a chemical vapor deposition system.
  • the CVD system may or may not employ a plasma during processing.
  • the SOD system can comprise a Clean Track ACT 8 SOD, or an ACT 12 SOD coating system commercially available from Tokyo Electron Limited (TEL).
  • the ion implantation system 220 may include conventional features, such as an ion source, a magnetic filter, an ion beam neutralizer, and a vacuum system, each of which is understood to those skilled in the art of ion implant system design.
  • Controller 230 includes a microprocessor, memory, and a digital I/O port (potentially including D/A and/or A/D converters) capable of generating control voltages sufficient to communicate and activate inputs to the film forming system 210 and the ion implant system 220 as well as monitor outputs from these systems.
  • a program stored in the memory is utilized to interact with the systems 210 and 220 according to a stored process recipe.
  • controller 230 is a DELL PRECISION WORKSTATION 530TM, available from Dell Corporation, Austin, Texas.
  • the controller 230 may also be implemented as a general purpose computer such as the computer described with respect to Figure 9.
  • Controller 230 may be locally located relative to the film forming system 210 and the ion implant system 220, or it may be remotely located relative to the film forming system 210 and the ion implant system 220 via an internet or intranet. Thus, controller 230 can exchange data with the film forming system 210 and the ion implant system 220 using at least one of a direct connection, an intranet, and the internet. Controller 230 may be coupled to an intranet at a customer site (i.e., a device maker, etc.), or coupled to an intranet at a vendor site (i.e., an equipment manufacturer).
  • a customer site i.e., a device maker, etc.
  • a vendor site i.e., an equipment manufacturer
  • FIGS 5A and 5B show scanning electron microscope (SEM) views of a JSR low-k dielectric film ion implanted with a dose of 5 15 at 20KEV Argon ions. As seen in these figures, a hardened layer of low-k dielectric film was obtained at a thickness of about 79 nm and 54 nm in Figures 5A and 5B, respectively.
  • Figure 6 shows an SEM view of a JSR low-k dielectric film without implantation, for comparison.
  • Figures 7A and 7B show SEM views of a Silk D low-k dielectric film ion implanted with a dose of 5 15 at 20KEV Argon ions.
  • a hardened layer of low-k dielectric film was obtained at a thickness of about 82 nm and 80 nm in Figures 7A and 7B, respectively.
  • Figures 8A and 8B show an SEM view of a Silk D dielectric film without implantation, for comparison.
  • the ion implantation process of the present invention is shown to provide a discrete hardened surface layer on commercially available low-k dielectric films.
  • Figure 9 presents exemplary hardness data for both SiLK and JSR low- k dielectric films.
  • the hardness of the treated SiLK increases by approximately a factor of six to eight in the upper 50 nm of the film (0.2 to 1.6 GPa at 10 nm from the surface, and 0.1 to 0.6 GPa at 50 nm) relative to the untreated SiLK film (solid diamonds).
  • the hardness of the treated JSR increases by approximately a factor of three to six in the upper 50 nm of the film (0.4 to 2.3 GPa at 10 nm from the surface, and 0.3 to 0.9 GPa at 50 nm) relative to the untreated SiLK film (solid triangles).
  • FIG 10 illustrates a computer system 1201 upon which an embodiment of the present invention may be implemented.
  • the computer system 1201 may be used as the controller 230 to perform any or all of the functions of the controller described above.
  • the computer system 1201 includes a bus 1202 or other communication mechanism for communicating information, and a processor 1203 coupled with the bus 1202 for processing the information.
  • the computer system 1201 also includes a main memory 1204, such as a random access memory (RAM) or other dynamic storage device (e.g., dynamic RAM (DRAM), static RAM (SRAM), and synchronous DRAM (SDRAM)), coupled to the bus 1202 for storing information and instructions to be executed by processor 1203.
  • RAM random access memory
  • DRAM dynamic RAM
  • SRAM static RAM
  • SDRAM synchronous DRAM
  • the main memory 1204 may be used for storing temporary variables or other intermediate information during the execution of instructions by the processor 1203.
  • the computer system 1201 further includes a read only memory (ROM) 1205 or other static storage device (e.g., programmable ROM (PROM), erasable PROM (EPROM), and electrically erasable PROM (EEPROM)) coupled to the bus 1202 for storing static information and instructions for the processor 1203.
  • ROM read only memory
  • PROM programmable ROM
  • EPROM erasable PROM
  • EEPROM electrically erasable PROM
  • the computer system 1201 also includes a disk controller 1206 coupled to the bus 1202 to control one or more storage devices for storing information and instructions, such as a magnetic hard disk 1207, and a removable media drive 1208 (e.g., floppy disk drive, read-only compact disc drive, read/write compact disc drive, compact disc jukebox, tape drive, and removable magneto-optical drive).
  • the storage devices may be added to the computer system 1201 using an appropriate device interface (e.g., small computer system interface (SCSI), integrated device electronics (IDE), enhanced-IDE (E-IDE), direct memory access (DMA), or ultra-DMA).
  • SCSI small computer system interface
  • IDE integrated device electronics
  • E-IDE enhanced-IDE
  • DMA direct memory access
  • ultra-DMA ultra-DMA
  • the computer system 1201 may also include special purpose logic devices (e.g., application specific integrated circuits (ASICs)) or configurable logic devices (e.g., simple programmable logic devices (SPLDs), complex programmable logic devices (CPLDs), and field programmable gate arrays (FPGAs)).
  • ASICs application specific integrated circuits
  • SPLDs simple programmable logic devices
  • CPLDs complex programmable logic devices
  • FPGAs field programmable gate arrays
  • the computer system 1201 may also include a display controller 1209 coupled to the bus 1202 to control a display 1210, such as a cathode ray tube (CRT), for displaying information to a computer user.
  • the computer system includes input devices, such as a keyboard 1211 and a pointing device 1212, for interacting with a computer user and providing information to the processor 1203.
  • the pointing device 1212 for example, may be a mouse, a trackball, or a pointing stick for communicating direction information and command selections to the processor 1203 and for controlling cursor movement on the display 1210.
  • a printer may provide printed listings of data stored and/or generated by the computer system 1201.
  • the computer system 1201 performs a portion or all of the processing steps of the invention in response to the processor 1203 executing one or more sequences of one or more instructions contained in a memory, such as the main memory 1204. Such instructions may be read into the main memory 1204 from another computer readable medium, such as a hard disk 1207 or a removable media drive 1208.
  • processors in a multi-processing arrangement may also be employed to execute the sequences of instructions contained in main memory 1204.
  • hard-wired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.
  • the computer system 1201 includes at least one computer readable medium or memory for holding instructions programmed according to the teachings of the invention and for containing data structures, tables, records, or other data described herein.
  • Examples of computer readable media are compact discs, hard disks, floppy disks, tape, magneto- optical disks, PROMs (EPROM, EEPROM, flash EPROM), DRAM, SRAM, SDRAM, or any other magnetic medium, compact discs (e.g., CD-ROM), or any other optical medium, punch cards, paper tape, or other physical medium with patterns of holes, a carrier wave (described below), or any other medium from which a computer can read.
  • the present invention includes software for controlling the computer system 1201 , for driving a device or devices for implementing the invention, and for enabling the computer system 1201 to interact with a human user (e.g., print production personnel).
  • software may include, but is not limited to, device drivers, operating systems, development tools, and applications software.
  • Such computer readable media further includes the computer program product of the present invention for performing all or a portion (if processing is distributed) of the processing performed in implementing the invention.
  • the computer code devices of the present invention may be any interpretable or executable code mechanism, including but not limited to scripts, interpretable programs, dynamic link libraries (DLLs), Java classes, and complete executable programs. Moreover, parts of the processing of the present invention may be distributed for better performance, reliability, and/or cost.
  • Non-volatile media includes, for example, optical, magnetic disks, and magneto-optical disks, such as the hard disk 1207 or the removable media drive 1208.
  • Volatile media includes dynamic memory, such as the main memory 1204.
  • Transmission media includes coaxial cables, copper wire and fiber optics, including the wires that make up the bus 1202. Transmission media also may also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications.
  • FIG. 1201 various forms of computer readable media may be involved in carrying out one or more sequences of one or more instructions to processor 1203 for execution.
  • the instructions may initially be carried on a magnetic disk of a remote computer.
  • the remote computer can load the instructions for implementing all or a portion of the present invention remotely into a dynamic memory and send the instructions over a telephone line using a modem.
  • a modem local to the computer system 1201 may receive the data on the telephone line and use an infrared transmitter to convert the data to an infrared signal.
  • An infrared detector coupled to the bus 1202 can receive the data carried in the infrared signal and place the data on the bus 1202.
  • the bus 1202 carries the data to the main memory 1204, from which the processor 1203 retrieves and executes the instructions.
  • the instructions received by the main memory 1204 may optionally be stored on storage device 1207 or 1208 either before or after execution by processor 1203.
  • the computer system 1201 also includes a communication interface 1213 coupled to the bus 1202.
  • the communication interface 1213 provides a two-way data communication coupling to a network link 1214 that is connected to, for example, a local area network (LAN) 1215, or to another communications network 1216 such as the Internet.
  • LAN local area network
  • the communication interface 1213 may be a network interface card to attach to any packet switched LAN.
  • the communication interface 1213 may be an asymmetrical digital subscriber line (ADSL) card, an integrated services digital network (ISDN) card or a modem to provide a data communication connection to a corresponding type of communications line. Wireless links may also be implemented.
  • the communication interface 1213 sends and receives electrical, electromagnetic or optical signals that carry digital data streams representing various types of information.
  • the network link 1214 typically provides data communication through one or more networks to other data devices.
  • the network link 1214 typically provides data communication through one or more networks to other data devices.
  • the network link 1214 typically provides data communication through one or more networks to other data devices.
  • the local network 1214 and the communications network 1216 use, for example, electrical, electromagnetic, or optical signals that carry digital data streams, and the associated physical layer (e.g., CAT 5 cable, coaxial cable, optical fiber, etc).
  • the signals through the various networks and the signals on the network link 1214 and through the communication interface 1213, which carry the digital data to and from the computer system 1201 maybe implemented in baseband signals, or carrier wave based signals.
  • the baseband signals convey the digital data as unmodulated electrical pulses that are descriptive of a stream of digital data bits, where the term "bits" is to be construed broadly to mean symbol, where each symbol conveys at least one or more information bits.
  • the digital data may also be used to modulate a carrier wave, such as with amplitude, phase and/or frequency shift keyed signals that are propagated over a conductive media, or transmitted as electromagnetic waves through a propagation medium.
  • the digital data may be sent as unmodulated baseband data through a "wired" communication channel and/or sent within a predetermined frequency band, different than baseband, by modulating a carrier wave.
  • the computer system 1201 can transmit and receive data, including program code, through the network(s) 1215 and 1216, the network link 1214, and the communication interface 1213.
  • the network link 1214 may provide a connection through a LAN 1215 to a mobile device 1217 such as a personal digital assistant (PDA) laptop computer, or cellular telephone.
  • PDA personal digital assistant

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Abstract

A system and method for forming a mechanically strengthened low-k dielectric film (20) on a substrate (10) includes using either spin-on-dielectric (SOD) techniques, or chemical vapor deposition (CVD) techniques to form a low-k dielectric film (20) on the substrate (10). An upper surface of the low-k dielectric film (20) is then treated in order to increase the film's mechanical strength, or reduce its dielectric constant.

Description

METHOD AND SYSTEM FOR USING ION IMPLANTATION FOR TREATING A LOW-K DIELECTRIC FILM
Cross Reference to Related Applications
The present application is related to and claims priority to U.S. provisional application serial number 60/474,673 filed on June 2, 2003 and entitled "Method and system for using ion implantation for increasing the mechanical stability of a low-k dielectric film," and U.S. provisional application serial number 60/489,099 filed on July 23, 2003 and entitled "Method and system for using ion implantation for treating a low-k dielectric film." The entire content of these applications is hereby incorporated herein by reference.
BACKGROUND OF THE INVENTION
Field of the Invention
[0001] The present invention relates to a method and system for treating a low-k dielectric film, and, more particularly, to a method and system for using ion implantation to treat a low-k dielectric film.
Description of Related Art
[0002] As is known to those in the semiconductor art, interconnect delay is a major limiting factor in the drive to improve the speed and performance of integrated circuits (lC). One way to minimize interconnect delay is to reduce interconnect capacitance by using low dielectric constant (low-k) materials during production of the IC. Thus, in recent years, low-k materials have been developed to replace relatively high dielectric constant insulating materials, such as silicon dioxide, utilized for inter-level and intra-level dielectric layers between metal layers of semiconductor devices. Such low-k materials can be deposited by a spin-on dielectric (SOD) method similar to the application of photo-resist, or by chemical vapor deposition (CVD). Thus, the use of low-k materials is readily adaptable to existing semiconductor manufacturing processes.
[0003] However, one drawback to using low-k films in semiconductor manufacturing is that such films have demonstrated a low mechanical strength. This makes the films susceptible to damage in downstream process steps, such as during chemical-mechanical polishing (CMP), resulting in low product yields and/or decreased device reliability. This low mechanical strength of low-k films has prevented them from receiving widespread acceptance by device manufacturers. Thus, the performance advantages to using low-k films have been largely unrealized.
Summary of the Invention
[0004] One aspect of the present invention is to reduce or eliminate any or all of the above-described problems.
[0005] Another object of the present invention is to increase the mechanical stability of a low-k dielectric film.
[0006] Yet another object of the present invention is to increase the mechanical stability of a low-k dielectric film while achieving a dielectric constant substantially equivalent to or less than the original dielectric constant of the film.
[0007] Another object of the present invention is to reduce a dielectric constant of a low-k dielectric film.
[0008] These and other objects of the present invention are provided by a low- k dielectric film, as well as a system and method for forming the low-k dielectric film. The inventive method of producing a low-k dielectric film on a substrate includes forming the low-k dielectric film on the substrate, and performing an ion implantation process on a surface of the low-k dielectric film in order to create a hardened surface layer on the low-k dielectric film. The low-k dielectric film has a nominal dielectric constant less than a dielectric constant of SiO2. Additionally, the ion implantation process maintains substantially the same dielectric constant or less than the nominal dielectric constant of the low-k dielectric film. [0009] The inventive hardened low-k dielectric film includes a low-k dielectric film having a nominal dielectric constant less than the dielectric constant of SiO2, and a hardened surface layer on the low-k dielectric film. The hardened surface layer is formed by subjecting a surface of the low-k dielectric film to an ion implantation process. Additionally, the low-k dielectric layer with the hardened surface layer maintains substantially the same dielectric constant or less than the nominal dielectric constant of the low-k dielectric film without the hardened surface layer.
[0010] The inventive processing system for producing a hardened low-k dielectric film includes a film forming system configured to form the low-k dielectric film on a substrate, and an ion implant system coupled to the film forming system and configured to treat the low-k dielectric film in order to form a hardened surface layer in the low-k dielectric film. A controller is coupled to the film forming system and the ion implant system and configured to control a process for forming the low-k dielectric film and treating the low-k dielectric film using ion implantation.
[0011] Additionally, the inventive method of producing the low-k dielectric film on a substrate comprises: forming the low-k dielectric film on the substrate, the low-k dielectric film having a nominal dielectric constant less than a dielectric constant of SiO2; and performing an ion implantation process on the low-k dielectric film in order to produce a treated low-k dielectric film having a dielectric constant less than the nominal dielectric constant. [0012] The inventive treated low-k dielectric film includes a low-k dielectric film comprising inert ions, wherein the inert ions are implanted by subjecting the low-k dielectric film to an ion implantation process. [0013]The inventive processing system for producing a treated low-k dielectric film includes a film forming system configured to form the low-k dielectric film on a substrate, and an ion implant system coupled to the film forming system and configured to treat the low-k dielectric film in order to reduce a dielectric constant of the low-k dielectric film. A controller is coupled to the film forming system and the ion implant system and configured to control a process for forming the low-k dielectric film and treating the low-k dielectric film using ion implantation. Brief Description of the Drawings
[0014] A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
[0015] Figures 1 A through 1 D present a simplified schematic representation of a method of forming and treating a low-k dielectric film in accordance with an embodiment of the present invention;
[0016] Figure 2 presents a method of producing a low-k dielectric film according to an embodiment of the present invention;
[0017] Figure 3 presents an exemplary method of forming a low-k dielectric film on a substrate in accordance with an embodiment of the present invention;
[0018] Figure 4 presents a processing system for producing a low-k dielectric film according to another embodiment of the present invention;
[0019] Figures 5A and 5B show scanning electron microscope (SEM) views of a JSR low-k dielectric film ion implanted with a dose of 515 at 20KEV Argon ions, according to an embodiment of the present invention;
[0020] Figure 6 shows an SEM view of a JSR low-k dielectric film without implantation, for comparison with Figures 5A and 5B;
[0021] Figures 7A and 7B show SEM views of a Silk D low-k dielectric film ion implanted with a dose of 515 at 20KEV Argon ions, according to an embodiment of the present invention;
[0022] Figures 8A and 8B show an SEM view of a Silk D dielectric film without implantation, for comparison with Figures 7A and 7B;
[0023] Figure 9 presents hardness data for a Silk dielectric film and a JSR dielectric film with and without treatment; and
[0024] Figure 10 presents a computer system upon which an embodiment of the present invention can be implemented.
Detailed Description of Exemplary Embodiments
[0025] Referring now to the drawings, wherein like reference numerals designate identical or corresponding parts throughout the several views, Figures 1A through 1 D present a schematic representation of a method of forming a low-k dielectric film and treating the film to improve the mechanical strength of the film, according to an embodiment of the present invention. As shown in Figures 1A and 1 B, a low-k dielectric film 20 is formed on an upper surface of a substrate 10 that may or may not include additional layers. The substrate 10 may be a semiconductor, a metallic conductor, or any other substrate to which the low-k film is to be formed upon. The low-k dielectric film has a nominal dielectric constant value less than the dielectric constant of SiO2, which is approximately 4 (e.g., the dielectric constant for thermal silicon dioxide can range from 3.8 to 3.9). More specifically, the low-k dielectric film 20 may have a dielectric constant of less than 3.0, or a dielectric constant ranging from 1.6 to 2.7.
[0026] The low-k dielectric film 20 may include at least one of an organic, inorganic, and inorganic-organic hybrid material. Additionally, the low-k dielectric film 20 may be porous or non-porous. For example, the low-k dielectric film may include an inorganic, silicate-based material, such as oxidized organosilane (or organo siloxane), deposited using CVD techniques. Examples of such films include Black Diamond™ CVD organosilicate glass (OSG) films commercially available from Applied Materials, Inc., or Coral™ CVD films commercially available from Novellus Systems. Alternatively, the low-k dielectric film 20 may include an inorganic, silicate-based material, such as hydrogen silsesquioxane (HSQ) or methyl silsesquioxane (MSQ), deposited using SOD techniques. Examples of such films include FOx HSQ commercially available from Dow Corning, XLK porous HSQ commercially available from Dow Corning, and JSR LKD-5109 commercially available from JSR Microelectronics. Still alternatively, the low-k dielectric film 20 can comprise an organic material deposited using SOD techniques. Examples of such films include SiLK-l, SiLK-J, SiLK-H, SiLK-D, and porous SiLK semiconductor dielectric resins commercially available from Dow Chemical, and FLARE™, and Nano-glass commercially available from Honeywell. [0027] Once the low-k dielectric film 20 is prepared, the film 20 is treated by exposure to an ion implantation process 25, wherein the upper surface of the low-k dielectric film is subjected to ion bombardment as shown in Figure 1C. Ions used for the implantation process are preferably selected such that the implantation process does not cause a substantial increase in the nominal dielectric constant value of the low-k dielectric film 20. For example, inert ions, such as an ionized Noble gas (e.g. argon), may be used in the implantation process to minimize chemical bonding of the ion to the film 20. However, any ion that does not cause a substantial increase in the dielectric constant of the low-k dielectric film 20 may be used. As used herein, the term "substantial increase" means an increase that results in the dielectric constant of the film being permanently higher than a dielectric constant of 4.0 or preferably 3.5. As shown in Figure 1 D, subjecting the low-k dielectric film 20 to ion implantation forms a "crust", or hardened layer 30, on the upper surface of the film 20 due to the ions locally imparting energy to the low-k dielectric film. Inert ions may or may not reside as part of the hardened layer. The present inventors have discovered that forming this hardened surface 30 increases the overall mechanical strength of the low-k dielectric film 20. Thus, the hardened surface 30 reduces the likelihood that the low-k film 20 will be damaged during further processing of the substrate and film. Moreover, because the implantation process does not substantially change the dielectric constant of the low-k film 20, the mechanically strengthened film will still provide enhanced performance characteristics for ICs and other devices in which the film is used.
[0028] In addition to the hardened surface layer 30, the present inventors have also discovered that the ion implantation process of Figure 1C may result in the low-k film 20 of Figure 1 D having a reduced dielectric constant. The ion implantation process for forming a reduced dielectric constant low-k film may or may not cause the formation of a hardened surface layer useful for improving mechanical strength, as will be described below. Ions used for the implantation process are preferably inert ions such as the ionized Nobel gas (e.g. Argon) noted above with respect to the increased mechanical strength feature. However, it is sufficient that the ions are selected such that the implantation process causes a reduction in the nominal dielectric constant value of the low-k dielectric film 20.
[0029] Figure. 2 is a flow chart 100 illustrating a method of producing a low-k dielectric film in order to increase the mechanical strength of the film, in accordance with an embodiment of the present invention. As seen in Figure 2, flow chart 100 begins with forming the low-k dielectric film on a substrate as shown by step 110. As noted above, the low-k dielectric film has a nominal dielectric constant, and may include organic, inorganic, and inorganic-organic hybrid materials. The low-k dielectric film can be formed using CVD techniques, or SOD techniques such as those offered in the Clean Track ACT 8 SOD and ACT 12 SOD coating systems commercially available from Tokyo Electron Limited (TEL). The Clean Track ACT 8 (200 mm) and ACT 12 (300 mm) coating systems provide coat, bake, and cure tools for SOD materials. Other systems and methods for forming a low-k dielectric film on a substrate are well known to those skilled in the art of both spin-on dielectric technology and CVD dielectric technology.
[0030] After forming the low-k dielectric film 20 on substrate 10, the low-k dielectric film is subjected to ion implantation in order to perform at least one of forming the hardened surface layer 30, or treating substantially the entire low-k dielectric film 20 to decrease the overall value of the dielectric constant, as shown by step 120. For example, the ion implantation may be performed in a commercially available ion implant tool, such as an Axcelis GSD 200, GSD 200 HE, GSD 200 EE, HC3, GSD lll/LED, MC3, and HE3, offered by Axcelis Technologies, Inc.; a Varian ES00, Varian VllSta 80, VllSta 810 HP, VllSta 3000, and a Varian VllSion, offered by Varian Semiconductor Equipment Associates; or an AMAT xR120, offered by Applied Materials, Inc. As noted above, the ion used in the implantation process is preferably an inert ion, which either minimizes or reduces changes in the dielectric properties of the low-k dielectric film when forming a hardened surface layer, or reduces the dielectric constant of the low-k dielectric film when treating the film. [0031] In order to achieve surface layer hardening, the ion implantation process is preferably performed at relatively low energy and high flux to minimize the change in dielectric constant of the film 20, or reduce the dielectric constant of the film 20. The ion beam energy may, for example, range from 0.2 to 200 keV or 5 to 50 keV, and preferably ranges from 10 to 20 keV. Additionally, the ion beam dose may range from 5x1012 to 1x1016 atoms/cm2 or .5x1015 to 1 x1016 atoms/cm2, and preferably ranges from 1x1015 to 1 x1016 atoms/cm2. However, any energy and dose that does not cause a permanent and substantial increase in the dielectric constant of the low-k dielectric film 20 may be used in accordance with the present invention. Implantation process parameters other than ion type, energy and dose may also vary as long as such variance does not cause a permanent and substantial increase in the dielectric constant of the low-k dielectric film 20. [0032] In order to achieve a reduced dielectric constant of the low-k film 20 without a hardened surface layer, the ion implantation process is preferably performed with inert ions at a relatively high energy and low flux to implant the inert ions deep into the low-k film 20. The ion beam energy may, for example, range from 0.2 to 200 keV, and is preferably greater than 50 keV, and more preferably greater than 100 50 keV. Additionally, the ion beam dose may range from 5x1012 to 1x1016 atoms/cm2, and more preferably ranges from 5x1012 to 1 x1015 atoms/cm2. However, any energy and dose that causes a decrease in the dielectric constant of the low-k dielectric film 20 may be used in accordance with the present invention. Implantation process parameters other than ion type, energy and dose may also vary as long as such variance does not destroy the effect of decreasing the dielectric constant of the low-k film 20.
[0033] Thus, the present inventors have recognized that providing ion implantation within the beam energy range of 0.2 to 200 keV and the ion beam dose range of 5x1012 to 1x1016 atoms/cm2 forms a hardened surface layer of the low-k film and can actually reduce the dielectric constant of the low-k dielectric film. That is, hardening of the surface layer and reducing the dielectric constant are not mutually exclusive to the ion implantation process of the present invention. As indicated by the preferred beam and energy ranges noted above, the present inventors have realized that within the beam energy range of 0.2 to 200 keV and the ion beam dose range of 5x1012 to 1x1016 atoms/cm2, as the beam energy is decreased and the beam dose is increased, the formation of a hardened surface layer is enhanced and the reduction of the low-k dielectric constant is not enhanced. Conversely, within this same range, as the beam energy is increased, and the beam dose is decreased, the reduction of the low-k dielectric constant is enhanced and the formation of the hardened surface layer is not enhanced. [0034] Based on this recognition, the process parameters of a single ion implantation process step can be chosen to provide a desired level of surface hardening and reduced dielectric constant of the low-k film. However, processes performed at extreme endpoints of the ranges may result in a hardening or reduced dielectric feature that is not practically useful. In this and other situations, a single ion implantation step is undesirable, and the low-k dielectric film may be treated with an ion implantation process having two or more steps each having parameters ideal for enhancing a desired characteristic. The precise parameters of the ion implantation process will depend on the desired characteristics of the low-k film and are readily determinable by one of ordinary skill in the art having the benefit of the inventor's realization of how the process parameters affect the surface hardening and dielectric constant features, and the preferred parameter ranges for each feature described above.
[0035] Figure 3 shows an example of an SOD process 300 that may be used to perform the forming step 110 of Figure 2. As seen in Figure 3, the process begins in step 310 with the application of an adhesion promoter to the substrate 10, if necessary. For instance, when forming a SiLK-based low-k dielectric film, an adhesion promoter is recommended. In step 320, the substrate is baked at 150 to 300C, if an adhesion promoter is applied. As shown by step 330, once the adhesion promoter is applied and baked, the substrate 10 is spin coated with the low-k dielectric film 20. In step 340, the low-k dielectric film 20 is baked at a temperature of 150 to 300C, and, in step 350, the low-k dielectric film is cured at 400 to 450C in a furnace or a hot-plate bake tool. In one embodiment, the ion implantation process is performed following the cure step 350. In an alternate embodiment, the ion implantation process is performed prior to the cure step 350.
[0036] Figure 4 is a block diagram of a processing system for producing a low- k dielectric film in order to treat the film. As seen in this figure, the processing system 1 includes a film forming system 210 and an ion implant system 220 coupled to the film forming system 210. A controller 230 is coupled to the film forming system 210 and the ion implant system 220 to exchange data and information with these systems, as well as control the operation of each system according to a process recipe. The film forming system 210 and the ion implant system 220 may be directly coupled to one another, or each system can constitute a process module appended from a cluster tool substrate transfer configuration or a serial tool substrate transfer configuration.
[0037] As described above, the film forming system 210 may be a spin-on dielectric system, or a chemical vapor deposition system. The CVD system may or may not employ a plasma during processing. For example, the SOD system can comprise a Clean Track ACT 8 SOD, or an ACT 12 SOD coating system commercially available from Tokyo Electron Limited (TEL). Furthermore, the ion implantation system 220 may include conventional features, such as an ion source, a magnetic filter, an ion beam neutralizer, and a vacuum system, each of which is understood to those skilled in the art of ion implant system design. For example, the ion implant system 220 may be capable of an ion beam energy ranging from 0.2 to 200 keV, and an ion beam dose ranging from 5x1012 to 1x1016 atoms/cm2. [0038] Controller 230 includes a microprocessor, memory, and a digital I/O port (potentially including D/A and/or A/D converters) capable of generating control voltages sufficient to communicate and activate inputs to the film forming system 210 and the ion implant system 220 as well as monitor outputs from these systems. A program stored in the memory is utilized to interact with the systems 210 and 220 according to a stored process recipe. One example of controller 230 is a DELL PRECISION WORKSTATION 530™, available from Dell Corporation, Austin, Texas. The controller 230 may also be implemented as a general purpose computer such as the computer described with respect to Figure 9.
[0039] Controller 230 may be locally located relative to the film forming system 210 and the ion implant system 220, or it may be remotely located relative to the film forming system 210 and the ion implant system 220 via an internet or intranet. Thus, controller 230 can exchange data with the film forming system 210 and the ion implant system 220 using at least one of a direct connection, an intranet, and the internet. Controller 230 may be coupled to an intranet at a customer site (i.e., a device maker, etc.), or coupled to an intranet at a vendor site (i.e., an equipment manufacturer). Furthermore, another computer (i.e., controller, server, etc.) can access controller 230 to exchange data via at least one of a direct connection, an intranet, and the internet. [0040] Figures 5A and 5B show scanning electron microscope (SEM) views of a JSR low-k dielectric film ion implanted with a dose of 515 at 20KEV Argon ions. As seen in these figures, a hardened layer of low-k dielectric film was obtained at a thickness of about 79 nm and 54 nm in Figures 5A and 5B, respectively. Figure 6 shows an SEM view of a JSR low-k dielectric film without implantation, for comparison. Similarly Figures 7A and 7B show SEM views of a Silk D low-k dielectric film ion implanted with a dose of 515 at 20KEV Argon ions. As seen in these figures, a hardened layer of low-k dielectric film was obtained at a thickness of about 82 nm and 80 nm in Figures 7A and 7B, respectively. Figures 8A and 8B show an SEM view of a Silk D dielectric film without implantation, for comparison. Thus, the ion implantation process of the present invention is shown to provide a discrete hardened surface layer on commercially available low-k dielectric films. [0041] Figure 9 presents exemplary hardness data for both SiLK and JSR low- k dielectric films. For example, the hardness of the treated SiLK (solid squares) increases by approximately a factor of six to eight in the upper 50 nm of the film (0.2 to 1.6 GPa at 10 nm from the surface, and 0.1 to 0.6 GPa at 50 nm) relative to the untreated SiLK film (solid diamonds). Additionally, for example, the hardness of the treated JSR (x's) increases by approximately a factor of three to six in the upper 50 nm of the film (0.4 to 2.3 GPa at 10 nm from the surface, and 0.3 to 0.9 GPa at 50 nm) relative to the untreated SiLK film (solid triangles).
[0042] Figure 10 illustrates a computer system 1201 upon which an embodiment of the present invention may be implemented. The computer system 1201 may be used as the controller 230 to perform any or all of the functions of the controller described above. The computer system 1201 includes a bus 1202 or other communication mechanism for communicating information, and a processor 1203 coupled with the bus 1202 for processing the information. The computer system 1201 also includes a main memory 1204, such as a random access memory (RAM) or other dynamic storage device (e.g., dynamic RAM (DRAM), static RAM (SRAM), and synchronous DRAM (SDRAM)), coupled to the bus 1202 for storing information and instructions to be executed by processor 1203. In addition, the main memory 1204 may be used for storing temporary variables or other intermediate information during the execution of instructions by the processor 1203. The computer system 1201 further includes a read only memory (ROM) 1205 or other static storage device (e.g., programmable ROM (PROM), erasable PROM (EPROM), and electrically erasable PROM (EEPROM)) coupled to the bus 1202 for storing static information and instructions for the processor 1203. [0043] The computer system 1201 also includes a disk controller 1206 coupled to the bus 1202 to control one or more storage devices for storing information and instructions, such as a magnetic hard disk 1207, and a removable media drive 1208 (e.g., floppy disk drive, read-only compact disc drive, read/write compact disc drive, compact disc jukebox, tape drive, and removable magneto-optical drive). The storage devices may be added to the computer system 1201 using an appropriate device interface (e.g., small computer system interface (SCSI), integrated device electronics (IDE), enhanced-IDE (E-IDE), direct memory access (DMA), or ultra-DMA). [0044]The computer system 1201 may also include special purpose logic devices (e.g., application specific integrated circuits (ASICs)) or configurable logic devices (e.g., simple programmable logic devices (SPLDs), complex programmable logic devices (CPLDs), and field programmable gate arrays (FPGAs)).
[0045] The computer system 1201 may also include a display controller 1209 coupled to the bus 1202 to control a display 1210, such as a cathode ray tube (CRT), for displaying information to a computer user. The computer system includes input devices, such as a keyboard 1211 and a pointing device 1212, for interacting with a computer user and providing information to the processor 1203. The pointing device 1212, for example, may be a mouse, a trackball, or a pointing stick for communicating direction information and command selections to the processor 1203 and for controlling cursor movement on the display 1210. In addition, a printer may provide printed listings of data stored and/or generated by the computer system 1201.
[0046] The computer system 1201 performs a portion or all of the processing steps of the invention in response to the processor 1203 executing one or more sequences of one or more instructions contained in a memory, such as the main memory 1204. Such instructions may be read into the main memory 1204 from another computer readable medium, such as a hard disk 1207 or a removable media drive 1208. One or more processors in a multi-processing arrangement may also be employed to execute the sequences of instructions contained in main memory 1204. In alternative embodiments, hard-wired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.
[0047] As stated above, the computer system 1201 includes at least one computer readable medium or memory for holding instructions programmed according to the teachings of the invention and for containing data structures, tables, records, or other data described herein. Examples of computer readable media are compact discs, hard disks, floppy disks, tape, magneto- optical disks, PROMs (EPROM, EEPROM, flash EPROM), DRAM, SRAM, SDRAM, or any other magnetic medium, compact discs (e.g., CD-ROM), or any other optical medium, punch cards, paper tape, or other physical medium with patterns of holes, a carrier wave (described below), or any other medium from which a computer can read.
[0048] Stored on any one or on a combination of computer readable media, the present invention includes software for controlling the computer system 1201 , for driving a device or devices for implementing the invention, and for enabling the computer system 1201 to interact with a human user (e.g., print production personnel). Such software may include, but is not limited to, device drivers, operating systems, development tools, and applications software. Such computer readable media further includes the computer program product of the present invention for performing all or a portion (if processing is distributed) of the processing performed in implementing the invention.
[0049]The computer code devices of the present invention may be any interpretable or executable code mechanism, including but not limited to scripts, interpretable programs, dynamic link libraries (DLLs), Java classes, and complete executable programs. Moreover, parts of the processing of the present invention may be distributed for better performance, reliability, and/or cost.
[0050] The term "computer readable medium" as used herein refers to any medium that participates in providing instructions to the processor 1203 for execution. A computer readable medium may take many forms, including but not limited to, non-volatile media, volatile media, and transmission media. Non-volatile media includes, for example, optical, magnetic disks, and magneto-optical disks, such as the hard disk 1207 or the removable media drive 1208. Volatile media includes dynamic memory, such as the main memory 1204. Transmission media includes coaxial cables, copper wire and fiber optics, including the wires that make up the bus 1202. Transmission media also may also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications. [0051]Various forms of computer readable media may be involved in carrying out one or more sequences of one or more instructions to processor 1203 for execution. For example, the instructions may initially be carried on a magnetic disk of a remote computer. The remote computer can load the instructions for implementing all or a portion of the present invention remotely into a dynamic memory and send the instructions over a telephone line using a modem. A modem local to the computer system 1201 may receive the data on the telephone line and use an infrared transmitter to convert the data to an infrared signal. An infrared detector coupled to the bus 1202 can receive the data carried in the infrared signal and place the data on the bus 1202. The bus 1202 carries the data to the main memory 1204, from which the processor 1203 retrieves and executes the instructions. The instructions received by the main memory 1204 may optionally be stored on storage device 1207 or 1208 either before or after execution by processor 1203. [0052] The computer system 1201 also includes a communication interface 1213 coupled to the bus 1202. The communication interface 1213 provides a two-way data communication coupling to a network link 1214 that is connected to, for example, a local area network (LAN) 1215, or to another communications network 1216 such as the Internet. For example, the communication interface 1213 may be a network interface card to attach to any packet switched LAN. As another example, the communication interface 1213 may be an asymmetrical digital subscriber line (ADSL) card, an integrated services digital network (ISDN) card or a modem to provide a data communication connection to a corresponding type of communications line. Wireless links may also be implemented. In any such implementation, the communication interface 1213 sends and receives electrical, electromagnetic or optical signals that carry digital data streams representing various types of information.
[0053] The network link 1214 typically provides data communication through one or more networks to other data devices. For example, the network link
1214 may provide a connection to another computer through a local network
1215 (e.g., a LAN) or through equipment operated by a service provider, which provides communication services through a communications network 1216. The local network 1214 and the communications network 1216 use, for example, electrical, electromagnetic, or optical signals that carry digital data streams, and the associated physical layer (e.g., CAT 5 cable, coaxial cable, optical fiber, etc). The signals through the various networks and the signals on the network link 1214 and through the communication interface 1213, which carry the digital data to and from the computer system 1201 maybe implemented in baseband signals, or carrier wave based signals. The baseband signals convey the digital data as unmodulated electrical pulses that are descriptive of a stream of digital data bits, where the term "bits" is to be construed broadly to mean symbol, where each symbol conveys at least one or more information bits. The digital data may also be used to modulate a carrier wave, such as with amplitude, phase and/or frequency shift keyed signals that are propagated over a conductive media, or transmitted as electromagnetic waves through a propagation medium. Thus, the digital data may be sent as unmodulated baseband data through a "wired" communication channel and/or sent within a predetermined frequency band, different than baseband, by modulating a carrier wave. The computer system 1201 can transmit and receive data, including program code, through the network(s) 1215 and 1216, the network link 1214, and the communication interface 1213. Moreover, the network link 1214 may provide a connection through a LAN 1215 to a mobile device 1217 such as a personal digital assistant (PDA) laptop computer, or cellular telephone.
[0054] Although only certain exemplary embodiments of this invention have been described in detail above, those skilled in the art will readily appreciate that many modifications are possible in the exemplary embodiments without materially departing from the novel teachings and advantages of this invention. Accordingly, all such modifications are intended to be included within the scope of this invention.

Claims

CLAIMS: What is claimed is:
1. A method of producing a low-k dielectric film on a substrate comprising: forming said low-k dielectric film on said substrate, said low-k dielectric film having a nominal dielectric constant less than a value of 3.5; and performing an ion implantation process on a surface of said low-k dielectric film in order to create a hardened surface layer on the low-k dielectric film, wherein said performing comprises performing said ion implantation process at process parameters that will not cause a substantial increase in the nominal dielectric constant of the low-k dielectric film.
2. The method of claim 1 , wherein said forming said low-k dielectric film comprises performing at least one of a spin-on-dielectric technique and a chemical vapor deposition technique.
3. The method of claim 1 , wherein said forming said low-k dielectric film comprises forming at least one of a porous film and a non-porous film.
4. The method of claim 1 , wherein said forming said low-k dielectric film comprises forming a film having a dielectric constant less than a value of 3.0.
5. The method of claim 4, wherein said forming said low-k dielectric film comprises forming a film having a dielectric constant ranging from 1.6 to 2.7.
6. The method of claim 1 , wherein said forming said low-k dielectric film comprises forming a film including at least one of an organic material or an inorganic material.
7. The method of claim 6, wherein said forming a film including an inorganic material comprises forming a film including an inorganic-organic hybrid material.
8. The method of claim 6, wherein said forming a film including an inorganic material comprises forming a film including an oxidized organo silane.
9. The method of claim 6, wherein said forming a film including an inorganic material comprises forming a film including at least one of hydrogen silsesquioxane, and methyl silsesquioxane.
10. The method of claim 6, wherein said forming a film including an inorganic material comprises forming a film including a silicate-based material.
11. The method of claim 6, wherein said forming a film including an inorganic material comprises forming a collective film including silicon, carbon, and oxygen.
12. The method of claim 11 , wherein said forming a collective film further comprises including hydrogen in said collective film.
13. The method of claim 1 , wherein said performing comprises performing said ion implantation process at an ion energy ranging from 5 to 50 keV.
14. The method of claim 1 , wherein said performing comprises performing said ion implantation process at an ion dose ranging from 0.5x1015 to 1x1016.
15. The method of claim 1 , wherein said performing comprises performing said ion implantation process with an argon ion implant.
16. The method of claim 1 , wherein said performing said ion implantation process includes forming said hardened surface layer with a hardness ranging from approximately 1 to 3 GPa.
17. A hardened low-k dielectric film comprising: a low-k dielectric film having a nominal dielectric constant less that a value of 3.5; and a hardened surface layer on said low-k dielectric film, wherein said hardened surface layer is formed by subjecting a surface of said low-k dielectric film to an ion implantation process, wherein said low-k dielectric film comprises an ion that will not cause a substantial increase in the nominal dielectric constant of the low-k dielectric film.
18. The hardened low-k dielectric film of claim 17, wherein said low-k dielectric film comprises at least one of spin-on-dielectric film and a chemical vapor deposition film.
19. The hardened low-k dielectric film of claim 17, wherein said low-k dielectric film comprises at least one of a porous film and a non-porous film.
20. The hardened low-k dielectric film of claim 17, wherein said low-k dielectric film has a dielectric constant less than a value of 3.0.
21. The hardened low-k dielectric film of claim 20, wherein said low-k dielectric film has a dielectric constant ranging from 1.6 to 2.7.
22. The hardened low-k dielectric film of claim 17, wherein said low-k dielectric film comprises at least one of an organic material, and an inorganic material.
23. The hardened low-k dielectric film of claim 22, wherein said low-k dielectric film comprises an inorganic-organic hybrid material.
24. The hardened low-k dielectric film of claim 22, wherein said inorganic material comprises an oxidized organo silane.
25. The hardened low-k dielectric film of claim 22, wherein said inorganic material comprises at least one of hydrogen silsesquioxane, and methyl silsesquioxane.
26. The hardened low-k dielectric film of claim 22, wherein said inorganic material comprises a silicate-based material.
27. The hardened low-k dielectric film of claim 22, wherein said inorganic material collectively comprises silicon, carbon, and oxygen.
28. The hardened low-k dielectric film of claim 27, wherein said inorganic material further comprises hydrogen.
29. The hardened low-k dielectric film of claim 17, wherein said film includes physical properties of a film formed by said ion implantation process at an ion energy ranging from 5 to 50 keV.
30. The hardened low-k dielectric film of claim 17, wherein said film includes physical properties of a film formed by said ion implantation process at an ion dose ranging from 0.5x1015 to 1x1016.
31. The hardened low-k dielectric film of claim 17, wherein said film comprises an argon ion implant.
32. The hardened low-k dielectric film of claim 17, wherein said hardened surface layer includes a hardness in the range of approximately 1 to approximately 3 GPa.
33. A processing system for producing a hardened low-k dielectric film comprising: a film forming system configured to form said low-k dielectric film on a substrate; an ion implant system coupled to said film forming system and configured to treat said low-k dielectric film in order to form a hardened surface layer in said low-k dielectric film; and a controller coupled to said film forming system and said ion implant system and configured to control a process for forming said low-k dielectric film and treating said low-k dielectric film using ion implantation.
34. The processing system of claim 33, wherein said film forming system comprises at least one of a spin-on-dielectric system, and a chemical vapor deposition system.
35. The processing system of claim 33, wherein said film forming system is configured to form a low-k dielectric film comprising at least one of a porous film, and a non-porous film.
36. The processing system of claim 33, wherein said film forming system is configured to form a low-k dielectric film having a dielectric constant less than a value of 3.0.
37. The processing system of claim 36, wherein said film forming system is configured to form a low-k dielectric film having a dielectric constant ranging from 1.6 to 2.7.
38. The processing system of claim 33, wherein said film forming system is configured to form a low-k dielectric film comprising at least one of an organic material, and an inorganic material.
39. The processing system of claim 38, wherein said film forming system is configured to form a low-k dielectric film comprising an inorganic- organic hybrid material.
40. The processing system of claim 38, wherein said film forming system is configured to form a low-k dielectric film comprising an inorganic material including an oxidized organo silane.
41. The processing system of claim 38, wherein said film forming system is configured to form a low-k dielectric film comprising an inorganic material including at least one of hydrogen silsesquioxane, and methyl silsesquioxane.
42. The processing system of claim 38, wherein said film forming system is configured to form an inorganic material including a silicate-based material.
43. The processing system of claim 38, wherein said film forming system is configured to form an inorganic material collectively including silicon, carbon, and oxygen.
44. The processing system of claim 43, wherein said film forming system is configured to form said inorganic material further comprising hydrogen.
45. The processing system of claim 33, wherein said ion implant system is configured to provide an ion energy ranging from 5 to 50 keV.
46. The processing system as recited in claim 33, wherein said ion implant system is configured to provide an ion dose ranging from 0.5x1015 to 1x1016.
47. The processing system of claim 33, wherein said ion implant system is configured to provide argon ion implant.
48. The processing system of claim 33, wherein said ion implant system is configured to performing said ion implantation process at process parameters that will not cause a substantial increase in the nominal dielectric constant of the low-k dielectric film.
49. A method of producing a low-k dielectric film on a substrate comprising: step for forming said low-k dielectric film on said substrate, said low-k dielectric film having a nominal dielectric constant less than a dielectric constant of 3.5; and step for performing an ion implantation process on a surface of said low-k dielectric film in order to create a hardened surface layer on the low-k dielectric film, wherein said step for performing said ion implantation process will not cause a substantial increase in the nominal dielectric constant of the low-k dielectric film..
50. A hardened low-k dielectric film comprising: a low-k dielectric film having a nominal dielectric constant less than the dielectric constant of 3.5; and means for providing mechanical strength to said low-k dielectric film without substantially increasing the nominal dielectric constant of said low-k dielectric film.
51. A method of producing a low-k dielectric film on a substrate comprising: forming said low-k dielectric film on said substrate, said low-k dielectric film having a nominal dielectric constant less than a dielectric constant of SiO2; and performing an ion implantation process on said low-k dielectric film in order to produce a treated low-k dielectric film having a dielectric constant less than said nominal dielectric constant.
52. The method of claim 51 , wherein said performing comprises performing said ion implantation process using inert ions.
53. The method of claim 52, wherein said performing comprises performing said ion implantation process using an ionized Noble gas.
54. The method of claim 51 , further comprising: forming a hardened surface layer on said low-k dielectric film.
55. The method of claim 54, wherein said forming said hardened surface layer includes forming a hardened surface layer with a hardness ranging from approximately 1 to 3 GPa.
56. The method of claim 51 , wherein said forming said low-k dielectric film comprises performing at least one of a spin-on-dielectric technique and a chemical vapor deposition technique.
57. The method of claim 51 , wherein said forming said low-k dielectric film comprises forming at least one of a porous film and a non-porous film.
58. The method of claim 51 , wherein said forming said low-k dielectric film comprises forming a film having a dielectric constant less than a value of 3.0.
59. The method of claim 58, wherein said forming said low-k dielectric film comprises forming a film having a dielectric constant ranging from 1.6 to 2.7.
60. The method of claim 51 , wherein said forming said low-k dielectric film comprises forming a film including an inorganic material.
61. The method of claim 60, wherein said forming a film including an inorganic material comprises forming a film including an inorganic-organic hybrid material.
62. The method of claim 60, wherein said forming a film including an inorganic material comprises forming a film including an oxidized organo silane.
63. The method of claim 60, wherein said forming a film including an inorganic material comprises forming a film including at least one of hydrogen silsesquioxane, and methyl silsesquioxane.
64. The method of claim 60, wherein said forming a film including an inorganic material comprises forming a film including a silicate-based material.
65. The method of claim 60, wherein said forming a film including an inorganic material comprises forming a collective film including silicon, carbon, and oxygen.
66. The method of claim 65, wherein said forming a collective film further comprises including hydrogen in said collective film.
67. The method of Claim 51 , wherein said performing comprises performing said ion implantation process at an ion energy range of 0.2 to 200 keV and an ion dose of 5x1012 to 1x1016 atoms/cm2.
68. The method of Claim 67, wherein said performing comprises performing said ion implantation process at a relatively low ion energy and a relatively high ion dose to enhance formation of a hardened surface layer on said low-k dielectric film.
69. The method of Claim 67, wherein said performing comprises performing said ion implantation process at a relatively high ion energy and a relatively low ion dose to enhance reduction of a dielectric constant of said low-k dielectric film.
70. The method of claim 69 wherein said performing comprises performing said ion implantation process at an ion energy greater than about 50 keV.
71. The method of claim 70 wherein said performing comprises performing said ion implantation process at an ion energy greater than about 100 keV.
72. The method of claim 69, wherein said performing comprises performing said ion implantation process at an ion dose ranging from 5x1012 to 1x1016.
73. A treated low-k dielectric film produced by a method according to any one of Claims 51-72.
74. A processing system for producing a treated low-k dielectric film comprising: a film forming system configured to form said low-k dielectric film on a substrate; an ion implant system coupled to said film forming system and configured to treat said low-k dielectric film in order to reduce a dielectric constant of said low-k dielectric film; and a controller coupled to said film forming system and said ion implant system and configured to control a process for forming said low-k dielectric film and treating said low-k dielectric film using ion implantation, wherein said processing system is configured to producing a low-k dielectric film on said substrate according to any one of Claims 51-72.
PCT/US2004/015577 2003-06-02 2004-06-02 Method and system for using ion implantation for treating a low-k dielectric film Ceased WO2004109756A2 (en)

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