WO2004100627A2

WO2004100627A2 - Method for the production of a printed board

Info

Publication number: WO2004100627A2
Application number: PCT/EP2004/003360
Authority: WO
Inventors: Josef Ressel
Original assignee: Siemens Aktiengesellschaft
Priority date: 2003-05-05
Filing date: 2004-03-30
Publication date: 2004-11-18
Also published as: DE10319979A1; WO2004100627A3

Abstract

Disclosed is a method for producing a printed board, comprising the following steps: a first insulating core layer (KL1) having a first electrically conducting layer (E11) and a second electrically conducting layer (E12) is provided; a second insulating core layer (KL2) having a first electrically conducting layer (E21) and a second electrically conducting layer (E22) is provided; at least one planar section of a first electrically conducting layer of the first and second insulating core layer is removed, respectively; a bore (LB1, LB2) is created by means of laser technique in the area of the bared planar section of the first electrically conducting layer through the respective first and second insulating core layer all the way to the second electrically conducting layer thereof; a prepreg layer (PPL) is provided above the first electrically conducting layer of the first insulating core layer, and the second insulating core layer is disposed on the prepreg layer, the first electrically conducting layer of the second insulating core layer facing the prepreg layer. The inventive method makes it possible to create a printed board that is provided with a high-density circuit structure and connection structure.

Description

description

Method of manufacturing a printed circuit board

The present invention relates to a method for producing a printed circuit board, in particular a printed circuit board in the form of a multilayer circuit carrier.

High-quality mobile devices, such as high-quality mobile phones, have a very high degree of miniaturization. For the internal electronics, this means that the circuit board becomes a multifunctional electromechanical component. On the one hand, it has mechanical functions in the device design, and on the other hand, the circuit board becomes a circuit carrier used on both sides in order to achieve an increased range of functions with a reduced space requirement. In particular, the miniaturization entails that digital logic, for example for signal processing processes in the baseband, is provided on one side of the printed circuit board, and a high-frequency range with high signal integrity is provided on the other side.

A conventional circuit board LP01 is designed, for example, as a circuit carrier with eight electrically conductive layers or signal layers, as shown in FIG. 1.

The manufacturing process of this PCB looks like this:

Two core layers KL03 and KL04, copper-coated on both sides, are mechanically drilled (so that mechanical through holes DB01 to DB04 are created) and copper-plated. Then the two signal layers S04 and S05 are structured photochemically. The next step will be the two core locations KL03 and KL04 separately pressed together by a prepreg PP and pressurized by pressure and temperature. A mechanical hole DB05 is now provided and the outer sides, ie now the copper layers or signal layers S03 and S06, are photochemically structured. In order to provide additional signal layers, such as signal layers S02 and S07, HDI (high density interconnect) layers KL02 and KL05 made of RCC (resin coated copper) or FR4 (glass fiber reinforced resin) with the carrier just manufactured, more precisely with the outer layers S03 and SO6 pressed at this stage and structured photolithographically. Laser holes are made in the core layer KL02 for the electrical connection of the signal layers S02 and S03. Analogously, the core layer KL05 is drilled with the laser in order to connect the signal layers of S06 and S07. In order to provide additional signal layers S01 and S08, HDI (high density interconnect) layers KL01 and KL06 made of RCC (resin coated copper) or FR4 (glass fiber reinforced resin) are pressed with the previously manufactured carrier, more precisely the outer layers S02 and S07 at this stage and structured photolithographically. To connect the signal layers S01 and S02, laser holes are made in the core layer KL01. Analogously, the core layer KL06 is drilled with the laser in order to connect the signal layers S07 and S08.

A disadvantage that results from the circuit board structure just shown is the provision of a large number of mechanical vias, in particular vias DB01 to DB05, which have been drilled through core layers, here the core layers KL03 and KL04. On the one hand, the production of the mechanical bores or vias is associated with a great expenditure in terms of device and process technology, since each via has to be drilled with a high-speed drill. In addition, the Mechanical vias mean that a relatively large area section for a via is used on a signal layer, which prevents a high-density circuit or connection structure in the signal layer and thus the circuit board.

It is therefore the object of the present invention to create a printed circuit board with a high-density circuit or connection structure with minimized expenditure on apparatus and process technology.

This object is achieved by a method according to claim 1. Advantageous refinements are the subject of the dependent claims.

The principle on which the invention is based is to build up a printed circuit board or its inner layers from two sections, which are first processed separately and then separated by an insulating layer, such as a prepreg layer. More specifically, in such a method it is possible, in each section, which consists of an insulating core layer, which is provided on both sides with an electrically conductive layer, after removal of a surface section provided for a bore of the first electrically conductive layer by means of laser drilling provide a hole up to the second electrically conductive layer. This means that, in contrast to the prior art, due to the division of the (inner) circuit board structure into two sections with thinner dimensions, holes can be drilled using the faster laser drilling process, instead of using the slower mechanical process, which is more complex in terms of process and device technology to have to. This in turn means that due to the lesser

Space requirements (on an electrically conductive layer) of the laser hole can be created to create denser or high-density circuit or connection structures in the printed circuit board.

Furthermore, in the method described, it is possible for the two subsections to be provided with bores starting from the respective first electrically conductive layers, possibly through-plated and structured, the subsections with mutually facing first electrically conductive layers and through a prepreg layer from one another be connected separately. This has the advantage that the inner (first) electrically conductive layers can also achieve a high-density circuit or connection structure.

Preferred embodiments of the present invention are explained in more detail below with reference to the accompanying drawings. Show it:

Figure 1 is a schematic representation of the layer structure of a conventional circuit board;

2 processing steps to form partial sections of a printed circuit board or its inner

Structure;

FIG. 3 shows a provisional circuit board representation after pressing two partial sections produced in FIG. 2; Figure 4 is a schematic representation of the layer structure of a circuit board according to an embodiment of the

Invention.

The manufacture of a printed circuit board according to an embodiment of the present invention will now be described below.

For this purpose, in a first step shown in FIG. 2A, a first insulating core layer KL1 (as the first partial section of the printed circuit board) has a first electrically conductive layer EL11 on a first side and a second electrically conductive layer EL12 on an opposite second side. provided. Furthermore, a second insulating

Core layer KL2 (as a second section), which has a first electrically conductive layer EL21 on a first side and a second electrically conductive layer EL22 on an opposite second side. The first EL11, EL12 and the second EL21, EL22 electrically conductive layers consist of copper (Cu). The first KL1 and the second KL2 insulating core layer comprise an electrically insulating plastic, such as an FR4 laminate. Before the first layer of electrically conductive material is applied, a cover layer is preferably applied to the respective second electrically conductive layers of the first and second insulating core layers.

As shown in FIG. 2B, selected surface sections FLAl and FLA2 of a respective first electrically conductive layer EL11, EL12 of the first and the second insulating core layer KL1, KL2 are removed in a second step (for example by means of a YAG laser or CO ₂ laser ) , in a circumference of a borehole to be provided below. Furthermore, in a third step, laser drilling LB1, LB2 is carried out in the area of the exposed surface section of the first electrically conductive layer through the respective first and second insulating core layers up to their second electrically conductive layer EL21, EL22 (for example likewise by means of a YAG laser or C0 laser). The shape tapering downwards, which is typical for a laser bore, can be seen in the figure.

In a fourth step shown in FIG. 2C, a first layer EL13, EL23 made of conductive material is applied to the respective first electrically conductive layers EL11, EL21 including the laser drill holes LB1, LB2 of the first and second insulating core layers KL1, KL2. In this case, the application of the first layer of electrically conductive material can take place in two sub-steps, which comprise a first sub-step of chemical copper application and a second sub-step of galvanic copper application.

Subsequently, in a step shown in FIG. 2D, this first layer EL13, EL23 made of electrically conductive material and the underlying first electrically conductive layer EL11, EL21 of the respective first and second insulating core layers KL1, KL2 are structured. The structuring can include applying a pattern of an acid-resistant lacquer, in particular according to the exposure method, to the layer EL13, EL23 made of electrically conductive material and chemically etching away the exposed sections of the

Include layer of electrically conductive material and the first electrical layer. In a subsequent step, a prepreg layer PPL is provided above the first electrically conductive layer EL11 or above the first layer EL13 made of electrically conductive material of the first insulating core layer KL1, and the second insulating core layer KL2 is turned, as it were, by 180 ° and on the prepreg Layer PPL arranged, the first electrically conductive layer EL21 or the first layer EL23 made of electrically conductive material facing the second insulating core layer KL2 of the prepreg layer PPL (see FIG. 3). The first insulating core layer KL1, the

Prepreg layer PPL and the second insulating core layer KL2 pressed together under the action of pressure and heat. The material (resin) of the prepreg layer penetrates the boreholes of the respective core layers, thereby stabilizing the layer structure.

According to an advantageous embodiment, the cover layer can be removed from the second electrically conductive layers EL12, EL22 and the second electrically conductive layers EL12, EL22 can be structured, as described above by applying a pattern of an acid-resistant lacquer, in particular according to the exposure process, and chemical etching away of the exposed sections of the second electrical layer can be implemented.

According to a further advantageous embodiment, at least one mechanical through-hole can also be drilled through the second electrically conductive layer E12 of the first insulating core layer KL1, the prepreg layer PPL and the second electrically conductive layer E22 of the second insulating core layer KL2. A second layer of electrically conductive material can then be applied to the respective second electrically conductive layers and the wall of the at least one passage bore are applied. In such a case the second electrically conductive layers are structured

EL12, EL22 only after the second layer of electrically conductive material has been applied.

Furthermore, according to a further embodiment, which will be referred to in FIG. 4, an at least one further insulating core layer with a third electrically conductive layer can be applied to the respective second electrically conductive layers, this further core layer comprising an electrically insulating plastic , in particular in the form of an FR4 (epoxy glass hard fabric) laminate or an RCC film. The respective third electrically conductive layers can then in turn be structured in a manner as has already been explained above. Vias produced by means of laser bores can also be provided to establish an electrical connection between the individual electrically conductive layers.

Reference is now made to FIG. 4, in which a schematic

Representation of the layer structure of a circuit board LPll is shown according to an embodiment of the invention. This circuit board LP11 has a layer arrangement similar to that of the circuit board LP01 shown in FIG. From top to bottom, there are eight signal layers or electrically conductive

Layers Sll to S18 are arranged, between which respective electrically insulating layers KLll to KL16 and a prepreg layer PP are provided. However, as can be seen in particular from the shape of the vias LB110, LB111, LB113, LB114 produced by laser drilling, the printed circuit board LP11 or its inner layers were produced using a method according to the invention. This is characterized by the fact that the boreholes of the vias mentioned point away from the prepreg layer PP rejuvenate. That means making the inside

PCB section, the laser drilling of the vias LB110, LBl11 was carried out in the direction from the signal layer S14 to the signal layer S13, and then the core layer KL13 was arranged turned through 180 ° on the prepreg layer PP, so that the signal layer S14 or the drill holes of the vias LB110 , LB111 face the prepreg layer PP (cf. also the method steps explained for FIG. 3). Thus, from a manufacturing point of view, the core layer KL14 with the signal layers S15, S16 corresponds to the core layer KL1 with the electrically conductive layers EL11, EL12 (see FIGS. 2 and 3) and corresponds to the core layer KL13 with the signal layers S13, S14 of the core layer KL2 with the electrically conductive layers EL21, EL22 (see FIGS. 2 and 3).

After pressing the core layers KL13 and KL14 with the prepreg layer PP (in accordance with the process explained in FIG. 3), a mechanical hole was drilled through the core layer KL13, KL14 or its signal layers S13, S14 or S15, S16. Via DBll made. Either before or after the mechanical drilling, a cover layer that may be provided on the signal layers S13 and S16 is now removed in order to apply a layer of electrically conductive material (for example made of copper) on the signal layers S13, S16 and on the inner wall of the mechanical borehole. The signal layers S13, S16, to which the respective layers of electrically conductive material are now counted, are then structured (for example using a method already mentioned above).

Core layers in the form of electrically insulating RCC foils KL12 and KL15 with electrically conductive layers S12 are then placed on the electrically conductive layers or signal layers S13, S16 and S17 applied (cf. also the explanations for FIG. 1 with regard to the application or pressing of the outer core layers KL02 or KL05 and KL01 or KL06 with the carrier), the RCC films KL12, KL15 then making contact (through Laser holes LB11, LB13, LB16, LB17 and applying a layer of conductive material such as copper) and the electrically conductive layers S12 and S17 are structured. Thereupon, further core layers in the form of RCC foils KLll and KL16 with electrically conductive layers Sll and S18 are applied to the signal layers S12, S17, the RCC foils KLll, KL16 then being plated through (by laser drilling LB15 and application of a layer of conductive material such as Copper) and the electrically conductive layers Sll and S18.

In this way it is thus possible to create a printed circuit board LPll which has a high-density circuit and connection structure, since on the one hand each electrically conductive layer S11 to S18 (high-density) can be structured and on the other hand by vias LBll, LB12, LB13 produced by means of laser bores .

LB14, LB15, L16, LB17, LB110, DBlll, LB113, LB114, which have only a small diameter and thus take up a small area on a signal layer, can be connected.

Finally, some dimensions for the individual components of the circuit board LPll are listed. A contact area ("land") Fl of a laser-drilled via of the core layers KL11, KL12, KL15, KL16 has a diameter of approximately 300 μm, while the contact area F2 of a laser-drilled via of the core layers KL13 and KL14 has a diameter of approximately 350 μm and the contact area F3 a mechanically drilled via (here) the core layer KL13, KL14 a diameter of approx. 600μm (at has a borehole diameter of approx. 300μm). The thickness of one

Signal position Sll to S18 is approx. 30 μm, the thickness of the core layers KLll, KL12, KL15, KL16 approx. 50μm and the thickness of the core layers KL13 and KL14 approx. 100μ. The thickness of the prepreg layer PP is approximately 120 μm, so that a total thickness of the circuit board LPll of approximately 860 μm is achieved. It should be mentioned that the thickness of the individual layers, in particular the core layers and the prepreg layer, can be varied per application.

A printed circuit board produced according to the present invention is therefore suitable for use in electrical devices, in particular in the design of mobile radio devices or mobile telephones or (small) portable computers, which have (should) have a small or miniaturized structure. In the case of the electrical device in the form of a mobile radio device or mobile telephone, one side (for example in FIG. 4 the side with respect to the prepreg layer PP with the core layers KL11, KL12, KL13) of the printed circuit board can have digital logic, for example for signal processing processes in the baseband , and the other side (for example in FIG. 4 the side with respect to the prepreg layer PP with the core layers KL14, KL15, KL16) have a high-frequency range with high signal integrity. The two sides or signal processing areas can then be made by mechanically drilled vias

(e.g. the Via DBll in Figure 4).

Claims

claims

1. Method for manufacturing a printed circuit board with the following steps:

Providing a first insulating core layer (KL1) which has a first electrically conductive layer (Eil) on a first side and a second electrically conductive layer (E12) on an opposite second side;

Providing a second insulating core layer (KL2) which has a first electrically conductive layer (E21) on a first side and a second electrically conductive layer (E22) on an opposite second side;

Removing at least one surface section (FLAl, FLA2) of a respective first electrically conductive layer of the first and the second insulating core layer;

Performing a laser drilling (LB1, LB2) in the area of the exposed surface section of the first electrically conductive layer through the respective first and second insulating core layers up to their second electrically conductive layer;

Providing a prepreg layer (PPL) above the first electrically conductive layer of the first insulating core layer and arranging the second insulating core layer on the prepreg layer, the first electrically conductive layer facing the second insulating core layer of the prepreg layer.

2. The method of claim 1, wherein the first insulating core layer, the prepreg layer and the second insulating core layer ge, in particular under pressure and heat are pressed together.

3. The method according to any one of claims 1 or 2, wherein after the step of performing a laser drilling, a first layer (EL12, EL23) of conductive material is applied to the respective first electrically conductive layers including the laser holes of the first and second insulating core layers.

4. The method according to claim 3, in which the application of the first layer of electrically conductive material is applied in two substeps, which comprise a first substep of a chemical copper application and a second substep of a galvanic copper application.

5. The method according to any one of claims 3 or 4, wherein after the step of applying the first layer of electrically conductive material, a structuring of this first layer of electrically conductive material and the underlying first electrically conductive layer of the respective first and second insulating core layer is carried out.

6. The method according to claim 5, wherein the structuring comprises applying a pattern of an acid-resistant lacquer, in particular after the exposure process, to the layer of electrically conductive material and chemically etching away the exposed portions of the layer of electrically conductive material.

7. The method according to any one of claims 3 to 6, in which before the application of the first layer of electrically conductive Material is applied to the respective second electrically conductive layers of the first and the second insulating core layer, a cover layer.

8. The method according to any one of claims 2 to 7, in which after the pressing of the first insulating core layer, the prepreg layer and the second insulating core layer, the cover layer of the respective second electrically conductive layers of the first and the second insulating core layer is removed.

9. The method according to claim 8, wherein at least one mechanical through hole (DB11) is carried out through the second electrically conductive layer of the first insulating core layer, the prepreg layer and the second electrically conductive layer of the second insulating core layer.

10. The method according to claim 9, in which a second layer of electrically conductive material is applied to the respective second electrically conductive layers and the wall of the at least one through hole.

11. The method according to any one of claims 1 to 10, in which at least one further insulating core layer with a third electrically conductive layer is applied to the respective second electrically conductive layers.

12. The method according to any one of claims 1 to 11, wherein the _' removal of the surface section by means of a laser, in particular a YAG laser or C0 ₂ laser.

13. The method according to any one of the preceding claims, wherein the first, the second and the third electrically conductive Layer and the first and second layers of electrically conductive material consist of copper.

14. The method according to any one of the preceding claims, wherein the first and the second insulating core layer is an electrically insulating plastic, in particular an FR4 laminate, and the at least one further core layer is an electrically insulating plastic, in particular in the form of an FR4 laminate or RCC film.

15. Printed circuit board which is produced by a method of the preceding claims.