WO2004077551A1 - Procede ameliore et appareil de positionnement de circuits integres sur des languettes de connexion - Google Patents

Procede ameliore et appareil de positionnement de circuits integres sur des languettes de connexion Download PDF

Info

Publication number
WO2004077551A1
WO2004077551A1 PCT/SG2003/000039 SG0300039W WO2004077551A1 WO 2004077551 A1 WO2004077551 A1 WO 2004077551A1 SG 0300039 W SG0300039 W SG 0300039W WO 2004077551 A1 WO2004077551 A1 WO 2004077551A1
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuits
die
foil
die pads
integrated circuit
Prior art date
Application number
PCT/SG2003/000039
Other languages
English (en)
Inventor
Beng Keh See
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Priority to DE10394148T priority Critical patent/DE10394148T5/de
Priority to AU2003214781A priority patent/AU2003214781A1/en
Priority to PCT/SG2003/000039 priority patent/WO2004077551A1/fr
Publication of WO2004077551A1 publication Critical patent/WO2004077551A1/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67144Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H01L2221/68322Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support

Definitions

  • the present invention relates to methods of positioning integrated circuits (dies) on leadframes, as part of methods for producing integrated circuit packages.
  • the invention further relates to apparatus for positioning integrated circuits on leadframes.
  • One common method of forming an integrated circuit (die) package is to position an integrated circuit on a die pad portion of a lead frame, bond the integrated circuit to the die pad portion, form electrical connections (wire bonds) between electrical contacts on the integrated circuit and lead portions of the lead frame, encase the integrated circuit and bonds in a resin material, and then cut the lead frame to form singulated integrated circuit packages with the leads protruding out of them.
  • the integrated circuits are positioned on the die pads of the lead frame.
  • the steps of a known method are shown in Fig. 1(a) to 1(e).
  • the integrated circuits 1 are spaced apart on the surface of a wafer foil 3.
  • the foil 3 is moved so that an integrated circuit 1 which is to be moved onto the die pad portion 9 of a lead frame is located over a "push needle" 5.
  • the apparatus further comprises a bonding arm 7, which is movable up-and-down (as shown in Fig. 1(a)), and laterally between a position over the push needle 5 and a position over die pad 9 of the lead frame.
  • the bonding arm 7 is moved towards the die 1, and the push needle 5 is raised, so that its tip meets the foil 3, and begins to penetrate it.
  • the push needle 5 pushes the die 1 away from the foil 3, and the bonding arm 7 lifts it.
  • the bonding arm 7 then carries the die 1 to the die pad 9 of the lead frame.
  • the bonding arm 7 deposits the die 1 on the die pad portion 9 of the lead frame.
  • the process includes two stages which must be carried out with high precision: a first stage of pushing the die up by the push needle and picking it up by the bonding arm, and a second stage of placing the die onto the lead frame. In each cycle of two stages, only one die is attached to the lead frame.
  • the present invention aims to provide new and useful methods and apparatus for positioning integrated circuits on lead frames, as part of an integrated circuit packaging process.
  • the present invention proposes that the integrated circuit is brought into register with the die pad while on the foil, so that the integrated circuit can be transferred to the lead frame by a single movement. Since the number of precision processing steps is cut from two to one, the cycle time is much reduced.
  • the single movement can be produced by pushing the integrated circuit off the foil and onto the die pad using a push needle. Thus, no bonding arm is required.
  • a plurality of integrated circuits are provided on the foil in a configuration corresponding to the configuration of respective die pads on the lead frame.
  • the plurality of integrated circuits can be brought into register with the respective die pads by positioning the foil in relation to the lead frame.
  • the plurality of dies can then be transferred to the die pads without moving the foil.
  • the integrated circuits are transferred simultaneously, such as by a plurality of respective push needles.
  • the lead frame is formed with means for holding an integrated circuit in position on the die pad until it is bonded there.
  • These means may be a vacuum source and an aperture formed in the die pad, connected to the vacuum source, and arranged to be in register with an integrated circuit placed on the die pad.
  • Fig. 1 which is composed of Figs. 1 (a) to 1 (e), shows the steps of a conventional method of placing an integrated circuit onto a die pad;
  • Fig. 2 which is composed of Figs. 2(a) to 2(f), shows the steps of a method which is an embodiment of the invention.
  • Fig. 3 which is composed of Fig. 3(a) and Fig. 3(b), is views of the embodiment of Fig. 2 in operation.
  • Fig. 2 which is composed of Figs. 2(a) to 2(f), elements having the same significance as corresponding elements of Fig. 1 are given the same reference numerals.
  • a foil 3 carrying a plurality of integrated circuits 1 on its underside is located such that the integrated circuits 1 are in register with a plurality of die pad portions 9 of one or more leadframes.
  • Each of the die pad portions 9 includes at least one aperture 11.
  • the integrated circuits are also in register with a plurality of push needles 5, which are movable in the vertical direction (i.e. the up-down direction in Fig. 2(a)).
  • Each integrated circuit 1 is adhered to foil 3 by a layer of adhesive, sufficiently securely to avoid die from dropping during wafer handling.
  • Fig. 2 the dies are shown spaced quite a long way from the leadframes, in fact in reality the spacing be short, so that the dies cannot move much to the side as they fall onto the die pads.
  • the push needles 5 are moved down so that their tips impact on the foil 3, and then push through the foil.
  • a vacuum source is connected to the apertures 11 of the die pads 9, so as to create suction through the apertures 11.
  • the integrated circuits 1 are pushed off the foil 3, and pulled downwardly by the suction, so that, as shown in Fig. 2(d), the integrated circuits 1 are transferred to the die pads 9, where the suction force holds them in the correct positions on the die pads 9.
  • guide elements may be provided to guide the integrated circuits 1 during the fall.
  • the push needles 5 are then retracted upwardly.
  • the foil 3 can be moved, for example to bring a fresh row of integrated cicuits into register with a fresh set of die pads.
  • Fig. 3 shows a top view of the process.
  • the die pads 9 are arranged in rows 11 (which are shown in the vertical direction in Fig. 3) of, for example, eight die pads 9. They are supported on a matrix (e.g. a lead frame) which carries them to the right as seen in Fig. 3 by increments equal to the spacing of the die pads in the left-right direction.
  • a matrix e.g. a lead frame
  • successive rows 11 of die pads 9 pass into the region 16, and remain in that position for a short time.
  • the die pads 9 of a given row 11 are in the region 16 they are in register with a row of eight push needles (not shown in Fig. 3, but extending in the direction into the page), which deposit eight respective integrated circuits 1 from a foil layer (not shown in Fig. 3) onto the die pads 9 of the row.
  • the rows 11 of die pads leaving area 16 each carry an integrated circuit 1 on each die pad 9.
  • the cycle time per integrated circuit is many times less than in the conventional integrated circuit deposit method described above. This means that the number of integrated circuits which can be deposited per second by a given depositing apparatus is many times higher than in the conventional method, which dramatically reduces the number of depositing apparatuses required to deposit integrated circuits on die pads at a given rate.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

L'invention concerne un procédé amélioré et un appareil de positionnement de circuits intégrés sur des languettes de connexion. A cet effet, une feuille (3) portant une pluralité de circuits intégrés (1) est placée de manière qu'ils (1) soient en correspondance avec les languettes de connexion (9) d'une grille de connexion. Les circuits intégrés (1) sont transférés vers les languettes de connexion (9) par un mouvement simple. Le mouvement peut être produit par l'écartement des circuits intégrés (1) de la feuille (3) et par le rapprochement simultané sur les languettes de connexion (9) à l'aide d'aiguilles (5) de poussée passant à travers la feuille (3). Ainsi, l'invention permet d'augmenter considérablement le nombre de circuits intégrés (1) sur les languettes de connexion (9) des grilles de connexion.
PCT/SG2003/000039 2003-02-24 2003-02-24 Procede ameliore et appareil de positionnement de circuits integres sur des languettes de connexion WO2004077551A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE10394148T DE10394148T5 (de) 2003-02-24 2003-02-24 Verbessertes Verfahren und verbesserte Vorrichtung zum Positionieren von integrierten Schaltungen auf Plättchenkontaktflächen
AU2003214781A AU2003214781A1 (en) 2003-02-24 2003-02-24 Improved method and apparatus for positioning integrated circuits on die pads
PCT/SG2003/000039 WO2004077551A1 (fr) 2003-02-24 2003-02-24 Procede ameliore et appareil de positionnement de circuits integres sur des languettes de connexion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SG2003/000039 WO2004077551A1 (fr) 2003-02-24 2003-02-24 Procede ameliore et appareil de positionnement de circuits integres sur des languettes de connexion

Publications (1)

Publication Number Publication Date
WO2004077551A1 true WO2004077551A1 (fr) 2004-09-10

Family

ID=32923959

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SG2003/000039 WO2004077551A1 (fr) 2003-02-24 2003-02-24 Procede ameliore et appareil de positionnement de circuits integres sur des languettes de connexion

Country Status (3)

Country Link
AU (1) AU2003214781A1 (fr)
DE (1) DE10394148T5 (fr)
WO (1) WO2004077551A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2877142A1 (fr) * 2004-10-21 2006-04-28 Commissariat Energie Atomique Procede de transfert d'au moins un objet de taille micrometrique ou millimetrique au moyen d'une poignee en polymere.
WO2009056469A1 (fr) * 2007-10-31 2009-05-07 Oerlikon Assembly Equipment Ag, Steinhausen Aiguille à perforer une feuille pour en détacher un petit dé
CN113808987A (zh) * 2020-06-15 2021-12-17 贤昇科技股份有限公司 转移设备及转移工件的方法
TWI798595B (zh) * 2020-10-22 2023-04-11 均華精密工業股份有限公司 晶粒固晶裝置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05326609A (ja) * 1992-05-19 1993-12-10 Sony Corp 半導体装置のワイヤボンディング装置およびワイヤボンディング方法
JPH09266219A (ja) * 1996-03-28 1997-10-07 Sony Corp 半導体装置の製造装置
US6204092B1 (en) * 1999-04-13 2001-03-20 Lucent Technologies, Inc. Apparatus and method for transferring semiconductor die to a carrier
EP1137061A1 (fr) * 1998-10-28 2001-09-26 Matsushita Electric Industrial Co., Ltd. Dispositif et procede de fonctionnement
WO2002021891A1 (fr) * 2000-09-08 2002-03-14 Siemens Aktiengesellschaft Courroie a composants, dispositif de prelevement de composants et procede pour prelever des composants d'une courroie a composants
US6423102B1 (en) * 1994-11-30 2002-07-23 Sharp Kabushiki Kaisha Jig used for assembling semiconductor devices

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05326609A (ja) * 1992-05-19 1993-12-10 Sony Corp 半導体装置のワイヤボンディング装置およびワイヤボンディング方法
US6423102B1 (en) * 1994-11-30 2002-07-23 Sharp Kabushiki Kaisha Jig used for assembling semiconductor devices
JPH09266219A (ja) * 1996-03-28 1997-10-07 Sony Corp 半導体装置の製造装置
EP1137061A1 (fr) * 1998-10-28 2001-09-26 Matsushita Electric Industrial Co., Ltd. Dispositif et procede de fonctionnement
US6204092B1 (en) * 1999-04-13 2001-03-20 Lucent Technologies, Inc. Apparatus and method for transferring semiconductor die to a carrier
WO2002021891A1 (fr) * 2000-09-08 2002-03-14 Siemens Aktiengesellschaft Courroie a composants, dispositif de prelevement de composants et procede pour prelever des composants d'une courroie a composants

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 018, no. 141 (E - 1520) 9 March 1994 (1994-03-09) *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 02 30 January 1998 (1998-01-30) *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2877142A1 (fr) * 2004-10-21 2006-04-28 Commissariat Energie Atomique Procede de transfert d'au moins un objet de taille micrometrique ou millimetrique au moyen d'une poignee en polymere.
WO2009056469A1 (fr) * 2007-10-31 2009-05-07 Oerlikon Assembly Equipment Ag, Steinhausen Aiguille à perforer une feuille pour en détacher un petit dé
CN113808987A (zh) * 2020-06-15 2021-12-17 贤昇科技股份有限公司 转移设备及转移工件的方法
TWI798595B (zh) * 2020-10-22 2023-04-11 均華精密工業股份有限公司 晶粒固晶裝置

Also Published As

Publication number Publication date
AU2003214781A1 (en) 2004-09-17
DE10394148T5 (de) 2006-02-09

Similar Documents

Publication Publication Date Title
KR100312898B1 (ko) 집적 회로 칩의 취급 및 분배 방법
EP1620889B1 (fr) Procede et appareil permettant l'acquisition multiplexee d'une puce nue a partir d'une plaquette
KR101949334B1 (ko) 반도체 패키지의 클립 본딩 장치 및 클립픽커
EP3935668B1 (fr) Mouvement multi-axes pour transfert de dispositifs à semi-conducteurs
KR20040041789A (ko) 에어 블로잉을 이용한 칩 픽업 방법 및 장치
JPH11512875A (ja) リード変形を有する接続多重超小形電子素子
CN112020767B (zh) 用于转移半导体器件的可变节距多针头
US20150114572A1 (en) Devices and methods of operation for separating semiconductor die from adhesive tape
WO2004077551A1 (fr) Procede ameliore et appareil de positionnement de circuits integres sur des languettes de connexion
CN110943008A (zh) 半导体制造装置、顶推夹具及半导体器件的制造方法
KR20080041471A (ko) 다이 본더
KR20090010441A (ko) 반도체 패키지 제조장치
JPH1041695A (ja) チップ部品装着装置
KR101657531B1 (ko) 다이 이송 유닛, 이를 포함하는 다이 본딩 장치 및 다이 이송 방법
JP2764532B2 (ja) バンプの接合方法および接合装置
JPH10189866A (ja) 縦横比の大きい集積回路チップおよびその製造方法
JP4875263B2 (ja) ダイボンディング方法
WO2006080809A1 (fr) Appareil permettant de traiter un emballage semi-conducteur
JP2000091403A (ja) ダイピックアップ方法およびそれを用いた半導体製造装置ならびに半導体装置の製造方法
US7211215B1 (en) Mould, encapsulating device and method of encapsulation
US11676934B2 (en) Clip bond semiconductor packages and assembly tools
JP3549340B2 (ja) バンプ形成方法及びその装置
JP3684033B2 (ja) 微細ボール配列ヘッド及びそれを用いた微細ボール配列方法
JPH08203962A (ja) チップ位置決め装置、チップステージおよびインナリードボンディング装置ならびに方法
JP2004531071A (ja) 小型増幅器および信号処理装置を製造する方法

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SC SD SE SG SK SL TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
RET De translation (de og part 6b)

Ref document number: 10394148

Country of ref document: DE

Date of ref document: 20060209

Kind code of ref document: P

WWE Wipo information: entry into national phase

Ref document number: 10394148

Country of ref document: DE

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8607