NANO-FABRICATED DATA STORAGE DEVICE AND OPERATION AND PRODUCTION METHODS THEREFOR
The invention relates to a nano-fabricated data storage device and production and operation methods therefor. In particular, although not exclusively, the invention relates to a data storage device produced and operated by means of Scanned Probe Microscopy (SPM) and nano-lithographic techniques.
BACKGROUND TO THE INVENTION In the field of computer technology and in particular in the area of data storage, the trend has been towards miniaturisation and improved performance. Digital data storage based on magnetic interactions is a well-established technology that is approaching fundamental limitations in terms of bit size and spacing and in terms of read/write speeds. Current technology is based on exploiting the magnetoresistance effect that yields a bit density of about 1 Gbit/cm2 with a read speed of around 200 Mbits/s. Other data storage solutions such as optical discs are cheaper, but store less data than magnetic discs. Transistor-based microchip memory, although able to be read data faster, also stores less data and is more expensive. Technologies exploiting Scanned Probe Microscopy (SPM) systems have been investigated extensively in the search for smaller scale data storage with higher performance. A pointed probe tip of a scanning probe microscope may be used, for example, to move individual molecules into prescribed, fixed, new positions on a surface and/or to modify molecules without change of position. This leads to the concept of using this technique to write and read data.
For example, IBM has demonstrated "thermal writing" to a substrate at a bit density of 80 Gbit/cm2 for an in-principle read speed of 1 Gbit/s.
There exists the possibility of utilising SPM techniques to achieve large storage capacity and high read/write rates.
DISCLOSURE OF THE INVENTION In one form, although it need not be the only or indeed the broadest form, the invention resides in a nano-fabricated, mass data storage device comprising: a storage medium having an electrically conducting substrate and a dielectric layer; writing means to write data in the form of one or more spatially resolved structures to said dielectric layer of said storage medium; reading means to read data previously written to said storage medium; and erasing means to erase data previously written to said storage medium, wherein said writing, reading and erasing means is at least one electrically conducting tip of a scanning probe microscope to which an electrical signal is applied.
Suitably, the substrate-dielectric layer combinations that may be employed include: semiconductor-semiconductor oxide; metal-metal oxide; metal-metal nitride; metal-metal carbide; metal-polymer.
The substrate may comprise one of silicon, aluminium, titanium or a polymer and the dielectric layer may comprise respectively one of silicon oxide, aluminium oxide, titanium dioxide or a polymer.
Suitably, the dielectric layer has a thickness of in the range of approximately 2-7nm. Preferably, the dielectric layer has a thickness of 2.4nm, 4.2nm or 6.4nm.
Preferably, the spatially resolved structures are in the form of pits in the dielectric layer. The pit may be formed in the dielectric layer to a depth substantially equal to a thickness of the dielectric layer, with an inner diameter of less than about 10nm. Suitably, the duration of the signal to form said pit is in the range of about 10-1 OOμs, but may be in the ns range.
Alternatively, the spatially resolved structures protrude above a surface of the dielectric layer. The spatially resolved structures may be in the form of dots having an apparent diameter in the range of about 30-40nm and a height in the range of about 8-1 Onm. The spatially resolved structures may alternatively be in the form of lines having a width in the range of about 10-30nm and a height in the range of about 2-5nm.
Suitably, the tip of the scanning probe microscope has a radius of curvature at its apex in the range of about 20-30nm and a height in the range of about 3- 20μm. A plurality of said electrically conducting tips may be arranged in a parallel array.
Suitably, the data is stored in said storage medium in digital format and the spatially resolved structures representing said data are of approximately the same height or depth.
Alternatively, the data is stored in said storage medium in analogue format and the spatially resolved structures representing said data are of varying heights and/or depths.
Preferably, the amplitude and duration of the signal applied to the tip is selectable.
In another form, the invention resides in a method of writing data to a storage medium, said storage medium having an electrically conducting substrate
and a dielectric layer, said method including the steps of: applying an electrical signal to a tip of a scanning probe microscope; and producing one or more spatially resolved structures in said dielectric layer, said structures representing said data. Preferably, the spatially resolved structures are in the form of pits.
Alternatively, the spatially resolved structures protrude above a surface of the dielectric layer.
Suitably, the duration of the signal to produce the spatially resolved structures protruding above a surface of the dielectric layer is of the order 0.1 ms. In a further form, the invention resides in a method of reading data previously written on a storage medium, said storage medium having an electrically conducting substrate and a dielectric layer, said method including the steps of: rastering a tip of a scanning probe microscope over a surface of the dielectric layer; and reading said data by detecting a presence or absence of one or more spatially resolved structures on said storage medium.
Preferably, said reading step includes detecting the presence or absence of one or more pits in said dielectric layer.
Alternatively, said reading step includes detecting the presence or absence of one or more structures protruding above a surface of the dielectric layer.
In a yet further form, the invention resides in a method of erasing data previously written to a storage medium, said storage medium having an electrically conducting substrate and a dielectric layer, said method including the steps of: applying an electrical signal to a tip of a scanning probe microscope; and, removing a portion of said dielectric layer at a location of said data to be
erased, the removal of said portion of said dielectric layer erasing said previously written data.
Suitably, the portion of said dielectric layer is removed to a depth substantially equal to the thickness of the dielectric layer. In another form, the invention resides in a method of erasing data previously written to a storage medium, said storage medium having an electrically conducting substrate and a dielectric layer, said data written in the form of one or more pits in said dielectric layer, said method including the steps of: applying an electrical signal to a tip of a scanning probe microscope; and, filling said one or more pits with one or more structures of said dielectric material to erase said previously written data.
BRIEF DESCRIPTION OF THE DRAWINGS To assist in understanding of the invention and to enable the invention to be put into practical effect preferred embodiments will now be described by way of example only and with reference to the accompanying drawings, wherein:
FIG. 1 shows an image of a tip-induced structure in the form of a pit formed in a silicon oxide layer in accordance with one of the methods of the present invention; FIG. 2 shows an image of a structure produced by tip-induced silicon oxide removal in accordance with another method of the present invention; FIG. 3 shows a contour line of the structure in FIG 2; FIG. 4 shows an image of a 3x3 array of spatially resolved silicon oxide structures representing data produced in accordance with a further method of the present invention;
FIG. 5 shows an image of a sequence of spatially resolved silicon oxide structures representing data produced in accordance with another method of the present invention;
FIG. 6 shows a contour line of two of the spatially resolved silicon oxide structures of FIG 5;
FIG. 7 shows an image of a large area spatially resolved silicon oxide structure;
FIG. 8 shows a contour line of the silicon oxide structure shown in FIG. 7; and FIG. 9 shows a schematic diagram of the data storage device in accordance with the present invention.
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to methods for producing spatially resolved structures on, and removing said structures from, a substrate comprising a dielectric layer using a scanned probe microscope tip. The methods can be used to write and re-write data to, and read and erase data from such a substrate of a nano-fabricated data storage device, which forms another aspect of the present invention. The methods and data storage device will be described with reference to a silicon substrate comprising a silicon oxide layer. However, the present invention is not limited to these materials and any thin dielectric material on a flat, electrically conducting surface may be employed. Hence, the substrate-dielectric layer combinations that may be employed include, but are not limited to: semiconductor- semiconductor oxide; metal-metal oxide; metal-metal nitride; metal-metal carbide;
metal-polymer. Some specific substrate-dielectric layer combination examples include: aluminium-aluminium oxide; titanium-titanium dioxide; silicon-silicon nitride; silicon-silicon carbide.
In the case of a silicon substrate with a silicon oxide layer, the starting specimen is an n-type industry-standard wafer grown by the Cz-method with p- doping yielding a typical resistivity of 9-15 Ω-cm. The original substrates have a typical rms roughness of 0.1-0.2nm. Fully dense and uniform silicon oxide layers of similar rms roughness are then grown thermally on the substrates at 100 torr O2 in an ASM clustered furnace. The average thickness of the thermally grown oxide layer is determined by ellipsometry.
The samples selected were approximately 2x12mm2 and comprised an approximate oxide layer thickness of 2.4nm, 4.2nm or 6.4nm. The samples were cleaned by spinning under iso-propyl-alcohol and rinsed with distilled water. The samples were then dried in a stream of nitrogen gas and placed in a vacuum envelope of 10"2-10"3 Pa of a standard JEOL instrument.
The surface of each sample was imaged using Atomic Force Microscopy (AFM) image analysis to check that it was free from artefacts by imaging a 1 - 4μm2 area in the contact mode with a lever-imposed force loading of 10-1 OOnN and zero bias. In accordance with the invention, the electrically conducting SPM tip is manipulated to produce spatially resolved structures that represent data. The presence of such a structure may represent a 1 or 0 and the absence of such a structure a 0 or 1 respectively. The spatially resolved structures may be in the form of pits having a specific depth in the dielectric layer. The spatially resolved structures may be structures on the surface of the dielectric layer such as dots or
lines of dielectric material having a specific height above the dielectric layer. An example of a pit in a silicon oxide layer is shown, for example, in FIG. 1. A series of silicon oxide dots is shown in FIG. 4 and a series of silicon oxide lines is shown in FIG. 5. The pit shown in FIG. 1 is formed in a pre-existing silicon oxide layer 2.4nm thick by applying a single signal of amplitude 11V and duration 0.1ms to a W2C coated SPM tip. However, a pit has been achieved with a signal duration in the range of approximately 10-100μs and it is envisaged that signal durations of the order of ns will be achievable for pit formation. The inner diameter of the pit is less than about 10nm, allowing for tip shape convolution. The pit has a depth corresponding approximately to the thickness of the pre-existing silicon oxide layer and comprises a slightly raised rim around its perimeter.
Although pit formation has not been exhibited for signal durations shorter than 10μs, the mechanism for producing such pits is potentially much faster than the mechanism that controls the production of oxide structures such as dots and lines as described later herein.
The formation of a pit, or the writing of a data bit representing a 1 or 0, may be dependent on a dielectric breakdown mechanism. The electrostatic field strength used is typically 10-30% higher than the field strength required for optimum oxide growth conditions. The fields used are also comparable with those that result in dielectric breakdown for a Metal Oxide Semiconductor (MOS) gate dielectric. Accordingly, there will be a non-linear breakdown event that progresses until the field is removed, the result of the breakdown being the removal of the silicon oxide in the oxide layer, i.e. the formation of a pit. The rate of formation of the pit in the silicon oxide may be limited by the
capacitive rise time of the electrostatic field at the junction between the SPM tip and the oxide layer. The area and depth of the pit is then controlled by the amplitude of the signal above breakdown and the duration of the signal. The extremely fast write speed of this method is defined by the duration of the signal, which is of the order of 0.01ms.
In accordance with the invention, the electrically conducting SPM tip can be manipulated to remove an area of the pre-existing silicon oxide layer larger than the pits in the previous example. An image of a structure produced by the removal of such an area of the pre-existing oxide layer is shown in FIG. 2 and a profile of the structure is shown in FIG. 3. Tip-induced oxide removal over an area 300x300nm2 was achieved using a Nanosensor Pointprobe™ tip with a radius of curvature at the apex of about 10-20nm and a height of about 15μm. The scan speed was 2.8μm/s with a substrate-to-tip bias of 3V. The beam length was 450μm with a width of 50μm and a thickness of 2μm. The initial thickness of the pre-existing silicon oxide layer was approximately 2.4nm and the depth of the structure was approximately 2nm, as illustrated in FIG. 3. The depth of the structure is therefore comparable with the thickness of the pre-existing oxide layer. Removal of the oxide layer in this way was achieved for bias voltages in the range 2 - 4V.
The removal of the large area of oxide layer may be attributed to a mechanism in which anions are transported laterally by the tip. A thin, aqueous surface chemical environment may result from atmospheric degradation of the silicon oxide, in which the combination of kinetics and thermodynamics promote tip- induced lateral transport.
As an alternative to producing spatially resolved structures in dielectric layers in the form of pits to represent data, the spatially resolved structures may be
produced in the form of structures of dielectric material protruding above the surface of the dielectric layer. Where a silicon oxide substrate comprising a preexisting silicon oxide layer is utilized, the silicon oxide structures are formed beneath the surface of the silicon oxide layer essentially at the silicon/silicon oxide interface, using a range of bias voltage values, scan speeds and force loadings. A larger field of view, centred on the location of the surface growth, may then be re- scanned with zero bias in order to reveal the topographical effects induced by the tip-to-substrate bias.
FIG. 4 shows a 3x3 array of spatially resolved silicon oxide structures representing data "bits". Each structure has an apparent diameter of about 30- 40nm and a height of about 8-1 Onm. The dots are written to a 2.4nm thick silicon oxide coating by applying a positive sample bias voltage of 8V and by keeping the W2C coated SPM tip stationary for approximately 1s. The duration of the signal applied to the SPM tip is approximately 0.1ms. The tip radius of curvature at the apex was approximately 20-30nm with a height of approximately 15-20μm. The beam characteristics were: length 300μm, width 35μm and thickness 1 μm. The irregularities in the shapes of the dots shown in FIG. 1 are caused by thermal drift.
As an alternative to dots, the spatially resolved structures may be produced in the form of lines. FIG. 5 shows a sequence of lines denoting the numerals 1-7 in binary code from left to right of the image, with the least significant bit being at the top of the image. The sequence was written as lines approximately 20-30nm in width and about 2.5 - 4nm in height above the 2.4nm thick silicon oxide layer. A W2C coated tip and a sample bias of 8V were again used. The contour line in FIG. 6 illustrates the heights, widths and separation of two of the lines. The radius of curvature of the tip apex is approximately 20nm or greater and thus the line width of
the lines shown in FIGS. 5 are less than approximately 15nm.
Repeating the above silicon oxide production processes with thicker thermally grown pre-existing oxide layers at correspondingly higher bias voltages tended to result in less uniform oxide thicknesses. Higher bias voltages also make it more difficult to maintain the integrity of the tip conditions, possibly due to excessive ohmic heating at the point contact.
The production of the silicon oxide structures shown in FIGS. 4-6 may be attributed to a diffusion-limited mechanism, whereby oxidants are transported as anions to the silicon/silicon oxide interface by the electrostatic field established between the SPM tip and the silicon substrate. The silicon oxide is produced at the aforementioned interface.
Factors affecting the mechanism that controls the production rate of the structures in these examples include the electrostatic field strength, the thickness of the pre-existing silicon oxide film, the availability of mobile oxidants, the existence of charge compensation and the existence of a hypothetical insulating layer on the tip. Furthermore, there is likely to be a native oxide coating of approximately 0.5- 1 nm covering the tip. The spatial resolution of the structures depends on the shape of the tip, the size of the effective tip-to-surface contact area and the extent of the thermal drift. The size of the structure then depends on the dwell time of the tip at the particular location (i.e. the scan speed). Many of these factors will affect the production mechanism where other materials are used for the substrate and dielectric layer.
This technique may be used to write data onto and read data from dielectric layers on substrates, the data "bits" being in the form of the spatially resolved silicon oxide structures. Direct writing of nano-lithographic patterns on to the silicon
substrate is achievable with a high resolution, i.e. with a line width down to about 15-20nm.
The data read rate is essentially given by the raster rate of the scanning probe microscope and the mechanical eigenmode of the probe. However, the write speed is likely to be limited by the transit time for ionic diffusion. Existing SPM technology delivers the simultaneous writing of up to 10 lines at a linear speed of about 50-100μm/s, which is equivalent to 104 -105 pattern elements or line segments per second. It is envisaged that SPM technology, with smaller and stiffer probes and faster electronics, will add an additional factor of 100 to the speed with a further factor of 100 achievable with the implementation of two-dimensional parallel probe arrays.
A further alternative technique is the production of larger area structures of dielectric material protruding above the surface of the dielectric layer. FIG.7 shows a 300x300nm2 patch that was produced using a W2C coated tip on a silicon sample comprising a 2.4nm silicon oxide dielectric layer. However, the larger area structures may be produced with or without a pre-existing oxide layer. The sample bias voltage was 9V, which is maintained whilst rastering the tip across the sample, and the scan speed was 5.6μm/s. Lower sample voltages may also be employed. A contour line through the patch is shown in FIG. 8. Since this method does not require a pre-existing oxide layer, this writing method may be used to fill in the large area pits described above, thus erasing the effect of large area dielectric removal. For example, the removal of a large area of dielectric may represent the presence or absence of data and the large area writing method will erase or reverse such a representation. In accordance with another aspect of the invention, the aforementioned
methods may be implemented in the operation of a nano-fabricated- data storage device. An example of such a data storage device is shown schematically in FIG. 9. The device comprises a storage medium in the form of a disc-shaped substrate 1 comprising a dielectric surface layer or film. Examples of substrate-dielectric layer combinations may include those described above. An electrically conducting SPM tip 2, which is of the order of nanometres across at the tip, acts as the read/write/erase "head". A parallel array of such tips may be provided, which would increase read and write speeds as described below. An electrostatic field is established between the tip 2 and the substrate 1 using a variable voltage source 3 that controls the signal amplitude. A temporal controller 4 allows the signal duration to be selected. Alternatively, the current to the SPM tip 2 may be controlled, which, it is envisaged, produces more reliable and effective control over the formation of the spatially resolved structures, thus improving stability and reproducibility.
The aforementioned methods of producing spatially resolved structures in the dielectric layer provide very selective high-speed data write, read and erase functions. The aforementioned method of removing larger areas of dielectric layer provides the additional function of erasing entire regions of data. Thus, the various aspects of the present invention support the complete data storage sequence of write-read-erase-rewrite-reread events. Bit spacing of about 30-50nm at densities of up to 1015/m2 are achievable using the methods of the present invention. Using a single probe, a writing speed of around 100 kHz and a reading speed of around 10-100 kHz have been achieved.
It is envisaged that using parallel probe arrays in combination with SPM technology will achieve writing speeds in the region of 10 GHz and improve the reading speed by a factor of about 104.
Spatially resolved structures in the dielectric layer in the form of pits are the preferred mode of data representation to the dots or lines protruding above the dielectric layer surface. The pits can be made smaller than the dots or lines, which provides an increased data storage capacity for a given dielectric area. The pits can be formed more accurately than the dots or lines and the occurrence of spurious pits is rare, thus providing a more reliable data storage device. The pits require less time to produce than either the dots or lines, thus reducing the data write and erase times.
As previously illustrated, the spatially resolved structures may be produced for example, as dots or, for example, as lines. Although a line requires a longer time to produce than a dot, the lines may be produced more densely on the substrate than the dots, thus increasing the data storage capacity for a given substrate area.
Furthermore, it is likely that lines will be read more reliably than dots since, with reference to the dielectric surface, the lines comprise an extended raised region in comparison with the dots, which constitute a more limited raised region. The extended raised region of the lines provides a larger area to be read than the area provided by the dots. Alien particles such as dust, or any small, spuriously- formed dielectric structures, such as those formed by thermal drift, represent a smaller area when compared to the lines than when compared to the dots. The dust or spuriously formed particles are therefore less likely to be confused with the bits of data represented as lines. Conversely, reading of data represented by dots is more likely to be affected by dust or the like and thus cause errors in reading because of the smaller area presented by the dots. In any event, pattern recognition software may be employed to eliminate erroneous features associated
with the presence of dust and dirt.
As previously stated, the height or depth of the spatially structures is dependent on controllable factors and thus the height or depth of the structures may be selectable. It is therefore envisaged that an analogue data storage medium comprising spatially resolved silicon oxide structures of varying heights or depths can be achieved using the aforementioned methods, in addition to the digital data storage medium.
Although the tip height in the examples was about 15μm, tip heights of 3- 5μm have also been successfully employed and shorter tips are likely to be preferable due to their superior mechanical stability over longer tips.
Throughout the specification the aim has been to describe the invention without limiting the invention to any one embodiment or specific collection of features. Persons skilled in the relevant art may realize variations from the specific embodiments that will nonetheless fall within the scope of the invention.