WO2004034544A1 - A protection device for preventing the flow of undesirable differential mode transients - Google Patents

A protection device for preventing the flow of undesirable differential mode transients Download PDF

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Publication number
WO2004034544A1
WO2004034544A1 PCT/AU2003/001326 AU0301326W WO2004034544A1 WO 2004034544 A1 WO2004034544 A1 WO 2004034544A1 AU 0301326 W AU0301326 W AU 0301326W WO 2004034544 A1 WO2004034544 A1 WO 2004034544A1
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WO
WIPO (PCT)
Prior art keywords
solid state
connection points
cable
protection
state protection
Prior art date
Application number
PCT/AU2003/001326
Other languages
French (fr)
Inventor
Richard Allen Harris
Original Assignee
Fultec Pty Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fultec Pty Ltd filed Critical Fultec Pty Ltd
Priority to JP2004542092A priority Critical patent/JP4247321B2/en
Priority to AU2003266838A priority patent/AU2003266838A1/en
Priority to EP03747722A priority patent/EP1550194B1/en
Publication of WO2004034544A1 publication Critical patent/WO2004034544A1/en
Priority to US11/097,452 priority patent/US7372688B2/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/18—Automatic or semi-automatic exchanges with means for reducing interference or noise; with means for reducing effects due to line faults with means for protecting lines
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H02H9/025—Current limitation using field effect transistors
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/005—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection avoiding undesired transient conditions
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/06—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage using spark-gap arresters

Definitions

  • the present invention relates to electrical surge protection devices.
  • FIG. 1 is a schematic diagram of a typical arrangement whereby a cable including a pair of conductors 2, 4 terminate on an isolation transformer 6 which is connected to a load 12.
  • the potential on both conductors 2 and 4 will vary virtually identically thereby causing substantially zero net current to flow through the primary coil 8 of transformer 6.
  • the common mode transient does not induce a fault current in secondary coil 10 and so isolation transformer 6 provides common mode protection to load 12.
  • a voltage transient affects one of conductors 2 and 4 substantially more than the other then a surge current will flow through primary coil 8 and induce a transient voltage across the output terminals of secondary coil 10.
  • the surge current may damage the isolation device and may also damage the equipment that is intended to be protected. Consequently, it will be realised that while an isolation transformer provides a good measure of protection from common mode transients it does not provide protection from differential mode surges.
  • LANs local area computer data networks
  • a digital processing card in the form of a network interface card (NIC), or as it is often called a "LAN card” couples to J8-45 plug 22 of LAN cable 16 by means of J8-45 socket 18.
  • LAN card 14 includes an isolation transformer module 20 that couples socket 18 to a data processing chip 24 which in turn communicates with the central processor 26 of a workstation by means of PCI slot connectors 28 that are received into a PCI connector 30 which is in turn mounted on a mainboard 32 of the workstation.
  • Figure 4 is a schematic diagram of the prior art card of Figure 3 wherein like indicia are used to refer to like components.
  • the card receives and transmits data pulses by means of respective balanced twisted pair wires that are enclosed in LAN cable 16 and which terminate on the RX+ and RX- pins and TX+ and TX- pins of J8-45 socket 18.
  • Isolation module 20 includes a pair of transformers 20A and 20B which respectively provide isolation for processing chip 24 from transients on the transmit and receive twisted pairs.
  • isolation transformers 20A and 20B provide considerable immunity from damaging common mode transients but not from differential mode transients. For example, in the event of a voltage transient occurring at the RX+ pin but not on the RX- pin then that transient will be transmitted across the isolation transformer and may damage processing chip 24.
  • a differential mode surge protection apparatus including: a pair of input connection points and a corresponding pair of output connection points; a first solid state protection device in series between a first one of the pair of input connection points and a first one of the corresponding pair of output connection points; and a second solid state protection device in series between a second one of the pair of input connection points and a second one of the corresponding pair of output connection points.
  • the first and second solid state protection devices may be integrated into a single miniaturised protection package.
  • a surge arrestor is arranged to supplement protection conferred by the first and second solid state protection devices and selected so that in use it triggers prior to breakdown of either the first or second solid state protection devices.
  • the surge arrestor may be connected across the input connection points.
  • the first and second solid state protection devices comprise a matched pair of unipolar transient blocking units (TBUs), each unipolar transient blocking unit including two series connected field effect transistors.
  • TBUs unipolar transient blocking units
  • the differential mode protection device may be provided in combination with a digital signal processing card such as a LAN card.
  • the solid state protection devices are disposed between a common mode isolation device of the digital signal processing card and external connection points of the digital signal processing card.
  • the solid state protection devices be disposed between an output side of the isolation device and a digital signal processing chip of the card.
  • the apparatus may be provided further including a common mode isolation device disposed between the first solid state protection device and the second solid state device and the output connection points.
  • the common mode isolation device may comprise an isolation transformer.
  • the common mode isolation device could comprise another suitable device such as an opto-isolator.
  • a cable may be provided that includes one or more of the differential mode surge protection apparatus.
  • the pair of input connection points may terminate upon a first connector of the cable and the output connection points may terminate upon a second connector of the cable.
  • the first connector may comprise a socket and the second connector a plug.
  • the first connector may comprises a plug and the second connector may comprise a plug.
  • the cable comprises a LAN cable and the first and second connectors comprise LAN cable connectors.
  • Figure 1 is a schematic diagram of a prior art common mode protection circuit.
  • Figure 2 is a schematic diagram of a further prior art common mode protection circuit.
  • Figure 3 depicts the external appearance of a prior art network interface card.
  • Figure 4 is a schematic diagram of the network interface card of Figure 3.
  • FIG. 5 is a schematic diagram of surge protection module according to an embodiment of the present invention.
  • Figure 6 is a schematic diagram of a differential mode protection device package according to an embodiment of the invention.
  • Figure 7 is a schematic diagram of a circuit of the differential mode protection device package of Figure 6.
  • Figure 8 is a schematic diagram of a variation to the circuit of the differential mode protection device package of Figure 7.
  • Figure 9 is a schematic diagram of a network interface card according to an embodiment of the present invention.
  • Figure 10 depicts the external appearance of a differential mode surge protection apparatus according to a further embodiment of the present invention.
  • Figure 11 is a schematic diagram of the protection apparatus of Figure 7.
  • Figure 12 depicts the external appearance of a differential mode surge protection apparatus according to a further embodiment of the invention.
  • Isolation module 34 includes a common mode isolation device 42 which in the present embodiment comprises a transformer although it will be realised that it could instead be some other common mode isolation device such as an opto-isolator.
  • Isolation module 34 includes two identical series connected unipolar transient blocking units (TBUs) 36 and 38 connected at respective sides of primary coil 40 of transformer 42.
  • TBUs unipolar transient blocking units
  • a TBU is a transistor device configured to open-circuit once the current through it reaches a certain predetermined trigger level.
  • TBU 36 consists of two depletion mode FETs being N-channel FET Q1 and P-channel FET Q2.
  • Q1 and Q2 are connected with their conduction paths in series.
  • the gate electrode of transistor Q1 is coupled to the drain electrode of transistor Q2.
  • the source electrodes of Q1 and Q2 are coupled to each other and the drain electrode of transistor Q1 is coupled to a first terminal 44.
  • Resistor R1 extends between the drain electrode of Q1 and the gate electrode of Q2.
  • the drain of Q2 is connected to a first side of primary coil 40.
  • TBU 36 functions as a fuse for positive current flowing from terminal 44 through to the primary coil.
  • TBU 38 The structure of TBU 38 is identical to that of TBU 36 so that TBU 38 acts as a fuse for positive current flowing from terminal 46 towards primary coil 40.
  • TBU 38 and TBU 36 are selected so that they have as close as possible insertion loss in order that the balance of the circuit is maintained.
  • TBUs 36 and 38 protect a load connected across terminals 43 and 45 from differential surge currents by triggering to an open circuit when the current through the load reaches the preset trigger level. If the differential current into terminal 44 attains the trigger level then TBU 36 will open-circuit. Alternatively if the differential current flowing out of terminal 44 attains the trigger level then TBU 38 will trigger. Of course, the TBUs could be reverse-orientated relative to the configuration depicted in Figure 4. In that case if the differential current into terminal 44 attains the trigger level then TBU 38 would open circuit and conversely if the differential current flowing out of terminal 44 attained the trigger level then TBU 36 would trigger.
  • surge arrestor 48 may be included.
  • a gas arrestor, as depicted at item 48 is typically used. However, any suitable surge arrestor could be used as an alternative.
  • Surge arrestor 48 is connected line-to-line across terminals 44 and 46 and is selected so that it will trigger at 90% of the TBUs' breakdown voltage.
  • the surge arrestor will trigger and short the surge before it can cause breakdown of the triggered TBU and subsequently be transmitted across isolation transformer 42 to potentially damage any load connected between output terminals 43 and 45.
  • Suitable TBU's may be purchased from Fultec Pty Ltd of, Building 76A, University of Queensland Campus, St Lucia, Brisbane, Queensland, Australia. Circuits for implementing suitable TBUs are described in granted United States patent No. 5,742,463 and in international patent application No. PCT/AU03/00175, both by the present inventor. The descriptions of both US 5,742,463 and PCT/AU 03/00175 are hereby both incorporated in their entireties by cross-reference.
  • a differential mode protection device 43 is conveniently provided in a single package having four connectors A, B, C, D as shown.
  • the device may be provided with or without a surge arrestor as desired.
  • a schematic diagram of the internal circuit of device 43 without surge arrestor is shown in Figure 7 whereas a schematic for a further version with surge arrestor is shown in Figure 8.
  • Further variations of the device are possible. For example an eight terminal version of the device might be provided including two of the circuits of Figure 7 or Figure 8.
  • FIG. 9 A schematic diagram of a digital processing card, in the present example a LAN card, according to a preferred embodiment of the invention is shown in Figure 9. It will be noted that the LAN card of Figure 9 incorporates two pairs of TBUs 51 A, 51 B and 52A, 52B placed in series with the TX+, TX-, and RX+, RX- terminals of socket 18 respectively.
  • the TBUs are each identical to TBUs 36 and 38 of Figure 5 and might be provided in an eight terminal version of device 43 of Figure 6.
  • Surge arrestors 19 and 21 are connected across the TX+, TX- and RX+, RX- pins respectively.
  • the surge arrestors are selected so that they will trigger at 90% of the TBUs' breakdown voltage.
  • the surge arrestors will trigger and short the surge before it can cause breakdown of the TBUs and subsequently be transmitted across isolation transformer to potentially damage logic circuitry 24.
  • FIG 10 depicts the external appearance of a differential mode surge protector 50 according to a further embodiment of the present invention while Figure 11 is a corresponding schematic diagram.
  • Surge protector 50 includes a J8-45 plug 52 for connection to a socket of a LAN card.
  • the J8-45 plug is coupled to a differential mode protection module 54 which includes TBU's and surge arrestors as shown in Figure 11.
  • the surge protector further includes a J8- 45 socket 58 which is coupled to circuitry in module 54 and which is intended to receive a LAN cable.
  • Figure 12 is a variation of the differential mode surge protector of
  • Figures 10 and 11 being a cable 63 incorporating differential mode protection according to the present invention.
  • Cable 63 includes a connector 52 for connection to a digital processing card.
  • a differential mode protection module 54 identical to the one in Figure 10 and containing the circuitry depicted in Figure 11 is coupled to connector 52.
  • a relatively long run of cable 61 connects protection module 54, which includes TBU's and surge arrestors as shown in Figure 11, to remote connector 59.
  • connector 52 be plugged into a digital processing card such as a LAN card whereas connector 59 is plugged into a remote device such as a network hub.
  • a second module may be incorporated proximal to plug 59.
  • the cable shown in Figure 12 are of course possible.
  • the circuitry that is provided inside housing 54 might be integrated into one or the other of connectors 52 and 59.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Signal Processing (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Protection Of Static Devices (AREA)

Abstract

A differential mode surge protection apparatus (34) includes first (36) and second (38) solid state protection device in series between respective input and output connection points. The apparatus may be provided in conjunction with a common mode protection apparatus such as an isolation transformer (42). Alternatively, the apparatus may be provided integrated into a single miniaturised protection package. In a preferred embodiment the apparatus includes a surge arrestor (48) arranged to supplement protection conferred by the first (36) and second (38) solid state protection device and selected so that in use it triggers prior to breakdown of either the first or second solid state protection devices. The apparatus may be incorporated into digital processing cards such as LAN cards and also into cables to conveniently provide differential mode protection.

Description

A PROTECTION DEVICE FOR PREVENTING THE FLOW OF UNDESIRABLE DIFFERENTIAL MODE TRANSIENTS
Field of the Invention The present invention relates to electrical surge protection devices.
Background to the Invention
Wherever electronic circuitry is coupled to an external cable run, a risk of damage to the circuitry, due to the transmission of transient overvoltages by the cable run, may occur. Such overvoltages may be due to any one of several factors. For example, lightning, electrostatic discharge or malfunction of equipment at a remote end of the cable may be responsible. Several techniques exist for isolating circuitry from potentially damaging surges. These include, inductive coupling as shown in Figure 1, capacitive coupling, and opto-isolation as shown in Figure 2. Isolation transformers are usually used to implement inductive coupling.
Figure 1 is a schematic diagram of a typical arrangement whereby a cable including a pair of conductors 2, 4 terminate on an isolation transformer 6 which is connected to a load 12. In the event of a common mode voltage surge the potential on both conductors 2 and 4 will vary virtually identically thereby causing substantially zero net current to flow through the primary coil 8 of transformer 6. As a result, the common mode transient does not induce a fault current in secondary coil 10 and so isolation transformer 6 provides common mode protection to load 12. However, in the event that a voltage transient affects one of conductors 2 and 4 substantially more than the other then a surge current will flow through primary coil 8 and induce a transient voltage across the output terminals of secondary coil 10. The surge current may damage the isolation device and may also damage the equipment that is intended to be protected. Consequently, it will be realised that while an isolation transformer provides a good measure of protection from common mode transients it does not provide protection from differential mode surges.
One area where isolation transformers are used significantly is in the implementation of local area computer data networks (LANs). With reference to Figure 3, a digital processing card in the form of a network interface card (NIC), or as it is often called a "LAN card", couples to J8-45 plug 22 of LAN cable 16 by means of J8-45 socket 18. LAN card 14 includes an isolation transformer module 20 that couples socket 18 to a data processing chip 24 which in turn communicates with the central processor 26 of a workstation by means of PCI slot connectors 28 that are received into a PCI connector 30 which is in turn mounted on a mainboard 32 of the workstation.
Figure 4 is a schematic diagram of the prior art card of Figure 3 wherein like indicia are used to refer to like components. The card receives and transmits data pulses by means of respective balanced twisted pair wires that are enclosed in LAN cable 16 and which terminate on the RX+ and RX- pins and TX+ and TX- pins of J8-45 socket 18.
Isolation module 20 includes a pair of transformers 20A and 20B which respectively provide isolation for processing chip 24 from transients on the transmit and receive twisted pairs. As previously explained, isolation transformers 20A and 20B provide considerable immunity from damaging common mode transients but not from differential mode transients. For example, in the event of a voltage transient occurring at the RX+ pin but not on the RX- pin then that transient will be transmitted across the isolation transformer and may damage processing chip 24.
It is an object of the present invention to provide a convenient means for addressing the problems posed by differential mode transients as discussed above.
Summary of the Invention
According to a first aspect of the present invention there is provided a differential mode surge protection apparatus including: a pair of input connection points and a corresponding pair of output connection points; a first solid state protection device in series between a first one of the pair of input connection points and a first one of the corresponding pair of output connection points; and a second solid state protection device in series between a second one of the pair of input connection points and a second one of the corresponding pair of output connection points.
The first and second solid state protection devices may be integrated into a single miniaturised protection package.
Preferably a surge arrestor is arranged to supplement protection conferred by the first and second solid state protection devices and selected so that in use it triggers prior to breakdown of either the first or second solid state protection devices. The surge arrestor may be connected across the input connection points.
Preferably the first and second solid state protection devices comprise a matched pair of unipolar transient blocking units (TBUs), each unipolar transient blocking unit including two series connected field effect transistors.
The differential mode protection device may be provided in combination with a digital signal processing card such as a LAN card.
Preferably the solid state protection devices are disposed between a common mode isolation device of the digital signal processing card and external connection points of the digital signal processing card. Alternatively, it is possible that the solid state protection devices be disposed between an output side of the isolation device and a digital signal processing chip of the card.
Where the apparatus is not provided in combination with a digital processing card, it may be provided further including a common mode isolation device disposed between the first solid state protection device and the second solid state device and the output connection points. The common mode isolation device may comprise an isolation transformer.
Alternatively, the common mode isolation device could comprise another suitable device such as an opto-isolator.
According to a further aspect of the present invention a cable may be provided that includes one or more of the differential mode surge protection apparatus. In that case the pair of input connection points may terminate upon a first connector of the cable and the output connection points may terminate upon a second connector of the cable. The first connector may comprise a socket and the second connector a plug. Alternatively the first connector may comprises a plug and the second connector may comprise a plug.
Typically the cable comprises a LAN cable and the first and second connectors comprise LAN cable connectors.
Further preferred features of the various aspects of the invention will be apparent from the following description of preferred embodiments which will be made with reference to a number of figures.
Brief Description of the Figures
Figure 1 is a schematic diagram of a prior art common mode protection circuit.
Figure 2 is a schematic diagram of a further prior art common mode protection circuit. Figure 3 depicts the external appearance of a prior art network interface card.
Figure 4 is a schematic diagram of the network interface card of Figure 3.
Figure 5 is a schematic diagram of surge protection module according to an embodiment of the present invention.
Figure 6 is a schematic diagram of a differential mode protection device package according to an embodiment of the invention.
Figure 7 is a schematic diagram of a circuit of the differential mode protection device package of Figure 6. Figure 8 is a schematic diagram of a variation to the circuit of the differential mode protection device package of Figure 7.
Figure 9 is a schematic diagram of a network interface card according to an embodiment of the present invention.
Figure 10 depicts the external appearance of a differential mode surge protection apparatus according to a further embodiment of the present invention.
Figure 11 is a schematic diagram of the protection apparatus of Figure 7. Figure 12 depicts the external appearance of a differential mode surge protection apparatus according to a further embodiment of the invention.
Detailed Description of Preferred Embodiment Referring now to Figure 5, an isolation module 34 according to an embodiment of the present invention is depicted. Isolation module 34 includes a common mode isolation device 42 which in the present embodiment comprises a transformer although it will be realised that it could instead be some other common mode isolation device such as an opto-isolator. Isolation module 34 includes two identical series connected unipolar transient blocking units (TBUs) 36 and 38 connected at respective sides of primary coil 40 of transformer 42.
A TBU is a transistor device configured to open-circuit once the current through it reaches a certain predetermined trigger level. TBU 36 consists of two depletion mode FETs being N-channel FET Q1 and P-channel FET Q2. Q1 and Q2 are connected with their conduction paths in series. The gate electrode of transistor Q1 is coupled to the drain electrode of transistor Q2. The source electrodes of Q1 and Q2 are coupled to each other and the drain electrode of transistor Q1 is coupled to a first terminal 44. Resistor R1 extends between the drain electrode of Q1 and the gate electrode of Q2. The drain of Q2 is connected to a first side of primary coil 40. In effect, TBU 36 functions as a fuse for positive current flowing from terminal 44 through to the primary coil. The structure of TBU 38 is identical to that of TBU 36 so that TBU 38 acts as a fuse for positive current flowing from terminal 46 towards primary coil 40. TBU 38 and TBU 36 are selected so that they have as close as possible insertion loss in order that the balance of the circuit is maintained.
TBUs 36 and 38 protect a load connected across terminals 43 and 45 from differential surge currents by triggering to an open circuit when the current through the load reaches the preset trigger level. If the differential current into terminal 44 attains the trigger level then TBU 36 will open-circuit. Alternatively if the differential current flowing out of terminal 44 attains the trigger level then TBU 38 will trigger. Of course, the TBUs could be reverse-orientated relative to the configuration depicted in Figure 4. In that case if the differential current into terminal 44 attains the trigger level then TBU 38 would open circuit and conversely if the differential current flowing out of terminal 44 attained the trigger level then TBU 36 would trigger.
In the event that the voltage across a triggered TBU continues to rise then eventually a breakdown voltage will be reached at which the TBU conducts again. At present TBUs with breakdown voltages up to 800V are available. In order to provide protection from surges that exceed the breakdown voltage, surge arrestor 48 may be included. A gas arrestor, as depicted at item 48 is typically used. However, any suitable surge arrestor could be used as an alternative. Surge arrestor 48 is connected line-to-line across terminals 44 and 46 and is selected so that it will trigger at 90% of the TBUs' breakdown voltage. Consequently, in the event of a differential mode surge approaching the breakdown voltage of the TBUs the surge arrestor will trigger and short the surge before it can cause breakdown of the triggered TBU and subsequently be transmitted across isolation transformer 42 to potentially damage any load connected between output terminals 43 and 45.
Suitable TBU's may be purchased from Fultec Pty Ltd of, Building 76A, University of Queensland Campus, St Lucia, Brisbane, Queensland, Australia. Circuits for implementing suitable TBUs are described in granted United States patent No. 5,742,463 and in international patent application No. PCT/AU03/00175, both by the present inventor. The descriptions of both US 5,742,463 and PCT/AU 03/00175 are hereby both incorporated in their entireties by cross-reference.
With reference to Figure 6, according to a further embodiment of the invention a differential mode protection device 43 is conveniently provided in a single package having four connectors A, B, C, D as shown. The device may be provided with or without a surge arrestor as desired. A schematic diagram of the internal circuit of device 43 without surge arrestor is shown in Figure 7 whereas a schematic for a further version with surge arrestor is shown in Figure 8. Further variations of the device are possible. For example an eight terminal version of the device might be provided including two of the circuits of Figure 7 or Figure 8.
A schematic diagram of a digital processing card, in the present example a LAN card, according to a preferred embodiment of the invention is shown in Figure 9. It will be noted that the LAN card of Figure 9 incorporates two pairs of TBUs 51 A, 51 B and 52A, 52B placed in series with the TX+, TX-, and RX+, RX- terminals of socket 18 respectively.
(The TBUs are each identical to TBUs 36 and 38 of Figure 5 and might be provided in an eight terminal version of device 43 of Figure 6.) Surge arrestors 19 and 21 are connected across the TX+, TX- and RX+, RX- pins respectively. The surge arrestors are selected so that they will trigger at 90% of the TBUs' breakdown voltage. As previously explained, in the event of a differential mode surge approaching the breakdown voltage of the TBUs the surge arrestors will trigger and short the surge before it can cause breakdown of the TBUs and subsequently be transmitted across isolation transformer to potentially damage logic circuitry 24.
Figure 10 depicts the external appearance of a differential mode surge protector 50 according to a further embodiment of the present invention while Figure 11 is a corresponding schematic diagram. Surge protector 50 includes a J8-45 plug 52 for connection to a socket of a LAN card. The J8-45 plug is coupled to a differential mode protection module 54 which includes TBU's and surge arrestors as shown in Figure 11. The surge protector further includes a J8- 45 socket 58 which is coupled to circuitry in module 54 and which is intended to receive a LAN cable. Figure 12 is a variation of the differential mode surge protector of
Figures 10 and 11 being a cable 63 incorporating differential mode protection according to the present invention. Cable 63 includes a connector 52 for connection to a digital processing card. In the present example it is intended that cable 63 be a LAN cable and so connectors 52 and 59 are J8-45 plugs although obviously other connectors might be used for other applications. A differential mode protection module 54, identical to the one in Figure 10 and containing the circuitry depicted in Figure 11 is coupled to connector 52. A relatively long run of cable 61 connects protection module 54, which includes TBU's and surge arrestors as shown in Figure 11, to remote connector 59. In use it is intended that connector 52 be plugged into a digital processing card such as a LAN card whereas connector 59 is plugged into a remote device such as a network hub. If desired, a second module may be incorporated proximal to plug 59. Variations to the cable shown in Figure 12 are of course possible. For example, the circuitry that is provided inside housing 54 might be integrated into one or the other of connectors 52 and 59.
Although the present invention has been described in terms of preferred embodiments, it is not intended that the invention be limited to these embodiments. Equivalent methods, structures, arrangements, processes, steps and other modifications apparent to those skilled in the art will fall within the scope of the following claims.

Claims

Claims:
1. A differential mode surge protection apparatus including: a pair of input connection points and a corresponding pair of output connection points; a first solid state protection device in series between a first one of the pair of input connection points and a first one of the corresponding pair of output connection points; and a second solid state protection device in series between a second one of the pair of input connection points and a second one of the corresponding pair of output connection points.
2. An apparatus according to claim 1, wherein the first and second solid state protection devices are integrated into a single miniaturised protection package.
3. An apparatus according to claim 1 or claim 2, further including a surge arrestor arranged to supplement protection conferred by the first and second solid state protection devices and selected so that in use it triggers prior to breakdown of either the first or second solid state protection devices.
4. An apparatus according to claim 3, wherein the surge arrestor is connected across the input connection points.
5. An apparatus according to claim 1 , wherein the first and second solid state protection devices comprise a matched pair of unipolar transient blocking units (TBUs), each unipolar transient blocking unit including two series connected field effect transistors.
6. An apparatus according to claim 1 in combination with a digital signal processing card.
7. An apparatus according to claim 6, further including a surge arrestor arranged to supplement protection conferred by the first and second solid state protection devices and selected so that in use it triggers prior to breakdown of either the first or second solid state protection devices.
8. An apparatus according to claim 7, wherein the solid state protection devices are connected between a common mode isolation device of the digital signal processing card and external connection points of the digital signal processing card.
9. An apparatus according to claim 6, wherein the digital signal processing card comprises a LAN card.
10. An apparatus according to claim 1, further including a common mode isolation device disposed between the first solid state protection device and the second solid state device and the output connection points.
11. An apparatus according to claim 2 or claim 3, further including a common mode isolation device disposed between the first solid state protection device and the second solid state device and the output connection points.
12. An apparatus according to claim 10, wherein the common mode isolation device comprises an isolation transformer.
13. An apparatus according to claim 10, wherein the common mode isolation device comprises an opto-isolation device.
14. A cable including one or more apparatus according to claim 1, wherein the pair of input connection points terminate upon a first connector of the cable and wherein the output connection points terminate upon a second connector of the cable.
15. A cable according to claim 14, wherein the first connector comprises a socket and the second connector comprises a plug.
16. A cable according to claim 14, wherein the first connector comprises a plug and second connector comprises a plug.
17. A cable according to claim 14, wherein the cable comprises a LAN cable and the first and second connectors comprise LAN cable connectors.
PCT/AU2003/001326 2002-10-08 2003-10-08 A protection device for preventing the flow of undesirable differential mode transients WO2004034544A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2004542092A JP4247321B2 (en) 2002-10-08 2003-10-08 Protection device to prevent differential mode transient voltage flow
AU2003266838A AU2003266838A1 (en) 2002-10-08 2003-10-08 A protection device for preventing the flow of undesirable differential mode transients
EP03747722A EP1550194B1 (en) 2002-10-08 2003-10-08 A protection device for preventing the flow of undesirable differential mode transients
US11/097,452 US7372688B2 (en) 2002-10-08 2005-04-01 Protection devices and methods for preventing the flow of undesirable differential mode transients

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AU2002951888 2002-10-08
AU2002951888A AU2002951888A0 (en) 2002-10-08 2002-10-08 A protection device for preventing the flow of undersirable transients

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WO2004034544A1 true WO2004034544A1 (en) 2004-04-22

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US (1) US7372688B2 (en)
EP (1) EP1550194B1 (en)
JP (1) JP4247321B2 (en)
CN (1) CN100530885C (en)
AU (1) AU2002951888A0 (en)
WO (1) WO2004034544A1 (en)

Cited By (5)

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US20050243496A1 (en) 2005-11-03
EP1550194A4 (en) 2011-09-28
EP1550194B1 (en) 2012-11-28
JP4247321B2 (en) 2009-04-02
AU2002951888A0 (en) 2002-10-24
EP1550194A1 (en) 2005-07-06
US7372688B2 (en) 2008-05-13
CN1703815A (en) 2005-11-30
CN100530885C (en) 2009-08-19

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