WO2004025126A2

WO2004025126A2 - Method and apparatus for processing a digital signal

Info

Publication number: WO2004025126A2
Application number: PCT/IB2003/003428
Authority: WO
Inventors: Cornelis De Jong
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2002-09-10
Filing date: 2003-08-04
Publication date: 2004-03-25
Also published as: AU2003250439A1; WO2004025126A3; AU2003250439A8

Abstract

An image signal processing apparatus (10) comprises a processing channel for processing an N-bit image signal (SIN), and a functional unit (20) having a resolution of at least N+M bits in said processing channel, having N high significance input terminals connected to receive the N-bit image signal (SIN), and having N high significance output terminals connected to provide an N-bit processed output signal (SOUT).The processing apparatus (10) further comprises an M-bit auxiliary signal generator (30) for providing an M-bit auxiliary signal (SA). M output terminals (31, 32) of the signal generator (30) are coupled to M low significance input terminals of the functional processing unit (20).

Description

Method and apparatus for processing a digital signal

The present invention relates in general to a method and apparatus for processing a digital signal. The present invention is particularly applicable in the context of processing an image signal, and the present invention will hereinafter be explained for such an application. However, it is to be understood that such an explanation is not to be interpreted as restricting the invention to this application.

In an apparatus for processing a digital signal, all functional signal processing units normally match the signal to be processed. More specifically, for processing an N-bit signal, functional signal processing units are used which have an N-bit resolution. In parallel processing, such a functional signal processing unit has N input terminals receiving the N bits of the signal to be processed, and N output terminals, respectively, providing the N bits of the processed output signal. The value of the N output bits provided at the N respective output terminals depends on the value of the N input bits received at the N input terminals according to a predefined functional relationship which reflects the function of such a functional processing unit.

A standard value for N is 8. hi a typical example, the signal is an image signal, intended to define the value of a grey level of a pixel of a display device. With an 8-bit image signal, it is possible to define 256 grey levels. Typically, a display device has a resolution of more than 256, for instance 1024, which means that, in order to fully benefit from the capabilities of such a display device, the image signal should have a 10-bit resolution. Then, also all functional signal processing units in the signal processing path, including the signal source, should have a 10-bit resolution. However, this would involve using non-standard and/or more costly components. This is especially a problem in the case of an image memory: the larger the resolution, the larger the required memory capacity in bits, which is proportional to the area of required chip surface.

However, if the display is driven by an image signal having a resolution less than the resolution of the display device, this may lead to relatively large steps in the grey values in the displayed image, which may lead to undesirable or even unacceptable artefacts in the displayed image.

This problem is illustrated in Fig. 1, which schematically shows a plurality of pixels PI, P2, P3, etc., located next to each other on a horizontal display line. Each pixel is capable of producing light at a certain light intensity or grey level LI, L2, L3, etc.; the possible light intensities or grey levels are shown as horizontal dotted lines. Assume that curve 1 represents the grey shades of an object to be displayed. Stepped line 2 represents an image signal reproducing original curve 1 with a full resolution corresponding to the resolution of the display device. This resolution is such that the steps taken by full resolution image signal 2 are hardly noticeable to the human eye: the displayed image is perceived as being a smooth image. Stepped line 3 represents an image signal trying to approximate original curve 1 with a resolution of two bits less than full resolution. It is clear that image signal 3 can only take big steps, where image signal 2 would have divided such a step into four smaller steps. The steps taken by less-than-full resolution image signal 3 are such that they are clearly visible to the human eye. In this respect it is noted that the steps taken by less-than-full resolution image signal 3 are not only large in the vertical direction (light intensity dimension): these steps are also large in the horizontal direction, corresponding to a relatively large number of neighbouring pixels having the same light intensity. Consequently, instead of a smooth representation, the image displayed consists of a plurality of relatively large surface areas having a relatively large grey difference with their neighbours.

It is a general object of the present invention to propose a solution to this problem. More particularly, the present invention aims to process an N-bit signal in such a way that the processed signal is capable of reproducing an image display which, to the human observer, gives the impression of a higher resolution or at least a smoother grey scale.

The invention is defined by the independent claims. The dependent claims define advantageous embodiments.

The present invention is partly based on the understanding that the human eye has a capability of integration. More particularly, the size of a pixel of a display screen is so small that, at least when observed from a certain distance, the human eye cannot distinguish individual pixels. When looking at a certain location on screen, the human eye will perceive an area around such a location, containing in fact the contribution of a plurality of pixels. The overall grey level attributed by the human eye to such a location will then correspond to the average of the grey levels of those pixels that contribute to said area.

This effect is schematically illustrated in Fig. 2. Fig. 2 is a graph like Fig. 1, in which a stepped line 4 is shown by way of example, which represents a signal having less- than-full resolution, causing pixels to generate either light intensity LI or light intensity L5. Assume that the human eye, when directed towards a certain location corresponding to a pixel Pi, will average the light produced by this pixel and by its three neighbours on either side. In Fig. 2, this is shown as an integration or averaging area Ai ranging from P(i-3) to P(i+3). Thus, giving level L5 a value 1 and level LI a value 0, the human eye will perceive an average light intensity L_λi having a value of 4/7 ∞0.57 for an area ranging from P(i-3) to P(i+3) in this example. Curve 5 is a line representing LAI for all values of i in this example. When going from left to right in Fig. 2, the eye will thus see a gradually decreasing light intensity or grey level, instead of a succession of higher and lower light intensities.

It is noted that Fig. 2 illustrates said effect in one dimension only. The same effect will occur in the vertical direction for successive horizontal lines.

Based on this insight, the present invention proposes to process an N-bit signal with at least one processing unit having resolution N+M, wherein M is at least equal to 1. In a preferred embodiment, which will hereinafter be discussed by way of non-restricting example, M equals 2. According to an important embodiment of the present invention, a processing unit has N+M input terminals and N+M output terminals. An N-bit input signal is connected to the N most significant bit input terminals, and an N-bit output signal is taken from the N most significant bit output terminals. An M-bit auxiliary input signal is connected to the M least significant bit input terminals. This auxiliary input signal is chosen to be such that a periodic change in the N-bit output signal occurs. As a result, steps from one grey level to another are smoothed.

These and other aspects, features and advantages of the present invention will be further explained by the following description of a preferred embodiment of a signal processing apparatus according to the present invention with reference to the drawings, in which the same reference numerals indicate identical or similar parts, and in which:

Fig. 1 is a graph illustrating grey levels for signals having different resolutions; Fig. 2 is a graph illustrating pixel averaging by the human eye; Fig. 3 schematically shows an image signal processing apparatus; Fig. 4A is a graph showing the timing of auxiliary signals; Fig. 4B schematically illustrates grey levels in a front view of a part of a display screen;

Fig. 5 is a block diagram of a signal generator; Fig. 6A is a graph schematically showing grey levels; Fig. 6B schematically illustrates grey levels in a front view of a part of a display screen; Fig. 7 is a graph schematically showing grey levels;

Figs. 8A-D schematically illustrate grey levels in a front view of a part of a display screen;

Fig. 9 is a graph comparable to Fig. 6B, illustrating the effect of the present invention.

Fig. 3 schematically shows an image signal processing apparatus 10 having an input 12 for receiving an input signal from a signal source 11 and having an output 18 for providing a processed output signal to a display device 19. In the processing channel from input 12 to output 18, a functional processing unit is indicated at 20. Any signal processing units between input 12 and functional processing unit 20 are collectively indicated as preprocessing unit 13. Any signal processing units between functional processing unit 20 and output 18 are collectively indicated as post-processing unit 17.

The source 11 may be an arbitrary source which is part of the apparatus 10, but it may also be an external source.

By way of example, the image signal processing apparatus 10 is suitable for receiving a digital video signal from a digital video signal source 11, and for providing an output signal adapted to the characteristics of a matrix display device 19. As is known to persons skilled in the art, the characteristics of a matrix type display device differ from the characteristics of a cathode ray tube type display device. A standard video signal, intended for display by a cathode ray tube type display device (CRT), will produce a distorted image when supplied to a matrix type display device. Therefore, in order to ensure that such a matrix type display device will display approximately the same image as would have been displayed by a CRT, the signal needs to be corrected so as to take into account the differences between matrix type display device and CRT. One important correction is gamma correction. In the present example, functional processing unit 20 is a gamma correction unit. Since gamma correction is known per se, whereas the present invention does not relate to gamma correction as such, while the present invention may be practised using a standard gamma correction unit, it is not necessary here to discuss the design and operation of a gamma correction unit. hi the context of the present invention, it is relevant that the gamma correction unit 20 maybe a standard 10-bit correction circuit, having ten input terminals 211 - 21 in and ten output terminals 22₁ - 22ιn, whereas the image signal processed by apparatus 10 is an 8-bit signal. In this respect it is noted that the signal as produced by source 11 may have a resolution of more than 8 bits, and that also the display 19 may have a resolution of more than 8 bits. However, in this explanation of the present invention, it is assumed that the apparatus 10 has been designed for processing 8-bit signals, i.e. pre-processing unit 13 and post-processing unit 17 are only capable of handling an 8-bit signal. Herein, the input terminals 21 and the output terminals 22 are numbered in such a way that the lowest index number corresponds to the least significant bit whereas the highest index number corresponds to the most significant bit.

In Fig. 3, the image signal received by the gamma correction unit 20 at its input 21 is indicated as input signal S_IN. The input image signal SI is supplied to the input terminals 21₃ - 21 in, i.e. the least significant signal bit is received at input terminal 21₃ whereas the most significant signal bit is received at input terminal 21₁r The processed image signal as outputted by the gamma correction unit 20 at its output 22 is indicated as output signal S_OU_T- The output processed image signal S_OU_T is taken from the output terminals 22₃ - 22_lυ, i.e. the least significant signal bit is taken from output terminal 22₃ whereas the most significant signal bit is taken from output terminal 22ιo-

The gamma correction unit 20 is designed to calculate, at each moment in time, the values of its 10 output bits on the basis of the values of the 10 input bits received at that specific moment in time, in accordance with a predetermined function or table or the like. This means that each combination of input bits (value of 10-bit input word) corresponds to a certain combination of output bits (value of 10-bit output word), which will be indicated here by the term "translation". The exact translation formula is not relevant here. It is only relevant that changes in the values of the first and second input bits, received at first and second input terminals 21_! and 21₂, will have some influence on the value of the third output bit as provided at the third output terminal 22₃. This provides an instrument for influencing, in accordance with the concept underlying the present invention, the 8-bit output signal SOUT-

To this end, the apparatus 10 further comprises an auxiliary signal generator 30 having a first output 31 connected to the first input terminal 21ι of the gamma correction unit 20 and having a second output 32 connected to the second input terminal 21₂ of the gamma correction unit 20. The auxiliary signal generator 30 is designed to generate 1-bit output signals at its two output terminals 31 and 32, indicated as first and second auxiliary signals S_AI and SA₂, respectively. Collectively, these two output signals SA_I and S_A2 will be indicated as auxiliary signal S_A- In a possible embodiment, the auxiliary signal generator 30 is designed to randomly generate said first and second auxiliary signals SA_I and SA₂- However, in a preferred embodiment, the first and second auxiliary signals S_AI and S_A2 have a predefined timed relationship with respect to each other and with respect to the input signal SI to be processed. To this end, the auxiliary signal generator 30 receives a pixel clock signal φ at a timing input terminal 33.

Fig. 4A is a graph illustrating the preferred timing for the first and second auxiliary signals S_AI and S_A2- The top curve in Fig. 4A shows the pixel clock signal φ: a transition from "0" to "1" corresponds to a transition from one pixel to the next, and will be indicated as a pixel transition. The second curve in Fig. 4A shows the first auxiliary signal S_AI: this signal changes its value (from "0" to "1" or from "1" to "0") at each pixel transition. The third line in Fig. 4A shows the second auxiliary signal SA_: this signal changes its value (from "0" to "1" or from "1" to "0") at each second pixel transition. Thus, at the input 21 of the gamma correction unit 20, in respect of the subsequent pixel signals for one horizontal line, the auxiliary signal generator 30 effectively adds repeatedly the values 0, 1, 2, 3, 0, 1, etc, as shown in the bottom part of Fig. 4A indicated by S -

For a subsequent horizontal line, the same pattern of auxiliary signal SA is generated, yet displaced over two pixels in the horizontal direction. This is illustrated in Fig. 4B, which shows the pattern of auxiliary signal SA for a number of subsequent horizontal display lines. As can be seen from Fig. 4B, each square of 2x2 pixels always comprises one time value 0, one time value 1, one time value 2, and one time value 3 for the auxiliary signal

SA-

Fig. 5 is a block diagram schematically illustrating a possible embodiment for auxiliary signal generator 30. As already mentioned, the auxiliary signal generator 30 has a timing input terminal 33 for receiving a pixel clock signal φ. The auxiliary signal generator 30 further has a horizontal reset input 34 for receiving a horizontal reset signal I/Ή indicating the beginning of a new horizontal line of an image frame. The auxiliary signal generator 30 further has a vertical reset input 35 for receiving a vertical reset signal I/Ύ indicating the beginning of a new image frame. The auxiliary signal generator 30 comprises a first flipflop 40 receiving the pixel clock signal φ at a trigger input 41 and receiving the horizontal reset signal I/Ή at a reset input 42. At an output 43, the first flipflop 40 provides the first auxiliary signal S I- The first flipflop 40 is responsive to rising edges at its trigger input 41, so that the output 43 of the first flipflop 40 changes from "0" to "1" vice versa at each rising edge of the pixel clock signal φ. By resetting the first flipflop 40 with the horizontal reset signal T/Ή, it is ensured that the first auxiliary signal SA_I is always a "0" for the first pixel of each horizontal line.

The auxiliary signal generator 30 comprises a second flipflop 50 receiving the output signal SA_I of the first flipflop 40 at a trigger input 51 and receiving the horizontal reset signal I/Ή at a reset input 52. An output 53 of the second flipflop 50 is connected to a first input 71 of an XOR 70. The second flipflop 50 is responsive to falling edges at its trigger input 51, so that the output 53 of the second flipflop 50 changes from "0" to "1" vice versa at each falling edge of the first auxiliary signal SAI- By resetting the second flipflop 50 with the horizontal reset signal I/Ή, it is ensured that the output 53 of the second flipflop 50 is always a "0" for the first pixel of each horizontal line. The auxiliary signal generator 30 comprises a third flipflop 60 receiving the horizontal reset signal I/Ή at a trigger input 61 and receiving the vertical reset signal I Ύ at a reset input 62. An output 63 of the third flipflop 60 is connected to a second input 72 of said XOR 70. The output 63 of the third flipflop 60 changes from "0" to "1" vice versa at the beginning of each new horizontal line. By resetting the third flipflop 60 with the vert cal reset signal Ϊ/Ύ, it is ensured that the output 63 of the third flipflop 60 is always a "0" for the first horizontal line of each image frame.

At an output 73, the XOR 70 provides the second auxiliary signal SA₂- The output 73 is identical to the signal received at its first input 71 for each horizontal line where the output 63 of the third flipflop 60 is a "0" (i.e. for each odd horizontal line). The output 73 is the inverse of the signal received at its first input 71 for each horizontal line where the output 63 of the third flipflop 60 is a "1" (i.e. for each even horizontal line).

By way of example, the effect of the present invention will now be explained by considering an object having a gradually increasing brightness from left to right, while the brightness is constant on a vertical line. Fig. 6A is a graph, comparable to Fig. 1, in which the curve 61 shows the "true" brightness of this exemplary object as a function of place.

The horizontal grid corresponds to pixels PI, P2, etc on a horizontal line of a display device. The vertical grid corresponds to possible grey levels LI... L13 of the display device when having a 10-bit resolution. The stepped line 62 represents a 10-bit digital signal necessary for driving the display device so as to approximate the "true" brightness of the exemplary object as well as possible. The stepped line 63 represents the grey levels that would result if the display device were driven with an 8-bit signal, equivalent to the 10-bit signal 62 if the two least significant bits are set to zero. The resulting image is illustrated in Fig. 6B, which shows an array of numbers, each number corresponding to a light intensity of a pixel. Each horizontal line of subsequent numbers corresponds to a horizontal image line of neighboring pixels. The subsequent horizontal lines of numbers correspond to the neighboring image lines. It is clear that the displayed image would consist of relatively broad vertical bands 64 of constant grey level, while the brightness difference between two adjacent bands 64 is relatively large.

In this respect it is pointed out that all horizontal lines have the same contents here, so that every grey level step is present in each line in a vertical alignment. The human eye will immediately recognize such a situation as a pattern of vertical lines.

Fig. 7 is a graph in which the curve 71 illustrates the operation of an exemplary 10-bits processing unit 20. The horizontal axis corresponds to the value of a 10-bit input word received at the input 21, whereas the vertical axis corresponds to the value of a 10-bit output word at the output 22. The curve 71 illustrates the operation of the unit 20 in a constant or analog function; of course, the input and output words can only take integer digital values, represented by the solid dots in the graph. If an 8-bit signal S_I were processed by this exemplary 10-bits processing unit

20 without practising the present invention, the 8 input bits would be inputted to input terminals 21₃ - 21 in while the two least significant input terminals 21ι and 21₂ would be connected to zero. Furthermore, an 8-bit output signal S_OU_T would be created by taking the 8 most significant output bits, i.e. output terminals 22 - 22ιn. Possible combinations of 10-bit input word and 8-bit output word are indicated by a solid cross in the graph.

Fig. 8 A illustrates the effect of the auxiliary signal S_A supplied to the 10-bits processing unit 20. Fig. 8A is an array comparable to Fig. 6B, wherein the values of the numbers have been obtained by adding the values shown in Fig. 4B to the values shown in Fig. 6B. h other words, Fig. 8 A illustrates the 10-bit input words received by the 10-bits processing unit 20 when receiving the 8-bit input signal S_IN illustrated in Fig. 6B together with the 2-bit auxiliary signal S_A illustrated in Fig. 4B.

Fig. 8B illustrates the processing by the 10-bits processing unit 20. Fig. 8B is an array comparable to Fig. 8 A, now showing the 10-bit output words outputted by the 10-bits processing unit 20 at its output 22 when operating in accordance with Fig. 7.

Fig. 8C is an array comparable to Fig. 8B, now showing the 8-bit output signal S_OU_T resulting from taking the 8 most significant bits of the 10-bit output words shown in Fig. 8B, discarding the 2 least significant bits. For reason of comparison, the value of the least significant bit of said 8-bit output signal S_OUT is taken to be 4. When comparing Fig. 8C with Fig. 6B, some important aspects are recognizable.

First, the pixels can only have values 0, 4, 8, 12, etc, in Fig. 8C as well as in Fig. 6B, which illustrates that the present invention does not provide more grey levels or a higher resolution on the level of individual pixels.

Secondly, while all lines in Fig. 6B are identical, all neighbouring lines in Fig. 8C are mutually different. As a consequence, the human will not, or at least less quickly, recognize a pattern of vertical lines.

A further important aspect is the averaging operation of the human eye. As the pixels are very small, the human eye cannot distinguish individual pixels but will integrate, or average, the contributions of neighbouring pixels in the horizontal and vertical direction. This operation is illustrated in Fig. 8D. By way of example, it is assumed that, when directed to a certain screen location, the eye perceives an average light intensity obtained from a screen block of two pixels in height and three pixels in width, each pixel contributing with the same weighting factor. It is noted that different averaging functions will yield different, yet comparable results. Thus, the numbers in Fig. 8D again correspond to pixel locations, as indicative of the direction of the eyes of an observer. The perceived light intensity value in each pixel location has been obtained by adding the light intensity values of 6 pixels in Fig. 8C and dividing by 6. Fig. 9 is a graph comparable to Fig. 6A, in which the line 91 represents the perceived light intensity as a function of place. The trajectory of this line reflects the combination of the original input signal S_IN and the functional characteristic of functional processing unit 20.

By way of comparison, line 63 of Fig. 6B has also been plotted in Fig. 9. It can clearly be seen that the processing in accordance with the present invention results in the human eye perceiving more grey levels in smaller steps, i.e. an increased resolution. Furthermore, as mentioned before, the actual pixel content of vertically neighbouring pixels has been made different. All in all, the image as perceived by the human eye appears much smoother than the unprocessed original image, even if the signal representing the image has the same (8 bit) resolution. In a preferred embodiment, the signal generator 30 is adapted to generate an auxiliary signal S_A as a series of a repeated sequence of digital numbers, each sequence comprising 2^M different digital numbers and wherein, in two subsequent horizontal display lines, the series are shifted in phase over 2^M_1 pixels.

It should be clear to a person skilled in the art that the present invention is not limited to the exemplary embodiments discussed above, but that various variations and modifications are possible within the protective scope of the invention as defined in the appendent claims. For instance, the auxiliary signal S_A may have its values in a different order, for instance 3, 2, 1, 0, 3, 2, 1, 0, etc.

In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. Use of the verb "comprise" and its conjugations does not exclude the presence of elements or steps other than those stated in a claim. The article "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several distinct elements and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means can be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Claims

CLAIMS:

1. A method for processing a digital signal having a resolution of N bits, using a functional processing unit having a resolution of at least N+M bits, wherein the digital signal to be processed is supplied to N high significance input terminals of the functional processing unit, wherein an N-bit output signal is taken from N high significance output terminals of the functional processing unit, and wherein an M-bit auxiliary signal is supplied to M low significance input terminals of the functional processing unit.

2. A method as claimed in claim 1, wherein the digital signal (S_IN) is an image signal composed of parallel lines of pixels and wherein, in respect of two adjacent pixels on a line, the auxiliary signal has different values, and, in respect of two adjacent pixels on two adjacent lines , the auxiliary signal has different values.

3. A method according to claim 2, wherein the auxiliary signal (S ) comprises, in respect to subsequent pixels on a line, a periodically repeated sequence of mutually different values, each sequence preferably comprising 2^M different values.

4. A method according to claim 3, wherein in each subsequent line the sequences are shifted over half a sequence length as compared to the previous line.

5. An image signal processing apparatus, comprising a processing channel for processing an N-bit image signal, and a functional unit having a resolution of at least N+M bits in said processing channel, having N high significance input terminals connected to receive the N-bit image signal, and having N high significance output terminals connected to provide an N-bit processed output signal; the processing apparatus further comprising an M-bit auxihary signal generator for providing an M-bit auxiliary signal; wherein M output terminals of the signal generator are coupled to M low significance input terminals of the functional processing unit.

6. An apparatus according to claim 5, wherein M=2.

7. An apparatus according to claim 5, wherein the signal generator has a clock input coupled to receive a pixel clock signal.

8. An apparatus according to claim 5, wherein the signal generator has a horizontal reset input coupled to receive a horizontal reset signal.

9. An apparatus according to claim 5, wherein the signal generator has a vertical reset input coupled to receive a vertical reset signal.

10. An apparatus according to claim 5, wherein the signal generator is adapted to generate a first auxiliary signal as a sequence of alternating logical values at a frequency of half the pixel frequency.

11. An apparatus according to claim 10, wherein the signal generator is adapted to generate a second auxiliary signal as a sequence of alternating logical values at a frequency of a quarter of the pixel frequency.

12. An apparatus according to claim 11, wherein, in respect of subsequent lines, the phase of the second auxiliary signal changes by a half period.

13. An apparatus according to claim 5, wherein the signal generator is adapted to generate, in respect of a certain line i, and in respect of pixels P_j, P_j+i, P_j+2, etc: - a first auxiliary signal as a seri.es 010101010101....;

- a second auxiliary signal as a series 001100110011 to generate, in respect of the subsequent line i+1, and in respect of the same pixels P_j, P_J+1, P_j+2, etc.:

- a first auxiliary signal as a series 010101010101....; - a second auxiliary signal as a series 110011001100....;