WO2004017081A1

WO2004017081A1 - Electronic circuit testing method and apparatus

Info

Publication number: WO2004017081A1
Application number: PCT/GB2003/003595
Authority: WO
Inventors: Paul Mark O'neill
Original assignee: Crc Group Plc
Priority date: 2002-08-16
Filing date: 2003-08-15
Publication date: 2004-02-26
Also published as: GB0219083D0; AU2003255802A1

Abstract

A fault known to occur in electronic circuits of a predetermined type is identified and a testing procedure is designed in which a circuit of the predetermined type is contacted with a plurality of electrical probes and the probes used to measure a value of an electrical parameter of the circuit which is characteristic of the known fault. Comparing the measured value with values stored in a look-up table can thus identify whether a circuit being tested contains the known fault.

Description

Electronic Circuit Testing Method and Apparatus

The invention relates to a method and an apparatus for testing electronic circuits, and particularly for testing mass-produced circuits.

The conventional method for repairing electronic devices which have become defective is for an engineer to test and repair each faulty device individually. As the number of consumer electronics devices has grown over time, large numbers of engineers have had to be trained for repairing each type of device, and during the recent rapid growth of sales of devices such as mobile telephones, palm-top computers etc, ramping up the engineering resource to -cope with the field failure rate has become a significant problem.

The current repair technology used for devices such as mobile phones and personal digital assistants (PDAs) involves a failed unit being presented to an engineer, generally with a minimal fault description. The engineer then probes the circuit using a "divide by two" methodology to decide where the fault lies. This is a traditional way of fault finding where the circuit in question is divided in half and signal tests are performed at the halfway mark. If the expected signals appear then the fault must be downstream of the .halfway mark (or upstream in case of incorrect signals) . This new half- size circuit is then divided into two again, and so on. This approach relies on the engineer' s clear and precise knowledge of how the circuit works and on having access to the expected values of probed electrical parameters in a correctly-functioning circuit. Within a simple circuit this approach is satisfactory, but. in more complex microprocessor-based systems it is becoming more and more difficult for a trained engineer to be able to assess the information resulting from probing a circuit in order to determine whether or not the circuit is faulty and to identify the necessary repair. The "divide by two" method is commonly used in most electronics industries although it can be improved upon slightly by referring to a fault description for the failed circuit, such as might be provided by a customer. With experience, it is also possible to identify the most common faults in a particular circuit and train specific engineers to repair each of those faults. This approach can be used for repairing complex circuits, such as mobile phone circuits, but suffers from the disadvantages that it is still necessary for an engineer to identify the fault in each failed circuit and that the ever-decreasing product life cycles for mass-produced electronic devices means that little time is available to identify the most frequent faults in a particular model of, for example, a mobile phone before that model becomes obsolete. Again, this demands increased training resource to train engineers ever more ^'rapidly to handle new devices.

Consequently, operating a repair service using traditional methods requires large capital expenditure for any given percentage increase in repair capacity. _. As a result, a circuit which is technically repairable may be deemed beyond economic repair as a result of the high cost of the necessary engineering resource. In a mobile phone repair operation, "beyond economic repair" is typically defined as the point at which it would cost more than 80% of a circuit's market value to repair the circuit. Clearly, the higher engineering costs rise, the greater number faulty circuits will meet this criterion.

The problem of training engineers is exacerbated by the fact that the take-up of new electronic devices into the market place is unpredictable. As repair operation therefore needs to allow a time lag until the sales of a new product have increased before a decision can be made to increase the engineering resource required to carry out repairs of that type of device, and the time lag inevitably additionally involves both the time for training an engineer and the time taken for him or her to become familiar with the repair.

In addition, in a conventional system repair cost is closely related to the expenditure needed for each engineer and an associated work bench. This fixes the cost of repair for electronic devices and consequently determines the base level at which the engineering costs and equipment costs render a repair not economically viable.

Summary of Invention

The invention provides apparatus and methods for testing electronic circuits, and a circuit or electronic device repaired using the apparatus or methods, as defined in the appended independent claims, to which reference should now be made. Preferred or advantageous features of the invention are defined in dependent subclaims.

The invention may thus advantageously provide an electrical probe apparatus for testing an electronic circuit in which a plurality of electrical probes contacts a corresponding plurality of different points on the circuit. The probes can be coupled to a computer- controlled measurement apparatus which can use the probes to measure electrical parameters of the circuit. Different measurements^' may be made either in sequence or at the same time, depending on the electrical parameters involved, and used to diagnose faults in the circuit as described below. The probes can then be removed from the. circuit, which can then be passed to an- engineer or technician, together with a fault report, for repair. In a preferred embodiment, once a fault has been identified, a circuit may be passed to an engineer or technician, or to an unskilled worker, trained to repair that type of fault. Advantageously, a lower level of skill may be required for fault repairs than in the prior art because of the assistance from the test apparatus or method of the invention in the fault diagnosis procedure.

Advantageously, the probes are spring-loaded, or biassed, probes extending from a probe support. In a preferred embodiment, a plurality of spring-loaded or biassed probes extends from a substantially planar probe support, in the manner of a bed-of-nails" apparatus.

The arrangement of the array probes on the probe support may advantageously be predetermined for fault-finding in a predetermined type or model of electronic circuit. In a preferred embodiment, therefore, the probe apparatus may be designed for testing different types of electronic circuit by allowing the removal and replacement of the probe support, and the probes it carries. A probe support suited to any predetermined circuit type can thus be inserted to allow testing of that circuit type.

Many electronic circuits are arranged on two-sided circuit boards and for testing such circuits the apparatus may advantageously comprise two probe supports carrying two probe arrays, one for contacting each side of the circuit board.

In a further aspect, the invention may advantageously provide a method for testing an electronic circuit of a predetermined type, comprising the following steps. In order to set up the electrical testing method, a fault known to occur in circuits of the predetermined type is identified and a. testing procedure is designed in which, when a- circuit of the predetermined type is contacted with a plurality of electrical probes and the probes are used to measure the values of one or more electrical parameters of the circuit, the value (or values) is (or are) characteristic of the known fault. A look-up table can then be generated in which the value of the measured electrical parameter is associated with the known fault. In some cases the known fault may be indicated by a value falling within a predetermined range, which may be included in the look-up table.

When it is then necessary to test a circuit, which is assumed to have failed, the plurality of electrical probes is brought into contact with the circuit and the value (s) of the electrical parameter (s) is (are) measured. The measured value (s) can then be compared with the measured value (s) in the look-up table to identify whether or not the circuit being tested contains the associated fault.

In a preferred embodiment, therefore, once a plurality of faults known to occur in circuits of the predetermined type has been identified, the testing procedure is designed to measure the values of electrical parameters of the circuit which are characteristic of the various faults. The look-up table can then associate the measured values, or combinations of measured values, with each of the known faults so that, when the testing procedure is applied to a circuit, the measured values can be compared with the look-up table to identify whether or not the circuit contains any of the associated faults.

Advantageously, the testing method may involve taking measurements while the circuit is powered up or switched off, and voltages may be applied through one or more • probes while measurements are taken.

In a preferred embodiment different measurements can be made in sequence according to a predetermined test procedure, so as to apply a series of tests to identify different faults, advantageously in an automated manner. When a fault is found, the test procedure may be halted and the fault repaired, if this is economically appropriate. The circuit can then be retested to check that the repair was successful and to look for any other faults.

This aspect of the invention may advantageously be combined with the probe apparatus described above. However, the testing method of the invention can also be combined with other testing apparatus, such as a flying probe, a plug-in interface such as USB or firewire, or any other probe design.

In each case the process of designing, or setting up, the. electrical testing method must take into account the type of probe or probes to be used. If the probe apparatus described above, using a probe support carrying an array of probes, is to be used then it will generally be necessary to design the^' layout of -the probe array at the same time as the test procedure, because this may determine the points at which any particular circuit may be probed. It may only be possible, for example, to apply probes to a complex mass-produced circuit at certain points and this may restrict the electrical tests which can be applied. For example it may be impossible to apply probes to a circuit so that particular devices or components can be directly or individually probed in isolation from other circuit components because of lack of physical access to suitable points on the circuit.

In overview, the method of the invention may advantageously be based on the idea of assuming that a circuit or an electronic product has one or more of several known faults before it is tested. Consequently, the procedure typically checks for incorrect operation arising from a known defective component or components, or arising from failure of a component (or components) which is commonly known to fail and which has^' resulted in a high number of failures in previously-tested circuits. The procedure may therefore start with the assumption that at least one component has failed and look for expected incorrect operation of the- circuit which would be caused by such a failure. By checking components in this manner, the invention may advantageously be able to identify a large percentage of failures before traditional engineering methods need to be employed, for example to identify less common failures. This may achieve two particularly advantageous results. First, more circuits or products can be repaired more quickly than using prior art methods. Second, the cost point at which a circuit or product is beyond economic repair may be lowered because the cost of testing and repairing the circuit can be decreased. Thus, a higher proportion of failed circuits may be economically repaired.

The method, and apparatus of the invention may advantageously be used for automatic testing and fault finding on any electronic device but is particularly suited to mass-produced circuits mounted on printed circuit boards (PCBs) as used in mobile phones, PDAs, digital cameras, laptop computers etc.

Specific Embodiments and Best Mode of the Invention

Specific embodiments of the invention will now be described by way of example, with reference to the drawings, in which:

Figure 1 is a three-quarter view of a probe apparatus according to a first embodiment; Figure 2 is a perspective view of the embodiment of Figure 1, in position for testing a circuit;

Figure 3 is an exploded view of the embodiment of Figure 1;

Figure 4 is a plan view of a probe plate for fitting to the probe apparatus of the first embodiment;

Figure 5 is a plan view of a second probe plate;

Figure 6 is a side view of an individual probe;

Figures 7 to 10 are portions of a flow chart illustrating a testing method according to a second embodiment;

Figure 11 is a block diagram of an electrical testing apparatus according to a further embodiment; and

Figure 12 is a block diagram showing a portion of Figure 10 in more detail.

Figures 1 and 2 show perspective views of a probe apparatus according to a first embodiment of the invention and Figure 3 shows an exploded diagram of a similar apparatus . The apparatus comprises two probe plate holders 15, 58 for carrying two probe supports, or probe plates, 80,82 (see Figures 4 and 5), between which an electronic circuit can be inserted for testing. Figure 1 shows the probe plate holders separated, ready for mounting probe plates and for the insertion of an electronic circuit, and in Figure 2 the probe plate holders have been moved together, in position for carrying out the testing. Probes carried by the probe plates are connected to a computer apparatus (not shown in Figures 1 to 3) for performing the testing. The base of the apparatus forms a plinth comprising a base plate 30, from which front, side and rear plates 50, 52, 54 extend upwardly, secured by screws 27. The base plate stands on adjustable feet 31, 32. The • upper surface of the plinth is formed by a top base plate 29, on which the remainder of the apparatus stands .

From the top base plate, two fixed side plates 26, 40 and a back plate 38 extend upwardly. The side plates are secured to the top base plate by screws 28 and the back plate is secured to rear edges of the side plates by screws 39. Upper edges of the side plates are secured by means of screws 1 to a top plate 3, which extends forwardly from the upper edge of the back plate. A carrying handle 2 is fastened to the top plate by screws 4.

The side, back and top plates form an open-fronted box within which the remainder of the apparatus is mounted.

Two vertical cam bearing shafts 43 are fixed between the •top base plate and the top plate. At the top plate, they are located within two rubber O-rings 48, which are glued to the underside of the top plate. A respective bush holder 5 is slidably mounted by means of a bush' 11 on each • cam bearing shaft. The bush holders are both secured to a lift plate 9, ^'which comprises two forwardly-extending arms which are spaced apart so that the- upper probe plate holder 58 can be mounted between them. Holders of different' thicknesses can be used to adjust the spacing between the upper and lower probe plates for testing circuits of different thicknesses.

The upper probe plate 80 is secured to the probe plate holder 15 spanning a cut-away portion of the holder, by means of removable grub screws. This allows different probe plates to be easily mounted for testing different circuits. In the embodiment, the probe plate is formed with threaded holes into which the screws are driven.

A cover plate 7 is secured to upper surfaces of the arms of the lift plate by means of screws 6 and cover plate spacers 8. The lower surface of the cover plate carries a connector (not shown) for receiving a corresponding connector electrically coupled to the probes of the upper probe plate, as described below.

Beneath a portion of the lift plate 9 between the bush holders 5 is mounted a motion arm block 34 of a cam apparatus. Cam arms 37 link the motion arm block to a cam action arm block 36, which is secured to a cam shaft 46 by grub screws 35. The cam shaft extends horizontally between bearings 45 mounted in the side plates 26, 40. The cam shaft extends through the bearing in one side plate 40 for the mounting of a cam handle 44, which is secured to the cam shaft 46 by means of a grub screw 47. Manual rotation of the cam shaft by means of the cam handle thus rotates the cam action arm block and, by means of the cam arms acting on the motion arm block, raises and lowers the lift plate and the attached upper probe plate. The motion also acts on coil springs 42 encircling the cam bearing shafts 43, which together with an over-centre action of the cam apparatus serve to latch the upper probe plate in an upper or a lower position, as illustrated in Figures 1 and 2 respectively.

The end of the cam shaft 46 opposite the cam handle carries a safety pull latch 16 which prevents operation of the cam handle to move the probe plates together until the safety latch is pulled!

A lower probe connector plate 21 is mounted in a fixed position above the top base plate 29 by means- of bearing - rods 24 and supports a connector 23 to which the probes carried by the lower probe plate can be electrically connected as described below. The bearing rods extend upwards through locating holes in the connector plate to slidably receive a self-retreat stripper plate 20. The connector plate seats in a predetermined position on flanges surrounding the bearing rods, and compression springs 22 encircle the bearing rods above the connector plate, acting to urge the stripper plate upwards, away from the lower probe plate. The stripper plate is retained by thumb-screw caps 18 at the upper ends of the bearing rods .

A lower probe plate holder is secured to the stripper plate, and above the stripper plate, by means of screws. The lower probe plate 82 is removably fastenable to the holder, spanning a central opening therein, by means of grub screws in a similar way as for the upper probe plate. When the lower probe plate is installed, it is screwed to the holder after a connector coupled by electrical leads to its probes is plugged into the connector 23 on the connector plate. As the lower probe plate is mounted on the holder, locating pins 48 extending upwardly from the stripper plate pass through corresponding locating holes in the' lower probe plate in order to ensure that it is accurately positioned. The locating pins also engage with holes in the circuit board for testing and, during testing, with holes in the upper probe plate. The positions and sizes of the locating pins therefore depend on the type of circuit to be tested. The stripper plate may therefore be interchangeable along with the probe plates for testing different types of circuit.

For testing an electronic circuit which is mounted on a two-sided printed circuit board (PCB) having circuit tracks on both sides, a plurality of spring-loaded probes is mounted in a predetermined arrangement on each probe plate, the number and arrangement of probes being designed according to the type of circuit to be tested. Examples of upper and lower probe plates 80, 82 are shown in Figures 4 and 5, indicating an arrangement of probes 100 for testing a circuit board for a Nokia 3310 mobile phone.

Figure 6 illustrates an individual spring-loaded probe. This comprises a probe body 102 mounted within a probe receptacle 104 of the probe plate, (shown as 80 in Figure 6) . A probe tip extends from one end of the probe body, urged outwards by a compression spring contained within _, the probe body. The opposite end of the probe body carries a connector 108 for electrically connecting the probe to the remainder of the testing electronics. As the probe plate is moved towards the circuit board, the probe tip 106 contacts a track or contact point on the circuit board and, when the probe plate reaches its final position, the probe tip is urged against the circuit board by the compression spring to ensure good electrical contact.

The probes on the probe plates are each electrically connected to an interface panel mounted on the back plate 38 of the probe apparatus, which carries connectors for connecting the probe apparatus to a controller for carrying out the testing procedure. As described above, the probe plates are interchangeable for different probe plates. To achieve this, the probes on each probe plate are wired to a probe connector, for example at the end of a short probe lead. The probe connector for each probe plate can be plugged into a corresponding connector which is mounted on the body of the probe apparatus and coupled to the interface panel.

In the embodiment, each probe is thus coupled to a. contact of a connector on the interface panel and thence to the controller,' or testing apparatus. In an alternative embodiment, the probes could be coupled to multiplexing interface circuitry housed within the probe apparatus, which would in turn be coupled to the interface panel. This may advantageously reduce the number of contacts required at the interface panel.

To operate the apparatus, the cam handle is first rotated so that the upper probe plate is raised. Probe plates and a stripper plate suitable for testing the desired electronic circuit are inserted and fixed into the testing apparatus, and the probes on the probe plates are electrically coupled to the interface connectors by plugging in the probe connectors to the connector 23 mounted on the connector plate and the connector (not shown) mounted beneath the cover plate 7. The desired electronic circuit is then positioned on the lower probe plate, in engagement with the locating pins 48 extending therethrough to ensure that the circuit is accurately positioned between the probes on the upper and lower .probe plates. The safety pull latch 16 is then withdrawn and the cam handle rotated to lower the upper probe plate towards the circuit. As it is lowered, the upper probe plate also urges the circuit downwards against the probes on the lower probe plate. At the same time the locating pins engage with holes in the upper probe plate to ensure that it is aligned with the circuit. When the cam handle has been fully rotated to a predetermined position, an electrical contact is also made directly between the upper and. lower probe plates, or a microswitch contact is made. The computer-controlled testing circuitry is interfaced to this contact so that it can determine when the probe plates are in position for testing, and can start automatically if desired.

When testing is complete, the cam handle can be rotated to raise the upper probe plate. The electronic circuit can then be removed and a further circuit inserted for _. testing. As can be seen from Figures 1 and 2, in the embodiment the cover plate, probe plates and stripper plate are fabricated from a transparent plastic or acrylic material. In general, other materials may be used although electrical insulation between the probes needs to be maintained, which may conveniently be achieved by fabricating each probe plate from an insulating material. In addition, the use of transparent materials may assist in inserting circuits for testing and visually checking that contact between the probes and the circuit board is made .

As mentioned above, the probe apparatus is interfaced to a computer-controlled automated tester incorporating voltage or signal generators for applying voltages to probes, sensors for measuring voltages at probes and computer software for controlling the voltage or signal generators and the sensors. The automated tester may be mounted on a hardware rack separate from the probe apparatus for driving and receiving signals from the probes.

Figures 11 and 12 are block diagrams illustrating the structure of the automated tester. The tester software operates on a PC or other general purpose computer 300 coupled to a monitor and a keyboard. The PC is coupled to an output interface 304 and to a measurement interface 306.

Both interfaces are coupled to control circuitry 308, which is responsive to control signals from the software running on the PC. The control circuitry comprises relays 310, a keyboard simulator 312 and a multiplexer 314, as illustrated in Figure 12. The control circuitry 308 is then coupled to the connector of the probe apparatus for directing probe voltages and signals to the probes and for directing vo-ltages and signals from the probes to the measurement interface. The output interface 304 is also coupled to a voltage generator which produces simulated battery and charger voltages as required for testing a circuit and outputs these to the control circuitry 308.

The measurement interface 306 has an output coupled to the multiplexer 314 of the control circuitry 308 through which it controls the multiplexer to pass measurements from predetermined probes to the measurement interface. These may be analogue or digital signals. The measurement interface comprises a digital-to-analogue convertor for processing the analogue measurement signals and conveying digital values to the PC.

The software in the embodiment runs on the general-purpose computer or PC 300 as shown in Figure 11. A flow chart illustrating the operation of software for testing a circuit for a Nokia 3310 mobile phone is illustrated in Figures 7 to 10.

As described above, the circuit is assumed to have, or is treated as having, one of several known faults before it is examined. Thus, the software looks for known types of incorrect operation the circuit which are characteristic of faults in a component or components which is or are known to be responsible for high numbers of failures. A series of tests is designed to test each of these known faults, the tests being carried out in sequence in the embodiment .

It should be noted that in a complex, mass-produced circuit, there is likely to be limited access to apply probes and so it is unlikely to be possible to apply probes in suitable positions for directly testing each component on the circuit board. In addition, since the circuit is intended for repair, it is not desirable to remove components from the board for testing. It is therefore necessary to design, for each type of circuit, suitable tests for failed components or for identifying any other types of fault which can be performed using probes contacting only accessible points on the circuit.

The following description and the flow diagrams of Figures 7 to 10 relate to testing the circuit board of a Nokia 3310 mobile phone, which carries two integrated circuits, termed MAD and MAD2. Both of these are replaceable and an aim of the testing procedure is to identify whether either is faulty.

As shown in the flow diagrams of Figure 7 to 10, at various stages^' the testing system can output any of four types of fault, termed "PCB Fault", "Send to Technician", "Mad" and "Mad2". As described above, the testing system software compares measured probe voltages under various test conditions with values or ranges of values in a lookup table which correspond to predetermined faults. If a fault found in this way is so severe as to be beyond • economic repair, the system outputs "PCB Fault". If a fault is identified which is or may be repairable, the system outputs "Mad" or "Mad2". These outputs indicate that either the MAD or the MAD2 component on the board is faulty and should be replaced to repair the fault. If the testing system compares measured probe voltages with its look-up table and determines that the circuit is not operating correctly but that the measured voltages do not correspond to any of the values in the look-up table indicating one of the predetermined faults, the system outputs "Send to Technician". This allows a technician to investigate the fault in more detail . This in turn may ultimately allow information to be fed back from the technician' s findings to modify the software or the lookup table so as to improve the performance of the system. It will be noted that in order to indicate the presence of such faults of unknown type, the look-up table contains the expected values for probe measurements in a correctly- functioning circuit board as well as the values corresponding to predetermined fault types.

In the flow- diagrams of Figures 7 to 10 the output "Mad or PCB Fault" or "Mad2 or PCB Fault" can be generated under certain conditions. In such cases the probe voltages measured by the system are consistent with either of two types of fault and the circuit may be referred to a technician to investigate the fault in more detail. Alternatively it may be appropriate, depending on the cost of doing so, simply to replace the MAD or MAD2 component and to retest the circuit to see if the fault has been cured.

As illustrated in Figure 7, the software of the embodiment starts automatically when the cam handle of the tester locks 200, as detected by the contact made as the probe plates move together. The software then carries out a system check 202 before connecting a battery voltage to the circuit through suitable probes 204. The software then carries out three tests by measuring voltages generated at predetermined probes in response to the connection of the battery voltage and compares the results with a look-up table. First, if the battery voltage itself is measured as being outside predetermined limits, the software diagnoses from the look-up table a failure within the testing system and calls a supervisor 206. If^" the battery voltage is acceptable, the software measures voltages at other predetermined probes and passes or fails the circuit according to the results. Depending on which test is failed, the software may either diagnose an unrepairable "PCB fault" or log the fault and send the circuit to a technician. If no fault has been found, the software then applies subsequent tests to test the buzzer 208, vibra circuit 210 and the keypad LEDs 212. In each case, if a test is failed, the failure is noted and the circuit is sent to a technician for repair.

The initial tests discussed above are performed before the circuit is switched on. At a certain point, at step 214 in Figure 8, the circuit is switched on by the application of appropriate signals to a predetermined probe or probes and a sequence of tests is carried out with the phone switched on. Part of this sequence is a keypad test 216 (see Figure 9) , in which the test is repeated for each button of the telephone keypad.

Finally, when the tests are complete the battery simulator (applied at step 204) is disconnected from the circuit. The circuit can then be removed from the testing apparatus .

^■ If the circuit has been reported by a user as being faulty but the software has found no faults, then the circuit is sent to a technician with a fault report indicating "no fault found". The technician may then apply conventional means to try to identify the fault, bearing in mind that the automated test procedure has already checked for a number of the most common faults for that circuit type. The technician therefore need not check for these, advantageously reducing testing time.

In the foregoing description of the test procedure, it was indicated that if a fault was found, the test procedure would be stopped and the circuit sent to a technician for repair. This is as illustrated in the flow diagram of Figures 7 to 10. This principle can advantageously be used in a cyclic system in which, when one fault has been found and repaired, the circuit is retested using the probe apparatus for a second time. If the circuit is found to operate correctly, the fault can be assumed to have been repaired and to have been the only fault. If a second fault is found, it may be that the circuit originally contained two faults, both of which need to be repaired before the circuit can be declared serviceable. After repair of the second fault the circuit is tested for a third time, and so on.

In an alternative embodiment, the entire test procedure may be performed even if a fault is found before the testing procedure is complete, so that multiple faults can be identified. This approach may, however, not be appropriate in certain cases, where the existence of one fault could alter the results of a subsequent test for a different fault. For example, if the fault is such that the battery voltage is not applied to the circuit, perhaps due to a PCB failure, then no subsequent test reliant on application of the battery voltage can validly be performed. In such cases, it would be necessary to stop testing and send the circuit for repair or disposal as soon as a fault is found, depending on the nature of the fault.

Some faults identified by the tester may not be economically repairable. If such faults are found, the circuit need not be^' sent to a technician but can simply be discarded. In such cases, it might be desired to have a technician confirm the failure found by the automated tester, but this would typically be a commercial decision ^■ based on the accuracy of the automated tester and the costs of having a technician check the failure.

In overview, the steps of the automated testing procedure in the embodiment are as follows . 1. Power the circuit by applying a simulated battery voltage .

2. Check voltage levels at predetermined probes.

3. Switch on the circuit. 4. Check the voltage levels at various predetermined probes .

5. Check that communications to the circuit operate.

6. Check that the circuit's self-test is passed.

7. For specific functions of the circuit, monitor a predetermined probe or probes, send a command to the circuit and check that the points monitored by the probe or probes respond correctly (eg turn on the buzzer, and check that the voltage at the buzzer pads changes) .

Claims

1. A method for testing an electronic circuit of a predetermined type, comprising the steps of; identifying a fault known to occur in circuits of the predetermined type; designing a testing procedure in which, when a circuit of the predetermined type is contacted with a plurality of electrical probes and the probes are used to measure a value of an electrical parameter of the circuit, the value of the electrical parameter is characteristic of the known fault; generating a look-up table in which the value of the measured electrical parameter is associated with the known fault; contacting the circuit for testing, which is assumed or known to be faulty, with the plurality of electrical probes according to the testing procedure and measuring the value of the electrical parameter; and comparing the measured value of the electrical parameter with the measured value in the look-up table to identify whether the circuit being tested contains the associated fault.

2. The method of Claim 1, in which; the testing procedure is designed to measure the values of a plurality of electrical parameters, each of the measured values, or combinations of the measured values, being characteristic of one of a plurality of known faults; the look-up table associates each of the measured values, or the combinations of the measured values, with the associated fault; and when the testing procedure is applied to the circuit which is assumed or known to be faulty, the measured values of the plurality of electrical parameters are compared with the look-up table to identify any associated fault or faults in the circuit.

3. The method of Claim 1 or 2, in which the plurality of electrical probes is carried by a probe support in a predetermined arrangement for bringing the probes into contact with the circuit.

4. A method according to Claim 1, 2 or 3, in which the probes are applied to the circuit for testing using the apparatus of any of Claims 8 to 15.

5. A method for testing an electronic circuit of a predetermined type comprising the steps of; contacting the circuit at predetermined positions with a plurality of electrical probes; measuring a value of an electrical parameter of the circuit, the value of the electrical parameter being characteristic of a fault known to occur in circuits of the predetermined type; and comparing the measured value with a value known to be associated with the known fault to identify whether the circuit being tested contains the fault.

6. A method according to Claim 5, in which the known fault is one of a plurality of faults known to occur in circuits of the predetermined type, and values of electrical parameters known to be associated with each of the plurality of faults are stored in a look-up table; and comprising the step of comparing measured values of each of the electrical parameters with each of the values stored in the look-up table to identify which of the faults are contained in the circuit being tested.

7. A method for testing a predetermined electronic circuit comprising the step of applying a plurality of electrical probes carried by a probe support in a predetermined arrangement to the circuit and using the probes to measure one or more electrical parameters of the circuit.

8. An apparatus for testing electronic circuits comprising a plurality of electrical probes arranged on a probe support, the probe arrangement being predetermined for testing a predetermined electronic circuit, and the probe support being movable to bring the plurality of probes into contact with the circuit to enable electrical parameters of the circuit to be measured through the probes, and subsequently to withdraw the plurality of probes from the circuit.

9. An apparatus according to Claim 8, in which the probe support is substantially planar.

10. An apparatus according to Claim 8 or 9, in which each probe comprises a spring-loaded, or biassed, probe tip extending from the probe support.

11. An apparatus according to Claim 8, in which the probes arranged on the support form a bed-of-nails apparatus.

12. An apparatus according to any of Claims 8 to 11, comprising two probe supports, each carrying a plurality of electrical probes in predetermined arrangements for testing a predetermined electronic circuit, in which at least one of the probe supports is moveable to bring the plurality of probes carried by each probe support into contact with different surfaces of the electronic circuit.

13. An apparatus according to Claim 12, in which the electronic circuit comprises a two-sided circuit board and each plurality of probes contacts a respective side of the circuit board during testing.

14. An apparatus according to Claim 8, in which the probe support is linearly movable towards the electronic circuit.

15. An apparatus according to Claim 8, comprising a latch for latching the probe support in position for testing the electronic circuit.

16. An electronic circuit which has been repaired using the apparatus or method of any preceding Claim.

17. A mobile phone which has been repaired using the apparatus or method of any of Claims 1 to 15.