WO2004001747A3 - Balanced disparity channel code for dc control - Google Patents

Balanced disparity channel code for dc control Download PDF

Info

Publication number
WO2004001747A3
WO2004001747A3 PCT/IB2003/002742 IB0302742W WO2004001747A3 WO 2004001747 A3 WO2004001747 A3 WO 2004001747A3 IB 0302742 W IB0302742 W IB 0302742W WO 2004001747 A3 WO2004001747 A3 WO 2004001747A3
Authority
WO
WIPO (PCT)
Prior art keywords
rds
control
channel code
coder
code word
Prior art date
Application number
PCT/IB2003/002742
Other languages
French (fr)
Other versions
WO2004001747A2 (en
Inventor
Josephus A H M Kahlman
Original Assignee
Koninkl Philips Electronics Nv
Josephus A H M Kahlman
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv, Josephus A H M Kahlman filed Critical Koninkl Philips Electronics Nv
Priority to AU2003242902A priority Critical patent/AU2003242902A1/en
Priority to US10/517,976 priority patent/US7218254B2/en
Priority to JP2004515171A priority patent/JP4351156B2/en
Priority to KR1020047020566A priority patent/KR100987658B1/en
Priority to EP03760835A priority patent/EP1518241A2/en
Publication of WO2004001747A2 publication Critical patent/WO2004001747A2/en
Publication of WO2004001747A3 publication Critical patent/WO2004001747A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • H03M5/145—Conversion to or from block codes or representations thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • G11B2020/1453—17PP modulation, i.e. the parity preserving RLL(1,7) code with rate 2/3 used on Blu-Ray discs

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)

Abstract

A coder is fed with precoded data such that the absolute value of the RDS of the code words as produced by the coder is limited. This is achieved by ensuring that in a group of 2 code words the RDS of the first code word is compensated by the RDS of the second conde word. The RDS at the end of the second code word is then zero and the excursions of the RDS from the start of the first code word until the end of the second code word are limited because there are only a limited number of bits that can contribute to an increase of the absolute value of the RDS. This principle can easily be applied to the 17PP coder.
PCT/IB2003/002742 2002-06-20 2003-06-17 Balanced disparity channel code for dc control WO2004001747A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
AU2003242902A AU2003242902A1 (en) 2002-06-20 2003-06-17 Balanced disparity channel code for dc control
US10/517,976 US7218254B2 (en) 2002-06-20 2003-06-17 Balanced disparity channel code for DC control
JP2004515171A JP4351156B2 (en) 2002-06-20 2003-06-17 Balanced disparity channel code for DC control
KR1020047020566A KR100987658B1 (en) 2002-06-20 2003-06-17 Balanced disparity channel code for dc control
EP03760835A EP1518241A2 (en) 2002-06-20 2003-06-17 Balanced disparity channel code for dc control

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP02077528.4 2002-06-20
EP02077528 2002-06-20

Publications (2)

Publication Number Publication Date
WO2004001747A2 WO2004001747A2 (en) 2003-12-31
WO2004001747A3 true WO2004001747A3 (en) 2004-05-06

Family

ID=29797232

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2003/002742 WO2004001747A2 (en) 2002-06-20 2003-06-17 Balanced disparity channel code for dc control

Country Status (7)

Country Link
US (1) US7218254B2 (en)
EP (1) EP1518241A2 (en)
JP (1) JP4351156B2 (en)
KR (1) KR100987658B1 (en)
CN (1) CN100431033C (en)
AU (1) AU2003242902A1 (en)
WO (1) WO2004001747A2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6917313B1 (en) * 2002-01-16 2005-07-12 Marvell International Ltd. DC-free codes
US7321628B2 (en) * 2003-09-30 2008-01-22 Infineon Technologies Ag Data transmission system with reduced power consumption
US7852238B2 (en) 2003-10-13 2010-12-14 Koninklijke Philips Electronics N.V. Balanced disparity frame sync
CN1883005B (en) * 2003-11-21 2010-10-06 皇家飞利浦电子股份有限公司 Device and method for producing ioutput data supplied in pulse cutting area of optical disc
DE102004061803A1 (en) * 2004-04-08 2005-10-27 Robert Bosch Gmbh Method and device for error handling in the transmission of data via a communication system
US8037398B2 (en) * 2007-07-02 2011-10-11 Seagate Technology System for precoding parity bits to meet predetermined modulation constraints
KR20090085257A (en) * 2008-02-04 2009-08-07 삼성전자주식회사 Method, recording medium and apparatus for controling digital sum value
CN102006080A (en) * 2010-11-09 2011-04-06 中国人民解放军国防科学技术大学 Data coding method for passive radio frequency identification system
US8823558B2 (en) 2012-08-30 2014-09-02 International Business Machines Corporation Disparity reduction for high speed serial links
CN110289863B (en) * 2015-10-13 2022-04-05 华为技术有限公司 Decoding apparatus, decoding method, and signal transmission system
US9848342B1 (en) 2016-07-20 2017-12-19 Ccip, Llc Excursion compensation in multipath communication systems having performance requirements parameters

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0758825A1 (en) * 1995-08-15 1997-02-19 AT&T IPM Corp. Method and apparatus for generating dc-free sequences with conveying partial information by the sequence of codeword digital sums of successive codewords
JPH11177430A (en) * 1997-12-10 1999-07-02 Sony Corp Modulator and modulation method therefor, demodulator and demodulation method therefor and serving medium
JPH11177431A (en) * 1997-12-12 1999-07-02 Sony Corp Modulator, modulation method and serving medium

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GB2274956B (en) * 1993-02-05 1997-04-02 Sony Broadcast & Communication Image data compression
KR950010769B1 (en) * 1993-11-13 1995-09-22 국방과학연구소 Error correction code method
GB9506471D0 (en) * 1995-03-29 1995-05-17 Sgs Thomson Microelectronics Coding scheme for transmitting data
GB9506470D0 (en) * 1995-03-29 1995-05-17 Sgs Thomson Microelectronics 5b4t coding scheme
US6496540B1 (en) * 1998-07-22 2002-12-17 International Business Machines Corporation Transformation of parallel interface into coded format with preservation of baud-rate
KR100279752B1 (en) * 1998-11-11 2001-02-01 정선종 Encoding / Decoding Device of Bit Insertion / Operation Line Code for High Speed Optical Transmission System
US6492918B1 (en) * 1999-09-30 2002-12-10 Stmicroelectronics, Inc. Code word having data bits and code bits and method for encoding data
US6876315B1 (en) * 2004-03-12 2005-04-05 International Business Machines Corporation DC-balanced 6B/8B transmission code with local parity

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0758825A1 (en) * 1995-08-15 1997-02-19 AT&T IPM Corp. Method and apparatus for generating dc-free sequences with conveying partial information by the sequence of codeword digital sums of successive codewords
JPH11177430A (en) * 1997-12-10 1999-07-02 Sony Corp Modulator and modulation method therefor, demodulator and demodulation method therefor and serving medium
JPH11177431A (en) * 1997-12-12 1999-07-02 Sony Corp Modulator, modulation method and serving medium

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 12 29 October 1999 (1999-10-29) *

Also Published As

Publication number Publication date
AU2003242902A1 (en) 2004-01-06
JP2005530303A (en) 2005-10-06
KR20050019753A (en) 2005-03-03
US7218254B2 (en) 2007-05-15
CN100431033C (en) 2008-11-05
EP1518241A2 (en) 2005-03-30
JP4351156B2 (en) 2009-10-28
CN1662986A (en) 2005-08-31
AU2003242902A8 (en) 2004-01-06
WO2004001747A2 (en) 2003-12-31
KR100987658B1 (en) 2010-10-13
US20050219074A1 (en) 2005-10-06

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