WO2003103015A3 - Reconfigurable integrated circuit - Google Patents

Reconfigurable integrated circuit Download PDF

Info

Publication number
WO2003103015A3
WO2003103015A3 PCT/IB2003/002198 IB0302198W WO03103015A3 WO 2003103015 A3 WO2003103015 A3 WO 2003103015A3 IB 0302198 W IB0302198 W IB 0302198W WO 03103015 A3 WO03103015 A3 WO 03103015A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
processing elements
processor
reconfigurable integrated
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2003/002198
Other languages
French (fr)
Other versions
WO2003103015A2 (en
Inventor
Oliveira Kastrup Pereira Be De
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Priority to AU2003228062A priority Critical patent/AU2003228062A1/en
Priority to JP2004510004A priority patent/JP2005528792A/en
Priority to US10/516,626 priority patent/US20050235173A1/en
Priority to EP03725531A priority patent/EP1514198A2/en
Publication of WO2003103015A2 publication Critical patent/WO2003103015A2/en
Anticipated expiration legal-status Critical
Publication of WO2003103015A3 publication Critical patent/WO2003103015A3/en
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Advance Control (AREA)

Abstract

The present invention describes an integrated circuit (100) having a processor that consists of a plurality of identical, or at least very similar, processing elements (120) organized in a regular grid. Each processing element (120) is capable of executing the desired functionality of the processor. The processing elements (120) are interconnected by a configurable interconnection network (140) and are controlled by a program sequencing issuing device (160) capable of handling exceptions in the instruction flow through the processing elements (120). Consequently, the integrated circuit (100) can be easily redesigned, thus reducing design effort and time-to-market for such architectures.
PCT/IB2003/002198 2002-06-03 2003-05-21 Reconfigurable integrated circuit Ceased WO2003103015A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AU2003228062A AU2003228062A1 (en) 2002-06-03 2003-05-21 Reconfigurable integrated circuit
JP2004510004A JP2005528792A (en) 2002-06-03 2003-05-21 Reconfigurable integrated circuit
US10/516,626 US20050235173A1 (en) 2002-06-03 2003-05-21 Reconfigurable integrated circuit
EP03725531A EP1514198A2 (en) 2002-06-03 2003-05-21 Reconfigurable integrated circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP02077168 2002-06-03
EP02077168.9 2002-06-03

Publications (2)

Publication Number Publication Date
WO2003103015A2 WO2003103015A2 (en) 2003-12-11
WO2003103015A3 true WO2003103015A3 (en) 2004-12-29

Family

ID=29595034

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2003/002198 Ceased WO2003103015A2 (en) 2002-06-03 2003-05-21 Reconfigurable integrated circuit

Country Status (7)

Country Link
US (1) US20050235173A1 (en)
EP (1) EP1514198A2 (en)
JP (1) JP2005528792A (en)
CN (1) CN1659540A (en)
AU (1) AU2003228062A1 (en)
TW (1) TW200405546A (en)
WO (1) WO2003103015A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE0300742D0 (en) * 2003-03-17 2003-03-17 Flow Computing Ab Data Flow Machine
KR20100072100A (en) * 2007-11-01 2010-06-29 실리콘 하이브 비.브이. Application profile based asip design
US20110271078A1 (en) * 2008-09-28 2011-11-03 Peking University Shenzhen Graduate School Processor structure of integrated circuit
KR101978409B1 (en) * 2012-02-28 2019-05-14 삼성전자 주식회사 Reconfigurable processor, apparatus and method for converting code
US10445098B2 (en) * 2017-09-30 2019-10-15 Intel Corporation Processors and methods for privileged configuration in a spatial array
CN109523019B (en) * 2018-12-29 2024-05-21 百度在线网络技术（北京）有限公司 Accelerator, accelerating system based on FPGA, control method and CNN network system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0973099A2 (en) * 1994-09-13 2000-01-19 Lockheed Martin Corporation Parallel data processor
US6041400A (en) * 1998-10-26 2000-03-21 Sony Corporation Distributed extensible processing architecture for digital signal processing applications
WO2000022503A1 (en) * 1998-10-09 2000-04-20 Bops Incorporated Efficient complex multiplication and fast fourier transform (fft) implementation on the manarray architecture
US6266760B1 (en) * 1996-04-11 2001-07-24 Massachusetts Institute Of Technology Intermediate-grain reconfigurable processing device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5915123A (en) * 1997-10-31 1999-06-22 Silicon Spice Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements
US6094726A (en) * 1998-02-05 2000-07-25 George S. Sheng Digital signal processor using a reconfigurable array of macrocells

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0973099A2 (en) * 1994-09-13 2000-01-19 Lockheed Martin Corporation Parallel data processor
US6266760B1 (en) * 1996-04-11 2001-07-24 Massachusetts Institute Of Technology Intermediate-grain reconfigurable processing device
WO2000022503A1 (en) * 1998-10-09 2000-04-20 Bops Incorporated Efficient complex multiplication and fast fourier transform (fft) implementation on the manarray architecture
US6041400A (en) * 1998-10-26 2000-03-21 Sony Corporation Distributed extensible processing architecture for digital signal processing applications

Also Published As

Publication number Publication date
AU2003228062A1 (en) 2003-12-19
CN1659540A (en) 2005-08-24
US20050235173A1 (en) 2005-10-20
JP2005528792A (en) 2005-09-22
EP1514198A2 (en) 2005-03-16
AU2003228062A8 (en) 2003-12-19
WO2003103015A2 (en) 2003-12-11
TW200405546A (en) 2004-04-01

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