WO2003096429A1 - Method of fabricating probe for spm having fet channel structure utilizing self-aligned fabrication - Google Patents

Method of fabricating probe for spm having fet channel structure utilizing self-aligned fabrication Download PDF

Info

Publication number
WO2003096429A1
WO2003096429A1 PCT/KR2003/000852 KR0300852W WO03096429A1 WO 2003096429 A1 WO2003096429 A1 WO 2003096429A1 KR 0300852 W KR0300852 W KR 0300852W WO 03096429 A1 WO03096429 A1 WO 03096429A1
Authority
WO
WIPO (PCT)
Prior art keywords
mask layer
probe
substrate
tip
spm
Prior art date
Application number
PCT/KR2003/000852
Other languages
French (fr)
Inventor
Hong-Sik Park
Hyun-Jung Shin
Ju-Hwan Jung
Original Assignee
Samsung Electronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co., Ltd. filed Critical Samsung Electronics Co., Ltd.
Priority to EP03717784A priority Critical patent/EP1502306A4/en
Priority to AU2003222507A priority patent/AU2003222507A1/en
Priority to US10/513,170 priority patent/US7008811B2/en
Priority to JP2004504301A priority patent/JP3856395B2/en
Publication of WO2003096429A1 publication Critical patent/WO2003096429A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01QSCANNING-PROBE TECHNIQUES OR APPARATUS; APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBE MICROSCOPY [SPM]
    • G01Q60/00Particular types of SPM [Scanning Probe Microscopy] or microscopes; Essential components thereof
    • G01Q60/24AFM [Atomic Force Microscopy] or apparatus therefor, e.g. AFM probes
    • G01Q60/30Scanning potential microscopy
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y35/00Methods or apparatus for measurement or analysis of nanostructures
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic

Definitions

  • the present invention relates to a method of fabricating a probe for a scanning probe microscope (SPM) having a field effect transistor (FET) channel structure, and more particularly, to a method of fabricating a probe for an SPM in order to easily fabricate a nano-device.
  • SPM scanning probe microscope
  • FET field effect transistor
  • Probes can be utilized in various SPM technologies, for example, a scanning tunneling microscope (STM) for reproducing information by detecting currents that flow according to the difference between a voltage applied to a probe and a voltage applied to a specimen, an atomic force microscope (AFM) using an atomic force between a probe and a specimen, a magnetic force microscope (MFM) using a force between a magnetic field of a specimen and a magnetized probe, a scanning near-field optical microscope (SNOM) improving a limit in resolution due to the wavelength of visible rays, and an electrostatic force microscope (EFM) using static electricity between a specimen and a probe.
  • STM scanning tunneling microscope
  • AFM atomic force microscope
  • MFM magnetic force microscope
  • SNOM scanning near-field optical microscope
  • EFM electrostatic force microscope
  • FIGS. 1A and 1B are a perspective view and an enlarged view of a probe for an SPM having an FET channel structure according to Korean Patent No. 2001-45981.
  • a bar-shape probe 10 formed by etching a semiconductor substrate 20 is protruded from the substrate 20, and electrode pads 20a and 20b are arranged at both sides of an end portion where the probe 10 and the substrate 20 are connected.
  • source and drain regions 11 and 13 are formed on an inclined surface at the end of a V-shape tip of the probe 10.
  • a channel region 12 is formed between the source and the drain regions 11 and 13.
  • a tip having a radius of tens of nanometers is manufactured using various processes, such as an oxidation process, so that the tip is vertically formed on the cantilever
  • the present invention provides a method of fabricating a probe for a scanning probe microscope (SPM) having a field effect transistor (FET) channel structure utilizing a self-aligned fabrication to form a tip having a source and a drain with a short channel length at the end and having the center of the channel aligned at the end.
  • SPM scanning probe microscope
  • FET field effect transistor
  • a method of fabricating a probe comprising a first step of forming a first-shaped mask layer on a substrate and forming a source region and a drain region in regions of the substrate except for the region masked by the mask layer; a second step of patterning a first-shaped photoresist in a perpendicular direction to the mask layer and performing an etching process to form a second-shaped mask layer; and a third step of etching the regions of the substrate except for the region masked by the mask layer to form a probe.
  • the first-shaped mask layer is a striped-shaped mask layer.
  • the second-shaped mask layer is a square-shaped mask layer.
  • the first step further comprises performing a thermal diffusion process to reduce the distance between the source region and the drain region.
  • the substrate is a p-type substrate.
  • the ions are p-type ions
  • the substrate is an n-type substrate.
  • FIG. 1A is a perspective view illustrating a probe for a scanning probe microscope (SPM) disclosed in Korea Patent No. 2001-45981 ;
  • FIG. 1 B is an enlarged view of portion A in FIG. 1 A;
  • FIGS. 2A through 21 are perspective views illustrating a method of fabricating a probe for an SPM according to an embodiment of the present invention.
  • FIGS. 3 and 4 are views illustrating methods of reproducing information by using a probe for an SPM, fabricated according to the present invention.
  • FIGS. 2A through 21 are perspective views illustrating a method of fabricating a probe having a field effect transistor (FET) channel structure, according to an embodiment of the present invention.
  • FET field effect transistor
  • the method includes forming source and drain regions, etching a mask into a predetermined shape, and forming a probe.
  • the present invention uses a self-aligned fabrication wherein the mask used to form the source and the drain regions is used as a mask in the etching process to form the probe.
  • a mask layer 33a is formed on a substrate 31 and a photoresist 35a is coated on the mask layer 33a. Thereafter, a stripe-shaped photomask 38a is arranged on the photoresist 35a and exposure, development, and etching processes are performed.
  • an ion implantation process is performed on the regions except for the stripe-shaped mask layer 33a to form source and drain regions 32 and 34.
  • the source and the drain regions 32 and 34 are doped with p-type ions.
  • the source and the drain regions 32 and 34 are doped with n-type ions.
  • a mask layer 33c located on a tip 30 as shown in FIG. 2F will serve as a mask in an etching process when forming the tip 30, the width of the mask layer 33b of FIG. 2B should be maintained to a predetermined size.
  • a channel region 36 between the source and the drain regions 32 and 34 shown in FIG. 2H depends on the width of a mask layer 33c of FIG. 2G
  • an additional annealing process is performed after implanting ions in the process of FIG. 2G in order to reduce the width of the channel region 36. Accordingly, the length of the channel region 36 between the source and the drain regions 32 and 34 is reduced while maintaining the width of the mask layer 33g.
  • a photolithographic process and an etching process are performed as shown in FIGS. 2C and 2D, in order to change the form of a mask layer 33b to a rectangular shape.
  • a photoresist 35c is coated on the substrate 31 to cover the mask layer 33b, and a stripe-shaped mask 38c is arranged thereon in a perpendicular direction to the mask layer 33b. Thereafter, exposure, development, and etching processes are performed so that the photoresist 35c is patterned into a stripe-shaped photoresist 35d that is perpendicular to the mask layer 33b, as shown in FIG. 2D. Referring to FIG. 2D, regions of the mask layer 33b not covered by the stripe-shaped photoresist 35d are dry etched. Accordingly, the exposed portions of the mask layer 33b are removed so that a rectangular mask layer 33c is formed as shown in FIG. 2E. Thereafter, referring to FIG. 2E, the etching process is performed to form the rectangular mask layer 33c and to remove the strip-shaped photoresist 35d.
  • a tip is formed by performing a wet or dry etching process using the rectangular mask layer 33c as shown in FIG. 2F, in order to form a probe.
  • the source and the drain regions 32 and 34 are formed on the inclined surfaces of the tip 30, and the mask layer 33c located at the peak of the tip 30.
  • the peak of the tip 30 of the probe can be sharp and the length of the channel 36 can be reduced.
  • the silicon layers on the left and the right sides of the channel region 36 of the tip 30 are doped to expand the source and the drain regions 32 and 34.
  • insulating layers 37 are connected to the source and the drain regions 32 and 34 in order to insulate portions of the upper surface of the substrate 31.
  • the backside of the substrate 31 is etched to release the cantilever.
  • the insulating layers 37 are deposited on the portions of the silicon substrate 31 , and electrodes 39 formed on the insulating layers 37 are connected to the source and the drain regions 32 and 34, respectively.
  • a cantilever 41 is extended from the silicon layer on the substrate 31 , and the tip 30 is formed on the surface of the cantilever 41 in a vertical direction.
  • the method of fabricating a probe according to the present invention uses a self-aligned fabrication utilizing the mask layer used for forming the source and the drain regions 32 and 34 as a mask for forming the tip 30 of the probe.
  • the processes shown in FIGS. 2A through 21 can be used to fabricate the probe having a different shape from that of FIG. 21.
  • FIGS. 3 and 4 Referring to FIG. 3, when the probe 30 is located above the positive surface charges of a recording medium 40 including a dielectric layer 47, the channel of minority carriers, electrons, is formed at the end of the tip 30 by the electric field generated from the surface charges. Therefore, the surface charges can be detected from currents that flow due to the difference between the voltage of the source region 32 and he voltage of the drain region 34.
  • the dielectric is polarized due to the electric field that is concentrated between a bottom electrode 49 and the tip 30. Accordingly, information is recorded on the surface of the recording medium.
  • the method of fabricating the probe according to the present invention realizes a transistor having a short channel length at the tip, which is vertically formed at the end of the cantilever of the probe, by using the self-aligned fabrication that arranges the center of the channel at the center of the tip.
  • the method can be used to easily fabricate a nano-device using a scanning probe technique that detects a small amount of surface charges existing in a small area on a recording medium.
  • the small amount of charges generated by polarized ferroelectrics can be easily reproduced and the charges can be easily recorded by generating polarization.
  • a person skilled in the art can manufacture an apparatus for recording and reproducing information by using probes of various shapes according to the present invention.
  • a method of fabricating a probe aligns the center of a tip with the center of a channel existing between a source region and a drain region to realize a tip having a size of tens of nanometers.
  • a nano-device can be easily manufactured using the probe having the tip.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
  • Power Engineering (AREA)
  • General Health & Medical Sciences (AREA)
  • Radiology & Medical Imaging (AREA)
  • Health & Medical Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nanotechnology (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Analytical Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Sampling And Sample Adjustment (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

Provided is a method of fabricating a probe for a scanning probe microscope (SPM) having a field effect transistor (FET) channel structure utilizing a self-aligned fabrication. The provided method includes a first step of forming a first-shaped mask layer on a substrate and forming a source region and a drain region in regions of the substrate except for the mask layer; a second step of patterning a first-shaped photoresist in a perpendicular direction to the mask layer and performing an etching process to form a second-shaped mask layer; and a third step of etching the regions of the substrate except for the mask layer to form a probe. The provided method aligns the center of a tip with the center of a channel existing between the source region and the drain region to realize a tip having a size of tens of nanometers. Thus, a nano-device can be easily manufactured using the probe having the tip.

Description

METHOD OF FABRICATING PROBE FOR SPM HAVING FET CHANNEL STRUCTURE UTILIZING SELF-ALIGNED FABRICATION
Technical Field The present invention relates to a method of fabricating a probe for a scanning probe microscope (SPM) having a field effect transistor (FET) channel structure, and more particularly, to a method of fabricating a probe for an SPM in order to easily fabricate a nano-device.
Background Art
Nowadays, as demands of small products, such as mobile communication terminals and electronic notebooks, increase, the need for small-sized and highly integrated nonvolatile recording media also increases. Since it is difficult to reduce the size of existing hard disks and to highly integrate flash memories, information storage apparatuses using scanning probes and methods thereof have been studied.
Probes can be utilized in various SPM technologies, for example, a scanning tunneling microscope (STM) for reproducing information by detecting currents that flow according to the difference between a voltage applied to a probe and a voltage applied to a specimen, an atomic force microscope (AFM) using an atomic force between a probe and a specimen, a magnetic force microscope (MFM) using a force between a magnetic field of a specimen and a magnetized probe, a scanning near-field optical microscope (SNOM) improving a limit in resolution due to the wavelength of visible rays, and an electrostatic force microscope (EFM) using static electricity between a specimen and a probe.
In order to record and reproduce high-density information at high speed by using the SPM technologies, surface charges existing in a small area of tens of nanometers should be detected. In addition, a cantilever of an array shape should be manufactured in order to improve recording and reproducing speeds. FIGS. 1A and 1B are a perspective view and an enlarged view of a probe for an SPM having an FET channel structure according to Korean Patent No. 2001-45981. Referring to FIG. 1A, a bar-shape probe 10 formed by etching a semiconductor substrate 20 is protruded from the substrate 20, and electrode pads 20a and 20b are arranged at both sides of an end portion where the probe 10 and the substrate 20 are connected. Referring to FIG. 1B, an enlarged view of portion A in FIG. 1A, source and drain regions 11 and 13 are formed on an inclined surface at the end of a V-shape tip of the probe 10. In addition, a channel region 12 is formed between the source and the drain regions 11 and 13.
Since the tip of the probe is located at the end of a cantilever, it is difficult to manufacture an array-shape cantilever and the tip having a radius of tens of nanometers. In a conventional method, a tip having a radius of tens of nanometers is manufactured using various processes, such as an oxidation process, so that the tip is vertically formed on the cantilever
However, the precision of a photolithographic process deteriorates when a tip having a height of several micrometers is formed, so it is difficult to form source and drain regions having a short channel length. In addition, even when the short channel length is realized using a diffusion process, it is difficult to align the center of the short channel at the end of the tip due to an alignment error in the photolithographic process.
Disclosure of the Invention
The present invention provides a method of fabricating a probe for a scanning probe microscope (SPM) having a field effect transistor (FET) channel structure utilizing a self-aligned fabrication to form a tip having a source and a drain with a short channel length at the end and having the center of the channel aligned at the end.
According to an aspect of the present invention, there is provided a method of fabricating a probe comprising a first step of forming a first-shaped mask layer on a substrate and forming a source region and a drain region in regions of the substrate except for the region masked by the mask layer; a second step of patterning a first-shaped photoresist in a perpendicular direction to the mask layer and performing an etching process to form a second-shaped mask layer; and a third step of etching the regions of the substrate except for the region masked by the mask layer to form a probe.
It is preferable that the first-shaped mask layer is a striped-shaped mask layer.
It is preferable that the second-shaped mask layer is a square-shaped mask layer.
It is preferable that the first step further comprises performing a thermal diffusion process to reduce the distance between the source region and the drain region.
When the ions are n-type ions, the substrate is a p-type substrate. When the ions are p-type ions, the substrate is an n-type substrate.
Brief Description of the Drawings
FIG. 1A is a perspective view illustrating a probe for a scanning probe microscope (SPM) disclosed in Korea Patent No. 2001-45981 ; FIG. 1 B is an enlarged view of portion A in FIG. 1 A;
FIGS. 2A through 21 are perspective views illustrating a method of fabricating a probe for an SPM according to an embodiment of the present invention; and
FIGS. 3 and 4 are views illustrating methods of reproducing information by using a probe for an SPM, fabricated according to the present invention.
Best mode for carrying out the Invention
The present invention will now be described in more detail with reference to the accompanying drawing. FIGS. 2A through 21 are perspective views illustrating a method of fabricating a probe having a field effect transistor (FET) channel structure, according to an embodiment of the present invention.
The method includes forming source and drain regions, etching a mask into a predetermined shape, and forming a probe. Here, the present invention uses a self-aligned fabrication wherein the mask used to form the source and the drain regions is used as a mask in the etching process to form the probe.
In order to form a source region S and a drain region D, a photolithographic process and an ion implantation process as shown in FIGS. 2A and 2B, respectively, are performed.
First, as shown in FIG. 2A, a mask layer 33a is formed on a substrate 31 and a photoresist 35a is coated on the mask layer 33a. Thereafter, a stripe-shaped photomask 38a is arranged on the photoresist 35a and exposure, development, and etching processes are performed.
Next, as shown in FIG. 2B, an ion implantation process is performed on the regions except for the stripe-shaped mask layer 33a to form source and drain regions 32 and 34.
When the substrate 31 is an n-type substrate, the source and the drain regions 32 and 34 are doped with p-type ions. When the substrate 31 is a p-type substrate, the source and the drain regions 32 and 34 are doped with n-type ions.
Since a mask layer 33c located on a tip 30 as shown in FIG. 2F will serve as a mask in an etching process when forming the tip 30, the width of the mask layer 33b of FIG. 2B should be maintained to a predetermined size.
Thus, there is a limit in reducing the width of the stripe-shaped mask layer 33a in the photolithographic process of FIG. 2A.
In addition, since the width of a channel region 36 between the source and the drain regions 32 and 34 shown in FIG. 2H depends on the width of a mask layer 33c of FIG. 2G, an additional annealing process is performed after implanting ions in the process of FIG. 2G in order to reduce the width of the channel region 36. Accordingly, the length of the channel region 36 between the source and the drain regions 32 and 34 is reduced while maintaining the width of the mask layer 33g. Thereafter, a photolithographic process and an etching process are performed as shown in FIGS. 2C and 2D, in order to change the form of a mask layer 33b to a rectangular shape.
Referring to FIG. 2C, a photoresist 35c is coated on the substrate 31 to cover the mask layer 33b, and a stripe-shaped mask 38c is arranged thereon in a perpendicular direction to the mask layer 33b. Thereafter, exposure, development, and etching processes are performed so that the photoresist 35c is patterned into a stripe-shaped photoresist 35d that is perpendicular to the mask layer 33b, as shown in FIG. 2D. Referring to FIG. 2D, regions of the mask layer 33b not covered by the stripe-shaped photoresist 35d are dry etched. Accordingly, the exposed portions of the mask layer 33b are removed so that a rectangular mask layer 33c is formed as shown in FIG. 2E. Thereafter, referring to FIG. 2E, the etching process is performed to form the rectangular mask layer 33c and to remove the strip-shaped photoresist 35d.
Next, a tip is formed by performing a wet or dry etching process using the rectangular mask layer 33c as shown in FIG. 2F, in order to form a probe.
Referring to FIG. 2G, the source and the drain regions 32 and 34 are formed on the inclined surfaces of the tip 30, and the mask layer 33c located at the peak of the tip 30. When a thermal diffusion process is performed after the mask layer 33c is removed, the peak of the tip 30 of the probe can be sharp and the length of the channel 36 can be reduced.
Referring to FIG. 2H, the silicon layers on the left and the right sides of the channel region 36 of the tip 30 are doped to expand the source and the drain regions 32 and 34. In addition, insulating layers 37 are connected to the source and the drain regions 32 and 34 in order to insulate portions of the upper surface of the substrate 31.
Referring to FIG. 21, the backside of the substrate 31 is etched to release the cantilever.
Here, the insulating layers 37 are deposited on the portions of the silicon substrate 31 , and electrodes 39 formed on the insulating layers 37 are connected to the source and the drain regions 32 and 34, respectively. A cantilever 41 is extended from the silicon layer on the substrate 31 , and the tip 30 is formed on the surface of the cantilever 41 in a vertical direction.
The method of fabricating a probe according to the present invention uses a self-aligned fabrication utilizing the mask layer used for forming the source and the drain regions 32 and 34 as a mask for forming the tip 30 of the probe. In addition, the processes shown in FIGS. 2A through 21 can be used to fabricate the probe having a different shape from that of FIG. 21.
Hereafter, methods of reproducing and recording information by using the probe fabricated by the method according to the present invention will be described with reference to FIGS. 3 and 4. Referring to FIG. 3, when the probe 30 is located above the positive surface charges of a recording medium 40 including a dielectric layer 47, the channel of minority carriers, electrons, is formed at the end of the tip 30 by the electric field generated from the surface charges. Therefore, the surface charges can be detected from currents that flow due to the difference between the voltage of the source region 32 and he voltage of the drain region 34.
Referring to FIG. 4, when the probe 30 is placed above the dielectric layer 47 of the recording medium 40 and the same voltage is applied to the source region 32, the drain region 34, and the body portion of the tip 30, the dielectric is polarized due to the electric field that is concentrated between a bottom electrode 49 and the tip 30. Accordingly, information is recorded on the surface of the recording medium.
The method of fabricating the probe according to the present invention realizes a transistor having a short channel length at the tip, which is vertically formed at the end of the cantilever of the probe, by using the self-aligned fabrication that arranges the center of the channel at the center of the tip. Thus, the method can be used to easily fabricate a nano-device using a scanning probe technique that detects a small amount of surface charges existing in a small area on a recording medium. In addition, when the information is recorded and reproduced on and from a large capacity and small sized recording apparatus utilizing the scanning probe technique by using the probe according to the present invention, the small amount of charges generated by polarized ferroelectrics can be easily reproduced and the charges can be easily recorded by generating polarization. The drawings and specification of the invention are provided for illustration only and are not used to limit the scope of the invention set forth in the appended claims.
For example, a person skilled in the art can manufacture an apparatus for recording and reproducing information by using probes of various shapes according to the present invention.
Industrial Applicability
As described above, a method of fabricating a probe aligns the center of a tip with the center of a channel existing between a source region and a drain region to realize a tip having a size of tens of nanometers. Thus, a nano-device can be easily manufactured using the probe having the tip.

Claims

What is claimed is:
1. A method of fabricating a probe, the method comprising: a first step of forming a first-shaped mask layer on a substrate and forming a source region and a drain region in regions of the substrate except for the region masked by the mask layer; a second step of patterning a first-shaped photoresist in a perpendicular direction to the mask layer and performing an etching process to form a second-shaped mask layer; and a third step of etching the regions of the substrate except for the region masked by the mask layer to form a probe.
2. The method of claim 1 , wherein the first-shaped mask layer is a striped-shaped mask layer.
3. The method of claim 1 , wherein the second-shaped mask layer is a square-shaped mask layer.
4. The method of claim 1 , wherein the first step further comprises performing a thermal diffusion process to reduce the distance between the source region and the drain region.
5. The method of claim 1 , wherein the ions are n-type ions, and the substrate is a p-type substrate.
6. The method of claim 1 , wherein the ions are p-type ions, and the substrate is an n-type substrate.
PCT/KR2003/000852 2002-05-08 2003-04-26 Method of fabricating probe for spm having fet channel structure utilizing self-aligned fabrication WO2003096429A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP03717784A EP1502306A4 (en) 2002-05-08 2003-04-26 Method of fabricating probe for spm having fet channel structure utilizing self-aligned fabrication
AU2003222507A AU2003222507A1 (en) 2002-05-08 2003-04-26 Method of fabricating probe for spm having fet channel structure utilizing self-aligned fabrication
US10/513,170 US7008811B2 (en) 2002-05-08 2003-04-26 Method of fabricating probe for SPM having FET channel structure utilizing self-aligned fabrication
JP2004504301A JP3856395B2 (en) 2002-05-08 2003-04-26 A probe manufacturing method for a scanning probe microscope having a field effect transistor channel structure using a self-alignment process

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2002-0025399 2002-05-08
KR10-2002-0025399A KR100468849B1 (en) 2002-05-08 2002-05-08 Method of fabricating probe of scanning probe microscope having field effect transistor channel structure utilizing self-aligned fabrication

Publications (1)

Publication Number Publication Date
WO2003096429A1 true WO2003096429A1 (en) 2003-11-20

Family

ID=29417341

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2003/000852 WO2003096429A1 (en) 2002-05-08 2003-04-26 Method of fabricating probe for spm having fet channel structure utilizing self-aligned fabrication

Country Status (7)

Country Link
US (1) US7008811B2 (en)
EP (1) EP1502306A4 (en)
JP (1) JP3856395B2 (en)
KR (1) KR100468849B1 (en)
CN (1) CN100375295C (en)
AU (1) AU2003222507A1 (en)
WO (1) WO2003096429A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005124371A1 (en) * 2004-06-21 2005-12-29 Capres A/S A method for providing alignment of a probe
EP1640730A1 (en) * 2004-09-28 2006-03-29 Capres A/S A method for providing alignment of a probe
US7408018B2 (en) 2000-08-30 2008-08-05 Cornell Research Foundation, Inc. Elastomeric functional biodegradable copolyester amides and copolyester urethanes
EP2463668A2 (en) 2004-06-21 2012-06-13 Capres A/S A method and an apparatus for testing electrical properties

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7436753B2 (en) * 2003-12-17 2008-10-14 Mejia Robert G Contact probe storage FET sensor
KR100580652B1 (en) * 2004-08-27 2006-05-16 삼성전자주식회사 Method of fabricating semiconductor probe with resistive tip
KR100785006B1 (en) 2005-09-03 2007-12-12 삼성전자주식회사 Semiconductor probe with resistive tip of high resolution and method of fabricating the same
KR100790895B1 (en) * 2006-11-16 2008-01-03 삼성전자주식회사 Semiconductor probe having resistive tip and method of fabricating the same
KR20090014006A (en) * 2007-08-03 2009-02-06 삼성전자주식회사 Electric field read/write head and method for manufacturing the same and information storage device comprising electric field read/write head
CN105510638B (en) * 2014-09-24 2018-10-19 中国科学院宁波材料技术与工程研究所 Probe, preparation method and detection method in a kind of scanning probe microscopy
EP3599471A1 (en) 2018-07-26 2020-01-29 IMEC vzw A device for measuring surface characteristics of a material
KR102630588B1 (en) * 2018-09-21 2024-01-31 삼성디스플레이 주식회사 Apparatus and method for manufacturing light emitting display device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0886788A (en) * 1994-09-14 1996-04-02 Olympus Optical Co Ltd Integrated spm sensor
US5618760A (en) * 1994-04-12 1997-04-08 The Board Of Trustees Of The Leland Stanford, Jr. University Method of etching a pattern on a substrate using a scanning probe microscope
KR20010045981A (en) * 1999-11-09 2001-06-05 윤종용 Probe of scanning probe microscope having a field effect transistor channel and Fabrication method thereof

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5923033A (en) * 1994-09-14 1999-07-13 Olympus Optical Co., Ltd. Integrated SPM sensor having a photodetector mounted on a probe on a free end of a supported cantilever
JPH10163319A (en) * 1996-11-29 1998-06-19 Hitachi Ltd Manufacture of semiconductor insulated circuit device
JPH11211735A (en) * 1997-11-20 1999-08-06 Seiko Instruments Inc Method for manufacturing probe of scanning-type probe microscope (spm) probe
JP2000067478A (en) * 1998-08-19 2000-03-03 Canon Inc Information reproduction probe, its manufacture, and information reproducing device using the same
US6479892B1 (en) * 2000-10-31 2002-11-12 Motorola, Inc. Enhanced probe for gathering data from semiconductor devices
KR100466157B1 (en) * 2001-11-21 2005-01-14 재단법인서울대학교산학협력재단 Single/Multiple Cantilever Probe for Atomic Force Microscopy and Method for Producing the Same
KR100537508B1 (en) * 2003-04-10 2005-12-19 삼성전자주식회사 Method of fabricating semiconductor probe with resistive tip

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5618760A (en) * 1994-04-12 1997-04-08 The Board Of Trustees Of The Leland Stanford, Jr. University Method of etching a pattern on a substrate using a scanning probe microscope
JPH0886788A (en) * 1994-09-14 1996-04-02 Olympus Optical Co Ltd Integrated spm sensor
KR20010045981A (en) * 1999-11-09 2001-06-05 윤종용 Probe of scanning probe microscope having a field effect transistor channel and Fabrication method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1502306A4 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7408018B2 (en) 2000-08-30 2008-08-05 Cornell Research Foundation, Inc. Elastomeric functional biodegradable copolyester amides and copolyester urethanes
WO2005124371A1 (en) * 2004-06-21 2005-12-29 Capres A/S A method for providing alignment of a probe
US7936176B2 (en) 2004-06-21 2011-05-03 Capres A/S Method for providing alignment of a probe
EP2463668A2 (en) 2004-06-21 2012-06-13 Capres A/S A method and an apparatus for testing electrical properties
EP2463667A2 (en) 2004-06-21 2012-06-13 Capres A/S Flexible probe
US8378697B2 (en) 2004-06-21 2013-02-19 Capres A/S Method for providing alignment of a probe
EP1640730A1 (en) * 2004-09-28 2006-03-29 Capres A/S A method for providing alignment of a probe

Also Published As

Publication number Publication date
JP3856395B2 (en) 2006-12-13
CN1653620A (en) 2005-08-10
AU2003222507A1 (en) 2003-11-11
KR100468849B1 (en) 2005-01-29
KR20030087371A (en) 2003-11-14
JP2005524854A (en) 2005-08-18
US7008811B2 (en) 2006-03-07
EP1502306A4 (en) 2007-09-05
EP1502306A1 (en) 2005-02-02
CN100375295C (en) 2008-03-12
US20050214966A1 (en) 2005-09-29

Similar Documents

Publication Publication Date Title
KR100468850B1 (en) Semiconductor probe with resistive tip and Method of fabricating thereof and Information recording apparatus, Information reproducing apparatus, and Information measuring apparatus comprising the same
US7319224B2 (en) Semiconductor probe with resistive tip and method of fabricating the same
US7338831B2 (en) Method of fabricating semiconductor probe with resistive tip
KR100682916B1 (en) Semiconductor probe with resistive tip and method of fabricating the same
JP4050291B2 (en) Manufacturing method of semiconductor probe provided with resistive tip
US7008811B2 (en) Method of fabricating probe for SPM having FET channel structure utilizing self-aligned fabrication
KR20080031084A (en) Semiconductor probe having resistive tip of wedge shape and method of fabricating the same
KR100723410B1 (en) Mehtod of fabricating resistive probe having self-aligned metal shield
KR100707204B1 (en) Semiconductor probe with resistive tip of low aspect ratio and method of fabricating the same

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PH PL PT RO RU SC SD SE SG SK SL TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 10513170

Country of ref document: US

WWE Wipo information: entry into national phase

Ref document number: 2003717784

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 20038102137

Country of ref document: CN

Ref document number: 2004504301

Country of ref document: JP

WWP Wipo information: published in national office

Ref document number: 2003717784

Country of ref document: EP