WO2003052836A1 - Multi-junction solar cell device - Google Patents

Multi-junction solar cell device Download PDF

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Publication number
WO2003052836A1
WO2003052836A1 PCT/US2001/048183 US0148183W WO03052836A1 WO 2003052836 A1 WO2003052836 A1 WO 2003052836A1 US 0148183 W US0148183 W US 0148183W WO 03052836 A1 WO03052836 A1 WO 03052836A1
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Prior art keywords
active cell
layer
junction
silicon substrate
npassb
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PCT/US2001/048183
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French (fr)
Inventor
Daniel J. Friedman
John F. Geisz
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Midwest Research Institute
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Priority to US10/497,119 priority Critical patent/US7309832B2/en
Priority to PCT/US2001/048183 priority patent/WO2003052836A1/en
Priority to AU2002230804A priority patent/AU2002230804A1/en
Publication of WO2003052836A1 publication Critical patent/WO2003052836A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687Multiple junction or tandem solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/544Solar cells from Group III-V materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Definitions

  • This invention relates generally to a multi-junction solar cell device and, more particularly, it relates to a multi-junction solar cell device containing LT - V layers grown lattice-matched on silicon substrates.
  • Solar photovoltaic devices i.e., solar cells
  • the energy conversion occurs as the result of what is known as the photovoltaic-effect which occurs in a cell composed of a p-type semiconductor layer adjacent to an n-type semiconductor layer, hereafter referred to as a p-n junction cell.
  • Solar radiation impinging on a solar cell and absorbed by an active region of semiconductor material generates electricity.
  • Multi-junction solar cells may be more efficient than single-junction solar cells if properly designed.
  • One such design is described in U.S. Patent 5,223,043 issued to Olson et al.
  • Important considerations to achieve high efficiency energy conversion include the following: a) high quality crystalline layers; b) appropriate choice of junction band-gaps based on the impinging solar spectrum; c) tunnel junction interconnects between p-n junctions; d) appropriate choice of layer thicknesses to achieve a current-matched structure ; and e) passivating layers, such as back-surface-field layers or window layers, to reduce losses.
  • high-efficiency HI-V semiconductor multi-junction solar cells have been grown on GaAs, InP, and Ge substrates, but silicon substrates have been found advantageous for cost and mechanical robustness reasons.
  • Alloys containing the atoms (AlGaIn)(PAsSb) are examples of DI-V semiconductors, so named because their constituent elements come from the columns Hlb and Nb of the periodic table.
  • solar cells consisting of high- quality, single-crystal layers of (AlGaIn)(PAsSb) semiconductor alloys with a large range of optical properties have been grown on GaAs, InP, and Ge substrates because these alloys can be fabricated with compositions such that the crystal lattice parameter and crystal symmetry match that of the underlying substrate. This "lattice-matching" condition results in epitaxial layers with minimal strain, few defects and thus superior electrical properties.
  • the set of semiconductors alloys (AlGaIn)(PAasSb) cannot be lattice-matched to silicon for any composition.
  • compositions lattice-matched to silicon does allow for compositions lattice-matched to silicon to be reached.
  • the ability to fabricate these semiconductor alloys with nitrogen or boron concentrations greater than about 0.1% has only recently been discovered and the achievable compositions and their properties are under current investigation.
  • GaN x P ⁇ , Galn y N x P ⁇ , and GaN x P j . x . y As y have been grown on GaP and Si substrates for light emitting applications.
  • Gal y 3 ⁇ has also been shown to have a direct (or direct-like) band gap. has been grown on GaAs, but would require considerably greater concentrations of boron to be lattice-matched to silicon.
  • B x Ga j _ x P has not been attempted but would have a much better chance to be lattice-matched with- silicon than . All of these HI-V semiconductors have typically been grown using metal- organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), and similar techniques. Disclosure of the Invention:
  • MOVPE metal- organic vapor phase epitaxy
  • MBE molecular beam epitaxy
  • the present invention is a multi-junction solar cell device.
  • the multi-junction solar cell device comprises either two or three active solar cells connected in series in a monolithic structure.
  • the multi-junction device comprises a bottom active cell having a single-crystal silicon substrate base and an emitter layer.
  • the multi-junction device further comprises one or two subsequent active cells each having a base layer and an emitter layer with interconnecting tunnel junctions between each active cell.
  • At least one layer that forms each of the top and middle active cells is composed of a single-crystal HI-V semiconductor alloy that is substantially lattice-matched to the silicon substrate.
  • the polarity of the active p-n junction cells is either p-on-n or n-on-p.
  • the present invention further includes a method for substantially lattice matching an active HI-V solar cell or cells with an active silicon solar cell formed from a silicon substrate in a multi-junction solar cell device.
  • the method comprises forming the bottom active cell from a silicon substrate, and forming the top active cell or cells with at least one HI - V semiconductor layer which contains boron and/or nitrogen.
  • the general composition of the HI-V semiconductor layer B x Al y Ga 1 . x . y . z In z N s P 1 . s .
  • t-w As t Sb w hereafter referred to as (B AlGaIn)(NPAsSb), can be lattice matched to a silicon substrate only when boron and/or nitrogen compositions are greater than zero.
  • GaNPAs Ga N 0 19 As 081
  • GalnNP GalnNP
  • BGaPAs (B 025 Gao 75 As) ⁇ (B 002 Ga,, 98 P) x , hereafter referred to as BGaPAs, which are substantially lattice matched to silicon at room temperature for 0 ⁇ x ⁇ 1 make up a subset of the potential list of alloys of the general form (BAlGaIn)(NPAsSb) that are substantially lattice matched to silicon.
  • the quaternary alloys listed above are the most likely alloys to be used in the present invention due to their relative simplicity in composition and their useful range of band gaps.
  • the lattice matching condition is temperature dependent because the thermal expansion coefficient of silicon is different from that of HI-V semiconductors. Since these HI-V semiconductor layers are typically grown at elevated temperatures, it may be more beneficial to lattice match the HI-V semiconductor layers to silicon substrates at growth temperature rather than room temperature. When cooled to room temperature, HI-V semiconductor layers that have been lattice matched at growth temperature will be slightly lattice mismatched, but should also be considered “substantially lattice matched.”
  • GaP and ALGa ⁇ P are only slightly lattice mismatched with silicon substrates, but it may be argued that they are not "substantially lattice-matched with silicon.” While their high band gaps and slight lattice mismatch with silicon do not allow them to be useful as thicker light absorbing layers in the present invention, relatively thin layers of GaP and AlGaP within the structure of the present invention do not significantly affect the degree to which the relatively thick active solar cells on silicon substrates are strained. Thus, the active cell which contains a relatively thin GaP or AlGaP layer does not develop strain-related defects and the entire active cell is considered substantially lattice-matched with silicon.
  • FIG. 1 is a sectional view illustrating a two-junction solar cell device, constructed in accordance with the present invention
  • FIG. 2 is a sectional view illustrating a three-junction solar cell device, constructed in accordance with the present invention.
  • the present invention is a multi-junction solar cell device, indicated generally in its two-junction version as 10 and in its three-junction version as 100, having lattice-matched (B AlGaIn)(NPAsSb) alloys grown on silicon.
  • the solar cell device 10 rivals the efficiencies of high-efficiency cells on GaAs or Ge, with significant cost savings and improvements in mechanical stability.
  • the two-junction version of the solar cell device 10 of the present invention includes a single-crystal silicon substrate 22.
  • the two-junction device 10 comprises a bottom active cell 20, a top active cell 30, and an interconnecting tunnel junction layer 50.
  • the bottom active cell 20 comprises at least a p-type (or n-type) base layer formed within the silicon substrate 22 and an n-type (or p-type) emitter layer 23 forming a. p-n junction.
  • the top active cell 30 comprises at least a p-type (or n-type) base layer 32 and an n-type (or p- type) emitter layer 33 also forming a p-n junction.
  • the top active cell 30 comprises at least one nitrogen and/or boron containing a HI-V semiconductor absorbing layer with the general composition of (BAlGaIn)(NPAsSb) which has a direct (or direct-like) band gap of approximately 1.6 eV to approximately 1.8 eV thereby optimizing the efficiency of the entire multi-junction solar cell device 10.
  • Si, GaP, AlGaP, or various compositions of (B AlGaIn)(NPAsSb) which are substantially lattice-matched to the silicon substrate 22 would be used in the bottom emitter layer 23, the top emitter layer 33 and the top base layer 32.
  • both the top active cell 30 and bottom active cell 20 convert the absorbed portion of the solar spectrum into electrical energy.
  • the tunnel junction 50 is used to facilitate the flow of photogenerated electrical current between the bottom active cell 20 and the top active cell 30.
  • the tunnel junction 50 may take a number of forms to provide a thin layer 50 of materials that allows current to pass between cells 20 and 30 without generating a voltage drop large enough to significantly decrease the conversion efficiency of the solar cell device 10, and that preserves the lattice-matching between cells 20 and 30.
  • the photogenerated electrical energy is used or stored in an external circuit connected to the metal contacts 70 and 72.
  • the top active cell 30 and bottom active cell 20 may also contain passivating layers, commonly referred to as back- surface-field or window layers, to minimize electrical losses. The use of these passivating layers is commonly understood among those skilled in the art.
  • compositions of (B AlGaIn)(NPAsSb) substantially lattice matched to the silicon substrate would be chosen from the group of quaternary alloys; GaNPAs, Gal iNP, or BGaPAs specified previously.
  • HI - V semiconductors are grown on a single-crystal p-type silicon wafer 22 by MOVPE.
  • Source materials would include triethylgallium, phosphine, tertiary-butyl arsine, and dimethylhydrazine. Growth temperatures would be between 600° - 700° C.
  • the first layer deposited on the silicon substrate 22 would be a window layer consisting of 0.1 ⁇ m GaP doped highly n-type with Se from hydrogen selenide. Some of the phosphorus from this layer would diffuse into the silicon substrate during growth forming a thin n-type emitter layer 23 within the silicon substrate.
  • an 0.05 ⁇ m thick GaP layer doped highly p-type with carbon from CC1 4 together with the n-type GaP window layer would form the tunnel junction 50 .
  • a p-type Zn-doped back-surface-field for the top active cell 30 composed of 0.1 ⁇ m GaP would then be deposited on the tunnel junction 50.
  • a 1.0 ⁇ m GaN 007 As 023 P 070 top base layer 32 with a band gap of approximately 1.65 eV would serve as the primary absorbing layer of the top active cell 30.
  • the GaN 007 As 023 P 070 base 32 is not intentionally doped but has a background p-type doping level of approximately 1 x 10 16 cm "3 .
  • the top emitter 33 is composed of 0.1 ⁇ m Se-doped GaP.
  • a 0.1 ⁇ m thick highly Se-doped GaAs contact layer is deposited on the top emitter 33. This GaAs contact layer is removed except beneath the metal grid 70 after the Au/Sn/Au metal grids 70 are deposited by vacuum evaporation and standard photolithography techniques.
  • a gold back-side contact 72 is also evaporated on the back of the device.
  • a broadband two layer anti-reflective coating is finally deposited on the front of the device.
  • the thickness and composition of the GaN 007 As 023 P 070 top base layer 32 would be adjusted slightly to achieve a current-matched structure to optimize the efficiency of the entire device 10.
  • the three-junction version of the solar cell device 100 of the present invention includes a single-crystal silicon substrate 122.
  • the three-junction device 100 comprises a bottom active cell 120, a middle active cell 140, a top active cell 130, and two interconnecting tunnel junction layers 150 and 160.
  • the bottom active cell 120 comprises at least a p-type (or n-type) base layer 122 formed within the silicon substrate 122 and an n-type (or p-type) emitter layer 123 forming a p-n junction.
  • the top active cell 130 comprises at least a p-type (or n-type) base layer 132 and an n-type (or p-type) emitter layer 133 also forming a p-n junction.
  • the top active cell 130 comprises at least one nitrogen and/or boron containing a HI-V semiconductor absorbing layer with the general composition of (BAlGaIn)(NPAsSb) which has a direct (or direct-like) band gap of approximately 1.8 eV to approximately 2.0 eV thereby optimizing the efficiency of the entire multi-junction solar cell device 100.
  • the middle active cell 140 comprises at least a p-type (or n-type) base layer 142 and an n-type (or p-type) emitter layer 143 also forming a p-n junction.
  • the middle active cell 140 comprises at least one nitrogen and/or boron containing HI-V semiconductor absorbing layer with the general composition of (BAlGaIn)(NPAsSb) which has a direct (or direct-like) band gap of approximately 1.4 eV to approximately 1.5 eV thereby optimizing the efficiency of the entire multi-junction solar cell device 100.
  • Si, GaP, AlGaP, or various compositions of (BAlGaIn)(NPAsSb) which are substantially lattice-matched to the silicon substrate 122 would be used in the bottom emitter layer 123, the middle emitter layer 143, the middle base layer 142, the top emitter layer 133 and the top base layer 132.
  • the tunnel junction 150 is used to facilitate the flow of photogenerated electrical current between the active cells 120 and 140.
  • the tunnel junction 160 is used to facilitate the flow of photogenerated electrical current between the active cells 140 and 130.
  • the tunnel junctions 150 and 160 may take a number of forms that allows current to pass between cells 120 , 140, and 130 without generating a voltage drop large enough to significantly decrease the conversion efficiency of the solar cell device 100, and that preserves the lattice-matching between cells 120, 140, and 130.
  • the photogenerated electrical energy is used or stored in an external circuit connected to the metal contacts 170 and 172.
  • the active cells 120, 140, and 130 may also contain passivating layers, commonly referred to as back-surface-field or window layers, to minimize electrical losses.
  • passivating layers commonly referred to as back-surface-field or window layers.
  • the use of these passivating layers is commonly understood among those skilled in the art.
  • the compositions of (BAlGaIn)(NPAsSb) substantially lattice matched to the silicon substrate would be chosen from the group of quaternary alloys; GaNPAs, GalnNP, or B GaP As specified previously.

Abstract

A multi-junction solar cell device (10) is provided. The multi-junction solar cell device (10) comprises either two or three active solar cells connected in series in a monolithic structure. The multi-junction device (10) comprises a bottom active cell (20) having a single-crystal silicon substrate base and an emitter layer (23). The multi-junction device (10) further comprises one or two subsequent active cells each having a base layer (32) and an emitter layer (23) with interconnecting tunnel junctions between each active cell. At least one layer that forms each of the top and middle active cells is composed of a single-crystal III-V semiconductor alloy that is substantially lattice-matched to the silicon substrate (22). The polarity of the active p-n junction cells is either p-on-n or n-on-p. The present invention further includes a method for substantially lattice matching single-crystal III-V semiconductor layers with the silicon substrate (22) by including boron and/or nitrogen in the chemical structure of these layers.

Description

MULTI- JUNCTION SOLAR CELL DEVICE
Contractual Origin of the Invention
The United States Government has rights in this invention under Contract No. DE-AC36-99GO 10337 between the U.S. Department of Energy and the National Renewable Energy Laboratory, a Division of Midwest Research Institute.
Technical Field:
This invention relates generally to a multi-junction solar cell device and, more particularly, it relates to a multi-junction solar cell device containing LT - V layers grown lattice-matched on silicon substrates.
Background Art:
Solar photovoltaic devices, i.e., solar cells, are devices capable of converting solar radiation into usable electrical energy. The energy conversion occurs as the result of what is known as the photovoltaic-effect which occurs in a cell composed of a p-type semiconductor layer adjacent to an n-type semiconductor layer, hereafter referred to as a p-n junction cell. Solar radiation impinging on a solar cell and absorbed by an active region of semiconductor material generates electricity. Multi-junction solar cells may be more efficient than single-junction solar cells if properly designed. One such design is described in U.S. Patent 5,223,043 issued to Olson et al. Important considerations to achieve high efficiency energy conversion include the following: a) high quality crystalline layers; b) appropriate choice of junction band-gaps based on the impinging solar spectrum; c) tunnel junction interconnects between p-n junctions; d) appropriate choice of layer thicknesses to achieve a current-matched structure ; and e) passivating layers, such as back-surface-field layers or window layers, to reduce losses. In the past, high-efficiency HI-V semiconductor multi-junction solar cells have been grown on GaAs, InP, and Ge substrates, but silicon substrates have been found advantageous for cost and mechanical robustness reasons. Alloys containing the atoms (AlGaIn)(PAsSb) are examples of DI-V semiconductors, so named because their constituent elements come from the columns Hlb and Nb of the periodic table. In the past, solar cells consisting of high- quality, single-crystal layers of (AlGaIn)(PAsSb) semiconductor alloys with a large range of optical properties have been grown on GaAs, InP, and Ge substrates because these alloys can be fabricated with compositions such that the crystal lattice parameter and crystal symmetry match that of the underlying substrate. This "lattice-matching" condition results in epitaxial layers with minimal strain, few defects and thus superior electrical properties. Unfortunately, the set of semiconductors alloys (AlGaIn)(PAasSb) cannot be lattice-matched to silicon for any composition.
In the past, many investigators have attempted to grow IH-V solar cells on single-crystal silicon substrates. Blakeslee et al. (U.S. Patent No. 4,278,474), Umeno et al. (U.S. Patent No. 4,963,508), and Ringel et al. (U.S. Patent No. 5,571,339) have all disclosed lattice-mismatched HI-V solar cell devices grown on silicon substrates using strain-relieving buffer layers. But because these 1TJ-V solar cell designs are not lattice-matched to the underlying silicon, problems with high defect densities in the UI-V semiconductor layers have prevented such solar cell designs from achieving efficiencies as high as those on GaAs or Ge substrates. The addition of small amounts of boron (B) and/or nitrogen (N) to the more standard HI
- V alloys does allow for compositions lattice-matched to silicon to be reached. For example,
Figure imgf000004_0001
is lattice-matched to silicon for 0.022 < x < 0.194 and y = 4.6x - 0.09 . The ability to fabricate these semiconductor alloys with nitrogen or boron concentrations greater than about 0.1% has only recently been discovered and the achievable compositions and their properties are under current investigation.
In the recent past, GaNxP^, GalnyNxP^, and GaNxPj.x.yAsy have been grown on GaP and Si substrates for light emitting applications. Gal y3^ has also been shown to have a direct (or direct-like) band gap.
Figure imgf000004_0002
has been grown on GaAs, but would require considerably greater concentrations of boron to be lattice-matched to silicon. BxGaj_xP has not been attempted but would have a much better chance to be lattice-matched with- silicon than
Figure imgf000004_0003
. All of these HI-V semiconductors have typically been grown using metal- organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), and similar techniques. Disclosure of the Invention:
The present invention is a multi-junction solar cell device. The multi-junction solar cell device comprises either two or three active solar cells connected in series in a monolithic structure. The multi-junction device comprises a bottom active cell having a single-crystal silicon substrate base and an emitter layer. The multi-junction device further comprises one or two subsequent active cells each having a base layer and an emitter layer with interconnecting tunnel junctions between each active cell. At least one layer that forms each of the top and middle active cells is composed of a single-crystal HI-V semiconductor alloy that is substantially lattice-matched to the silicon substrate. The polarity of the active p-n junction cells is either p-on-n or n-on-p.
The present invention further includes a method for substantially lattice matching an active HI-V solar cell or cells with an active silicon solar cell formed from a silicon substrate in a multi-junction solar cell device. The method comprises forming the bottom active cell from a silicon substrate, and forming the top active cell or cells with at least one HI - V semiconductor layer which contains boron and/or nitrogen. The general composition of the HI-V semiconductor layer, BxAlyGa1.x.y.zInzNsP1.s.t-wAstSbw , hereafter referred to as (B AlGaIn)(NPAsSb), can be lattice matched to a silicon substrate only when boron and/or nitrogen compositions are greater than zero. The quaternary alloys:
(Ga N θ2Po.98)1-x (Ga N0 19 As081)x , hereafter referred to as GaNPAs; and (Ga N002 Po.98)ι-χ (In N047 P0.53)x , hereafter referred to as GalnNP; and
(B025 Gao75 As)^ (B002 Ga,, 98 P)x , hereafter referred to as BGaPAs, which are substantially lattice matched to silicon at room temperature for 0 < x < 1 make up a subset of the potential list of alloys of the general form (BAlGaIn)(NPAsSb) that are substantially lattice matched to silicon. The quaternary alloys listed above are the most likely alloys to be used in the present invention due to their relative simplicity in composition and their useful range of band gaps.
The lattice matching condition is temperature dependent because the thermal expansion coefficient of silicon is different from that of HI-V semiconductors. Since these HI-V semiconductor layers are typically grown at elevated temperatures, it may be more beneficial to lattice match the HI-V semiconductor layers to silicon substrates at growth temperature rather than room temperature. When cooled to room temperature, HI-V semiconductor layers that have been lattice matched at growth temperature will be slightly lattice mismatched, but should also be considered "substantially lattice matched."
In addition, GaP and ALGa^P are only slightly lattice mismatched with silicon substrates, but it may be argued that they are not "substantially lattice-matched with silicon." While their high band gaps and slight lattice mismatch with silicon do not allow them to be useful as thicker light absorbing layers in the present invention, relatively thin layers of GaP and AlGaP within the structure of the present invention do not significantly affect the degree to which the relatively thick active solar cells on silicon substrates are strained. Thus, the active cell which contains a relatively thin GaP or AlGaP layer does not develop strain-related defects and the entire active cell is considered substantially lattice-matched with silicon.
Brief Description of the Drawings:
The accompanying drawings, which are incorporated in and form a part of the specification, illustrate the preferred embodiments of the present invention, and together with the descriptions serve to explain the principles of the invention. In the Drawings:
FIG. 1 is a sectional view illustrating a two-junction solar cell device, constructed in accordance with the present invention; and FIG. 2 is a sectional view illustrating a three-junction solar cell device, constructed in accordance with the present invention.
Detailed Description of the Preferred Embodiments:
As illustrated in FIGS. 1 and 2, the present invention is a multi-junction solar cell device, indicated generally in its two-junction version as 10 and in its three-junction version as 100, having lattice-matched (B AlGaIn)(NPAsSb) alloys grown on silicon. The solar cell device 10 rivals the efficiencies of high-efficiency cells on GaAs or Ge, with significant cost savings and improvements in mechanical stability.
As illustrated in FIG. 1, the two-junction version of the solar cell device 10 of the present invention includes a single-crystal silicon substrate 22. The two-junction device 10 comprises a bottom active cell 20, a top active cell 30, and an interconnecting tunnel junction layer 50. The bottom active cell 20 comprises at least a p-type (or n-type) base layer formed within the silicon substrate 22 and an n-type (or p-type) emitter layer 23 forming a. p-n junction. The top active cell 30 comprises at least a p-type (or n-type) base layer 32 and an n-type (or p- type) emitter layer 33 also forming a p-n junction. The top active cell 30 comprises at least one nitrogen and/or boron containing a HI-V semiconductor absorbing layer with the general composition of (BAlGaIn)(NPAsSb) which has a direct (or direct-like) band gap of approximately 1.6 eV to approximately 1.8 eV thereby optimizing the efficiency of the entire multi-junction solar cell device 10. Si, GaP, AlGaP, or various compositions of (B AlGaIn)(NPAsSb) which are substantially lattice-matched to the silicon substrate 22 would be used in the bottom emitter layer 23, the top emitter layer 33 and the top base layer 32. Under solar radiation both the top active cell 30 and bottom active cell 20 convert the absorbed portion of the solar spectrum into electrical energy. The tunnel junction 50 is used to facilitate the flow of photogenerated electrical current between the bottom active cell 20 and the top active cell 30. The tunnel junction 50 may take a number of forms to provide a thin layer 50 of materials that allows current to pass between cells 20 and 30 without generating a voltage drop large enough to significantly decrease the conversion efficiency of the solar cell device 10, and that preserves the lattice-matching between cells 20 and 30. The photogenerated electrical energy is used or stored in an external circuit connected to the metal contacts 70 and 72. The top active cell 30 and bottom active cell 20 may also contain passivating layers, commonly referred to as back- surface-field or window layers, to minimize electrical losses. The use of these passivating layers is commonly understood among those skilled in the art.
In a preferred embodiment of the present invention described above, the compositions of (B AlGaIn)(NPAsSb) substantially lattice matched to the silicon substrate would be chosen from the group of quaternary alloys; GaNPAs, Gal iNP, or BGaPAs specified previously.
The following is a detailed description of a preferred embodiment to illustrate the spirit of the two-junction device 10 of the present invention as illustrated in FIG. 1. It should be noted, as understood by a person skilled in the art, that other embodiments of the device 10 are within the scope of the present invention In this example, HI - V semiconductors are grown on a single-crystal p-type silicon wafer 22 by MOVPE. Source materials would include triethylgallium, phosphine, tertiary-butyl arsine, and dimethylhydrazine. Growth temperatures would be between 600° - 700° C.
The first layer deposited on the silicon substrate 22 would be a window layer consisting of 0.1 μm GaP doped highly n-type with Se from hydrogen selenide. Some of the phosphorus from this layer would diffuse into the silicon substrate during growth forming a thin n-type emitter layer 23 within the silicon substrate. Next, an 0.05 μm thick GaP layer doped highly p-type with carbon from CC14 together with the n-type GaP window layer would form the tunnel junction 50 . A p-type Zn-doped back-surface-field for the top active cell 30 composed of 0.1 μm GaP would then be deposited on the tunnel junction 50. A 1.0 μm GaN007As023P070 top base layer 32 with a band gap of approximately 1.65 eV would serve as the primary absorbing layer of the top active cell 30. The GaN007As023P070 base 32 is not intentionally doped but has a background p-type doping level of approximately 1 x 1016 cm"3. The top emitter 33 is composed of 0.1 μm Se-doped GaP. A 0.1 μm thick highly Se-doped GaAs contact layer is deposited on the top emitter 33. This GaAs contact layer is removed except beneath the metal grid 70 after the Au/Sn/Au metal grids 70 are deposited by vacuum evaporation and standard photolithography techniques. A gold back-side contact 72 is also evaporated on the back of the device. A broadband two layer anti-reflective coating is finally deposited on the front of the device. The thickness and composition of the GaN007As023P070 top base layer 32 would be adjusted slightly to achieve a current-matched structure to optimize the efficiency of the entire device 10.
As illustrated in FIG. 2, the three-junction version of the solar cell device 100 of the present invention includes a single-crystal silicon substrate 122. The three-junction device 100 comprises a bottom active cell 120, a middle active cell 140, a top active cell 130, and two interconnecting tunnel junction layers 150 and 160. The bottom active cell 120 comprises at least a p-type (or n-type) base layer 122 formed within the silicon substrate 122 and an n-type (or p-type) emitter layer 123 forming a p-n junction. The top active cell 130 comprises at least a p-type (or n-type) base layer 132 and an n-type (or p-type) emitter layer 133 also forming a p-n junction. The top active cell 130 comprises at least one nitrogen and/or boron containing a HI-V semiconductor absorbing layer with the general composition of (BAlGaIn)(NPAsSb) which has a direct (or direct-like) band gap of approximately 1.8 eV to approximately 2.0 eV thereby optimizing the efficiency of the entire multi-junction solar cell device 100. The middle active cell 140 comprises at least a p-type (or n-type) base layer 142 and an n-type (or p-type) emitter layer 143 also forming a p-n junction. The middle active cell 140 comprises at least one nitrogen and/or boron containing HI-V semiconductor absorbing layer with the general composition of (BAlGaIn)(NPAsSb) which has a direct (or direct-like) band gap of approximately 1.4 eV to approximately 1.5 eV thereby optimizing the efficiency of the entire multi-junction solar cell device 100. Si, GaP, AlGaP, or various compositions of (BAlGaIn)(NPAsSb) which are substantially lattice-matched to the silicon substrate 122 would be used in the bottom emitter layer 123, the middle emitter layer 143, the middle base layer 142, the top emitter layer 133 and the top base layer 132. Under solar radiation the three active cells 120, 130, and 140 each convert the absorbed portion of the solar spectrum into electrical energy. The tunnel junction 150 is used to facilitate the flow of photogenerated electrical current between the active cells 120 and 140. The tunnel junction 160 is used to facilitate the flow of photogenerated electrical current between the active cells 140 and 130. The tunnel junctions 150 and 160 may take a number of forms that allows current to pass between cells 120 , 140, and 130 without generating a voltage drop large enough to significantly decrease the conversion efficiency of the solar cell device 100, and that preserves the lattice-matching between cells 120, 140, and 130. The photogenerated electrical energy is used or stored in an external circuit connected to the metal contacts 170 and 172. The active cells 120, 140, and 130 may also contain passivating layers, commonly referred to as back-surface-field or window layers, to minimize electrical losses. The use of these passivating layers is commonly understood among those skilled in the art. In a specific embodiment of the three-junction version of the solar cell device 100 of the present invention, the compositions of (BAlGaIn)(NPAsSb) substantially lattice matched to the silicon substrate would be chosen from the group of quaternary alloys; GaNPAs, GalnNP, or B GaP As specified previously.
The foregoing exemplary descriptions and the illustrative preferred embodiments of the present invention have been explained in the drawings and described in detail, with varying modifications and alternative embodiments being taught. While the invention has been so shown, described and illustrated, it should be understood by those skilled in the art that equivalent changes in form and detail may be made therein without departing from the true spirit and scope of the invention, and that the scope of the present invention is to be limited only to the claims except as precluded by the prior art. Moreover, the invention as disclosed herein, may be suitably practiced in the absence of the specific elements which are disclosed herein.

Claims

CLA S
1. A multi-junction, monolithic solar cell device for converting solar radiation into electrical energy, the multi-junction solar cell device comprising: a bottom active cell having a single-crystal silicon substrate base and a bottom emitter layer which form a first p-n junction; a top active cell having a top base layer and a top emitter layer which form a second p-n junction, the top active cell containing at least one HI - V semiconductor layer; and . a tunnel junction layer interposed between the bottom active cell and the top active cell
^ for facilitating electrical current flow between the bottom active cell and the top active cell; wherein the top active cell is substantially lattice-matched to the silicon substrate.
2. The multi-junction solar cell device of claim 1 wherein the top active cell layer has at least one layer with a composition of (BAlGaIn)(NPAsSb) that is substantially lattice-matched to the silicon substrate.
3. The multi-junction solar cell device of claim 2 wherein the (BAlGaIn)(NPAsSb) layer in the top active cell has a direct band-gap being approximately 1.6 eV to approximately 1.8 eV.
4. The multi-junction solar cell device of claim 3 wherein the bottom emitter, the top emitter, and the top base are selected from the group consisting of Si, GaP, AlGaP, and various compositions of (BAlGaIn)(NPAsSb) that are substantially lattice-matched to the silicon substrate.
5. The multi-junction solar cell device of claim 4 wherein the compositions of (BAlGaIn)(NPAsSb) substantially lattice matched to the silicon substrate, are selected from the group of quaternary alloys consisting of GaNPAs, Ga iNP, and BGaPAs.
6. A multi-junction, monolithic solar cell device for converting solar radiation into electrical energy, the multi-junction solar cell device comprising: a bottom active cell having a single-crystal silicon substrate base and a bottom emitter layer which form a first p-n junction; a middle active cell having a middle base layer and a middle emitter layer which form a second p-n junction, the middle active cell containing at least one HI-V semiconductor layer; a top active cell having a top base layer and a top emitter layer which form a third p-n junction, the top active cell containing at least one LT - V semiconductor layer; a tunnel junction layer interposed between the bottom active cell and the middle active cell for facilitating electrical current flow between the bottom active cell and the middle active cell; and a tunnel junction layer interposed between the middle active cell and the top active cell for facilitating electrical current flow between the middle active cell and the top active cell; wherein the top active cell and the middle active cell are substantially lattice-matched to the silicon substrate.
7. The multi-junction solar cell device of claim 6 wherein the top active cell has at least one layer with a composition of (B AlGaIn)(NPAsSb) that is substantially lattice-matched to the silicon substrate.
8. The multi-junction solar cell device of claim 7 wherein the middle active cell has at least one layer with a composition of (B AlGaIn)(NPAsSb) that is substantially lattice-matched to the silicon substrate.
9. The multi-junction solar cell device of claim 8 wherein the (B AlGaIn)(NPAsSb) layer in the top active cell has a direct band-gap being approximately 1.8 eV to approximately 2.0 eV.
10. The multi-junction solar cell device of claim 9 wherein the (BAlGaIn)(NPAsSb) layer in the middle active cell has a direct band-gap being approximately 1.4 eV to approximately 1.5 eV.
11. The multi-junction solar cell device of claim 10 wherein the bottom emitter, the middle emitter, the middle base, the top emitter, and the top base are selected from the group consisting of Si, GaP, AlGaP, and various compositions of (BAlGaIn)(NPAsSb) that are substantially lattice-matched to the silicon substrate.
12. The multi-junction solar cell device of claim 11 wherein the compositions of (BAlGaIn)(NPAsSb) substantially lattice matched to the silicon substrate are selected from the group of quaternary alloys consisting of GaNPAs, GalnNP, and BGaPAs.
13. A method for converting solar radiation into electrical energy, the method comprising: forming a first p-n junction with a bottom active cell having a single-crystal silicon substrate base and a bottom emitter layer; forming a second p-n junction with a top active cell having a top base layer and a top emitter, the top active cell containing at least one HI - V semiconductor layer; facilitating electrical current flow between the bottom active cell and the top active cell; substantially lattice matching the top active cell to the silicon substrate.
14. The method of claim 13 wherein the top active cell layer has at least one layer with a composition of (BAlGaIn)(NPAsSb) that is substantially lattice-matched to the silicon substrate.
15. The method of claim 14 wherein the (BAlGaIn)(NPAsSb) layer in the top active cell has a direct band-gap being approximately 1.6 eV to approximately 1.8 eV.
16. The method of claim 15 wherein the bottom emitter, the top emitter, and the top base are selected from the group consisting of Si, GaP, AlGaP, and various compositions of
(BAlGaIn)(NPAsSb) that are substantially lattice-matched to the silicon substrate.
17. The method of claim 16 wherein the compositions of (BAlGaIn)(NPAsSb) are substantially lattice matched to the silicon substrate and are selected from the group of quaternary alloys consisting of GaNPAs, GalnNP, and BGaPAs.
18. A method for converting solar radiation into electrical energy, the method comprising: forming a first p-n junction with a bottom active cell having a single-crystal silicon substrate base and a bottom emitter layer; forming a second p-n junction with a middle active cell having a middle base layer and a middle emitter layer, the middle active cell containing at least one HI- V semiconductor layer; forming a third p-n junction with a top active cell having a top base layer and a top emitter layer, the top active cell containing at least one HE - V semiconductor layer; facilitating electrical current flow between the bottom active cell and the middle active cell; facilitating electrical current flow between the middle active cell and the top active cell; and substantially lattice matching the top active cell and the middle active cell.
19. The method of claim 18 wherein the top active cell has at least one layer with a composition of (BAlGaIn)(NPAsSb) that is substantially lattice-matched to the silicon substrate.
20. The method of claim 19 wherein the middle active cell has at least one layer with a composition of (B AlGaIn)(NPAsSb) that is substantially lattice-matched to the silicon substrate.
21. The method of claim 20 wherein the (BAlGaIn)(NPAsSb) layer in the top active cell has a direct band-gap being approximately 1.8 eV to approximately 2.0 eV.
22. The method of claim 21 wherein the (BAlGaIn)(NPAsSb) layer in the middle active cell has a direct band-gap being approximately 1.4 eV to approximately 1.5 eV.
23. The method of claim 22 wherein the bottom emitter, the middle emitter, the middle base, the top emitter, and the top base are selected from the group consisting of Si, GaP, AlGaP, and various compositions of (BAlGaIn)(NPAsSb) that are substantially lattice-matched to the silicon substrate.
24. The method of claim 23 wherein the compositions of (BAlGaIn)(NPAsSb) substantially lattice matched to the silicon substrate are selected from the group of quaternary alloys consisting of GaNPAs, GalnNP, and BGaPAs.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005055285A2 (en) * 2003-12-01 2005-06-16 The Regents Of The University Of California Multiband semiconductor compositions for photovoltaic devices
US20060185582A1 (en) * 2005-02-18 2006-08-24 Atwater Harry A Jr High efficiency solar cells utilizing wafer bonding and layer transfer to integrate non-lattice matched materials
EP2012367A1 (en) * 2007-07-02 2009-01-07 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Multi solar cell
US8129615B2 (en) * 2004-11-29 2012-03-06 The Regents Of The University Of California Multiband semiconductor compositions for photovoltaic devices

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4278474A (en) * 1980-03-25 1981-07-14 The United States Of America As Represented By The United States Department Of Energy Device for conversion of electromagnetic radiation into electrical current
US4681982A (en) * 1985-05-08 1987-07-21 Mitsubishi Denki Kabushiki Kaisha Light-electricity conversion semiconductor device
US4963508A (en) * 1985-09-03 1990-10-16 Daido Tokushuko Kabushiki Kaisha Method of making an epitaxial gallium arsenide semiconductor wafer using a strained layer superlattice
US5571339A (en) * 1995-04-17 1996-11-05 The Ohio State Univ. Research Found Hydrogen passivated heteroepitaxial III-V photovoltaic devices grown on lattice-mismatched substrates, and process
JPH09237909A (en) * 1996-02-28 1997-09-09 Nippon Telegr & Teleph Corp <Ntt> Photovoltaic power generator and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4278474A (en) * 1980-03-25 1981-07-14 The United States Of America As Represented By The United States Department Of Energy Device for conversion of electromagnetic radiation into electrical current
US4681982A (en) * 1985-05-08 1987-07-21 Mitsubishi Denki Kabushiki Kaisha Light-electricity conversion semiconductor device
US4963508A (en) * 1985-09-03 1990-10-16 Daido Tokushuko Kabushiki Kaisha Method of making an epitaxial gallium arsenide semiconductor wafer using a strained layer superlattice
US5571339A (en) * 1995-04-17 1996-11-05 The Ohio State Univ. Research Found Hydrogen passivated heteroepitaxial III-V photovoltaic devices grown on lattice-mismatched substrates, and process
JPH09237909A (en) * 1996-02-28 1997-09-09 Nippon Telegr & Teleph Corp <Ntt> Photovoltaic power generator and manufacturing method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
GEISZ ET AL.: "BGaInAs solar cells lattice-matched to GaAs", CONFERENCE RECORD OF THE 28TH PHOTOVOLTIC SPECIALISTS CONFERENCE. IEEE, 15 September 2000 (2000-09-15) - 22 September 2000 (2000-09-22), NEW YORK, pages 990 - 993, XP002908360 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005055285A2 (en) * 2003-12-01 2005-06-16 The Regents Of The University Of California Multiband semiconductor compositions for photovoltaic devices
WO2005055285A3 (en) * 2003-12-01 2013-01-10 The Regents Of The University Of California Multiband semiconductor compositions for photovoltaic devices
US8129615B2 (en) * 2004-11-29 2012-03-06 The Regents Of The University Of California Multiband semiconductor compositions for photovoltaic devices
US20060185582A1 (en) * 2005-02-18 2006-08-24 Atwater Harry A Jr High efficiency solar cells utilizing wafer bonding and layer transfer to integrate non-lattice matched materials
US10374120B2 (en) * 2005-02-18 2019-08-06 Koninklijke Philips N.V. High efficiency solar cells utilizing wafer bonding and layer transfer to integrate non-lattice matched materials
EP2012367A1 (en) * 2007-07-02 2009-01-07 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Multi solar cell

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