WO2003013083A3 - Channel equalisation in data receivers - Google Patents

Channel equalisation in data receivers Download PDF

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Publication number
WO2003013083A3
WO2003013083A3 PCT/IE2002/000115 IE0200115W WO03013083A3 WO 2003013083 A3 WO2003013083 A3 WO 2003013083A3 IE 0200115 W IE0200115 W IE 0200115W WO 03013083 A3 WO03013083 A3 WO 03013083A3
Authority
WO
WIPO (PCT)
Prior art keywords
data receivers
taps
channel equalisation
filter
digital filter
Prior art date
Application number
PCT/IE2002/000115
Other languages
French (fr)
Other versions
WO2003013083A2 (en
Inventor
Carl Damien Murray
Phipip Curran
Novarro Alberto Molina
Original Assignee
Massana Res Ltd
Carl Damien Murray
Phipip Curran
Novarro Alberto Molina
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Massana Res Ltd, Carl Damien Murray, Phipip Curran, Novarro Alberto Molina filed Critical Massana Res Ltd
Priority to AU2002321786A priority Critical patent/AU2002321786A1/en
Publication of WO2003013083A2 publication Critical patent/WO2003013083A2/en
Publication of WO2003013083A3 publication Critical patent/WO2003013083A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03878—Line equalisers; line build-out devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03484—Tapped delay lines time-recursive
    • H04L2025/0349—Tapped delay lines time-recursive as a feedback filter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03535—Variable structures
    • H04L2025/03547—Switching between time domain structures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03592—Adaptation methods
    • H04L2025/03598—Algorithms
    • H04L2025/03611—Iterative algorithms
    • H04L2025/03656—Initialisation
    • H04L2025/03662—Initialisation to a fixed value

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Dc Digital Transmission (AREA)

Abstract

Channel equalization in a 1000BASE-T receiver is performed by a fixed mode analog filter 2 suitable for the longest possible cable length, by a FFE (3), and by a digital filter 4. The digital filter (4) has two sets of taps. One set is optimal for shorter cable lengths and so cancels adaptation for long cable lengths and assists operation of the analog filter. A decision block (5) selects an appropriate set of taps.
PCT/IE2002/000115 2001-08-02 2002-07-31 Channel equalisation in data receivers WO2003013083A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002321786A AU2002321786A1 (en) 2001-08-02 2002-07-31 Channel equalisation in data receivers

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US30916501P 2001-08-02 2001-08-02
US60/309,165 2001-08-02
IE20010738 2001-08-02
IE2001/10738 2001-08-02

Publications (2)

Publication Number Publication Date
WO2003013083A2 WO2003013083A2 (en) 2003-02-13
WO2003013083A3 true WO2003013083A3 (en) 2003-11-06

Family

ID=27665880

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IE2002/000115 WO2003013083A2 (en) 2001-08-02 2002-07-31 Channel equalisation in data receivers

Country Status (3)

Country Link
AU (1) AU2002321786A1 (en)
IE (1) IES20020643A2 (en)
WO (1) WO2003013083A2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0467412A2 (en) * 1990-07-20 1992-01-22 Fujitsu Limited Line equalizer for digital signals
US5818378A (en) * 1997-06-10 1998-10-06 Advanced Micro Devices, Inc. Cable length estimation circuit using data signal edge rate detection and analog to digital conversion

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0467412A2 (en) * 1990-07-20 1992-01-22 Fujitsu Limited Line equalizer for digital signals
US5818378A (en) * 1997-06-10 1998-10-06 Advanced Micro Devices, Inc. Cable length estimation circuit using data signal edge rate detection and analog to digital conversion

Also Published As

Publication number Publication date
WO2003013083A2 (en) 2003-02-13
IE20020642A1 (en) 2003-03-19
IES20020643A2 (en) 2003-03-19
AU2002321786A1 (en) 2003-02-17

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