WO2002067435A1 - Turbo decoder system comprising parallel decoders - Google Patents
Turbo decoder system comprising parallel decoders Download PDFInfo
- Publication number
- WO2002067435A1 WO2002067435A1 PCT/IB2002/000112 IB0200112W WO02067435A1 WO 2002067435 A1 WO2002067435 A1 WO 2002067435A1 IB 0200112 W IB0200112 W IB 0200112W WO 02067435 A1 WO02067435 A1 WO 02067435A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- turbo
- turbo decoder
- decoders
- input
- decoder system
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6561—Parallelized implementations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2975—Judging correct decoding, e.g. iteration stopping criteria
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02742444A EP1364462A1 (en) | 2001-02-23 | 2002-01-16 | Turbo decoder system comprising parallel decoders |
JP2002566846A JP2004519886A (en) | 2001-02-23 | 2002-01-16 | Turbo decoder system with parallel decoder |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01200666.4 | 2001-02-23 | ||
EP01200666 | 2001-02-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2002067435A1 true WO2002067435A1 (en) | 2002-08-29 |
Family
ID=8179927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2002/000112 WO2002067435A1 (en) | 2001-02-23 | 2002-01-16 | Turbo decoder system comprising parallel decoders |
Country Status (6)
Country | Link |
---|---|
US (1) | US7113554B2 (en) |
EP (1) | EP1364462A1 (en) |
JP (1) | JP2004519886A (en) |
KR (1) | KR20030005294A (en) |
CN (1) | CN1333531C (en) |
WO (1) | WO2002067435A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007515892A (en) * | 2003-12-22 | 2007-06-14 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | SISO decoder with sub-block processing and sub-block based stop criteria |
WO2009123838A2 (en) * | 2008-04-01 | 2009-10-08 | Qualcomm Incorporated | Efficient parallel sub-packet decoding using multiple decoders |
US8464139B2 (en) | 2006-08-02 | 2013-06-11 | Fujitsu Limited | Receiving device and decoding method thereof |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050022101A1 (en) * | 2003-07-21 | 2005-01-27 | Peter Malm | Fast iteration termination of Turbo decoding |
JP4408783B2 (en) * | 2004-09-29 | 2010-02-03 | Necエレクトロニクス株式会社 | Decoding device and decoding method |
US7720017B2 (en) * | 2005-03-11 | 2010-05-18 | Qualcomm Incorporated | Parallel turbo decoders with multiplexed output |
US7783936B1 (en) | 2006-09-28 | 2010-08-24 | L-3 Communications, Corp. | Memory arbitration technique for turbo decoding |
US7831894B2 (en) * | 2006-10-10 | 2010-11-09 | Broadcom Corporation | Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves |
US7827473B2 (en) * | 2006-10-10 | 2010-11-02 | Broadcom Corporation | Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors |
EP1942578A1 (en) * | 2006-11-29 | 2008-07-09 | Broadcom Corporation | Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves |
US8549376B1 (en) * | 2007-12-13 | 2013-10-01 | Rockwell Collins, Inc. | Vector turbo codes |
US8473798B1 (en) * | 2009-03-20 | 2013-06-25 | Comtect EF Data Corp. | Encoding and decoding systems and related methods |
RU2011118108A (en) | 2011-05-06 | 2012-11-20 | ЭлЭсАй Корпорейшн (US) | DEVICE (OPTIONS) AND METHOD FOR PARALLEL DECODING FOR MULTIPLE COMMUNICATION STANDARDS |
EP3713119A1 (en) * | 2016-11-30 | 2020-09-23 | Alcatel Lucent | Flexible fec decoder for high speed wdm transmission |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0973292A2 (en) | 1998-07-17 | 2000-01-19 | Nortel Networks Corporation | Statistically multiplexed turbo code decoder |
US6128639A (en) * | 1996-06-28 | 2000-10-03 | Cray Research, Inc. | Array address and loop alignment calculations |
WO2001059935A2 (en) * | 2000-02-10 | 2001-08-16 | Hughes Electronics Corporation | A system and method employing a modular decoder for decoding turbo and turbo-like codes in a communications network |
WO2001082486A1 (en) * | 2000-04-20 | 2001-11-01 | Motorola Inc. | Iteration terminating using quality index criteria of turbo codes |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19526416A1 (en) * | 1995-07-19 | 1997-01-23 | Siemens Ag | Method and arrangement for determining an adaptive termination criterion in the iterative decoding of multidimensionally coded information |
KR19990012821A (en) * | 1997-07-31 | 1999-02-25 | 홍성용 | Electromagnetic wave absorber composition and its manufacturing method, electromagnetic wave absorbing coating composition, its manufacturing method and its coating method |
US6871303B2 (en) * | 1998-12-04 | 2005-03-22 | Qualcomm Incorporated | Random-access multi-directional CDMA2000 turbo code interleaver |
DE19902100C2 (en) * | 1999-01-20 | 2003-05-22 | Infineon Technologies Ag | Method and device for decoding convolutional codes |
US6304995B1 (en) * | 1999-01-26 | 2001-10-16 | Trw Inc. | Pipelined architecture to decode parallel and serial concatenated codes |
FR2790621B1 (en) * | 1999-03-05 | 2001-12-21 | Canon Kk | INTERLEAVING DEVICE AND METHOD FOR TURBOCODING AND TURBODECODING |
FR2804260B1 (en) * | 2000-01-21 | 2002-10-18 | Mitsubishi Electric Inf Tech | METHOD OF DIGITAL TRANSMISSION OF TYPE WITH ERROR CORRECTING CODING |
US6516437B1 (en) * | 2000-03-07 | 2003-02-04 | General Electric Company | Turbo decoder control for use with a programmable interleaver, variable block length, and multiple code rates |
US6307901B1 (en) * | 2000-04-24 | 2001-10-23 | Motorola, Inc. | Turbo decoder with decision feedback equalization |
US7242726B2 (en) * | 2000-09-12 | 2007-07-10 | Broadcom Corporation | Parallel concatenated code with soft-in soft-out interactive turbo decoder |
KR100430567B1 (en) * | 2000-10-11 | 2004-05-10 | 한국전자통신연구원 | Apparatus and method for processing interleaving/de-interleaving with address generator and channel encoder system using it |
US6813742B2 (en) * | 2001-01-02 | 2004-11-02 | Icomm Technologies, Inc. | High speed turbo codes decoder for 3G using pipelined SISO log-map decoders architecture |
-
2002
- 2002-01-16 WO PCT/IB2002/000112 patent/WO2002067435A1/en active Application Filing
- 2002-01-16 KR KR1020027014186A patent/KR20030005294A/en not_active Application Discontinuation
- 2002-01-16 EP EP02742444A patent/EP1364462A1/en not_active Ceased
- 2002-01-16 CN CNB02800373XA patent/CN1333531C/en not_active Expired - Fee Related
- 2002-01-16 JP JP2002566846A patent/JP2004519886A/en active Pending
- 2002-02-19 US US10/078,955 patent/US7113554B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6128639A (en) * | 1996-06-28 | 2000-10-03 | Cray Research, Inc. | Array address and loop alignment calculations |
EP0973292A2 (en) | 1998-07-17 | 2000-01-19 | Nortel Networks Corporation | Statistically multiplexed turbo code decoder |
WO2001059935A2 (en) * | 2000-02-10 | 2001-08-16 | Hughes Electronics Corporation | A system and method employing a modular decoder for decoding turbo and turbo-like codes in a communications network |
WO2001082486A1 (en) * | 2000-04-20 | 2001-11-01 | Motorola Inc. | Iteration terminating using quality index criteria of turbo codes |
Non-Patent Citations (1)
Title |
---|
See also references of EP1364462A1 * |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007515892A (en) * | 2003-12-22 | 2007-06-14 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | SISO decoder with sub-block processing and sub-block based stop criteria |
JP4778441B2 (en) * | 2003-12-22 | 2011-09-21 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | SISO decoder with sub-block processing and sub-block based stop criteria |
US8464139B2 (en) | 2006-08-02 | 2013-06-11 | Fujitsu Limited | Receiving device and decoding method thereof |
WO2009123838A2 (en) * | 2008-04-01 | 2009-10-08 | Qualcomm Incorporated | Efficient parallel sub-packet decoding using multiple decoders |
WO2009123838A3 (en) * | 2008-04-01 | 2009-12-10 | Qualcomm Incorporated | Efficient parallel sub-packet decoding using multiple decoders, controller and task instructions |
US8665996B2 (en) | 2008-04-01 | 2014-03-04 | Qualcomm Incorporated | Efficient parallel sub-packet decoding using multiple decoders |
Also Published As
Publication number | Publication date |
---|---|
KR20030005294A (en) | 2003-01-17 |
JP2004519886A (en) | 2004-07-02 |
CN1457554A (en) | 2003-11-19 |
US7113554B2 (en) | 2006-09-26 |
CN1333531C (en) | 2007-08-22 |
US20020136332A1 (en) | 2002-09-26 |
EP1364462A1 (en) | 2003-11-26 |
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