WO2002058163A2 - Verfahren zum herstellen von halbleiterbauelementen - Google Patents
Verfahren zum herstellen von halbleiterbauelementen Download PDFInfo
- Publication number
- WO2002058163A2 WO2002058163A2 PCT/EP2001/014614 EP0114614W WO02058163A2 WO 2002058163 A2 WO2002058163 A2 WO 2002058163A2 EP 0114614 W EP0114614 W EP 0114614W WO 02058163 A2 WO02058163 A2 WO 02058163A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- layer
- shows
- lattice
- particular according
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0201—Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
Definitions
- the invention relates to a method for producing
- the semiconducting layers consist of light emitting diodes
- 00017 ren in particular OCVD method on substrates epitaxially
- 00018 is deposited. This takes place in a process chamber
- 00022 has the same lattice constant as the ones to be deposited
- 00028 substrate is applied. There are a number of
- 00031 follows a separation of the elements produced. 00032
- 00051 chemomechanically, also by etching away the substrate. 00052
- the object of the invention is to isolate
- 00069 switched etching step lattice-like in a known manner
- 00074 form a dielectric mask in a grid shape.
- silicon nitride or comes as the dielectric
- 00078 structured substrate a layer sequence for example
- 00091 layers can be used in a coating process
- 00093 adheres to the layer surface. It can be about
- 00094 act an adhesive film.
- 00097 are preferably shock-cooled. This can put you off
- nucleation layer for example
- the invention further relates to an intermediate product
- 00151 consisting of a substrate with one or more
- the layer is
- Fig. 7 is a section along the line VII-VII and 00177
- Fig. 8 is a schematic representation of a cross section
- the substrate shown in FIG. 1 is a single
- the structure consists of a dielectric
- mask 6 which is made of silicon nitride or silicon oxide
- the fields 3 a square
- 00209 preferably consists of a number of
- 00212 tur consists of a first layer 10, which for example
- 00213 is n-doped and one applied to it
- 00217 layer can consist of GalnN or GaN and electro-
- 00221 consist of AlAs or A1N.
- the nucleation layer has
- 00224 preferably has a thickness of one or more ⁇ m.
- 00225 edge length of the fields 3 is approximately 300 ⁇ m. In this
- 00272 can be contacted.
- 00273
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2002238422A AU2002238422A1 (en) | 2001-01-18 | 2001-12-12 | Method for producing semiconductor components |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10102315.4 | 2001-01-18 | ||
DE10102315A DE10102315B4 (de) | 2001-01-18 | 2001-01-18 | Verfahren zum Herstellen von Halbleiterbauelementen und Zwischenprodukt bei diesen Verfahren |
Publications (3)
Publication Number | Publication Date |
---|---|
WO2002058163A2 true WO2002058163A2 (de) | 2002-07-25 |
WO2002058163A3 WO2002058163A3 (de) | 2002-12-12 |
WO2002058163A8 WO2002058163A8 (de) | 2003-03-06 |
Family
ID=7671092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2001/014614 WO2002058163A2 (de) | 2001-01-18 | 2001-12-12 | Verfahren zum herstellen von halbleiterbauelementen |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU2002238422A1 (de) |
DE (1) | DE10102315B4 (de) |
WO (1) | WO2002058163A2 (de) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8168000B2 (en) | 2005-06-15 | 2012-05-01 | International Rectifier Corporation | III-nitride semiconductor device fabrication |
WO2019215183A1 (de) * | 2018-05-09 | 2019-11-14 | Osram Opto Semiconductors Gmbh | Verfahren zum durchtrennen eines epitaktisch gewachsenen halbleiterkörpers und halbleiterchip |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101039970B1 (ko) * | 2010-02-11 | 2011-06-09 | 엘지이노텍 주식회사 | 반도체층 형성방법 및 발광 소자 제조방법 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19715572A1 (de) * | 1997-04-15 | 1998-10-22 | Telefunken Microelectron | Verfahren zum Herstellen von epitaktischen Schichten eines Verbindungshalbleiters auf einkristallinem Silizium und daraus hergestellte Leuchtdiode |
WO1999001593A2 (en) * | 1997-07-03 | 1999-01-14 | Cbl Technologies | Elimination of defects in epitaxial films |
DE19838810A1 (de) * | 1998-08-26 | 2000-03-02 | Siemens Ag | Verfahren zum Herstellen einer Mehrzahl von Ga(In,Al)N-Leuchtdiodenchips |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52135667A (en) * | 1976-05-10 | 1977-11-12 | Toshiba Corp | Dicing method of semiconductor wafer |
KR930008861B1 (ko) * | 1991-05-16 | 1993-09-16 | 재단법인 한국전자통신연구소 | 단결정 실리콘 기판상에 화합물 반도체층이 형성된 기판의 제조방법 |
JP2748354B2 (ja) * | 1993-10-21 | 1998-05-06 | 日亜化学工業株式会社 | 窒化ガリウム系化合物半導体チップの製造方法 |
JPH0864791A (ja) * | 1994-08-23 | 1996-03-08 | Matsushita Electric Ind Co Ltd | エピタキシャル成長方法 |
US5882988A (en) * | 1995-08-16 | 1999-03-16 | Philips Electronics North America Corporation | Semiconductor chip-making without scribing |
JPH10125629A (ja) * | 1996-10-17 | 1998-05-15 | Nec Eng Ltd | 半導体ウェーハ割断方法 |
US6143629A (en) * | 1998-09-04 | 2000-11-07 | Canon Kabushiki Kaisha | Process for producing semiconductor substrate |
JP3235586B2 (ja) * | 1999-02-25 | 2001-12-04 | 日本電気株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2001015721A (ja) * | 1999-04-30 | 2001-01-19 | Canon Inc | 複合部材の分離方法及び薄膜の製造方法 |
-
2001
- 2001-01-18 DE DE10102315A patent/DE10102315B4/de not_active Expired - Fee Related
- 2001-12-12 WO PCT/EP2001/014614 patent/WO2002058163A2/de not_active Application Discontinuation
- 2001-12-12 AU AU2002238422A patent/AU2002238422A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19715572A1 (de) * | 1997-04-15 | 1998-10-22 | Telefunken Microelectron | Verfahren zum Herstellen von epitaktischen Schichten eines Verbindungshalbleiters auf einkristallinem Silizium und daraus hergestellte Leuchtdiode |
WO1999001593A2 (en) * | 1997-07-03 | 1999-01-14 | Cbl Technologies | Elimination of defects in epitaxial films |
DE19838810A1 (de) * | 1998-08-26 | 2000-03-02 | Siemens Ag | Verfahren zum Herstellen einer Mehrzahl von Ga(In,Al)N-Leuchtdiodenchips |
Non-Patent Citations (2)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1995, no. 08, 29. September 1995 (1995-09-29) & JP 07 122520 A (NICHIA CHEM IND LTD), 12. Mai 1995 (1995-05-12) * |
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 07, 31. Juli 1996 (1996-07-31) & JP 08 064791 A (MATSUSHITA ELECTRIC IND CO LTD), 8. März 1996 (1996-03-08) * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8168000B2 (en) | 2005-06-15 | 2012-05-01 | International Rectifier Corporation | III-nitride semiconductor device fabrication |
WO2019215183A1 (de) * | 2018-05-09 | 2019-11-14 | Osram Opto Semiconductors Gmbh | Verfahren zum durchtrennen eines epitaktisch gewachsenen halbleiterkörpers und halbleiterchip |
Also Published As
Publication number | Publication date |
---|---|
DE10102315A1 (de) | 2002-07-25 |
DE10102315B4 (de) | 2012-10-25 |
AU2002238422A1 (en) | 2002-07-30 |
WO2002058163A3 (de) | 2002-12-12 |
WO2002058163A8 (de) | 2003-03-06 |
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