WO2002054593A3 - Digital frequency multiplier - Google Patents
Digital frequency multiplier Download PDFInfo
- Publication number
- WO2002054593A3 WO2002054593A3 PCT/US2001/049270 US0149270W WO02054593A3 WO 2002054593 A3 WO2002054593 A3 WO 2002054593A3 US 0149270 W US0149270 W US 0149270W WO 02054593 A3 WO02054593 A3 WO 02054593A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- input signal
- multiplier
- multiplexer
- digital frequency
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/00006—Changing the frequency
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60122787T DE60122787T2 (en) | 2001-01-05 | 2001-12-19 | DIGITAL FREQUENCY RECYCLER |
JP2002554969A JP2004517542A (en) | 2001-01-05 | 2001-12-19 | Digital frequency multiplier |
AU2002241663A AU2002241663A1 (en) | 2001-01-05 | 2001-12-19 | Digital frequency multiplier |
EP01988346A EP1391038B1 (en) | 2001-01-05 | 2001-12-19 | Digital frequency multiplier |
KR1020037008918A KR100862317B1 (en) | 2001-01-05 | 2001-12-19 | Digital frequency multiplier and method of generating an output signal |
MXPA03006095A MXPA03006095A (en) | 2001-01-05 | 2001-12-19 | Digital frequency multiplier. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/755,439 US6480045B2 (en) | 2001-01-05 | 2001-01-05 | Digital frequency multiplier |
US09/755,439 | 2001-01-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002054593A2 WO2002054593A2 (en) | 2002-07-11 |
WO2002054593A3 true WO2002054593A3 (en) | 2003-12-04 |
Family
ID=25039161
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/049270 WO2002054593A2 (en) | 2001-01-05 | 2001-12-19 | Digital frequency multiplier |
Country Status (10)
Country | Link |
---|---|
US (1) | US6480045B2 (en) |
EP (1) | EP1391038B1 (en) |
JP (1) | JP2004517542A (en) |
KR (1) | KR100862317B1 (en) |
CN (1) | CN1258873C (en) |
AU (1) | AU2002241663A1 (en) |
DE (1) | DE60122787T2 (en) |
MX (1) | MXPA03006095A (en) |
MY (1) | MY126186A (en) |
WO (1) | WO2002054593A2 (en) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030185312A1 (en) * | 2002-03-28 | 2003-10-02 | Adc Telecommunications Israel Ltd. | Clock recovery from a composite clock signal |
US6720806B1 (en) * | 2002-04-25 | 2004-04-13 | Applied Micro Circuits Corporation | Method and circuit for producing a reference frequency signal using a reference frequency doubler having frequency selection controls |
DE10301239B4 (en) * | 2003-01-15 | 2005-04-28 | Infineon Technologies Ag | Method and device for generating delayed signals |
US7254208B2 (en) * | 2003-05-20 | 2007-08-07 | Motorola, Inc. | Delay line based multiple frequency generator circuits for CDMA processing |
US7114069B2 (en) | 2003-04-22 | 2006-09-26 | Motorola, Inc. | Reconfigurable processing circuit including a delay locked loop multiple frequency generator for generating a plurality of clock signals which are configured in frequency by a control processor |
US7031372B2 (en) * | 2003-04-22 | 2006-04-18 | Motorola, Inc. | Multiple user reconfigurable CDMA processor |
US7007188B1 (en) * | 2003-04-29 | 2006-02-28 | Advanced Micro Devices, Inc. | Precision bypass clock for high speed testing of a data processor |
JP2004350234A (en) * | 2003-05-26 | 2004-12-09 | Seiko Epson Corp | Semiconductor integrated circuit |
CN1295870C (en) * | 2004-02-13 | 2007-01-17 | 中兴通讯股份有限公司 | A clock frequency multiplier circuit |
FI20045181A0 (en) * | 2004-05-19 | 2004-05-19 | Oulun Ylipisto | Method and apparatus for generating timing signals for an ultra-wideband pulse generator |
CN1881798B (en) * | 2005-06-16 | 2011-08-31 | 旺玖科技股份有限公司 | Rational number frequency multiplication circuit and method for producing rational number frequency multiplication |
KR100906998B1 (en) * | 2006-12-07 | 2009-07-08 | 주식회사 하이닉스반도체 | Apparatus and Method for Controlling an Operational Frequency in DLL Circuit |
JP5407177B2 (en) * | 2008-05-09 | 2014-02-05 | 富士通株式会社 | Signal multiplier, signal generator, optical transmitter and optical communication device |
US7741885B1 (en) | 2009-03-04 | 2010-06-22 | Yazaki North America | Frequency multiplier |
EP2360834B1 (en) * | 2010-02-19 | 2016-01-06 | Hittite Microwave Corporation | Frequency multiplier |
US8803568B2 (en) * | 2011-11-28 | 2014-08-12 | Qualcomm Incorporated | Dividing a frequency by 1.5 to produce a quadrature signal |
CN103326697B (en) * | 2012-03-20 | 2018-04-13 | 国民技术股份有限公司 | A kind of clock multiplier circuit |
CN103354442B (en) * | 2013-07-11 | 2015-12-23 | 东南大学 | A kind of Multifunctional frequency multiplier |
JP6465270B2 (en) * | 2014-07-23 | 2019-02-06 | セイコーエプソン株式会社 | Frequency multiplication circuit, electronic device and moving body |
US9490784B2 (en) * | 2014-12-09 | 2016-11-08 | Qualcomm Incorporated | Apparatus and method for generating quadrupled reference clock from single ended crystal oscillator |
US10141921B2 (en) | 2016-01-19 | 2018-11-27 | Mediatek Inc. | Signal generator using multi-sampling and edge combining and associated signal generating method |
US9806701B1 (en) | 2016-12-09 | 2017-10-31 | Globalfoundries Inc. | Digital frequency multiplier to generate a local oscillator signal in FDSOI technology |
KR102695012B1 (en) * | 2018-11-09 | 2024-08-13 | 삼성전자주식회사 | Clock converting method for semiconductor device test and clock converter and test system thereof |
CN111904407A (en) * | 2020-09-14 | 2020-11-10 | 北京航空航天大学 | Heart rate signal processing device and heart rate detection device |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4339722A (en) * | 1979-05-23 | 1982-07-13 | Micro Consultants Limited | Digital frequency multiplier |
DE3632232A1 (en) * | 1986-09-23 | 1988-04-07 | Siemens Ag | Arrangement for multiplying a frequency by a fraction |
EP0697767A1 (en) * | 1994-08-05 | 1996-02-21 | Melco Inc. | Accelerator |
US5767720A (en) * | 1995-07-26 | 1998-06-16 | Kabushiki Kaisha Toshiba | Clock signal supplying circuit |
US5789953A (en) * | 1996-05-29 | 1998-08-04 | Integrated Device Technology, Inc. | Clock signal generator providing non-integer frequency multiplication |
EP1045518A1 (en) * | 1999-04-16 | 2000-10-18 | Infineon Technologies North America Corp. | Phase Mixer |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3673391A (en) | 1970-12-16 | 1972-06-27 | Northern Electric Co | Digital frequency multiplying system |
US3883817A (en) | 1973-08-20 | 1975-05-13 | Nasa | Digital phase-locked loop |
US3828169A (en) | 1973-10-26 | 1974-08-06 | Westinghouse Electric Corp | Apparatus for digital frequency multiplication |
US4658406A (en) * | 1985-08-12 | 1987-04-14 | Andreas Pappas | Digital frequency divider or synthesizer and applications thereof |
JP2861465B2 (en) * | 1991-05-16 | 1999-02-24 | 日本電気株式会社 | Frequency multiplier |
US5422835A (en) * | 1993-07-28 | 1995-06-06 | International Business Machines Corporation | Digital clock signal multiplier circuit |
FR2714550B1 (en) | 1993-12-24 | 1996-02-02 | Bull Sa | Tree of OR-Exclusive logic gates and frequency multiplier incorporating it. |
KR960009965B1 (en) * | 1994-04-14 | 1996-07-25 | 금성일렉트론 주식회사 | Circuit for multiplying a frequency |
US5786715A (en) * | 1996-06-21 | 1998-07-28 | Sun Microsystems, Inc. | Programmable digital frequency multiplier |
US5821785A (en) | 1996-08-02 | 1998-10-13 | Rockwell Int'l Corp. | Clock signal frequency multiplier |
US5933035A (en) * | 1996-12-31 | 1999-08-03 | Cirrus Logic, Inc. | Digital clock frequency multiplication circuit and method |
JPH10256883A (en) * | 1997-03-06 | 1998-09-25 | Nec Ic Microcomput Syst Ltd | Digital multiplier circuit |
US6008676A (en) | 1998-02-27 | 1999-12-28 | Tritech Microelectronics, Ltd. | Digital clock frequency multiplier |
US6259283B1 (en) * | 1999-10-25 | 2001-07-10 | Xilinx, Inc. | Clock doubler circuit and method |
-
2001
- 2001-01-05 US US09/755,439 patent/US6480045B2/en not_active Expired - Lifetime
- 2001-12-19 MX MXPA03006095A patent/MXPA03006095A/en active IP Right Grant
- 2001-12-19 JP JP2002554969A patent/JP2004517542A/en active Pending
- 2001-12-19 WO PCT/US2001/049270 patent/WO2002054593A2/en active IP Right Grant
- 2001-12-19 EP EP01988346A patent/EP1391038B1/en not_active Expired - Lifetime
- 2001-12-19 CN CNB018217273A patent/CN1258873C/en not_active Expired - Fee Related
- 2001-12-19 DE DE60122787T patent/DE60122787T2/en not_active Expired - Lifetime
- 2001-12-19 KR KR1020037008918A patent/KR100862317B1/en active IP Right Grant
- 2001-12-19 AU AU2002241663A patent/AU2002241663A1/en not_active Abandoned
-
2002
- 2002-01-03 MY MYPI20020016A patent/MY126186A/en unknown
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4339722A (en) * | 1979-05-23 | 1982-07-13 | Micro Consultants Limited | Digital frequency multiplier |
DE3632232A1 (en) * | 1986-09-23 | 1988-04-07 | Siemens Ag | Arrangement for multiplying a frequency by a fraction |
EP0697767A1 (en) * | 1994-08-05 | 1996-02-21 | Melco Inc. | Accelerator |
US5767720A (en) * | 1995-07-26 | 1998-06-16 | Kabushiki Kaisha Toshiba | Clock signal supplying circuit |
US5789953A (en) * | 1996-05-29 | 1998-08-04 | Integrated Device Technology, Inc. | Clock signal generator providing non-integer frequency multiplication |
EP1045518A1 (en) * | 1999-04-16 | 2000-10-18 | Infineon Technologies North America Corp. | Phase Mixer |
Also Published As
Publication number | Publication date |
---|---|
CN1543709A (en) | 2004-11-03 |
US20020089358A1 (en) | 2002-07-11 |
EP1391038B1 (en) | 2006-08-30 |
DE60122787D1 (en) | 2006-10-12 |
AU2002241663A1 (en) | 2002-07-16 |
MXPA03006095A (en) | 2003-09-10 |
WO2002054593A2 (en) | 2002-07-11 |
CN1258873C (en) | 2006-06-07 |
EP1391038A2 (en) | 2004-02-25 |
MY126186A (en) | 2006-09-29 |
KR20030081374A (en) | 2003-10-17 |
JP2004517542A (en) | 2004-06-10 |
KR100862317B1 (en) | 2008-10-13 |
US6480045B2 (en) | 2002-11-12 |
DE60122787T2 (en) | 2007-01-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2002054593A3 (en) | Digital frequency multiplier | |
AU2100301A (en) | Frequency division/multiplication with jitter minimization | |
CA2352398A1 (en) | Low phase noise frequency converter | |
TW200711316A (en) | Clock generation circuit and clock generation method | |
SG147438A1 (en) | Low-power direct digital synthesizer with analog interpolation | |
TW200501618A (en) | Clock generator | |
TW200701647A (en) | Delay locked loop circuit | |
TW200703337A (en) | Duty cycle correction device | |
WO2006119171A3 (en) | Digital frequency synthesizer | |
US20090268916A1 (en) | Fm transmitter | |
WO2008073744A3 (en) | Circuit and method for generating an non-integer fraction output frequency of an input signal | |
WO2007109743A3 (en) | Frequency divider | |
CN102549924A (en) | Frequency generation circuitry and method | |
US5084681A (en) | Digital synthesizer with phase memory | |
WO2008036389A3 (en) | Frequency synthesizer using two phase locked loops | |
EP1067690A3 (en) | A variable phase shifting clock generator | |
WO2009013860A1 (en) | Digital pll device | |
WO2003017496A3 (en) | Multiplexed analog to digital converter | |
EP1333578A3 (en) | Interleaved clock signal generator having serial delay and ring counter architecture | |
WO2007067631A3 (en) | Skew correction system eliminating phase ambiguity by using reference multiplication | |
WO2004059844A3 (en) | Pahse locked loop comprising a variable delay and a discrete delay | |
AU2001278331A1 (en) | Frequency synthesizer | |
TW200514399A (en) | Clock and data recovery circuit | |
JPH1032489A (en) | Digital delay controlled clock generator and delay locked loop using the clock generator | |
EP1309123A3 (en) | Ultrahigh-speed clock extraction circuit for optical signals |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG US UZ VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2001988346 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020037008918 Country of ref document: KR Ref document number: 2002554969 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 018217273 Country of ref document: CN |
|
WWE | Wipo information: entry into national phase |
Ref document number: PA/a/2003/006095 Country of ref document: MX |
|
WWP | Wipo information: published in national office |
Ref document number: 1020037008918 Country of ref document: KR |
|
REG | Reference to national code |
Ref country code: DE Ref legal event code: 8642 |
|
WWP | Wipo information: published in national office |
Ref document number: 2001988346 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 2001988346 Country of ref document: EP |