WO2002045385A3 - Methods and devices for caching method frame segments in a low-power stack-based processor - Google Patents

Methods and devices for caching method frame segments in a low-power stack-based processor Download PDF

Info

Publication number
WO2002045385A3
WO2002045385A3 PCT/US2001/043829 US0143829W WO0245385A3 WO 2002045385 A3 WO2002045385 A3 WO 2002045385A3 US 0143829 W US0143829 W US 0143829W WO 0245385 A3 WO0245385 A3 WO 0245385A3
Authority
WO
WIPO (PCT)
Prior art keywords
caching
processor
methods
devices
low
Prior art date
Application number
PCT/US2001/043829
Other languages
French (fr)
Other versions
WO2002045385A2 (en
Inventor
Michael Majid
Zohair Sahraoui
Thomas Bottomley
Guillaume Comeau
Original Assignee
Zucotto Wireless Inc
Michael Majid
Zohair Sahraoui
Thomas Bottomley
Guillaume Comeau
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US25217000P priority Critical
Priority to US60/252,170 priority
Priority to US25655000P priority
Priority to US60/256,550 priority
Priority to US60/270,696 priority
Priority to US27069601P priority
Priority to US27637501P priority
Priority to US60/276,375 priority
Priority to US60/290,520 priority
Priority to US29052001P priority
Priority to US60/323,022 priority
Priority to US32302201P priority
Priority to US09/956,130 priority
Application filed by Zucotto Wireless Inc, Michael Majid, Zohair Sahraoui, Thomas Bottomley, Guillaume Comeau filed Critical Zucotto Wireless Inc
Priority to PCT/US2001/043444 priority patent/WO2002042898A2/en
Priority to PCT/US2001/043957 priority patent/WO2002048864A2/en
Priority to PCT/US2001/043829 priority patent/WO2002045385A2/en
Priority claimed from PCT/US2001/044031 external-priority patent/WO2002071211A2/en
Priority claimed from AU2002226968A external-priority patent/AU2002226968A1/en
Priority claimed from AU2002241505A external-priority patent/AU2002241505A1/en
Priority claimed from PCT/US2001/043444 external-priority patent/WO2002042898A2/en
Priority claimed from AU3044502A external-priority patent/AU3044502A/en
Publication of WO2002045385A2 publication Critical patent/WO2002045385A2/en
Publication of WO2002045385A3 publication Critical patent/WO2002045385A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G06F9/45508Runtime interpretation or emulation, e g. emulator loops, bytecode interpretation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44521Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44557Code layout in executable memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/448Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482Procedural
    • G06F9/4484Executing subprograms
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/448Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4488Object-oriented
    • G06F9/449Object-oriented method invocation or resolution
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/48Indexing scheme relating to G06F9/48
    • G06F2209/481Exception handling

Abstract

An apparatus and method are provided to cache local variables and stack operands of a current method frame.
PCT/US2001/043829 2000-11-20 2001-11-20 Methods and devices for caching method frame segments in a low-power stack-based processor WO2002045385A2 (en)

Priority Applications (16)

Application Number Priority Date Filing Date Title
US25217000P true 2000-11-20 2000-11-20
US60/252,170 2000-11-20
US25655000P true 2000-12-18 2000-12-18
US60/256,550 2000-12-18
US27069601P true 2001-02-22 2001-02-22
US60/270,696 2001-02-22
US27637501P true 2001-03-16 2001-03-16
US60/276,375 2001-03-16
US29052001P true 2001-05-11 2001-05-11
US60/290,520 2001-05-11
US32302201P true 2001-09-14 2001-09-14
US60/323,022 2001-09-14
US09/956,130 2001-09-20
PCT/US2001/043444 WO2002042898A2 (en) 2000-11-20 2001-11-20 Interpretation loop for object oriented processor
PCT/US2001/043957 WO2002048864A2 (en) 2000-11-20 2001-11-20 System registers for an object-oriented processor
PCT/US2001/043829 WO2002045385A2 (en) 2000-11-20 2001-11-20 Methods and devices for caching method frame segments in a low-power stack-based processor

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
AU2002241505A AU2002241505A1 (en) 2000-11-20 2001-11-20 Methods and devices for caching method frame segments in a low-power stack-based processor
PCT/US2001/043444 WO2002042898A2 (en) 2000-11-20 2001-11-20 Interpretation loop for object oriented processor
AU2002226968A AU2002226968A1 (en) 2000-11-20 2001-11-20 Data processor having multiple operating modes
PCT/US2001/043829 WO2002045385A2 (en) 2000-11-20 2001-11-20 Methods and devices for caching method frame segments in a low-power stack-based processor
PCT/US2001/044031 WO2002071211A2 (en) 2000-11-20 2001-11-20 Data processor having multiple operating modes
AU3044502A AU3044502A (en) 2000-11-20 2001-11-20 Interpretation loop for object oriented processor
AU4150502A AU4150502A (en) 2000-11-20 2001-11-21 Methods and devices for caching method frame segments in a low-power stack-basedprocessor

Publications (2)

Publication Number Publication Date
WO2002045385A2 WO2002045385A2 (en) 2002-06-06
WO2002045385A3 true WO2002045385A3 (en) 2003-09-12

Family

ID=27792424

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/043829 WO2002045385A2 (en) 2000-11-20 2001-11-20 Methods and devices for caching method frame segments in a low-power stack-based processor

Country Status (1)

Country Link
WO (1) WO2002045385A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1387247A3 (en) * 2002-07-31 2007-12-12 Texas Instruments Inc. System and method to automatically stack and unstack java local variables
US9734059B2 (en) * 2012-11-21 2017-08-15 Advanced Micro Devices, Inc. Methods and apparatus for data cache way prediction based on classification as stack data
GB2518022B (en) 2014-01-17 2015-09-23 Imagination Tech Ltd Stack saved variable value prediction

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997027539A1 (en) * 1996-01-24 1997-07-31 Sun Microsystems, Inc. Methods and apparatuses for stack caching
US6138210A (en) * 1997-06-23 2000-10-24 Sun Microsystems, Inc. Multi-stack memory architecture

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997027539A1 (en) * 1996-01-24 1997-07-31 Sun Microsystems, Inc. Methods and apparatuses for stack caching
US6138210A (en) * 1997-06-23 2000-10-24 Sun Microsystems, Inc. Multi-stack memory architecture

Also Published As

Publication number Publication date
WO2002045385A2 (en) 2002-06-06

Similar Documents

Publication Publication Date Title
DE60220106D1 (en) Method and device for reducing interference in decoded images with postfiltering
DE60122203D1 (en) Method and system for generating confidentiality in language communication
DE69913534D1 (en) Method and device for image generation
GB2395625B (en) Reduced power consumption signal processing methods and apparatus
DE60041446D1 (en) Method and device for selectively operating a radio in an alternative operation mode
EP1128415B8 (en) Sheet removing apparatus and method
AT515112T (en) Method and device for power supply network
DE60125160D1 (en) Device and method for turning
AU7488201A (en) Rotatable computer display apparatus and method
AU3454101A (en) Method and apparatus for providing access to and working with architectural drawings on the internet
DE60112857D1 (en) Adaptive power amplifier system and method
DE60335325D1 (en) Power saving circuit and method for image display device
AT285601T (en) Energy saving process and screen display device
AU2003287706A8 (en) Apparatus and method for multi-threaded processors performance control
DE60128423D1 (en) Electrodeionization apparatus and method for its operation
AU2003295446A1 (en) Transcoding-enabled caching proxy and method thereof
AU3399801A (en) Method and apparatus for destroying dividing cells
HK1033713A1 (en) Power supply device, power supply method, portableelectronic apparatus, and electronic timepiece
IL159656D0 (en) Method and apparatus for segmented peer-to-peer computing
AU7736700A (en) Method and apparatus for on-line chatting
AU8130601A (en) Adjustable segmented electrode apparatus and method
AU7167201A (en) System and method for dtx frame detection
GB0229892D0 (en) Method and apparatus for caching documents
HK1075953A1 (en) Method and apparatus for adaptive power consumption
MY138529A (en) A gambling apparatus and method of monitoring a gambling event

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PH PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: COMMUNICATION PURSUANT TO RULE 69 EPC (EPO FORM 1205A OF 280803)

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase in:

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP