WO2002031659A1 - Method for determining valid bytes for multiple-byte burst memories - Google Patents
Method for determining valid bytes for multiple-byte burst memories Download PDFInfo
- Publication number
- WO2002031659A1 WO2002031659A1 PCT/US2001/031750 US0131750W WO0231659A1 WO 2002031659 A1 WO2002031659 A1 WO 2002031659A1 US 0131750 W US0131750 W US 0131750W WO 0231659 A1 WO0231659 A1 WO 0231659A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- word
- value
- bit
- byte
- enable
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002425660A CA2425660A1 (en) | 2000-10-12 | 2001-10-09 | Method for determining valid bytes for multiple-byte burst memories |
EP01977710A EP1325416A4 (en) | 2000-10-12 | 2001-10-09 | Method for determining valid bytes for multiple-byte burst memories |
KR10-2003-7005033A KR100523966B1 (en) | 2000-10-12 | 2001-10-09 | Method for determining valid bytes for multiple-byte burst memories |
JP2002534980A JP3914154B2 (en) | 2000-10-12 | 2001-10-09 | How to determine valid bytes for multibyte burst memory. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/687,526 US6904505B1 (en) | 2000-10-12 | 2000-10-12 | Method for determining valid bytes for multiple-byte burst memories |
US09/687,526 | 2000-10-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2002031659A1 true WO2002031659A1 (en) | 2002-04-18 |
Family
ID=24760759
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/031750 WO2002031659A1 (en) | 2000-10-12 | 2001-10-09 | Method for determining valid bytes for multiple-byte burst memories |
Country Status (6)
Country | Link |
---|---|
US (1) | US6904505B1 (en) |
EP (1) | EP1325416A4 (en) |
JP (1) | JP3914154B2 (en) |
KR (1) | KR100523966B1 (en) |
CA (1) | CA2425660A1 (en) |
WO (1) | WO2002031659A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8015470B2 (en) * | 2007-07-18 | 2011-09-06 | Freescale Semiconductor, Inc. | Apparatus and method for decoding bursts of coded information |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4365295A (en) * | 1976-09-07 | 1982-12-21 | Tandem Computers Incorporated | Multiprocessor system |
US5608869A (en) * | 1990-04-27 | 1997-03-04 | National Semiconductor Corporation | Method and apparatus for reliable descriptor chaining in a media access control/host system interface unit |
US5875466A (en) * | 1995-06-09 | 1999-02-23 | Alantec Corporation | Active cache for a microprocessor |
US6041369A (en) * | 1996-07-01 | 2000-03-21 | Sun Microsystems, Inc. | Reducing two variables in alternate clock cycles during data transmission for monitoring when a data burst is close to completion |
US6088753A (en) * | 1997-05-27 | 2000-07-11 | Fusion Micromedia Corporation | Bus arrangements for interconnection of discrete and/or integrated modules in a digital system and associated method |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5452432A (en) | 1990-08-14 | 1995-09-19 | Chips And Technologies, Inc. | Partially resettable, segmented DMA counter |
US5604884A (en) | 1993-03-22 | 1997-02-18 | Compaq Computer Corporation | Burst SRAMS for use with a high speed clock |
US5630075A (en) * | 1993-12-30 | 1997-05-13 | Intel Corporation | Write combining buffer for sequentially addressed partial line operations originating from a single instruction |
EP0683457A1 (en) * | 1994-05-20 | 1995-11-22 | Advanced Micro Devices, Inc. | A computer system including a snoop control circuit |
JPH0877067A (en) * | 1994-09-01 | 1996-03-22 | Nec Corp | Cache memory controller |
-
2000
- 2000-10-12 US US09/687,526 patent/US6904505B1/en not_active Expired - Lifetime
-
2001
- 2001-10-09 EP EP01977710A patent/EP1325416A4/en not_active Withdrawn
- 2001-10-09 KR KR10-2003-7005033A patent/KR100523966B1/en not_active IP Right Cessation
- 2001-10-09 JP JP2002534980A patent/JP3914154B2/en not_active Expired - Fee Related
- 2001-10-09 WO PCT/US2001/031750 patent/WO2002031659A1/en not_active Application Discontinuation
- 2001-10-09 CA CA002425660A patent/CA2425660A1/en not_active Abandoned
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4365295A (en) * | 1976-09-07 | 1982-12-21 | Tandem Computers Incorporated | Multiprocessor system |
US5608869A (en) * | 1990-04-27 | 1997-03-04 | National Semiconductor Corporation | Method and apparatus for reliable descriptor chaining in a media access control/host system interface unit |
US5875466A (en) * | 1995-06-09 | 1999-02-23 | Alantec Corporation | Active cache for a microprocessor |
US6041369A (en) * | 1996-07-01 | 2000-03-21 | Sun Microsystems, Inc. | Reducing two variables in alternate clock cycles during data transmission for monitoring when a data burst is close to completion |
US6088753A (en) * | 1997-05-27 | 2000-07-11 | Fusion Micromedia Corporation | Bus arrangements for interconnection of discrete and/or integrated modules in a digital system and associated method |
Non-Patent Citations (1)
Title |
---|
See also references of EP1325416A4 * |
Also Published As
Publication number | Publication date |
---|---|
KR100523966B1 (en) | 2005-10-26 |
JP2004514965A (en) | 2004-05-20 |
JP3914154B2 (en) | 2007-05-16 |
EP1325416A4 (en) | 2005-08-10 |
KR20030042007A (en) | 2003-05-27 |
EP1325416A1 (en) | 2003-07-09 |
CA2425660A1 (en) | 2002-04-18 |
US6904505B1 (en) | 2005-06-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6170070B1 (en) | Test method of cache memory of multiprocessor system | |
CN1669012A (en) | DRAM supporting different burst-length accesses without changing the burst length setting in the mode register | |
JPH11501751A (en) | Method and apparatus for controlling linear and toggle mode burst access sequences using toggle mode increment logic | |
WO2017160480A1 (en) | Priority-based access of compressed memory lines in memory in a processor-based system | |
CN112199040B (en) | Storage access method and intelligent processing device | |
CN114051611A (en) | DMA scatter and gather operations for non-contiguous memory | |
US4916649A (en) | Method and apparatus for transforming a bit-reversed order vector into a natural order vector | |
JP4855864B2 (en) | Direct memory access controller | |
KR100391727B1 (en) | Memory Systems and Memory Access Methods | |
US6904505B1 (en) | Method for determining valid bytes for multiple-byte burst memories | |
EP0505157B1 (en) | Memory access control | |
US20090204665A1 (en) | System and methods for communicating between serial communications protocol enabled devices | |
JP4322116B2 (en) | Method of interface between external memory and processor supporting burst mode | |
KR20110014988A (en) | Method for controlling access to regions of a storage comprising a plurality of processes and communication module having a message storage for implementing the method | |
TWI764311B (en) | Memory access method and intelligent processing apparatus | |
CN111813722B (en) | Data read-write method and system based on shared memory and readable storage medium | |
WO1990002372A1 (en) | Pipelined address check bit stack controller | |
US6820191B2 (en) | Apparatus and method for executing an instruction with a register bit mask for transferring data between a plurality of registers and memory inside a processor | |
EP0150523A2 (en) | Data processing system with improved memory system | |
KR100723475B1 (en) | Cash memory system and method for changing line size of cash memory according to bus latency of bus | |
EP0718771B1 (en) | DMA logic unit architecture | |
JP2002202910A (en) | Automatic detection and correction of data and address signal mutually relocated and/or inverted to shared memory | |
CN117724770A (en) | Parameter reading method, device, equipment and storage medium | |
JPS584375B2 (en) | Memory access control method | |
JPH07152635A (en) | Cpu access control system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): CA JP KR |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR |
|
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2001977710 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020037005033 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2002534980 Country of ref document: JP Ref document number: 2425660 Country of ref document: CA |
|
WWP | Wipo information: published in national office |
Ref document number: 1020037005033 Country of ref document: KR |
|
WWP | Wipo information: published in national office |
Ref document number: 2001977710 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 1020037005033 Country of ref document: KR |
|
WWW | Wipo information: withdrawn in national office |
Ref document number: 2001977710 Country of ref document: EP |