WO2002027940A2 - Means for compensating a data-dependent supply current in an electronic circuit - Google Patents
Means for compensating a data-dependent supply current in an electronic circuit Download PDFInfo
- Publication number
- WO2002027940A2 WO2002027940A2 PCT/EP2001/010660 EP0110660W WO0227940A2 WO 2002027940 A2 WO2002027940 A2 WO 2002027940A2 EP 0110660 W EP0110660 W EP 0110660W WO 0227940 A2 WO0227940 A2 WO 0227940A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- cmp
- supply connection
- current
- circuit
- compensation
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/742—Simultaneous conversion using current sources as quantisation value generators
Definitions
- the invention relates to an electronic circuit comprising a data processing circuit for processing a digital signal, which data processing circuit is coupled between a first supply connection terminal and a second supply connection terminal for receiving a supply voltage.
- a data processing circuit for processing a digital signal
- Such an electronic circuit is known from the general prior art.
- the current consumed by the data processing circuit is dependent on the data content of the digital signal.
- a certain wiring impedance (ohmic resistance and self-inductance) is always present in series with the supply lines of the data processing circuit. Owing to the presence of this wiring impedance, and owing to the fact that the current consumed by the data processing circuit is dependent on the data content of the digital signal, the data processing circuit is supplied with a voltage which has a data-dependent component.
- the so-called Power Supply Rejection Ratio of an electronic circuit is always finite, so that distortion of signals will arise in the data processing circuit in dependence on the value of the Power Supply Rejection Ratio.
- an undesirable signal crosstalk may arise to other parts of the electronic circuit.
- Efforts are made in practice to limit this signal distortion and signal crosstalk by designing the data processing circuit such that the Power Supply Rejection Ratio is a maximum. Efforts are further made to minimize the wiring impedance present. These measures, however, are not always sufficient. Moreover, these measures may have the result that the implementation of the data processing circuit is very complicated. It is also possible that such an implementation, in which a high Power Supply Rejection Ratio is sought after, will have a negative impact on other quality aspects.
- the electronic circuit mentioned in the opening paragraph is for this purpose characterized in that the electronic circuit comprises a current compensation circuit which is coupled between the first supply connection terminal and the second supply connection terminal for receiving the supply voltage, which current compensation circuit in the operational state is controlled from the digital signal such that the sum of the current consumption of the data processing circuit and the current consumption of the current compensation circuit is substantially independent of the data content of the digital signal.
- Both the data processing circuits and the current compensation circuit have a current consumption which is data-dependent.
- the data-dependent component of the current consumption of the current compensation circuit has the same magnitude as the data- dependent component of the current consumption of the data processing circuit.
- the two said current components are in counter-phase. Since the supply connection points of the data processing circuit and of the current compensation circuit are interconnected by means of a very short wiring, there will be substantially no data-dependent current through the wiring impedances. This is because the data-dependent component of the data processing circuit and the data-dependent component of the current compensation circuit compensate one another. The result of this is that the data processing circuit is supplied with a supply voltage which is substantially independent of the data content of the digital signal. Signal distortion and signal crosstalk are thus avoided, even in the case of a low Power Supply Rejection Ratio of the data processing circuit.
- An example of an electronic data processing circuit is a so-called DA converter which converts the digital signal into an analog signal.
- Fig. 1 shows a known electronic circuit with a data processing circuit
- Fig. 2 is a circuit diagram of an electronic circuit according to the invention
- Fig. 3 is a circuit diagram of a first embodiment of a current compensation circuit for use in the electronic circuit of Fig. 2
- Fig. 4 is a circuit diagram of a second embodiment of a current compensation circuit for use in the electronic circuit of Fig. 2
- Fig. 1 shows a known electronic circuit with a data processing circuit
- Fig. 2 is a circuit diagram of an electronic circuit according to the invention
- Fig. 3 is a circuit diagram of a first embodiment of a current compensation circuit for use in the electronic circuit of Fig. 2
- Fig. 4 is a circuit diagram of a second embodiment of a current compensation circuit for use in the electronic circuit of Fig. 2
- Fig. 5 is a circuit diagram of an embodiment of a DA converter for use in the electronic circuit of Fig. 2. Equivalent components or elements have been given the same reference symbols in these Figures.
- Fig. 1 shows a known electronic circuit with a data processing circuit DCR.
- a first supply connection point 1 of the data processing circuit DCR is connected to a first supply connection terminal Nss of the electronic circuit.
- a second supply connection point 2 of the data processing circuit DCR is connected to a second supply connection terminal VD D of the electronic circuit.
- a supply voltage Ui is connected between the first supply connection terminal Nss and the second supply connection terminal N DD .
- Parasitic wiring impedances between the connection point 1 and the first supply connection terminal Nss and between the connection point 2 and the second supply connection terminal V DD are referenced Z ⁇ and Z 12 , respectively.
- the data processing circuit DCR receives a digital input signal DS.
- the current consumption ID C R of the data processing circuit DCR in general comprises a component which is dependent on the digital input signal DS.
- the presence of the parasitic wiring impedances Z ⁇ and Z_ ⁇ thus gives rise to an effective supply voltage U with a component which is dependent on the digital input signal DS.
- the data processing circuit DCR has an insufficiently high Power Supply Rejection Ratio, a signal distortion will arise owing to the data-dependent component in the effective supply voltage U 2 , and possibly also signal crosstalk to other parts of the electronic circuit.
- Fig. 2 shows an electronic circuit according to the invention with a data processing circuit DCR as shown in Fig. 1, with added thereto a current compensation circuit CMP.
- the digital signal DS is supplied not only to the data processing circuit DCR but also to the current compensation circuit CMP.
- the supply lines of the current compensation circuit CMP are not connected to the first supply connection terminal Nss and the second supply connection terminal N DD , but are connected to the first supply connection point 1 and the second supply connection point 2, respectively.
- the current consumption of the current compensation circuit CMP is referenced I CMP -
- the value of I C MP preferably lies much lower than the value of I DC R, SO that the total current consumption of the electronic circuit is not appreciably increased.
- the current compensation circuit CMP is designed such that the current consumption I CMP comprises a data-dependent component which is of the same magnitude as the data-dependent component of the current consumption I DCR of the data processing circuit DCR, but in opposite phase.
- Fig. 5 shows a DA converter DAC as an example of a data processing circuit DCR.
- the DA converter DAC comprises switching means S C NV and conversion resistors R C N V O to R C NV ⁇ -
- the switching means S C NV comprise switches which are controlled by the digital signals DS, which are referenced ao to a n .
- the DA converter DAC supplies an analog output signal U O U T to an output terminal OUT of the DA converter DAC.
- the conversion resistors are connected either between the first connection point 1 and the output terminal OUT or between the second supply connection point 2 and the output terminal OUT in dependence on the logic values of the signals ao to a n .
- Fig. 5 shows the situation, by way of example, in which the conversion resistors RC N V O and R C NVI are connected between the second supply connection point 2 and the output terminal OUT.
- the current consumption I DCR of the DA converter DAC is a minimum when all conversion resistors R C NV O to R C NV ⁇ are connected either between the first supply connection point 1 and the output terminal OUT or between the second supply connection point 2 and the output terminal OUT.
- the current consumption I DCR is greater in all other cases.
- the current consumption I DCR is a maximum when an equal number of conversion resistors is connected between the first supply connection point 1 and the output terminal OUT and between the second supply connection point 2 and the output terminal OUT. All this is subject to the assumption that all conversion resistors have substantially the same value.
- the current consumption I DC R is accordingly dependent on the value of the digital signal DS.
- Fig. 4 shows an example of a current compensation circuit CMP which in this example comprises three compensation resistors which are referenced R CMPI to R C M P3 -
- the current compensation circuit CMP further comprises switching means S CMP which are controlled by the digital signal DS.
- a number of compensation resistors are or are not connected between the first supply connection point 1 and the second supply connection point 2.
- the current consumption I CM P depends on the digital signal DS. Given a correct mutual dimensioning of the DA converter DAC and the current compensation circuit CMP, therefore, the sum of the current consumption values I DCR and I C M P will be constant.
- the output terminal OUT is unloaded, the number of conversion resistors of Fig. 5 is equal to 4 and the number of compensation resistors of Fig. 4 is equal to 4, the supply voltage is 3 volts, the value of the conversion resistors is 30 k ⁇ , and the value of the compensation resistors is 120 k ⁇ .
- Two situations will now be discussed. In situation 1, two conversion resistors are connected between the first supply connection point 1 and the output terminal OUT, and two conversion resistors are connected between the second supply connection point 2 and the output terminal OUT.
- the output voltage Uou ⁇ is equal to 1.5 volts.
- the total resistance connected between the first supply connection point 1 and the second supply connection point 2 is equal to 30 k ⁇ .
- the current consumption ID CR is 100 ⁇ A.
- Three compensation resistors with a value of 120 k ⁇ each are also connected in the current compensation circuit CMP between the first supply connection point 1 and the second supply connection point 2. This makes the current consumption I CM P equal to 75 ⁇ A.
- the sum of the current consumption values I D C R and I CMP is equal to 175 ⁇ A as a result.
- one conversion resistor is connected between the second supply connection point 2 and the output terminal OUT, and three conversion resistors are connected between the first supply connection point 1 and the output terminal OUT.
- the output voltage U O U T is equal to 0.75 volt.
- the total resistance between the first supply connection point 1 and the second supply connection point 2 of the DA converter DAC is equal to 40 k ⁇ .
- four compensation resistors of 120 k ⁇ are connected in the current compensation circuit CMP between the first supply connection point 1 and the second supply connection point 2.
- the current consumption I CM P is equal to 100 ⁇ A.
- the total current consumption is accordingly equal to 175 ⁇ A.
- a current compensation circuit CMP may alternatively be used comprising current sources as indicated in Fig. 3.
- Fig. 3 shows by way of example three compensation current sources I CMP I to I CMP3 which are connected between the first supply connection point 1 and the second supply connection point 2.
- the compensation current sources supply a certain reference current, or one or several compensation current sources are switched off, in dependence on the data content of the digital signal DS.
- the current compensation circuit CMP as shown in Fig.
- the current compensation circuit CMP as shown in Fig.4, it is also possible not to make the number of compensation resistors R CMPI - R CMP3 connected between the first supply connection point 1 and the second supply connection point 2 dependent on the data content of the digital signal DS, but to connect only one of the compensation resistors R CMPI - R CMP3 between the first supply connection point 1 and the second supply connection point 2 at any time, the value of said one compensation resistor R C M PI - RCM P3 being dependent on the data content of the digital signal DS.
- the electronic circuit may be built up from discrete components or be implemented in an integrated circuit. Transistors may be used for the compensation current sources, for example bipolar transistors or field effect transistors.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
- Control Of El Displays (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Amplifiers (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01969719A EP1380113B1 (en) | 2000-09-27 | 2001-09-14 | Means for compensating a data-dependent supply current in an electronic circuit |
DE60128403T DE60128403T2 (en) | 2000-09-27 | 2001-09-14 | MEANS FOR COMPENSATING A DATA-DEPENDENT SUPPLY CURRENT IN ELECTRONIC CIRCUIT |
KR1020027006656A KR20020060753A (en) | 2000-09-27 | 2001-09-14 | Means for compensating a data-dependent supply current in an electronic circuit |
JP2002531613A JP2004510381A (en) | 2000-09-27 | 2001-09-14 | Means for compensating data-dependent power supply currents in electronic circuits |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00203347.0 | 2000-09-27 | ||
EP00203347 | 2000-09-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002027940A2 true WO2002027940A2 (en) | 2002-04-04 |
WO2002027940A3 WO2002027940A3 (en) | 2003-11-06 |
Family
ID=8172072
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2001/010660 WO2002027940A2 (en) | 2000-09-27 | 2001-09-14 | Means for compensating a data-dependent supply current in an electronic circuit |
Country Status (7)
Country | Link |
---|---|
US (1) | US6501401B2 (en) |
EP (1) | EP1380113B1 (en) |
JP (1) | JP2004510381A (en) |
KR (1) | KR20020060753A (en) |
AT (1) | ATE362228T1 (en) |
DE (1) | DE60128403T2 (en) |
WO (1) | WO2002027940A2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009001308A2 (en) * | 2007-06-27 | 2008-12-31 | Nxp B.V. | Dac with data independent common mode dynamics |
EP2226943A3 (en) * | 2009-03-05 | 2012-11-14 | Yamaha Corporation | Correction circuit for D/A converter |
US9258503B2 (en) | 2012-12-06 | 2016-02-09 | Panasonic Intellectual Property Management Co., Ltd. | A/D converter, image sensor, and digital camera |
WO2019141364A1 (en) * | 2018-01-18 | 2019-07-25 | Huawei Technologies Co., Ltd. | Device and method for processing digital signals |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040245150A1 (en) * | 2003-05-19 | 2004-12-09 | Stone Robert L. | Extended sorting machine |
JP4926761B2 (en) * | 2007-03-01 | 2012-05-09 | ローム株式会社 | Digital-analog converter circuit |
US7564385B2 (en) * | 2007-12-18 | 2009-07-21 | Atmel Corporation | Current compensation for digital-to-analog converter |
CN102016813A (en) * | 2008-07-27 | 2011-04-13 | 拉姆伯斯公司 | Method and system for balancing receive-side supply load |
US8952615B2 (en) | 2011-06-14 | 2015-02-10 | Freescale Semiconductor, Inc. | Circuit arrangement, lighting apparatus and method of crosstalk-compensated current sensing |
US8487800B2 (en) * | 2011-11-14 | 2013-07-16 | Semtech Corporation | Resistive digital-to-analog conversion |
WO2021133371A1 (en) | 2019-12-23 | 2021-07-01 | Intel Corporation | Digital-to-analog converter, data processing system, base station and mobile device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0378840A2 (en) * | 1989-01-17 | 1990-07-25 | Motorola, Inc. | Digital to analog converter having single resistive string with shiftable voltage thereacross |
US5293166A (en) * | 1992-03-31 | 1994-03-08 | Vlsi Technology, Inc. | Digital-to-analog converter and bias compensator therefor |
US5801652A (en) * | 1994-07-08 | 1998-09-01 | Cirrus Logic, Inc. | Pattern dependent noise reduction in a digital processing circuit utilizing image circuitry |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4381497A (en) * | 1981-04-03 | 1983-04-26 | Burr-Brown Research Corporation | Digital-to-analog converter having open-loop voltage reference for regulating bit switch currents |
DE69115088T2 (en) * | 1990-03-20 | 1996-05-09 | Fujitsu Ltd | Digital-to-analog converter with a circuit for compensating for output changes that depend on temperature changes. |
US5111205A (en) * | 1990-12-18 | 1992-05-05 | Vlsi Technology, Inc. | Digital-to-analog and analog-to-digital converters |
KR960013048B1 (en) * | 1994-05-17 | 1996-09-25 | 엘지반도체 주식회사 | Digital/analog converter |
US5541597A (en) * | 1994-09-09 | 1996-07-30 | United Microelectronics Corp. | Digital/analog converter for compensation of DC offset |
KR0135924B1 (en) * | 1994-12-03 | 1998-05-15 | 양승택 | Digital/analog converter using current segmentation |
US5940020A (en) * | 1997-10-09 | 1999-08-17 | Tritech Microelectronics, Ltd | Digital to analog converter with a reduced resistor count |
US6317069B1 (en) * | 1999-05-06 | 2001-11-13 | Texas Instruments Incorporated | Digital-to-analog converter employing binary-weighted transistor array |
-
2001
- 2001-09-14 AT AT01969719T patent/ATE362228T1/en not_active IP Right Cessation
- 2001-09-14 DE DE60128403T patent/DE60128403T2/en not_active Expired - Lifetime
- 2001-09-14 KR KR1020027006656A patent/KR20020060753A/en not_active Application Discontinuation
- 2001-09-14 JP JP2002531613A patent/JP2004510381A/en not_active Withdrawn
- 2001-09-14 WO PCT/EP2001/010660 patent/WO2002027940A2/en active IP Right Grant
- 2001-09-14 EP EP01969719A patent/EP1380113B1/en not_active Expired - Lifetime
- 2001-09-25 US US09/962,649 patent/US6501401B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0378840A2 (en) * | 1989-01-17 | 1990-07-25 | Motorola, Inc. | Digital to analog converter having single resistive string with shiftable voltage thereacross |
US5293166A (en) * | 1992-03-31 | 1994-03-08 | Vlsi Technology, Inc. | Digital-to-analog converter and bias compensator therefor |
US5801652A (en) * | 1994-07-08 | 1998-09-01 | Cirrus Logic, Inc. | Pattern dependent noise reduction in a digital processing circuit utilizing image circuitry |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009001308A2 (en) * | 2007-06-27 | 2008-12-31 | Nxp B.V. | Dac with data independent common mode dynamics |
WO2009001308A3 (en) * | 2007-06-27 | 2009-03-05 | Nxp Bv | Dac with data independent common mode dynamics |
US8022851B2 (en) | 2007-06-27 | 2011-09-20 | Nxp B.V. | DAC with data independent common mode dynamics |
EP2226943A3 (en) * | 2009-03-05 | 2012-11-14 | Yamaha Corporation | Correction circuit for D/A converter |
US9258503B2 (en) | 2012-12-06 | 2016-02-09 | Panasonic Intellectual Property Management Co., Ltd. | A/D converter, image sensor, and digital camera |
WO2019141364A1 (en) * | 2018-01-18 | 2019-07-25 | Huawei Technologies Co., Ltd. | Device and method for processing digital signals |
CN111566939A (en) * | 2018-01-18 | 2020-08-21 | 华为技术有限公司 | Digital signal processing apparatus and method |
US11196439B2 (en) | 2018-01-18 | 2021-12-07 | Huawei Technologies Co., Ltd. | Device and method for processing digital signals |
US11632124B2 (en) | 2018-01-18 | 2023-04-18 | Huawei Technologies Co., Ltd. | Device and method for processing digital signals |
Also Published As
Publication number | Publication date |
---|---|
US20020047792A1 (en) | 2002-04-25 |
KR20020060753A (en) | 2002-07-18 |
DE60128403T2 (en) | 2008-01-10 |
WO2002027940A3 (en) | 2003-11-06 |
EP1380113B1 (en) | 2007-05-09 |
EP1380113A2 (en) | 2004-01-14 |
JP2004510381A (en) | 2004-04-02 |
ATE362228T1 (en) | 2007-06-15 |
US6501401B2 (en) | 2002-12-31 |
DE60128403D1 (en) | 2007-06-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6909390B2 (en) | Digital-to-analog converter switching circuitry | |
US6268817B1 (en) | Digital-to-analog converter | |
US4841175A (en) | ECL-compatible input/output circuits in CMOS technology | |
US6437720B1 (en) | Code independent charge transfer scheme for switched-capacitor digital-to-analog converter | |
US6353334B1 (en) | Circuit for converting a logic signal on an output node to a pair of low-voltage differential signals | |
US6501401B2 (en) | Means for compensating a data-dependent supply current in an electronic circuit | |
EP2649729A1 (en) | Digital to analog converter circuits and methods | |
US4092639A (en) | Digital to analog converter with complementary true current outputs | |
US6646580B2 (en) | Digital/analog converter with programmable gain | |
US5633637A (en) | Digital-to-analog converter circuit | |
US20090079609A1 (en) | Digital-to-analog converter | |
KR100309081B1 (en) | System provided with output buffer circuit and input buffer circuit | |
US6583746B2 (en) | A/D converter with high speed input circuit | |
JP2002050966A (en) | Da converter | |
EP3244531A1 (en) | Switched-capacitor buffer and related methods | |
JP3088393B2 (en) | Resistor string type D / A converter | |
US6424278B1 (en) | Finite impulse response digital to analog converter with offset compensation | |
US8525716B2 (en) | Isolation circuit for a digital-to-analog converter | |
US6218871B1 (en) | Current-switching method and circuit for digital-to-analog converters | |
KR920004343B1 (en) | Interface circuit | |
US6501407B2 (en) | Digital to analog converter | |
EP0579314A1 (en) | System comprising an output buffer circuit and an input buffer circuit | |
US6608860B1 (en) | Low power dissipation, high linearity transmitter | |
JPH0777350B2 (en) | Glitch generation suppression circuit of D / A converter | |
US10715171B1 (en) | Voltage-mode DAC driver with parallel output resistance tuning |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): JP KR |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020027006656 Country of ref document: KR |
|
ENP | Entry into the national phase |
Ref country code: JP Ref document number: 2002 531613 Kind code of ref document: A Format of ref document f/p: F |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2001969719 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 1020027006656 Country of ref document: KR |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWP | Wipo information: published in national office |
Ref document number: 2001969719 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 2001969719 Country of ref document: EP |