WO2001097580A1

WO2001097580A1 - Electronic device and method of manufacturing the electronic device

Info

Publication number: WO2001097580A1
Application number: PCT/JP2001/004891
Authority: WO
Inventors: Toshiharu Ishida; Tasao Soga; Hanae Shimokawa; Tetsuya Nakatsuka
Original assignee: Hitachi, Ltd.
Priority date: 2000-06-12
Filing date: 2001-06-11
Publication date: 2001-12-20

Abstract

An electronic device capable of being connected, with high reliability, to a conventional circuit board using Pb-free solder as the substitute of Sn-37Pb solder, wherein solder paste (4) is fed onto the inner side of the wiring pattern (3) on the circuit board (1) in V-shape, recessed-shape, or projected-shape, and the solder paste is connected to a semiconductor device (2), whereby the electronic device with high reliability of connection can be provided.

Description

Electronic equipment and its manufacturing method

The present invention relates to the surface mounting of electronic components using lead-free (Pb) -free solder alloy instead of lead-tin eutectic solder, and particularly to the occurrence of solder pools or solder ridges in surface mounting. It is about prevention. Technology background

At present, research is under way on the development of solders that can replace Sn-37mass% Pb (hereinafter abbreviated as Sn-37Pb) solders. Sn-Zn, Sn-Ag, Sn- Sb-based, Sn-Ag-Bi-based, etc. have been mentioned. The alternative Pb-free solder has lower wettability and melt-separability than the Sn-37Pb eutectic solder. The supply of solder to the wiring pattern of the circuit board is performed by transferring the solder paste by printing, using a print mask shape that matches the pattern, and using the conventional Sn-37Pb eutectic solder. The pattern and print mask pattern generally had the same shape.

However, if Pb-free solder is supplied in this conventional transfer (printing) pattern, the wettability will be lower than that of Sn-37Pb eutectic solder, so wetting will not spread and the amount of solder per unit area will be reduced. More. Also, Pb-free solder tends to get wet only at the printed area. The amount of solder required to form the joint is the same for Pb-free solders and conventional solders, so the poor wettability tends to cause unnecessary solder poles to be left behind. In particular, when a chip component is mounted, a portion of the solder paste under the chip protrudes outside, and cannot be returned to the pad due to poor wettability after reflow, leaving a large solder pole beside the chip. In most cases, the wetting spread of Pb-free solder is at the opposing portion between the component electrode or lead and the Cu pad. Therefore, If the amount of solder other than the direction part increases, reflow tends to lead to the generation of solder poles and bridges.

An object of the present invention is to reliably connect an electronic component to a conventional circuit board using Pb-free solder instead of Sn-37Pb solder. Disclosure of the invention

In order to achieve the above object, among the inventions disclosed in the present application, typical ones are briefly described as follows.

The printed shape of the solder paste supplied to the connection wiring pattern of the circuit board is V-shaped (concave or convex is also effective), and V-shaped (concave or convex) is used for leadless chip components. I turned to the direction.

The method for manufacturing an electronic device, further comprising using a print mask having a pattern different from the connection wiring pattern of the circuit board, for example, a print mask having a pattern smaller than the connection wiring pattern of the circuit board, to form the connection wiring pattern on the circuit board. The solder is supplied, the semiconductor device is mounted on the circuit board, and the circuit board and the semiconductor device are connected by reflow.

Also, by forming a part where the solder paste is not printed on the Cu pad at the position where the chip is placed, the solder does not protrude out of the chip during reflow and spreads on the unprinted Cu pad under the chip become. The fact that the chip electrode is located directly above it makes use of the property that even a Pb-free solder, which is difficult to get wet on the pad below it, gets wet. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a diagram showing a state in which a semiconductor device is mounted on a wiring circuit.

FIG. 2 is a view showing a longitudinal section of a lead portion of a mounted semiconductor device.

FIG. 3 is a view showing a cross section of a mounted state of the semiconductor device. FIG. 4 is a diagram showing a state where the semiconductor device is mounted on the wiring circuit.

FIG. 5 is a view showing a longitudinal section in a mounted state of the semiconductor device.

FIG. 6 is a diagram showing a cross section of a lead portion of a mounted semiconductor device.

FIG. 7 is a diagram showing a state where the semiconductor device is mounted on the wiring circuit.

FIG. 8 is a view showing a cross section of a mounted state of the semiconductor device.

FIG. 9 is a view showing a cross section of a lead portion of a mounted semiconductor device.

FIG. 10 is a diagram illustrating the description of the occurrence of solder poles.

FIG. 11 is a view showing a mounted state of a leadless chip component.

FIG. 12 is a diagram showing an entire cross section of mounting a leadless chip component.

FIG. 13 is a diagram showing a cross section of an electrode portion of a leadless chip component.

FIG. 14 is a diagram showing a mounted state of a leadless chip component.

FIG. 15 is a diagram showing an entire cross section of mounting a leadless chip component.

FIG. 16 is a diagram showing a cross section of an electrode portion of a leadless chip component.

FIG. 17 is a view showing a mounting state of a leadless chip component.

FIG. 18 is a diagram showing an entire cross section of mounting a leadless chip component.

FIG. 19J is a view showing a cross section of an electrode portion of the leadless chip component.

FIG. 20 is a diagram showing a cross section and a plane of the semiconductor module.

FIG. 21 is a diagram showing a connection state between a semiconductor module and a circuit board.

FIG. 22 is a diagram showing a manufacturing process of the electronic device. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, the present invention will be described in more detail with reference to Examples.

FIG. 22 shows an example of a manufacturing process of an electronic device including a semiconductor device (semiconductor chip) and the like. First, using photolithography technology, device circuits are formed on a wafer, and a spring probe and plated contact terminals are brought into contact with the electrodes of the wafer to perform probe inspection. 'Subsequently, the wafer on which the circuit pattern has been formed is diced and individualized, placed on an island such as a lead frame, and attached (mounted). The mounted chip and lead frame are wire-bonded with gold wire or the like to make electrical connection. After that, the lead frame is set in the mold, the temperature is increased, and the fluidized resin is pumped to seal the entire chip with the resin. Separate the IC from the lead frame, form the leads, and solder them to the leads. Finally, the electrical characteristics of the IC are inspected and sorted by test. The non-defective semiconductor device that has passed the sorting process is mounted on a mounting board such as a mother board using solder. As a result, electronic devices (including multi-chip modules) are manufactured.

In addition, as a semiconductor device, a so-called wafer-level chip size package (WL-CSP) is used in which relocation wiring is formed from electrodes on the wafer at the wafer level, external connection terminals (for example, solder bumps) are formed, and then dicing is performed. May be used. The method for preparing the semiconductor device and the circuit board (mounting board) is not limited to the above.

The connection between semiconductor devices and circuit boards (mounting boards) using lead-free solder will be described in detail below.

(Example 1)

FIG. 1 shows, for example, a solder paste 4 a to 4 d printed on a predetermined wiring pattern 3 a to 3 d in order to connect a semiconductor device 2 having relatively wide I leads 5 a to 5 d to a circuit board 1. This shows a state in which the transfer is supplied and the semiconductor device 2 is mounted thereon. 2 and 3 are cross-sectional views of the cross-section observation finger portions XX ′ (6) and YY ′ (7). In the present embodiment, the solder pastes 4a to 4d are applied to the wiring patterns 3a to 3d in a state where the solder pastes 4a to 4d face the wiring patterns 3a to 3d and the leads 5a to 5d of the semiconductor device 2. The semiconductor device 2 is transferred and supplied so as to be V-shaped on the leads 3a to 3d. In a state before the reflow in which the semiconductor device 2 is mounted on the circuit board 1, the solder is partially soldered to the leads 5a to 5d. There is no best. That is, it is supplied in a shape having a notch. Such a state When passing through a reflow oven having a predetermined temperature profile, the solder paste melts. The molten solder tends to be repelled by the side bands of the leads 5a to 5d due to the weight of the semiconductor device 2, or spreads over the metallized portions of the leads 5a to 5d. At this time, if there is residual solder, the resistance of the metallized portion is smaller than the resistance of the side band at the time of rejection, so that it spreads over the metallized portion facing the unprinted portions 8a and 8b of the solder paste. This becomes a leading role, and the solder spreads and spreads even on the unprinted portions 8a and 8b of the solder paste of the wiring patterns 3a to 3d facing each other, and there is little elution to the side band of the wiring pattern, The generation of solder poles or the generation of a bridge between the wiring patterns is suppressed.

(Example 2)

FIGS. 4, 5, and 6 show, for example, a predetermined wiring pattern for connecting the semiconductor device 2 having the I leads 5a to 5d to the circuit board 1. 4D is a state diagram of a semiconductor device 2 which is transferred and supplied in a concave shape to form a semiconductor device 2 thereon. When the solder paste in this state is allowed to pass through a furnace with a riff opening in the same manner as in Example 1, the solder pastes 4a to 4d are melted and spread along the metallized portions of the leads 5a to 5d. If there is residual solder, as in Example 1, the resistance at the time of metallization is lower than the rejection resistance, so that it spreads over the metallized side of the lead facing the unprinted portions 8a and 8b of the solder paste, Led by it

The solder also wets the unsoldered paste printed part of the wiring pattern. As a result, the occurrence of solder poles and bridges is suppressed.

(Example 3)

FIGS. 7, 8, and 9 show, for example, solder pastes 4 a to 4 d on a predetermined wiring pattern 3 a to 3 d for connecting a semiconductor device 2 having I leads 5 a to 5 d to a circuit board 1. FIG. 6 is a state diagram of a semiconductor device 2 transferred and supplied in a convex shape, and a semiconductor device 2 placed thereon. When the solder paste in this state is passed through a furnace with a riff opening in the same manner as in Example 1, the solder pastes 4a to 4d are melted and the metallized portions 1 of the leads 5a to 5d 1 "Wetting spreads along 0a> 10b. If there is residual solder, the unprinted portion of solder paste 8a, 8 Wet spreads on the metallized side of the lead opposite to b, leading to it, the solder also wets the unsoldered paste printed part of the wiring pattern

. This suppresses the occurrence of solder poles and bridges.

(Example 4)

Fig. 10 shows a 1608 chip with metallization for electrodes 10a and 10b, a Sn-AgCu-based solder paste 4 for a 2125 chip, and a common Pb-Sn for the wiring pattern 3 on the circuit board 1. It shows the appearance in which a large pole 11 with a diameter of 100 to 500 m is formed on the side of the chip after solder printing with the mask pattern used for polycrystalline solder and passing it through a furnace with a riff opening of max 245 ° C. Such a pole 11 is formed even if the amounts of Ag and Cu in the solder are slightly different. The cause is poor wettability to the Cu pad, so the solder that has been ejected by press-fitting when mounting the chip cannot return to the Cu pad due to the effect of the resist step, and remains as a large pole. In order to prevent this ball generation, we examined the mask shape of the solder paste and its positional relationship with the Cu pad.

FIGS. 11, 12, and 13 show the connection of the leadless chip component 9 to the circuit board 1 with the soldering pastes 4a, 4b applied to the predetermined wiring patterns 3a, 3b and inside the electrodes. FIG. 4 is a diagram showing a state in which a transfer and supply are performed in a V-shape, and a leadless chip component is mounted thereon. When the solder paste is passed through a reflow furnace in this state, the solder pastes 4a and 4b are melted and spread along the metallized portions 10a and 10b. If there is residual solder, the occurrence of solder poles can be suppressed. By further projecting the Cu pad portion from the inner side of V, the area of the Cu pad portion is increased, the wetted portion is increased, and the probability of pole generation is further reduced. The V type is superior in producing less poles than the concave and convex types shown below. In the case of the V type, if the chip is mounted with misalignment, the portion where the paste and the chip come into contact changes linearly, so even a slight misalignment does not cause a problem. In the case of a concave shape, the chip touches the concave side surface, and the degree of influence on wetting without touching it May be adversely affected.

(Example 5)

For example, Fig. 14, Fig. 15 and Fig. 16 show soldering pastes 4a and 4b inside the electrodes to connect the leadless chip components 9 to the circuit board 1 and to the predetermined wiring patterns 3a and 3b. FIG. 4 is a state diagram of a state in which a transfer and supply are performed so as to form a concave shape toward, and a leadless chip component is mounted thereon. Even in the present embodiment, even when residual solder is generated similarly to the first, second, and third embodiments, the unprinted solder paste 8a, 8b is provided on the wiring patterns 3a, 3b. It can suppress the occurrence of solder poles.

(Example 6)

Fig. 17, Fig. 18 and Fig. 19 show, for example, solder pastes 4a and 4b on the predetermined wiring patterns 3a and 3b to connect the leadless chip components 9 to the circuit board 1. FIG. 6 is a diagram showing a state in which transfer and supply are performed so as to project toward a portion, and a leadless chip component is mounted thereon. Even in the present embodiment, even if residual solder is generated as in the case of the fourth and fifth embodiments, the solder balls are provided by providing the unprinted solder paste 8a and 8b on the wiring patterns 3a and 3b. Can be suppressed. (Example 7)

Figure 20 shows the connection between the terminals of the module package, the terminal of the chip carrier, the terminal of the chip component, etc., which are practically used in mobile devices such as mobile phones. It uses the LGA (Lead Grid Array) method taken by comrades. In high-density mounting of solder paste, it is important not to generate solder residue defects such as pole residues and bridges. Pb-free solder has poor wettability and spreads, so only the printed portion gets wet on the free surface, but when pressurized, it is affected by it and spreads out where there is metallization. For this reason, if the amount of solder is large and there is no wet spot, the excess solder will protrude from the terminal, forming an independent pole or bridging with the adjacent terminal. On the other hand, One of the problems with the board-side terminals is that when Pb-free solder is used, the reflow temperature is around 245 ° C, which is about 20 higher than the conventional Sn-Pb eutectic solder. Considering three times, there is a problem of delamination due to a decrease in the adhesion of the resin at high temperatures between the substrate and the Cu pad. Therefore, it is necessary to reinforce the periphery of the Cu pad with a heat-resistant resist film. In particular, the contact points connected to the connection terminals and the wiring concentrate stress, so the resist must be covered tightly. FIG. 20 (a) is a cross-sectional view including terminals of a module on which an LSI is mounted, and FIG. 20 (b) is a plan view thereof. (C) is a cross section in a state where the solder paste 15 is printed on the circuit board 18 and the terminals 13 of the module 12 are positioned. The bump height (h) in the module differs due to the unevenness and warpage of the circuit board, the inclination after connection between the module and the circuit board, or the difference in the amount of printed solder. For this reason, the terminals with a narrow gap and a large amount of solder may spill out and become an independent solder pole or a bridge with an adjacent terminal. Therefore, module side terminal diameter; b, solder printing diameter; a, circuit board terminal diameter; c, and a <b <c, terminals with narrow gaps and large amount of solder were applied. In the terminal, ① Solder is wet (effective when the amount of solder is large) 19 to secure the area 14 that can absorb the solder. ② At the time of repair, it is always broken by the solder on the module terminal side. 3) The pad is not peeled off by strengthening it with the resist film 16 even after several repairs. 4) Since the Cu pad surface is Ni / Au plated, the amount of solder may be insufficient. At this time (when the gap is wide), even if there is a portion where the substrate surface is not wet, there is no problem of Cu oxidation. Note that even if the connection terminals are terminals for heat dissipation, the views on solder poles and bridges are the same. Industrial applicability

According to the present invention, it is possible to connect an electronic component to a conventional circuit board using Pb-free solder instead of Sn—37 Pb solder with high reliability.

Claims

' The scope of the claims

1. After supplying Sn-based solder paste, Sn-Ag-based solder paste, Sn-Ag-Cu-based solder paste, Sn-Cu-based solder paste or Sn-Zn-based solder paste to the specified wiring pattern, In an electronic device having an electronic circuit board in which electronic components are connected to the circuit board by melting the paste,

An electronic device, wherein the shape of the solder paste supplied onto the wiring pattern of the circuit board is V-shaped, concave or convex on the inner side.

2. After supplying Sn-based solder paste, Sn-Ag-based solder paste, Sn-Ag-Cu-based solder paste, Sn-Cu-based solder paste or Sn-Zn-based solder paste to a predetermined wiring pattern, apply the solder paste. In an electronic device having an electronic circuit board in which electronic components are connected to the circuit board by melting,

An electronic device, wherein a shape of a solder paste supplied onto a wiring pattern of the circuit board has a cutout portion.

3. The electronic device according to claim 1, wherein at least one of Bi, In, Ge, and Ni is added to the solder paste.

4. Solder paste of chip carrier, module parts, LGA (Lead Grid Array) such as CSP, etc., with the solder paste of Sn-Ag, Sn-Ag-Cu, Sn-Cu or Sn-Zn, etc. In an electronic device printed and connected to a circuit board using the above method, the pad size of the circuit board is larger than the LGA terminal size, the periphery of the pad is covered with a resist, and the solder paste application size is the LGA terminal size. An electronic device characterized by leaving smaller, non-printing areas.

5. A method for manufacturing an electronic device having a semiconductor device and a circuit board, comprising the steps of: preparing a semiconductor device and a circuit board; arranging a print mask on the circuit board; Supplying a solder paste on the inner side of the wiring pattern so as to have a V shape, a concave shape, or a convex shape; A method for manufacturing an electronic device, comprising: a step of mounting the semiconductor device on a wire substrate; and a step of flushing the solder paste.