WO2001097508A1 - Preventing doming phenomena - Google Patents
Preventing doming phenomena Download PDFInfo
- Publication number
- WO2001097508A1 WO2001097508A1 PCT/EP2001/005574 EP0105574W WO0197508A1 WO 2001097508 A1 WO2001097508 A1 WO 2001097508A1 EP 0105574 W EP0105574 W EP 0105574W WO 0197508 A1 WO0197508 A1 WO 0197508A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit
- histogram
- luminance
- beam current
- circuit according
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/57—Control of contrast or brightness
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/57—Control of contrast or brightness
- H04N5/59—Control of contrast or brightness in dependence upon beam current of cathode ray tube
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/20—Circuitry for controlling amplitude response
Definitions
- the invention relates to a method and device for preventing doming phenomena. More specifically, the invention relates to circuitry for preventing doming phenomena in a television receiver.
- EP-A-0,525,976 describes a prior art intensity control circuit destined to provide a usual intensity correction and has nothing to do with the prevention of dooming phenomena. For details about the functioning of this intensity control circuit the attention is drawn to said publication.
- Doming phenomena may occur in case a section of the shadow mask of a cathode ray picture tube is irradiated with high intensity electron beams causing partial distortion of the shadow mask whereby a "dome" is formed in the mask. The effect thereof is mis-coloring which is very annoying. Because of the geometry of the tube the influence of the doming phenomena is rather strong near the periphery of the screen where the electron beam strikes the shadow mask under a relatively large deflection angle. Electron beams with high intensity are generated in correspondence to a local high luminance signal. To prevent doming phenomena the luminance signal has to be controlled such that the intensity of the resulting electron beam is limited in least in those regions of the screen where doming is likely to occur.
- the circuit described therein comprises means for processing the luminance signal including a low pass filter for filtering out only the low frequent components of the luminance signal which in a first comparator are compared with a first reference signal related to the horizontal and vertical modulation signals resulting into a control signal for a charge/discharge circuit which will tend to charge if there are areas on the screen where the luminance will be so high that doming phenomena will appear.
- the output of this charge/discharge circuit is compared with a second reference level signal resulting into a correction signal, which is used to adapt either the contrast or the luminance of the screen to counter-act any doming phenomena.
- the first reference signal is generated such that the allowed luminance level is rather large at the center of the screen and is relatively small near the sides of the screen, taking thereby into account that the doming phenomena will appear predominantly near the edges of the screen and not in the center thereof.
- the invention provides a doming phenomena prevention as defined in the independent claims.
- Advantageous embodiments are defined in the dependent claims.
- luminance histogram distribution values are obtained from a luminance signal
- the various luminance histogram distribution values are processed and normalized
- the luminance histogram distribution values are processed to correct for at least actual contrast and brightness settings to obtain corrected histogram data
- a beam current is predicted from the corrected histogram data
- a correction signal is derived from the predicted beam current and making said correction signal effective in the processing and normalizing step.
- local doming is prevented by determining local histograms to correct local beam currents for at least two windows (32, 34 in Fig. 2).
- a doming phenomena preventing circuit in accordance with the present invention makes predominantly use of a processor performing calculations on luminance data which are already available in the a histogram memory forming part of the normal intensity control circuit.
- a processor is already present and if said processor has a sufficient spare capacity the doming preventing circuit according to the invention can be realized without adding any substantial hardware to the television receiver circuit. Loading a suitable program into the already present processor to calculate a correction signal from the available data would then solve a major part of the problem.
- Fig. 1 illustrates a rather schematic diagram of circuitry according to the invention
- Fig. 2 illustrates schematically a screen with the windows in which the circuit according the invention is active; and Fig. 3 illustrates a more elaborate circuitry providing a lot of details.
- the circuit in Fig. 1 comprises three parts 2, 4 and 6, part 2 being a conventional intensity correction device, part 4 being a section of a normal television receiver circuit comprising the user accessible setting unit for influencing contrast and brightness, and part 6 comprising the dooming phenomena preventing circuitry according to the invention. As indicated above part 2 in Fig. 1 shows the construction of a conventional intensity correction device.
- the reference numeral 10 denotes a histogram memory for obtaining luminance distribution of an input luminance signal Y
- 12 denotes a look-up table operating circuit for performing cumulation of the histogram and normalizing respective data so that the maximum cumulative frequency become coincident with a maximum value of an output luminance signal
- 14 denotes a look-up table memory for storing the data normalized by the look-up table operating circuit 12 and permitting reading out of a correction signal corresponding to a luminance level of the input signal. It is remarked that using a look-up table memory is only one of many possible ways to obtain a luminance ratio change, such as a piece- wise linear technique or a direct application of a non-linear function.
- the luminance signal Y is an analog signal which has to be converted into a digital signal by the A/D converter 22. If the luminance signal is already in digital form the converter 22 can be eliminated.
- the functioning of the sub-circuit in part 2 is extensively described in the above-mentioned EP-A-0,354,418 to which the attention is drawn for further reference.
- the circuit in Fig. 1 has a second part 4 covering a brightness and contrast controller 24 that includes a contrast controller 26 and a brightness controller 28.
- the corrected output signal of brightness and contrast controller 24 is supplied to an RGB amplifier 30 to bring the signal at a level suited for activating the actual cathode ray tube control elements.
- the third part 6 in Fig. 1 covers an emulated brightness and contrast control circuit 16 receiving input values from the contrast controller 26 and the brightness controller 28 to subject the output signal from the histogram memory 10 to the same corrections as the luminance signal from the look up table 14.
- a summing circuit 18 takes care of providing a weighted sum of all values received. The obtained sum is related to the actual total beam current. The obtained sum is further processed into a correction value in the circuit 20. The obtained correction value is transferred back to the look up table operating circuit 12 to implement the correction.
- the circuit in Fig. 1 finally comprises a tandem switch SI, S2. In the illustrated positions these switches take care that the circuit in part 2 only functions as a normal luminance control circuit of the type known from the prior art.
- Fig. 2 illustrating schematically the zones on a television screen where doming phenomena are likely to occur.
- doming phenomena will occur predominantly in a zone at some distance from the center of the screen where the angle between the electron beam and the shadow mask in front of the screen is substantially smaller then 90 degrees.
- said processing means More specifically said windows are a left and right window covering elongated vertical zones near the respective right and left edges of the screen.
- Fig. 2 two windows 32 and 34 are defined on the screen 36 each having a height equal to the height of the television screen 36.
- the object of the circuit according to the invention is now to measure the total beam current impinging onto the CRT mask covering each of the windows 32 and 34. If the calculated or estimated total beam value in a window is higher than a predetermined limit, so that it is very- likely that doming phenomena will occur, a correction signal can be sent to the luminance control circuit decreasing the luminance on the circuit as a whole and preventing thereby the doming phenomena.
- Windows 33 and 35 serve to measure whether the thermic-mechanic compensation of the CRT actually does what it is supposed to do in order to prevent local doming.
- the whole left half of the screen is white.
- region 33 will be white so that the thermically active suspension of the shadow mask (normally made from a bimetal) becomes hot too, thereby compensating the local doming in area 32 nearly completely. Again it is essential that this combination takes place, because otherwise a false alarm would be given too often.
- This compensation system makes sense with CRTs having a shadow mask made of iron.
- this compensation is not required, because for this type of display, the shadow mask is not thermically compensated by means of a bimetal suspension, but by choosing a material having a low expansion coefficient.
- the histogram intensity control circuit comprises the histogram measurement memory 40, the processor 42 and the look up table 44.
- the way in which these components operate is already described in detail above and will not be explained any further.
- the output signal of the look up table 44 forms the input signal of a horizontal/vertical-zoom circuit 46, a contrast circuit 48, a brightness circuit 50, an RGB amplifier 52 and a CRT ⁇ -correction circuit 54. All these circuits can be found in prior art television receivers and do not require any further explanation.
- the luminance signal Y is supplied through an AGC-circuit 56 to both the histogram of measurement memory 40 as well as to the lookup table memory 44.
- the output of the histogram memory 40 is connected to a switch S 10 (corresponding to SI in Fig. 1).
- Switch S10 is coupled to a further five-position switch S12 and both switches are in tandem controlled by a window generator 58 that is controlled by a scene change detector 59. If the circuit needs data belonging to the left doming area window 32, the right doming area window 34, the left overscan window 33, or the right overscan window 35, then the window generator 58 takes care that the switches S10 and S 12 are brought into the corresponding position. If none of these data is necessary then the switches are brought to the most lower position in which the circuits 40, 42 and 44 are together functioning as described in the prior art publication. '
- the output signal of histogram memory 40 is first of all supplied to a histogram correction circuit 60.
- the circuit 60 emulates the dynamic contrast function which is performed in circuit 44.
- the corrected signal is supplied to a circuit 62 where contrast and brightness correction are performed based on signals received from the contrast control circuit 48 and the brightness control circuit 50.
- a further signal supplied to the circuit 62 is derived from a beam current limiter 63.
- the beam current limiter 63 is a circuit known from the prior art. The beam current limiter 63 takes care that under no circumstances the beam current reaches a higher level than a predetermined limit level. If necessary, the value at the input of circuit 62 is corrected in case the beam current limiter 63 provides an indication therefore.
- the RGB-amplifier 52 has of course its influence on the actual luminance signal but in the emulation circuit this influence is in fact a constant factor so that no connection between the RGB amplifier 52 and the correction circuit 62 is necessary.
- the influence of the CRT ⁇ -correction circuit 54 is translated into the circuit 64 emulating the ⁇ -correction.
- beam current ⁇ weight (bucket) x histogram (bucket) wherein weight (n) is the beam current of each pixel in the bucket number n and histogram (n) is the amount of pixels of the picture that fall inside it.
- the beam current calculated so far depends on the window size because the total amount of pixels measured by the histogram changes linearly with the window size. Since the window changes due to 50Hz/60Hz reception conditions a correction has to be added for which a window size compensation circuit 68 is added.
- the prediction calculated so far tends to underestimate the doming effect of the beam current in cases where one part of the window is light and another is dark.
- a black/white balance correction circuit 70 is added where a correction is performed based on the light/dark distribution.
- the output signal of the black/white balance correction circuit 70 is supplied through switch S12 further to either the left part prediction circuit 72 or to the right part pre-diction circuit 74.
- These prediction circuits control the calculate correction circuit 76 which supplies the ultimate correction value to the histogram algorithm processor 42. Instead of to the histogram algorithm processor 42 the correction signal could also be transferred back to the contrast controller 48 as indicated in Fig. 3.
- a preferred embodiment of the invention provides an electronic local doming prevention (ELDP) in which local histograms are determined at several locations, and in which a prediction of the beam current is carried out in predetermined areas of the picture.
- ELDP electronic local doming prevention
- This embodiment is based on the idea to derive a prediction of the local doming of the shadow mask from the measurement of the local luminance histogram.
- a switch is made between five windows, viz. one dynamic contrast control window plus four windows 32-35 for electronic local doming prevention.
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002511101A JP2004503959A (en) | 2000-06-13 | 2001-05-15 | Prevent the doming phenomenon |
KR1020027001856A KR20020029100A (en) | 2000-06-13 | 2001-05-15 | Preventing doming phenomena |
EP01984024A EP1295468B1 (en) | 2000-06-13 | 2001-05-15 | Preventing doming phenomena |
DE60106761T DE60106761T2 (en) | 2000-06-13 | 2001-05-15 | PREVENT COUPLING PHENOMENONES |
AT01984024T ATE281040T1 (en) | 2000-06-13 | 2001-05-15 | PREVENTING DOME FORMATION PHENOMENA |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00202057.6 | 2000-06-13 | ||
EP00202057A EP1164784A1 (en) | 2000-06-13 | 2000-06-13 | Preventing doming phenomena |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2001097508A1 true WO2001097508A1 (en) | 2001-12-20 |
Family
ID=8171624
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2001/005574 WO2001097508A1 (en) | 2000-06-13 | 2001-05-15 | Preventing doming phenomena |
Country Status (8)
Country | Link |
---|---|
US (1) | US6741295B2 (en) |
EP (2) | EP1164784A1 (en) |
JP (1) | JP2004503959A (en) |
KR (1) | KR20020029100A (en) |
CN (1) | CN1197349C (en) |
AT (1) | ATE281040T1 (en) |
DE (1) | DE60106761T2 (en) |
WO (1) | WO2001097508A1 (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100393219B1 (en) * | 2001-03-13 | 2003-07-31 | 삼성전자주식회사 | Automatic beam limiter circuit |
JP3874658B2 (en) * | 2001-12-12 | 2007-01-31 | 三星エスディアイ株式会社 | Contrast correction circuit |
JP2004032551A (en) * | 2002-06-27 | 2004-01-29 | Seiko Epson Corp | Image processing method, image processor, and projector |
JP3844075B2 (en) * | 2003-01-17 | 2006-11-08 | セイコーエプソン株式会社 | Image processing system, projector, program, information storage medium, and image processing method |
JP3871061B2 (en) * | 2003-03-25 | 2007-01-24 | セイコーエプソン株式会社 | Image processing system, projector, program, information storage medium, and image processing method |
US8000554B2 (en) * | 2007-04-04 | 2011-08-16 | Xerox Corporation | Automatic dynamic range adjustment in digital imaging |
TWI390483B (en) * | 2007-04-27 | 2013-03-21 | Realtek Semiconductor Corp | Apparatus and method for contrast control |
US8537175B1 (en) * | 2009-05-07 | 2013-09-17 | Google Inc. | Video enhancement for large scale applications |
JP5561524B2 (en) * | 2010-03-19 | 2014-07-30 | ソニー株式会社 | Image processing apparatus and method, and program |
JP5637383B2 (en) * | 2010-12-15 | 2014-12-10 | ソニー株式会社 | Image processing apparatus, image processing method, and program |
JP2013041400A (en) * | 2011-08-15 | 2013-02-28 | Sony Corp | Image processing device, image processing method and program |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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EP0516083A2 (en) * | 1991-05-28 | 1992-12-02 | Matsushita Electric Industrial Co., Ltd. | Gradation corrector |
EP0569018A1 (en) * | 1992-05-08 | 1993-11-10 | Matsushita Electric Industrial Co., Ltd. | Gradation correcting apparatus |
EP0613294A1 (en) * | 1993-02-24 | 1994-08-31 | Matsushita Electric Industrial Co., Ltd. | Gradation correction device and image sensing device therewith |
EP0772158A2 (en) * | 1995-10-30 | 1997-05-07 | Hewlett-Packard Company | Image processing system |
Family Cites Families (14)
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FR2406359A1 (en) * | 1977-10-11 | 1979-05-11 | Thomson Csf | IMAGE PROCESSING METHOD AND DEVICE FOR DISPLAY SYSTEM AND DISPLAY SYSTEM INCLUDING SUCH A DEVICE |
KR0136382B1 (en) | 1988-08-11 | 1998-04-27 | Sanyo Electric Co | Circuitry for preventing doming phenomenon in a television and the method thereof |
JPH0785573B2 (en) * | 1988-08-11 | 1995-09-13 | 三洋電機株式会社 | Doming prevention circuit for color television receiver |
US5289282A (en) * | 1991-05-28 | 1994-02-22 | Matsushita Electric Industrial Co., Ltd. | Video signal gradation corrector |
JP3019479B2 (en) | 1991-06-28 | 2000-03-13 | 松下電器産業株式会社 | Gradation correction device |
JP3016652B2 (en) * | 1992-02-07 | 2000-03-06 | 松下電器産業株式会社 | Gain control circuit |
FI104521B (en) * | 1997-01-30 | 2000-02-15 | Nokia Multimedia Network Termi | Procedure for improving contrast in image sequences |
US6373533B1 (en) * | 1997-03-06 | 2002-04-16 | Matsushita Electric Industrial Co., Ltd. | Image quality correction circuit for video signals |
US6038341A (en) * | 1997-03-06 | 2000-03-14 | Matsushita Electric Industrial Co., Ltd. | Histogram operating unit for video signals |
JP2951910B2 (en) * | 1997-03-18 | 1999-09-20 | 松下電器産業株式会社 | Gradation correction device and gradation correction method for imaging device |
JPH10304275A (en) * | 1997-04-25 | 1998-11-13 | Matsushita Electric Ind Co Ltd | Television receiver |
KR100243301B1 (en) * | 1997-11-24 | 2000-02-01 | 윤종용 | Apparatus and method for expanding dynamic range |
JP2000125225A (en) * | 1998-10-15 | 2000-04-28 | Matsushita Electric Ind Co Ltd | Luminance correction device |
US6504954B1 (en) * | 1999-02-05 | 2003-01-07 | Raytheon Company | Closed loop piecewise-linear histogram specification method and apparatus |
-
2000
- 2000-06-13 EP EP00202057A patent/EP1164784A1/en not_active Withdrawn
-
2001
- 2001-05-15 CN CNB018017223A patent/CN1197349C/en not_active Expired - Fee Related
- 2001-05-15 JP JP2002511101A patent/JP2004503959A/en active Pending
- 2001-05-15 WO PCT/EP2001/005574 patent/WO2001097508A1/en active IP Right Grant
- 2001-05-15 AT AT01984024T patent/ATE281040T1/en not_active IP Right Cessation
- 2001-05-15 EP EP01984024A patent/EP1295468B1/en not_active Expired - Lifetime
- 2001-05-15 KR KR1020027001856A patent/KR20020029100A/en not_active Application Discontinuation
- 2001-05-15 DE DE60106761T patent/DE60106761T2/en not_active Expired - Lifetime
- 2001-06-11 US US09/878,682 patent/US6741295B2/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0516083A2 (en) * | 1991-05-28 | 1992-12-02 | Matsushita Electric Industrial Co., Ltd. | Gradation corrector |
EP0569018A1 (en) * | 1992-05-08 | 1993-11-10 | Matsushita Electric Industrial Co., Ltd. | Gradation correcting apparatus |
EP0613294A1 (en) * | 1993-02-24 | 1994-08-31 | Matsushita Electric Industrial Co., Ltd. | Gradation correction device and image sensing device therewith |
EP0772158A2 (en) * | 1995-10-30 | 1997-05-07 | Hewlett-Packard Company | Image processing system |
Also Published As
Publication number | Publication date |
---|---|
CN1383672A (en) | 2002-12-04 |
EP1164784A1 (en) | 2001-12-19 |
DE60106761D1 (en) | 2004-12-02 |
US6741295B2 (en) | 2004-05-25 |
JP2004503959A (en) | 2004-02-05 |
US20020057388A1 (en) | 2002-05-16 |
ATE281040T1 (en) | 2004-11-15 |
KR20020029100A (en) | 2002-04-17 |
EP1295468B1 (en) | 2004-10-27 |
EP1295468A1 (en) | 2003-03-26 |
CN1197349C (en) | 2005-04-13 |
DE60106761T2 (en) | 2005-10-27 |
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