WO2001080285A2 - Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits - Google Patents
Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits Download PDFInfo
- Publication number
- WO2001080285A2 WO2001080285A2 PCT/US2001/011996 US0111996W WO0180285A2 WO 2001080285 A2 WO2001080285 A2 WO 2001080285A2 US 0111996 W US0111996 W US 0111996W WO 0180285 A2 WO0180285 A2 WO 0180285A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- contact pads
- substrate
- emitter
- detector devices
- devices
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
- H01S5/0262—Photo-diodes, e.g. transceiver devices, bidirectional devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
- H01S5/0207—Substrates having a special shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
- H01S5/0213—Sapphire, quartz or diamond based substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
- H01S5/0215—Bonding to the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
- H01S5/0215—Bonding to the substrate
- H01S5/0216—Bonding to the substrate using an intermediate compound, e.g. a glue or solder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/022—Mountings; Housings
- H01S5/0235—Method for mounting laser chips
- H01S5/02355—Fixing laser chips on mounts
- H01S5/0237—Fixing laser chips on mounts by soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18386—Details of the emission surface for influencing the near- or far-field, e.g. a grating on the surface
- H01S5/18388—Lenses
Definitions
- Optical interconnect technology has been successfully implemented in long distance telecommunications, in local area network communication systems, in computer-to- computer, and board-to-board interconnections.
- the complexity and speed of integrated circuit devices such as microprocessors continue to increase at a very high rate.
- I O input and output
- the current technologies of integrating large arrays of opto-electronic devices with integrated circuit devices require bottom emitting/detecting of a light beam, and these methodologies are generally not scalable for a wafer-scale fabrication and/or integration of both emitters and detectors.
- a method of packaging an opto-electronic integrated circuit device includes forming top emitter/detector devices on a substrate such that the top emitter/detector devices have top contact pads on a top side of the top emitter/detector devices, wherein the top side is disposed across from the substrate, and further the substrate has a bottom side that is across from the top side of the top emitter/detector devices.
- An optically transparent superstrate is attached onto the top side of the top emitter/detector devices such that the optically transparent superstrate having a top surface across from the top side of the top emitter/detector devices.
- the top contact pads are exposed on the bottom side of the substrate.
- the bottom contact pads are formed on the bottom side and the bottom contact pads are connected to the top contact pads to bring the top contact pads to the bottom side.
- the bottom side contact pads are bonded with matching pads of an integrated circuit device to form an opto-electronic integrated circuit device having a high density optical I/O on an integrated circuit device.
- Figure 1 is a sectional view of one embodiment of the packaging technique of a device packaged according to the invention.
- Figure 2. is a flow diagram of an illustrative method of packaging a device according to the invention. Detailed Description
- top emitter device is understood to refer to a vertical cavity surface emitting laser (NCSEL) or similar device that emits light away from a substrate
- the top detector device refers to a metal-semiconductor-metal photodetector (PD) or similar device.
- top side refers to a growing side of the top emitter/detector devices on a substrate
- bottom side refers to a side on the substrate that is across from the top side.
- Opto-electronic device refers to a substrate including top emitter/detector devices on a top side, and further including a transparent superstrate on the top emitter/detector devices.
- Top emitter/detector refers to devices emitting and detecting light from the top side of the top emitter/detector devices.
- the term superstrate refers to a wafer of optically transparent material disposed on a semiconductor substrate including a plurality of top emitter and top detector devices.
- top surface refers to a surface on the transparent superstrate that is across from the top side, and bottom surface is referred to the exposed top emitter/detector devices and the bottom surface is also understood to be disposed across from the top surface.
- FIG. 1 is a front sectional view, illustrating generally, by way of example, but not by way of limitation, one embodiment of packaging an opto-electronic integrated circuit device 100 according to the present invention. This is accomplished in this embodiment by forming top emitter/detector devices on a thinned substrate 110 such that the top emitter/detector devices have a top side 117 across from the thinned substrate 110. In this embodiment the thinned substrate has a bottom side 115 across from the top side 117. Top emitter/detector devices 110 emit and detect light away from the thinned substrate 110. Top emitter/detector devices have top contact pads 113 on the top side 117.
- the thinned substrate is a wafer of gallium arsenide.
- the wafer of gallium arsenide includes plurality of top emitter/detector devices.
- the top emitter device is a vertical cavity surface emitting laser (NCSEL) device capable of emitting light away from a planar surface of the substrate
- the top detector device is a metal-semiconductor- metal photodetector device.
- the top emitter/detector devices on the thinned substrate 110 are capable of emitting and detecting a light of 850 nanometers wavelength.
- An optically transparent superstrate 120 is attached to the top side 117 of the top emitter/detector devices on the thinned substrate 110 such that the optically transparent superstrate 120 is across from the bottom side 115.
- the optically transparent superstrate has a top surface 125 across from the top side 117.
- the optically transparent superstrate 120 is made from a wafer of sapphire in this example.
- the optically transparent superstrate is a wafer of glass.
- the materials of optically transparent superstrate 120 and the top emitter/detector devices on thinned superstrate 110 have similar thermal properties so that they can withstand rapid thermal cycling introduced during subsequent processing and packaging.
- the optically transparent superstrate 120 can be bonded to the top emitter/detector devices 110.
- the bonding adhesive also has thermal properties similar to that of the optically transparent superstrate and the top emitter/detector devices.
- the optically transparent superstrate 120 is transparent to a light of 850 nanometers wavelength. The thickness of the optically transparent superstrate 120 is sufficient to impart mechanical strength to the thinned substrate including the top emitter/detector devices 110.
- the opto-electronic integrated circuit device 100 can further include micro-optic devices 130 attached to the top surface 125 of the optically transparent superstrate 120.
- the micro-optic devices 130 are aligned with the top emitter/detector devices 110 to provide an optical processing capability to the top emitter/detector devices on the thinned substrate 110.
- the optical processing includes beam shaping for the top emitter/detector devices 110.
- the top side contact pads of the top emitter/detector devices 110 are brought to the bottom side contact pads by a through-the-via metal layer 122.
- An integrated circuit device 150 is attached to the top emitter/detector devices 110.
- the bottom side contact pads 140 of the top emitter/detector devices on the thinned substrate 110 can be bump bonded, using solder balls 160, to matching pads 124 of the integrated circuit device 150 to provide a high capacity optical I O capability to the integrated circuit device 150.
- Figure 2. is a flow diagram illustrating generally one embodiment of a method 200 of packaging an opto-electronic device having a high density I/O capability to an electronic integrated circuit device.
- Method 200 includes forming top emitter/detector devices on a top side of a substrate, block 210.
- the top emitter/detector devices have top contact pads on the top side.
- the substrate includes a back side that is across from the top side.
- the top emitter/detector devices further includes an etch stop layer on the top side.
- the top emitter device includes a NCSEL capable of emitting light away from the substrate, and the top detector includes a metal-semiconductor-metal PD.
- Forming of the top emitter/detector devices on the substrate comprises forming 2-dimensional arrays of NCSEL/PD devices on a wafer, which can be of gallium arsenide.
- the top emitter/detector devices can have a pitch of 50 micrometers or less, and the wafer of gallium arsenide can be about 625 microns in thickness.
- the top emitter/detector devices on the substrate can be tested and qualified at this point if desired.
- the next step 220 in the process is attaching an optically transparent superstrate 120 onto the top side of the top emitter/detector devices such that the optically transparent superstrate has a top surface across from the top side of the substrate 220.
- the optically transparent superstrate can be made from a material transparent to the light of 850 nanometers wavelength, such as sapphire or glass.
- the optically transparent superstrate is of sufficient thickness to provide mechanical support to the exposed top emitter/detector devices.
- the optically transparent superstrate and the top emitter/detector devices can be made of materials having similar thermal properties, to withstand thermal cycling introduced during subsequent processing and packaging.
- the next step 230 in the process is exposing the top contact pads to the bottom side 240.
- This step can be achieved by thinning the substrate from the back side of the substrate such that the top contact pads are exposed to the bottom side.
- the thinning step can also include forming via in the substrate from the thinned bottom side to expose the top contact pads to the bottom side.
- a via can be formed by chemically etching the bottom side of the thinned substrate to the etch stop layer, to expose the top contact pads to the bottom side.
- the forming the via comprises mechanically drilling the bottom side of the thinned substrate to expose the top contact pads to the bottom side.
- Thinning can be by mechanically lapping the bottom side of the gallium arsenide substrate to a thickness of about 50 microns.
- the exposing step can also include removing the substrate to expose the top contact pads to the bottom side.
- Step 240 in the process includes forming bottom contact pads on the bottom side.
- the next step 250 includes connecting the bottom contact pads with the top contact pads to bring the top contact pads to the bottom side to form an opto-electronic device. This can be done by plating the bottom contact pads to bring the top contact pads to the bottom side.
- Plating en include forming through-the-via metal to bring the top contact pads to the bottom side. This has an advantage in that the back side contact pads and matching pads of an integrated circuit device would be in the same plane, making it easy to further bond the opto-electronic device to the integrated circuit device and to provide the capability of having a high density DO to the integrated circuit device.
- Step 260 in the process involves integrating a wafer of micro-optic devices 130 onto the top surface of the optically transparent superstrate 120 such that the micro-optic devices are aligned with corresponding top emitter/detector devices 260 to provide an optical processing capability to them.
- Optical processing can include, for example, beam shaping, focusing a light beam, filtering the light beam, and tilting the light beam.
- the wafer of micro-optic devices can be fabricated on a separate substrate, then tested and qualified before integrating it onto the opto-electronic devices.
- the wafer of micro-optic devices can be bonded to the top surface of the optically transparent superstrate.
- Step 270 in the process bonds the opto-electronic devices to the integrated circuit.
- This can include dicing the opto-electronic devices including the micro-optic devices, to produce opto-electronic chips. Then the back side contact pads of the opto-electronic chips are bump bonded with matching pads of an integrated circuit device to produce an optoelectronic integrated circuit device having a high density optical I/O on an integrated circuit device.
- the above described method provides, among other things, an integrated circuit device having a high O capacity in an optical domain.
- the high I/O capacity is accomplished by forming top emitter/detector devices on a top side of a substrate, wherein the substrate has a bottom side across from the top side.
- the top emitter/detector devices emit and detect light on the top side.
- the top emitter/detector have top contact pads on the top side. The top contact pads are brought to the back side by connecting the top contact pads with bottom contact pads.
- An optically transparent superstrate is attached to the top side of the top emitter/detector devices such that the optically transparent superstrate is across from the bottom side and the optically transparent superstrate has a top surface across from the top side forming an opto-electronic device.
- Micro-optic devices can be attached to the top surface of the transparent substrate such that the micro-optic devices provide optical processing capability.
- an integrated circuit device is attached to the bottom side of the substrate such that the bottom contact pads are in contact with matching pads of the integrated circuit device to form an opto-electronic integrated circuit device having a high I/O capacity.
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
- Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
- Led Device Packages (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
- Inspection Of Paper Currency And Valuable Securities (AREA)
Abstract
Description
Claims
Priority Applications (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BR0110006-8A BR0110006A (en) | 2000-04-12 | 2001-04-12 | Packaging method of optoelectronic devices, optoelectronic device and integrated circuit optoelectronic device |
IL15226501A IL152265A0 (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
KR1020027013741A KR20020089459A (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
MXPA02010112A MXPA02010112A (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits. |
JP2001577584A JP2003531486A (en) | 2000-04-12 | 2001-04-12 | Top-illuminated optoelectronic device integrated with micro-optics and electronic integrated circuits |
AU2001257028A AU2001257028A1 (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
PL01357818A PL357818A1 (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
HU0300608A HUP0300608A2 (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
CA002405859A CA2405859A1 (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
EP01930497A EP1273079A2 (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/547,538 US6780661B1 (en) | 2000-04-12 | 2000-04-12 | Integration of top-emitting and top-illuminated optoelectronic devices with micro-optic and electronic integrated circuits |
US09/547,538 | 2000-04-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001080285A2 true WO2001080285A2 (en) | 2001-10-25 |
WO2001080285A3 WO2001080285A3 (en) | 2002-02-07 |
Family
ID=24185045
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/011996 WO2001080285A2 (en) | 2000-04-12 | 2001-04-12 | Top illuminated opto-electronic devices integrated with micro-optics and electronic integrated circuits |
Country Status (14)
Country | Link |
---|---|
US (3) | US6780661B1 (en) |
EP (1) | EP1273079A2 (en) |
JP (1) | JP2003531486A (en) |
KR (1) | KR20020089459A (en) |
CN (1) | CN1436387A (en) |
AU (1) | AU2001257028A1 (en) |
BR (1) | BR0110006A (en) |
CA (1) | CA2405859A1 (en) |
CZ (1) | CZ20023727A3 (en) |
HU (1) | HUP0300608A2 (en) |
IL (1) | IL152265A0 (en) |
MX (1) | MXPA02010112A (en) |
PL (1) | PL357818A1 (en) |
WO (1) | WO2001080285A2 (en) |
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US6780661B1 (en) * | 2000-04-12 | 2004-08-24 | Finisar Corporation | Integration of top-emitting and top-illuminated optoelectronic devices with micro-optic and electronic integrated circuits |
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2000
- 2000-04-12 US US09/547,538 patent/US6780661B1/en not_active Expired - Fee Related
- 2000-11-28 US US09/724,249 patent/US6586776B1/en not_active Expired - Lifetime
-
2001
- 2001-04-12 WO PCT/US2001/011996 patent/WO2001080285A2/en not_active Application Discontinuation
- 2001-04-12 PL PL01357818A patent/PL357818A1/en unknown
- 2001-04-12 CZ CZ20023727A patent/CZ20023727A3/en unknown
- 2001-04-12 HU HU0300608A patent/HUP0300608A2/en unknown
- 2001-04-12 AU AU2001257028A patent/AU2001257028A1/en not_active Abandoned
- 2001-04-12 EP EP01930497A patent/EP1273079A2/en not_active Withdrawn
- 2001-04-12 KR KR1020027013741A patent/KR20020089459A/en not_active Application Discontinuation
- 2001-04-12 CA CA002405859A patent/CA2405859A1/en not_active Abandoned
- 2001-04-12 JP JP2001577584A patent/JP2003531486A/en not_active Withdrawn
- 2001-04-12 IL IL15226501A patent/IL152265A0/en unknown
- 2001-04-12 BR BR0110006-8A patent/BR0110006A/en not_active Application Discontinuation
- 2001-04-12 MX MXPA02010112A patent/MXPA02010112A/en unknown
- 2001-04-12 CN CN01811055A patent/CN1436387A/en active Pending
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2002
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Cited By (7)
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WO2003019653A2 (en) * | 2001-08-24 | 2003-03-06 | Schott Glas | Method for producing contacts and printed circuit packages |
WO2003019653A3 (en) * | 2001-08-24 | 2003-11-20 | Schott Glas | Method for producing contacts and printed circuit packages |
US7700957B2 (en) | 2001-08-24 | 2010-04-20 | Schott Ag | Process for making contact with and housing integrated circuits |
US7821106B2 (en) | 2001-08-24 | 2010-10-26 | Schott Ag | Process for making contact with and housing integrated circuits |
US7880179B2 (en) | 2001-08-24 | 2011-02-01 | Wafer-Level Packaging Portfolio Llc | Process for making contact with and housing integrated circuits |
US8349707B2 (en) | 2001-08-24 | 2013-01-08 | Wafer-Level Packaging Portfolio Llc | Process for making contact with and housing integrated circuits |
EP2302327B1 (en) * | 2009-09-25 | 2020-02-26 | Nxp B.V. | Sensor |
Also Published As
Publication number | Publication date |
---|---|
EP1273079A2 (en) | 2003-01-08 |
US6780661B1 (en) | 2004-08-24 |
PL357818A1 (en) | 2004-07-26 |
KR20020089459A (en) | 2002-11-29 |
US6586776B1 (en) | 2003-07-01 |
IL152265A0 (en) | 2003-05-29 |
US20030089902A1 (en) | 2003-05-15 |
CA2405859A1 (en) | 2001-10-25 |
CN1436387A (en) | 2003-08-13 |
BR0110006A (en) | 2004-03-09 |
CZ20023727A3 (en) | 2003-04-16 |
MXPA02010112A (en) | 2003-03-10 |
HUP0300608A2 (en) | 2003-07-28 |
US6998646B2 (en) | 2006-02-14 |
JP2003531486A (en) | 2003-10-21 |
AU2001257028A1 (en) | 2001-10-30 |
WO2001080285A3 (en) | 2002-02-07 |
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