WO2001041386A1

WO2001041386A1 - Method and apparatus for rotating the phase of a complex psk signal

Info

Publication number: WO2001041386A1
Application number: PCT/US2000/032518
Authority: WO
Inventors: Mohammad Jafar Mohseni; Brian Butler; Deepu John; Haitao Zhang
Original assignee: Qualcomm Incorporated
Priority date: 1999-11-30
Filing date: 2000-11-29
Publication date: 2001-06-07
Also published as: JP2012060663A; KR100745859B1; JP2003517759A; JP5852172B2; JP5575729B2; KR20020068359A; WO2001041386A8; EP1245102A1; US6535562B1; CN1402925A; AU1933201A; JP2014209735A

Abstract

In applications employing phase-shift keying modulation, a phase rotator (200, 202) as disclosed herein is used to rotate the constellation of signal vectors before carrier modulation in order to maximize modulator output power. Such a rotator (200, 202) may be applied in the digital domain (to complex signals having either binary-valued or multi-valued components) or in the analog domain.

Description

METHOD AND APPARATUS FOR ROTATING THE PHASE OF A COMPLEX PSK SIGNAL

BACKGROUND OF THE INVENTION

I. Field of the Invention

This invention relates to signal processing. More specifically, this

invention relates to signal processing as applied to wireless communications.

II. Description of Related Art and General Background

Spread spectrum communication techniques offer robustness to noise,

low transmission power, and a low probability of intercept. For such reasons,

much of the early development of spread spectrum technology was performed

by military researchers. Recently, however, the advantages of this technology

have led to its increasing use for consumer applications as well: most notably,

in advanced digital cellular telephone systems.

Communication systems that support multiple individual signals over a

single channel must employ some technique to make the various signals

distinguishable at the receiver. In time-division multiple-access (TDMA)

systems, the individual signals are time-compressed and transmitted in

nonoverlapping intervals such that they are orthogonal (and thus separable) in

time space. In frequency-division multiple-access (FDMA) systems, the signals

are bandlimited and transmitted in nonoverlapping subchannels such that they

are orthogonal in frequency space. In code-division multiple-access (CDMA)

systems, the signals are spread through modulation by orthogonal code

sequences such that they are orthogonal in code space and may be transmitted across the same channel at the same time while remaining distinguishable from

each other at the receiver.

Whereas most other communication techniques modulate a carrier signal

with one or more data signals alone, spread spectrum techniques also modulate

the carrier with a pseudorandom noise or 'pseudonoise' (PN) signal. These PN

signals are selected to have minimal cross-correlation, and their properties and

generation are discussed in more detail in, e.g., Modern Communication

Systems: Principles and Applications, Leon W. Couch III, Prentice Hall, 1995,

pp. 381-83, and chapter 2 of CDMA: Principles of Spread Spectrum

Communication, Andrew J. Niterbi, Addison-Wesley, 1995. In the frequency-

hopping variant of spread spectrum systems, the value of the PΝ signal at a

particular instant determines the frequency of the transmitted signal, and thus

the spectrum of the signal is spread. In the direct sequence spread spectrum

(DSSS) variant, the bit rate of the PΝ signal (called the 'chip rate') is chosen to

be higher than the bit rate of the information signal, such that when the carrier

is modulated by both signals, its spectrum is spread.

In a CDMA DSSS system, then, each individual signal is modulated by a

data signal and a pseudonoise (PΝ) signal of predetermined period that is at

least nearly orthogonal to the PΝ signals assigned to all other users, thus

spreading the spectrum of the signal while rendering it distinguishable from the

other users' signals. Before spreading and modulation onto the carrier, the data

signal typically undergoes various encoding and interleaving operations

designed, for example, to increase data redundancy and allow error correction

at the receiver. The data signals may also be encrypted to provide extra security against eavesdroppers. The generation of CDMA signals in a spread

spectrum communications system is disclosed in U.S. Patent No. 5,103,459,

issued April 7, 1992, entitled "SYSTEM AND METHOD FOR GENERATING

SIGNAL WAVEFORMS IN A CDMA CELLULAR TELEPHONE SYSTEM," and

assigned to the assignee of the present invention.

Various schemes exist for modulating baseband data signals onto RF

carriers. These schemes typically operate by varying the amplitude, phase,

and /or frequency of one or both of the in-phase (I) and quadrature (Q)

components of the carrier according to the data symbol to be transmitted at any

particular instant. For example, CDMA DSSS systems commonly use a variant

of phase-shift keying (PSK), in which the phase states in the carrier components

correspond to data symbols being transferred. Phase-shift keying modulation

may also be used in many non-CDMA and non-DSSS applications as well.

In one example of a system using binary PSK (BPSK) modulation, a

transition of the carrier from a base phase state (defining a phase of zero) to a

second phase state which is different by 180 degrees (i.e. a phase shift of π

radians away from zero) may be designated to indicate a transition from a data

symbol 0 to a data symbol 1. The converse phase shift of π radians back to zero

would then be designated to indicate a transition from a data symbol 1 to a data

symbol 0. Between these transitions, the phase of the carrier indicates whether

a data symbol 0 is being transmitted (phase of zero) or a data symbol 1 instead

(phase of π radians).

An improved ratio of data rate to bandwidth may be obtained by using

quadrature PSK (QPSK) modulation, in which the data symbols are encoded into 180-degree shifts in both the I and Q components. This scheme results in a

maximum carrier phase shift of 180 degrees at every symbol transition. A

variant of QPSK called offset QPSK (OQPSK) staggers the symbol transitions

across the I and Q components in time, thereby reducing the maximum

instantaneous phase shift in the carrier to 90 degrees. The above-mentioned

and other variants of PSK modulation are well known in the art.

SUMMARY OF THE INVENTION

An apparatus is described which receives a complex signal having a

phase and outputs another complex signal having a phase. Each of these

complex signals has a first and a second component. The first component of the

output signal is a difference of the components of the input signal, the second

component of the output signal is a sum of the components of the input signal,

and a phase angle of the output signal is rotated as compared to a phase angle

of the input signal.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of an OQPSK spreading modulator.

FIG. 2 is a block diagram of a complex multiplier.

FIG. 3 shows an example of the output space of an complex analog signal

produced by a pair of DACs.

FIG. 4 is a block diagram of a quadrature modulator.

FIG. 5 is a circuit diagram of a complex multiplier for receiving binary

inputs.

FIG. 6A shows a constellation for a complex data signal. FIG. 6B shows the constellation of the signal of FIG. 6A after passing

through the complex multiplier according to FIG. 5.

FIG. 7 is a circuit diagram of a phase rotator according to a first

embodiment of the invention.

FIG. 8 is a block diagram of an QPSK spreading modulator for receiving

binary inputs that includes a phase rotator according to a second embodiment

of the invention.

FIG. 9A shows a constellation for a complex analog signal.

FIG. 9B shows a constellation for a complex analog signal produced from

a rotated signal.

FIG. 10 is a flow chart describing the operation of a phase rotator

according to a second embodiment of the invention.

FIG. 11 is a circuit diagram of a phase rotator according to the second

embodiment of the invention.

FIG. 12 is a block diagram of an OQPSK spreading modulator including

a phase rotator according to an embodiment of the invention.

FIG. 12A shows a constellation for a complex analog signal produced

from an input signal.

FIG. 12B shows a constellation for a complex analog signal produced

from an input signal having an amplitude (V2)/2 times the amplitude of the

input signal of FIG. 10 A.

FIG. 12C shows a constellation for a complex analog signal produced

from a rotation of the input signal of FIG. 10B. FIG. 13 shows an example of the output space of a complex analog signal

produced by a pair of DACs.

FIG. 14 is a block diagram of an alternate arrangement for an OQPSK

spreading modulator including a phase rotator according to an embodiment of

the invention.

FIG. 15 is a block diagram of an OQPSK spreading modulator including

a phase rotator according to an embodiment of the invention applied in the

analog domain.

FIG. 16 is a circuit diagram of a phase rotator according to a third

embodiment of the invention.

FIG. 17 is a circuit diagram of a phase rotator according to a fourth

embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 shows a block diagram of an OQPSK spreading modulator

suitable for a DSSS transmitter such as a CDMA cellular telephone. In this

example, data signals 10a and 10b are digital signals that represent two real-

valued components of a complex data signal (e.g. the real and imaginary

components), PN codes 20a and 20b are digital signals that represent two real-

valued components of a complex spreading signal of predetermined period

(e.g. the real and imaginary components), and each of these four digital input

signals comprises one or more binary-valued signal lines (i.e. each signal line

carries the value 0 or 1 at any given instant).

Complex multiplier 100 receives the two complex signals described

above and produces a complex product signal having real components 30a and 30b. FIG. 2 shows a block diagram of a circuit suitable for complex multiplier

100 which comprises four real multipliers 200a-d and two real adders 210a and

210b. The output signals 30a and 30b of this circuit may be expressed

respectively as

I product 30a = (I data 10a x I PN code 20a) - (Q data 10b x Q PN code 20b),

(la)

Q product 30b = (I data 10a x Q PN code 20b) + (Q data 10b x I PN code 20a).

(lb)

Consequently, the complex product signal outputted by complex multiplier 100

may be expressed in complex notation as

complex product = I product 30a + (j x Q product 30b),

where j is the square root of -1, or in phasor notation as

complex product = A Z φ,

where

A = /((I product 30a)² + (Q product 30b)²)

is the magnitude and

φ = tan^-1 (Q product 30b / I product 30a)

is the phase angle of the complex product.

Gain factors may also be used in some applications. For example, one

gain factor may be applied to the I component inputted to the complex

multiplier while a different gain factor is applied to the Q input component. In

other implementations, the same gain factor may be applied to each input

component, or gain factors may be applied to the output components instead. If OQPSK modulation is desired, a delay may be inserted into one of the

digital signal paths. For example, FIG. 1 shows how an offset delay block 110

may be inserted into the path of Q product signal 30b for this purpose. If no

such offset is desired (i.e. if QPSK modulation is desired), offset delay block 110

may be omitted (i.e. short-circuited).

Filtering of the signals (e.g. for spectral or pulse shaping) may also be

performed along one or more of the analog and digital signal paths. For

example, baseband filters 115a and 115b may be used to filter the digital

baseband signals inputted to DACs 120a and 120b, respectively, as shown in

FIG. 1.

Digital-to-analog converters (DACs) 120a and 120b each receive one

component of the complex digital signal to be transmitted and output a

corresponding analog signal component, wherein the amplitude of the

outputted analog signal component (signal 50a or 50b in FIG. 1) corresponds to

the value of the inputted digital signal component (signal 30a or 30b,

respectively, in FIG. 1). In one example, the output range of each DAC 120 has

2ⁿ steps of equal magnitude, with the maximum and minimum values of the

inputted digital signal being mapped to the output analog values which are R-1

steps above and R steps below DC, respectively (where n is the width of the

inputted digital signal in bits and R is equal to 2ⁿ/2). FIG. 3 shows the output

space of the complex analog signal produced by DACs 120a and 120b for this

example, where the output of DAC 120a is mapped to the I axis, the output of

DAC 120b is mapped to the Q axis, and dotted line 250 represents the limits of

this space in the complex plane. Note that any suitable input-output mapping may be used - for example, the minimum and maximum values of the digital

input may be mapped to the analog values 0 and 2ⁿ-l instead - so long as any

DC offset is removed or compensated as necessary. Similarly, the relation

among the magnitudes of the steps in the output range of one or both DACs

may follow a linear, logarithmic or some other form of progression instead of a

uniform one as described above.

Analog signal components 50a and 50b are modulated onto an RF carrier

in RF modulator 130 to produce modulated carrier 60. FIG. 4 shows a block

diagram of a circuit suitable for RF modulator 130 which comprises carrier

oscillator 160, mixers 140a and 140b, 90-degree phase shifter 150, and adder 170.

In this example, modulated carrier 60 may be expressed as

modulated carrier 60 =

(I analog signal 50a x cos ω_ct) + (Q analog signal 50b x sin ω_ct), (2)

where ω_c represents the angular frequency of the carrier signal produced by

oscillator 160 (in radians /s) and t represents time (in s)

For the particular case where the input signals 10a, 10b, 20a, and 20b are

all binary-valued (here labeled 12a, 12b, 22a, 22b, respectively), the modulator

of FIG. 5 includes a circuit diagram for a suitable implementation 102 of

complex multiplier 100 wherein the values 0 and 1 of the input signals represent

the analog values +1 and -1, respectively (i.e. each input signal represents a

polar nonreturn- to-zero or NRZ symbol stream). This implementation of a

complex multiplier comprises four XOR gates 220a-d and two four-to-one two-

bit-wide multiplexers 230a and 230b. At the output of the multiplier 102, the

possible values of the two-bit-wide digital product signals 32a and 32b (corresponding to signals 30a and 30b, respectively) are 00, 01, 11 which

represent the analog values 0, +1, and -1, respectively. TABLE 1 shows the

possible values of input signals 12a, 12b, 22a, and 22b and the corresponding

values of product signals 32a and 32b, along with the analog values (in

parentheses) which these signals represent. Expressions describing the product

signals 32a and 32b may be obtained by modifying expressions (la) and (lb)

above to include a constant gain factor of 0.5:

I product 32a = 0.5 x [(I data 12a x I PN code 22a) - (Q data 12b x Q PN code

22b)],

Q product 32b = 0.5 x [(I data 12a x Q PN code 22b) + (Q data 12b x I PN code

22a)].

TABLE 1.

FIG. 6A shows the constellation of possible signal vectors in the complex

signals represented by input signal component pairs 12a and 12b and 22a and

22b, wherein each signal vector is represented by one among the points P1D,

P3D, P5D, and P7D. FIG. 6B shows the constellation of possible signal vectors

in the complex signal represented by product signals 32a and 32b, wherein each

signal vector is represented by one among the points P2D, P4D, P6D, and P8D.

By comparing these two figures, it may be seen that one effect of the complex

multiplication is to rotate the constellation by 45 degrees. FIG. 9A shows the

constellation of possible signal vectors in the complex signal comprising analog

signal components 52a and 52b as produced by DACs 120a and 120b,

respectively, in response to digital input signals 32a and 32b (in this example,

we assume that DACs 120a and 120b map the digital input values +1 and -1 to

the analog output values (R-1) and -(R-1), respectively, without distortion).

As shown in FIG. 7, a phase rotator 200 according to a first embodiment

of the invention receives two input signals 310a and 310b, which are real-valued

components of a complex input signal (e.g. signal 310a represents the real

component and signal 310b represents the imaginary component, or vice versa).

Adders 210a and 210b are arranged such that one real component 320a of a

complex output signal is the difference of the input signal components 310a and

310b, and another real component 320b of the complex output signal is the sum

of the signals 310a and 310b. If we label the input signals 310a and 310b as I

and Q, respectively, then the output signals 320a and 320b may be expressed as

output signal 320a = I -Q,

output signal 320b = I + Q. By applying the well-known formula for the angle θ between two vectors A and

B,

θ = cos^"1 [(A • B) / ( I A I I B I )],

where <•> indicates the vector dot product and < I ^• I > indicates the vector

norm, we find that the angle α between the complex input signal having

components 310a and 310b and the complex output signal having components

320a and 320b is

_, V2 π , o = cos — = — rad = 45 .

2 4

FIG. 8 shows a modified version of the modulator illustrated in FIG. 5,

wherein a phase rotator 202 according to a second embodiment of the invention

receives the complex product signal from complex multiplier 102 (comprising

components 32a and 32b) and outputs a complex rotated product signal

(comprising components 32ar and 32br) to DACs 120a and 120b. FIG. 9B shows

the constellation of possible signal vectors in the complex signal comprising

analog signal components 54a and 54b as produced by DACs 120a and 120b,

respectively, in response to digital input signals 32ar and 32br (with the same

mapping as in the description of FIG. 9A above).

By comparing FIGs. 9A and 9B, one of ordinary skill in the art will

recognize that because the average power of a bandpass waveform is

proportional to the square of the magnitude of the signal vector, the average

power of modulated carrier 64 in FIG. 9B will be twice the average power of

modulated carrier 62 in FIG. 9A. Note that the constellation of FIG. 9B is similar

to the constellation of FIG. 6 A, which shows the possible signal vectors of the data signals 12a and 12b and the PN codes 22a and 22b before complex

multiplication. In compensating for the rotation caused by the complex

multiplication operation, therefore, application of the phase rotator has

increased the power of the resulting modulated carrier by a factor of two. FIG.

10 shows one example of how phase rotator 202 according to the second

embodiment of the invention may be implemented via the logical operations of

a test P340 and mapping functions P350 and P360 performed on the ternary-

valued signals 32a and 32b. FIG. 11 shows how phase rotator 202 may be

implemented with a circuit having an inverter 410, two multiplexers 420a and

420b, and a zero comparator 430 which outputs a binary low or '0' signal if the

input signal is nonzero and a binary high or '1' signal if the input is zero.

In a more general case, a phase rotator 200 according to the first

embodiment of the invention may be inserted into the complex signal path of

the modulator of FIG. 1, as shown in FIG. 12, without regard to whether the

values of the digital signals inputted to the DACs are limited to, e.g., -1, 0, and

+1 as in the modulator of FIG. 5. In several existing and proposed CDMA

schemes, for example, the I and Q data signals may represent traffic and control

signals, respectively, with different gain factor ratios being applied to the

signals at different data rates. These schemes include those defined in section

2.1.2.3.3.2 ('Code Channel Output Power for reverse Traffic Channel with Radio

Configuration 3, 4, 5, or 6') of the cdma2000 (also known as IS-2000) standards

document 'Physical Layer Standard for cdma2000 Spread Spectrum Systems,'

published by the Telecommunications Industry Association (TIA), Arlington,

VA (document ref. no. TR45/PN-4428, to be published as IS-2000-2), and Table 2.1.2.3.3.2-1 ('Reverse Link Nominal Attribute Gain Table') referenced therein.

In such an application, the I and Q data signals may pass through one or more

filters and/or gain stages before reaching phase rotator 200. Even if the data

signals are binary-valued, therefore, the digital signals inputted to the phase

rotator may no longer be binary- or even ternary-valued, and the constellation

of their possible signal vectors may no longer lie along the I and Q axes.

More generally, a phase rotator according to an embodiment of the

invention may be used in conjunction with one or more DACs such that a

desired signal power may be maintained while a possibility of saturating the

DACs is reduced. In one example of such a use, it is desired to obtain a

complex output signal with power P near to R-1 by using a pair of DACs

having the output space shown in FIG. 3 (such as DACS 120a and 120b

described above). FIG. 12A shows the constellation of an output signal having

power substantially equal to R-1 as produced from a complex input signal

having a constellation as shown in FIG. 6B (wherein the dotted box indicates the

limits of the output space of the DACs as in FIG. 3). Although this output

signal meets the power requirement, the DACs are being driven to saturation,

and the spectrum of the output signal may therefore be degraded.

By rotating the complex input signal before it reaches the DACs, an

output signal having the same power may be obtained while avoiding spectral

degradation. This scheme may be applied by reducing the amplitude of the

input signal by a factor of 2 and also phase rotating the signal before inputting

it to the DACs. FIG. 12B shows how inputting this signal to the DACs without

rotation will cause the output signal to have an amplitude of (R-l)/V2. After the signal is rotated, the output of the DACs becomes as shown in FIG. 12C.

While a signal of the desired power R-1 is obtained as in FIG. 12A, in this case

the dynamic range of the DACs is used more efficiently such that the danger of

saturation and spectral degradation is greatly reduced. In another

implementation, the phase rotator may include the capacity to perform such

amplitude compensation internally.

Note that the advantages of phase rotation as described above may not

be obtained with all possible input signals. Specifically, a signal

will

suffer a reduction in power (or, alternatively, may bring the DACs closer to

saturation) if rotation would bring its phase angle closer to one among the set

{0, π/2, π, or 3π/2 radians}.

By way of example, FIG. 13 shows the output space 250 of a complex

analog signal produced a pair of DACs having the characteristics of DACs 120a

and 120b as described above. Regions A-D in this figure are bounded by rays

having phase angles of (2h + l)π/8 radians, where h is an integer from 0 to 7.

One may see that applying a rotation of 45 degrees (π/4 radians) to a signal

vector that originally falls within one of the regions A-D will cause the vector to

move outside of the region and closer to the I or Q axis, thus reducing its power

and also bringing the vector closer to the limits of the output space of the DACs.

Because the phase angle of a vector may be expressed as tan^"1 (Q/I), it follows

that the ratio of the amplitude of the Q data signal to the amplitude of the I data

signal should not fall within either the range (tan π/8 - tan 3π/8) or the range

(tan 5π/8 - tan 7π/8). Because phase rotation is a linear operation, a phase rotator according to

an embodiment of the invention may be inserted into the complex signal path at

any point. For example, the data signals 10a and 10b may be rotated by a phase

rotator 202 before complex multiplication instead of afterward, as shown in

FIG. 14. Although phase rotation is performed in the digital domain in the

applications described above, a phase rotator 204 according to an embodiment

of the invention which performs suitable analog operations at adders 210a and

210b may also be applied after the DACs (i.e. in the analog domain) if desired,

as shown in FIG. 15.

In general, rotation of a two-dimensional vector may be represented by

the matrix expression Ax = b, where

A = (3)

α indicates the angle of rotation; I and Q represent the real and imaginary

components of the complex signal inputted to the rotator, respectively; and Ir

and Qr represent the real and imaginary components of the complex rotated

signal outputted by the rotator, respectively. Phase rotator 200 as illustrated in

FIG. 7, for example, rotates and scales the input signal according to the

following rotation matrix A,:

+ 1 - 1

4 = + 1 + 1

where the angle of rotation is 45° and the matrix is normalized (i.e. scaled) by

multiplying it by the square root of 2.

Note that the invention is not limited to rotations of 45 degrees, as the

benefits of increased power and improved spectrum as described above may apply to any angle of rotation. Phase rotators according to additional

embodiments of the invention may therefore be designed and implemented by

applying the principles of rotation matrices. FIG. 16 shows one example of a

circuit diagram for a phase rotator 206 which implements the general rotation

expression (3) and includes four multipliers 510a-d, two adders 210a and 210b,

and two constant factors cos α (520a) and sin α (520b), where α is the angle of

rotation (in radians) between the complex input signal 310a,b and the complex

output signal 322a,b. (The constant factors may be hard-wired or, alternatively,

they may be reprogrammable.) Such a rotator may be used, for example, in

place of phase rotator 200, 202 or 204 in a system according to FIG. 12, 14, or 15,

respectively, to allow rotation by any angle.

A reduction in computational complexity may be obtained by using a

phase rotator 208 as shown in FIG. 17 instead. This rotator includes only two

multipliers 530a and 530b along with the two adders 210a and 210b and a

constant factor k (540). As above, the constant factor may be hard-wired or

reprogrammable. The angle of rotation α (in radians) between the complex

input signal 310a,b and the complex output signal 324a,b is described by the

following expression:

1 cosαr - . =,

Vι+ £² and the ratio between the magnitude of the output vector and the magnitude of

the input vector for this rotator is equal to V(l+k²). Many other specific

embodiments of and uses for the invention are possible; the examples described herein are provided for explanatory purposes only and do not limit the scope of

the invention.

The foregoing description is provided to enable any person skilled in the

art to make or use the present invention. Various modifications to these

embodiments are possible, and the generic principles presented herein may be

applied to other embodiments as well. For example, the invention may be

implemented in part or in whole as a hard-wired circuit, as a circuit

configuration fabricated into an application-specific integrated circuit, or as a

firmware program loaded into non-volatile storage or a software program

loaded from or into a data storage medium as machine-readable code, such

code being instructions executable by an array of logic elements such as a

microprocessor or other digital signal processing unit. Additionally, while the

modulation applications discussed herein specifically address modulation of a

RF carrier, use of the invention is not limited to any particular frequency range,

whether for modulation or for other applications. Thus, the present invention is

not intended to be limited to the embodiments shown above but rather is to be

accorded the widest scope consistent with the principles and novel features

disclosed in any fashion herein.

What is claimed is:

Claims

1. An apparatus comprising:

a first adder receiving a first component of a first complex signal and a

second component of the first complex signal and outputting a first component

of a second complex signal, the first component of the second complex signal

being a difference of the first and second components of the first complex

signal, and

a second adder receiving the first and second components of the first

complex signal and outputting a second component of the second complex

signal, the second component of the second complex signal being a sum of the

first and second components of the first complex signal,

wherein a phase angle of the first complex signal is different than a ph ase

angle of the second complex signal.

2. The apparatus according to claim 1, wherein the phase angle of the second

complex signal is closer to π/4 radians than the phase angle of the first complex

signal.

3. The apparatus according to claim 1, wherein the first complex signal has a

real component and an imaginary component, and

wherein the first component of the first complex signal is the real

component and the second component of the first complex signal is the

imaginary component.

4. The apparatus according to claim 1, wherein the first complex signal has an

in-phase component and a quadrature component, and

wherein the first component of the first complex signal is the in-phase

component and the second component of the first complex signal is the

quadrature component.

5. The apparatus according to claim 1, wherein the first and second components

of the first complex signal are digital signals.

6. The apparatus according to claim 5, wherein the first and second components

of the first complex signal are baseband signals.

7. The apparatus according to claim 6, wherein at least one among the first and

second components of the first complex signal is based at least in part on an

output signal of a digital filter.

8. The apparatus according to claim 5, wherein at least one among the first and

second components of the first complex signal is based at least in part on an

output signal of a digital filter.

9. The apparatus according to claim 5, wherein the first complex signal has a

real component and an imaginary component, and wherein the first component of the first complex signal is the real

component and the second component of the first complex signal is the

imaginary component.

10. The apparatus according to claim 5, wherein the first complex signal has an

in-phase component and a quadrature component, and

wherein the first component of the first complex signal is the in-phase

component and the second component of the first complex signal is the

quadrature component.

11. The apparatus according to claim 5, wherein the first complex signal is

based at least in part on a product of a complex data signal and a complex

spreading signal, and wherein the complex spreading signal has a

predetermined period.

12. The apparatus according to claim 11, wherein at least one among the

complex data signal and the complex spreading signal represents at least a

polar nonreturn-to-zero symbol stream.

13. The apparatus according to claim 11, wherein the phase angle of the second

signal.

14. An apparatus comprising:

a phase rotator; and first and second digital-to-analog convertors (DACs),

said phase rotator comprising:

a first adder receiving a first component of a first complex signal and a second

component of the first complex signal and outputting a first component of a

second complex signal, the first component of the second complex signal being

a difference of the first and second components of the first complex signal, and

a second adder receiving the first and second components of the first

complex signal and outputting a second component of the second complex

signal, the second component of the second complex signal being a sum of the

first and second components of the first complex signal,

wherein a phase angle of the first complex signal is different than a phase

angle of the second complex signal, and

wherein said first DAC receives the first component of the second

complex signal and outputs a first component of a complex analog signal, and

wherein said second DAC receives the second component of the second

complex signal and outputs a second component of the complex analog signal.

15. The apparatus according to claim 14, wherein the phase angle of the second

signal.

16. The apparatus according to claim 14, wherein the first complex signal has a

component and the second component of the first complex signal is the

imaginary component.

17. The apparatus according to claim 14, wherein the first complex signal has an

in-phase component and a quadrature component, and

wherein the first component of the first complex signal is the in-phase

component and the second component of the first complex signal is the

quadrature component.

18. The apparatus according to claim 14, wherein the first and second

components of the first complex signal are baseband signals.

19. The apparatus according to claim 18, wherein at least one among the first

and second components of the first complex signal is based at least in part on an

output signal of a digital filter.

20. The apparatus according to claim 14, wherein at least one among the first

output signal of a digital filter.

21. The apparatus according to claim 14, wherein the first complex signal is

based at least in part on a product of a complex data signal and a complex spreading signal, and wherein the complex spreading signal has a

predetermined period.

22. The apparatus according to claim 21, wherein at least one among the

complex data signal and the complex spreading signal represents at least a

polar nonreturn-to-zero symbol stream.

23. The apparatus according to claim 21, wherein the phase angle of the second

signal.

24. The apparatus according to claim 14, said apparatus further comprising a

modulator,

wherein said modulator modulates the complex analog signal onto a

carrier signal.

25. The apparatus according to claim 24, wherein said modulator modulates the

complex analog signal onto a carrier signal using phase-shift keying

modulation.

26. The apparatus according to claim 24, wherein said modulator modulates the

complex analog signal onto a carrier signal using quadrature phase-shift keying

modulation.

27. The apparatus according to claim 24, wherein the phase angle of the second

signal.

28. The apparatus according to claim 24, wherein the first complex signal has a

real component and an imaginary component, and

wherein the first component of the first complex signal is the real

component and the second component of the first complex signal is the

imaginary component.

29. The apparatus according to claim 24, wherein the first complex signal has an

in-phase component and a quadrature component, and

wherein the first component of the first complex signal is the in-phase

component and the second component of the first complex signal is the

quadrature component.

30. The apparatus according to claim 24, wherein the first and second

components of the first complex signal are baseband signals.

31. The apparatus according to claim 30, wherein at least one among the first

output signal of a digital filter.

32. The apparatus according to claim 24, wherein at least one among the first

output signal of a digital filter.

33. The apparatus according to claim 24, wherein the first complex signal is

based at least in part on a product of a complex data signal and a complex

spreading signal, and wherein the complex spreading signal has a

predetermined period.

34. The apparatus according to claim 33, wherein at least one among the

complex data signal and the complex spreading signal represents at least a

polar nonreturn-to-zero symbol stream.

35. The apparatus according to claim 33, wherein the phase angle of the second

signal.

36. A method comprising:

receiving a first complex signal, said first complex signal comprising a

first component and a second component;

testing the value of at least one among the first and second components

of the first complex signal to obtain an outcome;

depending on the outcome, performing one among (1) a first function

upon the first component of the first complex signal and (2) a second function upon the second component of the first complex signal to produce a second

complex signal, said second complex signal comprising a first component and a

second component,

wherein a phase angle of the first complex signal is different than a phase

angle of the second complex signal.

37. A method comprising:

receiving a first complex signal, said first complex signal comprising a

first component and a second component;

producing a second complex signal, said second complex signal

comprising a first component and a second component, and

outputting a complex analog signal, said complex analog signal

comprising a first component and a second component;

wherein the first component of the second complex signal is a sum of the

first component and the second component of the first complex signal, and the

second component of the second complex signal is a difference of the first

component and the second component of the first complex signal, and

wherein a phase angle of the first complex signal is different than a phase

angle of the second complex signal, and

wherein the first component of the complex analog signal is based at

least in part on the first component of the second complex signal, and the

second component of the complex analog signal is based at least in part on the

second component of the second complex signal.

38. An apparatus comprising:

a first adder receiving a first signal and a second signal and outputting a

first output signal, and

a second adder receiving a third signal and a fourth signal and

outputting a second output signal;

wherein the first and third signals are based at least in part on a first

component of a first complex signal, and

wherein the second and fourth signals are based at least in part on a

second component of the first complex signal, and

wherein the first output signal is a first component of a second complex

signal and the second output signal is a second component of the second

complex signal, and

wherein a phase angle of the first complex signal is different than a phase

angle of the second complex signal.

39. The apparatus according to claim 38, wherein the first and second

components of the first complex signal are digital signals.

40. The apparatus according to claim 38, further comprising first and

second digital-to-analog convertors (DACs),

wherein said first DAC receives the first component of the second

complex signal and outputs a first component of a complex analog signal, and

wherein said second DAC receives the second component of the second

complex signal and outputs a second component of the complex analog signal.