WO2001018946A1

WO2001018946A1 - Inductor current sensing

Info

Publication number: WO2001018946A1
Application number: PCT/US2000/023888
Authority: WO
Inventors: Alberto Jesus Moreno
Original assignee: Lambda Electronics
Priority date: 1999-09-03
Filing date: 2000-08-31
Publication date: 2001-03-15
Also published as: AU7093900A

Abstract

A method and system for sensing an inductive current that includes generating a signal in response to a current that is diverted from a switch upon turning off the switch, wherein when the switch is on it conducts a current that is a function of the inductive current. The switch may be directly coupled to the inductor (e.g., series electrical connection) or indirectly coupled to the inductor (e.g., through galvanic isolation). Current sensing according to the present invention is applicable to various circuits and systems that include switching of an inductive current, such as switching mode power converters and motors. In switching mode power converters, for example, the current sensing may be used in implementing average current control, current limiting, or peak current mode control.

Description

INDUCTOR CURRENT SENSING BACKGROUND OF THE INVENTION

1. Technical Field

This invention relates generally to current sensing and, more particularly, to a circuit and method for sensing a current that flows in an inductive element, such as a switch mode power converter's output inductor or a motor's winding(s).

2. Background Art

10

Many circuits and devices, such as motor controllers and power converters, include circuitry for sensing the current that flows through an inductive element (e.g., an inductive load). For example, in motor control circuitry (e.g., for dc motors, variable reluctance motors, etc.), sensing of the winding current may be ^ used to control speed, torque, and/or current limiting. In power converters generally, and more specifically in switch mode power supplies, some form of output current sensing circuit is typically employed, and may be used to control the output current and/or provide over current limit protection. For clarity in describing 0 some aspects of known current sensing techniques, the ensuing background focuses on switch mode power supplies and, more particularly, describes several current sensing techniques that may be used for output current control and/or over current limit protection.

One technique employs a current sensing resistor in series with the 5 main switch on the primary side of a converter's transformer. For example, FIG. 1 A illustrates a typical single ended forward converter circuit with such current sensing. The converter is supplied with a direct current (DC) power source of voltage V_in, which supplies current through primary winding N_P (having Np 0 windings) of transformer Tl when a main, or primary, switch SI is closed, and thus transfers power to load R_L via secondary winding Ns (having Ns windings), forward diode Dl, and output inductor L₀ (which stores energy). When switch SI is open (off), the output current I₀ continues to flow through inductor L₀ (having average - current I_OAVG equal to In) via flywheel diode D2. As is conventional, the converter output voltage V₀ across load R (which draws load current I₀) and filter capacitor Co is regulated by a control circuit 11 controlling the duty cycle of the main, or primary, switch SI (across which is connected a snubber network composed of a capacitor Cs and a resistor Rs) according to the converter's output voltage V₀, current lo, and/or power furnished to the load R_L. The output voltage V₀ is thus related to the duty cycle in a well known manner. In order to measure the output current, a resistor Rjs is placed in series with the main power flow through the primary winding of the transformer Tl. A voltage Vis that replicates the primary current Ip in amplitude and shape is produced across the current sensing resistor R_JS, as depicted in FIG IB. This voltage is then processed by the control circuit in various ways to produce the desired current control characteristics.

Although the foregoing current sensing method provides a relatively low cost solution, it does have limitations that make it impractical in some applications. For example, since noise (inherent in switching converters) and semiconductor technology place a limitation on how small Vis can be for reliable operation, the power dissipation in the current sensing resistor Rι_S may render this technique impractical for application in which high efficiency is required, such as in high power converters or low input voltage converters (e.g., 12-48V). Another existing approach used for current sensing in power converters incorporates in the primary circuit a current transformer that steps up the voltage across a sense resistor, thus avoiding the noise concern and reducing power dissipation compared to the series resistor current sensing technique of FIG. IA. FIG. 2 illustrates a representative typical forward converter employing a current transformer in the sense circuit. The current transformer primary winding N_Pc (having N_P windings) is placed in series with the main current flow of power transformer Tl, and thus conducts current Ip when switch SI is closed. The current Isc on secondary winding Nsc (having Nsc windings) of current sense transformer T2 is stepped down by the ratio

A burden resistor R_ΪS is placed in series with the secondary winding N_Sc to develop the sense voltage Vι_S. The diode D3 is required to allow the sense transformer voltage to reverse during the off time of power switch SI to reset the magnetic flux in the core of transformer T2. By using a high turns ratio transformer (e.g., 100:1 or more), the dissipation of the sense resistor Ris typically can be reduced to negligible levels. Accordingly, as noted, this current sensing technique does not suffer the power dissipation limitations of the simple resistor approach; however, the additional transformer renders it more expensive and typically less compact, which are primary concerns in high density DC-DC converters, especially in the low power market.

These foregoing current sensing techniques have become two of the most popular methods in various power conversion devices for implementing current control. As will be appreciated, these two current sensing techniques respond to the peak transformer current, which is directly related to the peak output current. In the 1980's, several control integrated circuit (IC) manufacturers introduced ICs to support the market for this control topology. Many advantages of the topology over the standard voltage mode control were cited, such as the so- called "inherent current limit protection." To achieve this "inherent" current limiting according to these peak transformer current sensing techniques, the output voltage error amplifier is clamped to a preset maximum value limiting the peak converter current.

In many power supply designs, however, it is equally important to limit the converter DC (as distinguished from the peak) output current. In buck derived power topologies (e.g., forward, push-pull, half-bridge, full-bridge), the converter peak current is somewhat proportional to the average output current. Yet the inherent limitations of peak current sensing causes the current limit characteristics to "tail out." This characteristic is shown in FIG. 3, which shows converter output voltage V₀ as a function of output current lo, revealing that the output current is not tightly controlled. Rather than a sharp limitation on maximum current once the compliance limit is reached (i.e., indicated by limit current, I_I), the current magnitude at the output diminishes only gradually and non-linearly as a function of reduced load impedance (i.e., the short circuit current Isc continues to increase and the output voltage Vo decreases). This "tail out" effect is caused by difference between the average output current and the peak current, together with propagation delays that limit the minimum on time of the power switch. The deleterious effects of the time delay on the "tailout" effect is more pronounced at higher converter switching frequencies.

The current limit "tail out" problem of peak current limit can be solved by average current control. In this case, the average output current needs to be sensed, rather than the peak output current. These control circuits typically may implement analog control loops that allow the charging and the discharging of a capacitor to emulate the output in the output inductor, the capacitor voltage closely approximating the average output current waveform. FIG. 4 depicts a simplified diagram of a known control circuit that includes a control loop for average output current sensing to limit output current. More specifically, the system uses two analog control loops. An output voltage regulation loop uses a voltage regulation amplifier configuration that includes integrating amplifier 24 having its non-inverting input connected to an output voltage reference V_0REF and its inverting input coupled to the converter output voltage Vo. A current limiting loop uses a current limit amplifier configured as an integrating amplifier comprised of amplifier 22 having its non-inverting input connected to a current limit voltage reference I_LIMREF and its inverting input coupled (i) to a signal representative of a converter's output current input at terminal/line 20 via input resistance Rj and (ii) to the output of amplifier 22 via a feedback loop of series connected capacitor C_f and resistance R_f. The outputs of amplifier 22 and amplifier 24 are respectively coupled to diodes Di and Dy, which are each coupled to voltage supply Vcc via pullup resistance Rup. The common node of resistance Rup and diodes Di and D_v is connected to the pulse-width determining input (e.g., the threshold level input of a comparator having the other input driven by a sawtooth waveform) of pulse-width modulator 26, which outputs a PWM signal via line 28 to a primary switch (power) driver stage. That is, the voltage level at the PWM 26 input controls the pulse width modulator (PWM) 26 and consequently the output voltage and current of the converter. Accordingly, it may be understood that the circuit of FIG. 4 functions as a voltage regulator until the output current exceeds the value preset by the current limit amplifier. Beyond that point it functions as a current regulator giving the desired characteristics shown in FIG. 5. Although not shown in FIG. 4, the average current sensing techniques typically require at least one additional transformer, thus adding to the cost and size of the power converter.

FIG. 6 depicts another known circuit that employs average current sensing to regulate the output voltage (or current) of a converter (or a motor control). This circuit, however, is an average current mode control circuit. In contrast to the circuit of FIG. 4, in this circuit the current control loop (which includes current loop amplifier 80, resistor Rπ, capacitor Cπ, and current sense network 82) is nested inside the outer control loop (which includes voltage loop amplifier 84, resistor Rrv, capacitor Ciy, reference voltage source VO_{R F}, and clamp diode Vz) that regulates the converter output voltage Vo. In this circuit, in contrast to that of FIG. 4, both loops are always active. That is, the voltage loop amplifier output Vev represents an error voltage that corresponds to the relative difference between the converter output voltage Vo (which is coupled (i.e., directly or indirectly connected) to the voltage loop amplifier 84 via resistor R_JV) and the reference source VO_REF- This voltage Vev in turn is fed to the non-inverting input of current loop amplifier 80 while the current sense signal Vis from current sense network 82 is fed via resistor Ru to the inverting input. Current loop amplifier 80 amplifies the relative difference of these signals to produce current error signal V_Ie which is fed to the inverting input of pulse width modulator (PWM) comparator 86, which has its non-inverting input fed with a sawtooth waveform. The output of PWM comparator 86 is fed to drive logic 88 to control the power stage switch which in turn controls the converter output voltage Vo. With this control topology, the power stage may be modeled as a voltage controlled current source, having well known advantages. Clamp Vz clamps or limits the maximum level of Vev, thus limiting the maximum current level command from the current loop amplifier to provide overcurrent limit protection for the converter in accordance with the desired current limit characteristics of FIG. 5.

Circuitry that senses the average DC output current of a converter is also described in U.S. Patent Nos. 4,985,821 (the '821 patent), both to Cohen, the disclosures of which are incorporated herein by reference. In the current sensing circuitry of these patents, current is sensed only during the on time of the switch (as in peak current sensing). In the circuit depicted in Fig. 1 of the '821 patent, for example, a current rectifier is used to charge a capacitor to a voltage representing the peak value of the signal at the secondary of a current transformer. The capacitor is discharged during the off time of the power switch by a discharge circuit at a rate controlled by the output voltage of the converter. By proper component selection, the discharge rate (slope) of this capacitor can be made to emulate the down slope of the current in the converter output inductor. In this way, the signal developed by this circuit closely resembles the converter average output current. A feature of the technique disclosed in the '821 patent is that it requires only one transformer to provide average current sensing.

It may be appreciated, therefore, that there remains a need for further advancements and improvements in sensing inductive currents, and particularly for an inexpensive, efficient (i.e., low loss), and compact inductor current sensing circuit and method, which preferably is also well suited for implementation in a variety of applications (e.g., motors, power converters, etc.). In switch mode power supply applications, such a circuit and method preferably should be well suited for implementation with a variety of converter topologies and designs, and advantageously used for current mode control (e.g., peak and/or average) and/or current limiting.

SUMMARY OF THE INVENTION

The present invention provides such advancements and overcomes the above mentioned problems and other limitations of the background and prior art by providing a method and system for sensing an inductive current that includes generating a signal in response to a current that is diverted from a switch upon turning off the switch, wherein when the switch is on it conducts a current that is a function of the inductive current. For instance, the switch may be directly coupled to the inductor (e.g., series electrical connection) or indirectly coupled to the inductor (e.g., through galvanic isolation). Current sensing according to the present invention is applicable to various circuits and systems that include switching of an inductive current, such as switching mode power converters and motors. In switching mode power converters, for example, the current sensing may be used in controlling the power converter, such as in implementing average current control and/or current limiting.

In accordance with an aspect of the present invention, a circuit includes an inductor that conducts an inductor current, and a switch device that has a current path between two terminals, and has an ON state and an OFF state respectively characterized by the current path having a low conductance and a high conductance. When the switch device is ON, its current path conducts a switch current that is a function of an inductor current conducted by an inductor. A current sense network coupled to the switch device generates a signal representative of the inductor current in response to at least a portion of the switch current that is a function of the inductor current flowing into the current sense network upon the switch device switching from its ON state to its OFF state. The current sense network may, for example, be implemented with a peak detection circuit that includes a sense capacitor that is charged to provide the signal representative of the inductor current in response to the at least a portion of the switch current flowing

10 into the current sense network.

In accordance with another aspect of the present invention, such a circuit is implemented as a switching mode power converter in which the switch device is implemented as a transistor that repetitively switches between the ON state

15 and the OFF state to selectively couple an input of the switching mode power converter to a power source, and the inductor is an output inductor. During each ON state of the transistor energy from the power source is stored in the output inductor, and during each OFF state of the transistor the output inductor delivers

20 energy stored therein. Upon the transistor switching from each ON state to each

OFF state a sense capacitor of the current sense network charges by an amount proportional to the inductor current at the instant prior to the transistor switching from the ON state to the OFF state. Additionally, the current sense network may include a discharge circuit such that prior to each switching of the transistor to the

25 OFF state the discharge circuit discharges the sense capacitor by an amount proportional to the inductor current decrease associated with the delivery of energy by the inductor during the precedent OFF state. In this manner, the sense capacitor voltage represents the average output inductor current, and may be coupled to a

30 current limiting control circuit.

In accordance with yet another aspect of the invention, the invention advantageously uses snubber circuits that may already be present in various circuits. In such implementations, the snubber may be viewed as an element of, or and

__<- element separate from but cooperative with, the current sensing circuit, and in operation at least some of the current flowing through the snubber may be used to charge a sense capacitor connected across an impedance associated with the snubber circuit.

BRIEF DESCRIPTION OF THE DRAWINGS

Additional aspects, features, and advantages of the invention will be understood and will become more readily apparent when the invention is considered in the light of the following description made in conjunction with the accompanying drawings, wherein:

FIG. IA is a simplified schematic diagram of the basic elements of a conventional single ended forward converter employing a snubber circuit for

10 transformer reset;

FIG. IB is a waveform graph of the voltage developed across a sensing resistor according to the peak primary current flow in the converter;

FIG. 2 is a simplified schematic diagram of the prior art converter of 15 FIG. 1, but adding a current transformer in the peak current sensing;

FIG. 3 is a graphical representation of the non- linear current limiting characteristic obtained with peak current sensing integrated circuits of the prior art;

FIG. 4 is a simplified diagram of a prior art control circuit that uses ,-,« two analog control loops, including one for average output current sensing, to regulate converter output and control overload conditions;

FIG. 5 is a graphical representation of the desired sharp current limiting characteristics obtainable when average current sensing is employed;

FIG. 6 is a simplified schematic of a prior art average current control mode circuit;

FIG. 7 is a functional block and schematic circuit model representation of a system in accordance with an illustrative embodiment of the present invention; 0 FIG. 8 is a simplified equivalent schematic diagram of a single ended forward converter having a snubber circuit for resonant core resetting;

FIGS. 9A-9D depict a series of waveforms useful in understanding operation of the converter depicted in FIG. 8;

FIG. 10 is a simplified schematic diagram of a representative single 5 ended forward converter having a snubber circuit and employing an current sensing circuit according to an embodiment of the present invention;

FIG. 11A-11C depict a series of signal waveforms useful in understanding the operation of the circuit of FIG. 10 with the discharge circuit implemented to provide a current sense circuit output having an average value proportional to the average output current; and

FIG. 12 is a schematic diagram of a switch mode power converter having peak current mode control and average current sensing and limiting according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. 7, an illustrative embodiment of the present invention is schematically shown as a system 50 that includes an inductive element 30 conducting a current iL, a switch device 32 selectively conducting a current f(i , a current sensing network 34 coupled across switch device 32 and having an output provided to a monitor/control circuit 36, and a circuit network 38 coupled to switch 32 and inductor 30. Generally, in operation, when switch 32 is on, it conducts current ΠT_L), which current is representative of current i_L that flows through inductor 30 during that time. Upon switch 32 turning off, current sensing network 34 senses, and generates a signal representing, the current that flowed through switch 32 at the instant prior to turnoff of switch 32. Accordingly, since the current that flows through switch 32 while it is on is representative of the inductor current i_L, current sensing network 34 generates a signal representative of the inductor current I_I-

As will be appreciated by those skilled in the art, and as highlighted by the functional block representation of FIG. 7, and particularly by the schematic circuit model representation comprising circuit network 38 coupling inductive element 30 conducting a current i_Lto switch device 32 selectively conducting current f(i_L), the present invention is applicable to myriad applications. For example, system 50 may be a motor system (e.g., dc motor, variable reluctance motor, stepper motor, etc.), a switched mode power supply system, or any other system involving switching an inductive current (e.g., switching a current that is coupled to an inductive element).

More specifically, circuit network 38 represents any circuitry (e.g., connections, passive and/or active elements, sources, supplies, etc.) that couples to switch 32 and to inductor 30, which circuitry depends on the actual implementation of system 50. For example, in a motor system wherein inductor 30 may represent a motor winding through which current is selectively switched via switch 32, circuit network 38 thus may represent the circuitry that provides a series connection of inductor 30, switch 32 and a power source. Alternatively, in a conventional galvanically isolated, forward switch mode power supply, wherein inductor 30 may represent an output inductor and switch 32 may represent the main (primary) switch, circuit network 38 thus may embrace a transformer, a power source, the output rectifiers, an output filter capacitor, and a load. As an example of variations within the purview of the present invention, it is noted that in such a conventional switch mode power supply, switch 32 may instead represent one of the output rectifiers (i.e., the forward rectifier or the freewheeling rectifier) and, in that case, circuit network 38 would not embrace that output rectifier, but instead also embrace the main (primary) switch.

Switch 32 may be an active (e.g., a MOSFET) or passive (e.g., diode) device. For instance, as noted, in various switch mode power supply implementations, switch 32 may represent an output rectifier, which may be implemented as either a passive rectifier (i.e., diode) or an active rectifier (e.g., a MOSFET used for synchronous rectification). Switch 32 has an "on" state and an "off state. If switch 32 were implemented as a diode, its "on" state may be characterized by a low impedance current path (high conductance path) for current conducting therethrough (i.e., forward biased), whereas its "off state may be characterized by a high impedance current path (low conductance path) for any current conducting therethrough (i.e., reverse biased). Alternatively, if switch 32 were implemented as an active switch, then ita on state may be characterized by its control terminal (e.g., the base and the gate of a bipolar and a field-effect transistor, respectively) being driven such that a high conductance path is provided through the active switch (i.e., to conduct current f(i_L) through switch 32 (e.g., between the collector and emitter of a bipolar transistor, or between the drain and source of a field-effect transistor)). By way of example, a MOSFET is "on" when its channel region is in a substantially high conductance state such that any current flow through the transistor is predominantly through the channel. In such a state, the transistor may conduct current bidirectionally (i.e., in either direction). In contrast, a MOSFET is "off when its channel is in a high impedance state such that there is essentially no current conduction through the channel (e.g., the current through the channel is insignificant relative to the currents designed to flow through the circuit, or relative to currents that may flow through the channel when the transistor is on). In this "off state, however, a MOSFET can conduct current unidirectionally through its intrinsic body diode.

As described, the schematic circuit model of FIG. 7 indicates that when switch 32 is on it conducts a current that is related to the current that flows through inductor 30. More specifically, current f(i_t) is a function of inductor current i that flows in inductor 30. For example, current f(i_L) may be linearly (i.e., f(Ϊ_L) = a(i_L) + b, a and b being constants) or non-linearly related to inductor current J_L, depending on the implementation of system 50 (e.g., depending on the actual design of circuit network 38 that couples switch 32 and inductor 30). Accordingly, regardless of the functional relationship between current i_L and the current f(Ϊ_L) conducted by switch 32 when it is on, this latter current has inductive properties: qualitatively, for example, it does not change instantaneously. Thus, at the instant upon switch 32 opening, the amount of current f(i_L) conducted by switch 32 just prior to opening continues to flow into node A; for simplicity, at this instant upon opening the switch, this inductive current may be idealized as a current source.

Current sensing circuit 34 senses at least a portion of the current f(- ) that continues to flow into node A upon opening (i.e., turning "off) switch 32 to provide an output representative of the current conducted by switch 32 prior to it turn off, which output is thus representative of current i_L. While switch 32 is closed, current sensing circuit 34 is essentially shorted, switch 32 conducting essentially all of current f(i_L). Current sensing circuit 34 may be implemented in various ways, such as by a capacitively coupled current-to-voltage element (e.g., a resistor or a current-to-voltage pre-amplifier) followed by a peak detection circuit or a sample-and-hold circuit. As will be further appreciated below, in accordance with various embodiments of the present invention, current sensing circuit 34 may advantageously employ a snubber that in various circuits is already present across switch 32.

Monitoring and/or control circuit 36 represents any appropriate circuitry that displays, stores, and/or processes the signal representative of inductor current i_L provided by current sensing circuit 34. In various embodiments, for example, monitor/control circuit 36 may control the duty cycle of switch 32 (connection from circuit 36 to switch 32 not shown) based on the signal representative of inductor current i_L (e.g., to control current Ϊ ).

As noted, the present invention is applicable to myriad applications, as highlighted by the operational block and circuit model representation of the embodiment of FIG. 7. For clarity of exposition, however, the ensuing description and hereinbelow described embodiments of the present invention relate to switched mode power supplies and, more specifically, to a resonant reset switched mode power converter, as well as to current sensing for current mode control and current limiting. It is emphasized, however, that current sensing according to the present invention is not limited to current mode control, to current limiting, nor to power converters, but may be practiced in any system or circuit that involves switching an inductive current.

As will be appreciated from the ensuing description of illustrative power converter embodiments of the present invention, various embodiments of the present invention may advantageously make use of the inherent characteristics of snubber circuits (e.g., turn-off snubbers) that are typically already present in many circuits. As implemented in power converters, in its basic form, a snubber network is placed across a switching device (e.g., a main/primary switch and/or an output rectifier). Depending on the particular power circuit topology, the network will have one or more of the following functions: (1) reducing the rate of rise on the voltage (dv/dt) across the power switch during turn-off transition, thereby diminishing the generation of high frequency electromagnetic interference (EMI); (2) reducing the generation of over-voltage "spikes" that could destroy the power switch; and (3) providing a source of energy to reset the power transformer core during the OFF time of the power switch (resonant reset). As will be further understood below, these snubbing circuits already present in many converters may be adapted to provide output current sensing according to the present invention. Although the present invention may be implemented as an adjunct or addition to a snubber circuit designed for other purposes (e.g., such as those noted above), it will be understood that the present invention is not dependent on a circuit design already incorporating a snubber for such other purposes, but in certain applications may be implemented primarily or exclusively for cunent sensing itself. As used herein, various implementations of current sensing circuitry according to the present invention may be referred to in various ways: for example, it may be considered a snubbing circuit, or part of a snubbing circuit or network, or as a separate circuit coupled to a snubber.

FIG. 8 shows, by way of background, a forward converter buck regulator with a resonant reset snubber network composed of a capacitor Cs and a resistor Rs connected across a MOSFET power switch SI. The power transformer Tl (inside dotted line block) shows its equivalent model elements, i.e., an ideal transformer Tl with turns ratio N_P/Ns, primary inductance L_P and primary leakage inductance L_K. Magnetization current I_M flows through the equivalent magnetizing inductance L_M. The output side of the device is conventional, using rectifying diode DI and flyback diode D2, an output inductor L₀ and a storage (filter) capacitor Co to supply power to the load R .

FIGS. 9A-D show the pertinent waveforms for the circuit of FIG. 8. ^' More specifically, in order, FIGS. 9A, 9B, 9C and 9D show the primary current Ippκ, the current through power switch SI, the voltage across power switch SI and the parallel connected snubbing network formed by snubber capacitor Cs and resistor Rs, and the current through snubber capacitor Cs and resistor Rs. -During the on time of the power switch SI, a primary current Ippκ, that is a reflection of the main secondary current I_OAV, will flow through the primary side of the transformer Tl, leakage inductance Lk and power switch SI . Transformer magnetizing current

I_M, having a magnitude much smaller than the primary current, flows through leakage inductance L_K and power switch SI. During the switch on time, the primary current stores energy in the leakage inductance L_K, while the magnetizing current stores energy in the primary inductance L_M- The instant the power switch

SI is turned off, the energy stored in L_M and L_κ, is released, inverting the polarity, and causing primary current and the much smaller magnetizing current to flow through the snubber capacitor C_s and resistor Rs. This current will flow until all of the leakage inductance energy is released into Cs- (For a typical converter this would take about 50-100nS). Likewise, the energy stored in primary inductance L_M also transfers stored energy to the capacitor Cs, but at a much smaller rate (since L_M is much bigger than L_κ and I_M much smaller than Ippκ). Also note that upon turning on switch SI, it discharges capacitor Cs from the voltage Vin, thus providing the initial discharge current spike through switch SI.

FIG. 10 depicts an illustrative embodiment of the present invention, implemented in connection with a resonant reset forward converter such as that of FIG. 8, in which advantage is taken of a snubber network to obtain output current information. More specifically, as shown, current sensing circuit 60 is depicted as including snubber capacitor Cs and snubber resistors Rs! and Rs₂. Note that in this embodiment, series snubber resistors Rsi and Rs₂ are implemented to provide a desired overall snubber resistance as well as a desired resistance for current sensing. Current sensing circuit 60 is shown as also including a peak detection circuit that includes a current rectifier D_s, a sense capacitor Cl, and a discharge circuit X. Operation of current sensing circuit 60 may be understood as follows, in view of the hereinabove description of the resonant reset power converter of FIG. 8. At the instant power switch SI turns off, the power transformer peak primary current transfers from switch SI to the snubber network to charge snubber capacitor C_s through the snubber resistors Rsi and Rs₂. Thus, the instantaneous peak voltage developed across Rs₂ is proportional to the peak of output current at turnoff of switch SI. Accordingly, to effect current sensing, in this implementation peak detection circuitry is coupled across snubber resistor Rs₂ to detect the instantaneous peak voltage that corresponds to the peak output current. More specifically, as current flows into the snubber network upon opening power switch SI, sense capacitor Cl is charged whenever the voltage developed across snubber resistor Rs exceeds the instantaneous voltage across sense capacitor Cl, and the voltage signal developed across sense capacitor Cl will thus be proportional to the output inductor current value at switch SI turn-off.

Discharge circuit X sufficiently discharges sense capacitor Cl between successive turn-offs of switch SI such that at each switch SI turn-off sense capacitor is charged to the present (i.e., existing) voltage developed across Rs₂ (and thus to a voltage representing the most recent peak output current). Discharge circuit X may be implemented, for example, as a voltage (e.g., output voltage) dependent current sink, a constant (e.g., not voltage dependent) current sink, a simple resistor that continuously discharges sense capacitor Cl, or a gated discharge circuit that selectively discharges sense capacitor Cl by an appropriate amount (e.g., partially or completely) at some time between successive turn-offs of switch SI. Control circuit 62 processes the signal representative of the peak output current along with any other signals required to effect a desired control algorithm, such as for overcurrent protection and/or average current control, etc. That is, those skilled in the art will understand that given a signal representative of the peak output current at switch turnoff, any of a variety of desired control algorithms may be implemented by using this information by itself or in conjunction with a signal or signals representative of one or more circuit parameters, such as the output voltage, the line input voltage, the duty cycle, the on time and/or the off time of switch SI. For instance, to effect an average current control algorithm according to sensing a signal representing the peak output current, an average output current value may be generated (e.g., calculated) based on sensing the output voltage and the switch SI off-time. It is also understood that in various embodiments control circuit 62 may be embraced by control circuit 11 to effect control over power switch SI.

In an illustrative implementation of average current control, current sensing circuit 60 may provide to control circuit 62 an output signal having an average value proportional to the average output current by using discharge circuit X to discharge capacitor Cl by an amount that appropriately corresponds to the amount of output cunent decrease during the off period of switch SI. Such a discharge circuit X may be implemented in a manner similar to the discharge circuitry disclosed in U.S. Patent No. 4,985,821, which has been herein incorporated by reference, to synthesize or emulate the down slope portion of the output inductor current. For instance, the discharge circuit may be implemented as a voltage-to- current converter that is responsive to the converter output voltage, since during the off period of the primary switch the converter output current discharges at a rate proportional to the output voltage.

In this manner, the signal developed across the sense capacitor Cl proportionately tracks the inductor output current i . More specifically, in this illustrative embodiment, sense circuit 60 provides a signal proportional to the average output current of the power converter by using at least some of the cunent that flows into a snubbing network to charge a sense capacitor by an amount that emulates the output current rise during the on period of converter's primary switch, and by using a discharge circuit coupled to the sense capacitor to introduce a

10 downward slope to the capacitor signal that synthesizes or emulates the downward slope of the output cunent. Thus, the sense capacitor voltage represents the average output current (i.e., the average capacitor voltage is directly proportional to the average output current), and may be coupled to any conventional current limiting

15 control circuit or other output current based control circuit. For instance, the signal output from current sense circuit 60 may be coupled to input 20 of the average current control circuit of FIG. 4, which circuit may be embodied in current control circuit 62 (which in turn may be embraced by control circuit 11), so as to regulate

20 the duty cycle of switch SI in a manner that limits the output current of the converter to a predetermined maximum value. As a further example, to implement average cunent mode control, current sense circuit 60 may correspond to current sense network 82 of FIG. 6 (the output of cunent sense circuit 60 corresponding to

Vic) and the remainder of the circuit of FIG. 6 may be embodied in cunent control 25 circuit 62 (which in turn may be embraced by control circuit 11).

FIGS. 11A-C illustrate pertinent waveforms for the circuit of

FIG. 10 implemented with such a discharge circuit that emulates the down slope of the output cunent. More specifically, in order, FIGS. 11 A, 11B and 11C depict the

30 cunent through power switch SI, the current through snubber capacitor Cs and resistor Rs (i.e., solid line, which also represents the snubber resistor voltage), and the voltage across capacitance Cl and resistor Rs (which is also represented by the dashed line in FIG. 11C). As can be seen in FIG. 11C, the current sense signal

•ac average value conforms to the converter output cunent value lo. As described, because the amplitude of that signal follows the output current proportionately, it can effectively be utilized as the sense input to any cunent limiting control circuits. It may be appreciated that in such an illustrative implementation of average cunent control, discharge circuit X may be considered as effectively pre-processing a signal directly proportional to the peak output current (i.e., the peak-detected voltage across resistor Rs₂, which is a signal representative of the output cunent) to provide an output signal (i.e., the signal output from current sense circuit 60, which is also a signal representative of the output current) having an average value conesponding to the average output current. Since discharge circuit X processes the sensed peak voltage in this manner, it may alternatively be viewed, at least in part, as part of control circuit 62. Regardless of whether the discharge circuit is considered as being independent, or part, of control circuit 62, it is understood that generating a signal for average cunent control does not require using a discharge circuit to emulate output current decline during switch Si's off period. For example, discharge circuit X may instead be a simple resistor, a constant current sink, or a gated discharge circuit (e.g., such that the instantaneous peak voltage across resistor Rs₂ may be held by capacitor Cl and sampled by control circuit 62). Control circuit 62 may then nevertheless provide average current control by appropriately processing the output from current sense circuit 60 according to its relation to the average output current (e.g., through the output voltage and off time variables, which may be sensed by the control circuit).

Referring now to FIG. 12, shown is another illustrative power converter embodiment of the present invention, implemented in conjunction with peak current mode control for output regulation. Overall regulation and cunent control is provided by a supply controller 70 coupled (i) to a current sense resistor Rs, (ii) to a voltage control loop comprising error network 48, opto-coupler OC, and resistor R_b connected to voltage source Vcc, and (iii) to a cunent control loop comprising resistor R_]2, cunent sensing circuit 74 and compensation circuit 76. More specifically, supply controller 70 includes enor amplifier 42, diodes Dx and Dy, resistors Rx and Ry, zener diode CRx (e.g., 1.0 volt zener), cunent sense comparator 44, and PWM control/drive circuit 46. Based on the current control loop and/or the voltage control loop signals, enor amplifier 42, which has a reference voltage V_IR coupled to its non-inverting input and a feedback network (i.e., resistor Rπ, and capacitor C_fb) coupled to it inverting input, provides an output that establishes an enor signal V_e at the inverting input of current sense comparator 44. Current sense comparator 44 compares enor signal Ve with the increasing voltage that develops across sense resistor Rs (due to the increasing instantaneous output cunent reflected to the primary) during the on time of switch SI, and signals the resetting of PWM control/drive circuit 46 to turn switch SI off when the sensed resistor Rs voltage reaches/exceeds voltage Ve. As known to those skilled in the art, supply controller 70 may be implemented with a commercial cunent mode control integrated circuit, such as a Unitrode UC1842 (or UC2842, or UC3842) or an ASTEC AS3842.

In the voltage control loop, enor network 48 senses the supply output voltage Vout and drives opto-coupler OC such that Ve shifts proportionally with the deviation of Vout from a reference voltage. In particular, as known in the art, enor network 48 may be implemented by voltage dividing Vout and feeding the resulting divided voltage into a commercial error amplifier compensation integrated circuit, such as an ASTEC AS431, which compares it with a reference voltage to generate an enor voltage that is converted to a proportional current through opto-coupler diode Doc, resulting in opto-coupler transistor Qoc conducting a collector cunent that is proportional to the opto-coupler diode current. These proportional changes in the collector cunent are pulled through resistor R₁ , thus proportionally shifting the voltage at the output node of error amplifier 42, and hence proportionally shifting the voltage Ve.

In the cunent control loop, in this embodiment, current sensing circuit 74 also advantageously employs a snubber (i.e., comprising capacitor Cs and resistors Rsi and Rs₂) that would normally be included in the power converter design. Current sensing circuit 74 also includes a peak detection circuit that includes transistor Q_s, sense capacitor Cp, and a discharge resistor R_D. Note that compared to using a diode, using transistor Q_s as a cunent rectifier provides current gain, reduced capacitance, and associated speed (frequency response) enhancement, which may be particularly important, for example, in low power and/or high switching frequency power converters. The current sensing circuit 74 output voltage, which is representative of the peak output cunent at turnoff of switch SI, is coupled to the non-inverting input of enor amplifier 42 via resistor R_!2. Accordingly, when the cunent sensing circuit 74 output voltage exceeds reference voltage VIR, then resistor R_!2 will conduct a cunent into the node that is connected to the non-inverting input of enor amplifier 42. When current flows from that node into the feedback loop of error network 42, then the cunent control loop begins to control the determination of the enor voltage Ve.

The cunent control loop also advantageously employs current compensation circuitry 76 to provide input line regulation for current control of the enor voltage Ve. It is emphasized that cunent compensation is not necessary for practicing the present invention, but may be a desirable option in some applications or designs (e.g., in the circuit of FIG. 12 where the switch time of transistor Qs is not significantly faster than the converter switching period), and it is noted that compensation may be implemented in alternative ways (e.g., by discharging the sense capacitor as a function of the output voltage). More specifically, it may be understood that for a given output cunent, a higher line input voltage Vin will produce a higher cunent through the snubbing network (i.e., Cs, Rsi, and Rs₂) upon opening switch SI, thus yielding a higher peak voltage across resistor Rs₂. That is, the output of cunent sensing circuit 74 is input line dependent. Accordingly, the current limiting characteristic would be input line voltage dependent, a higher input line voltage being associated with an earlier "knee" voltage and earlier decline in the output voltage as a function of output cunent. Current compensation circuitry 76 is operative to mitigate, compensate, or cancel a line dependent signal (e.g., the current flowing into the node coupled to the non-inverting input of error amplifier 42 or, equivalently, the current sense circuit output voltage that drives that current) by sensing the input voltage, storing energy (e.g., in the form of charge) proportional to the sensed input voltage, and releasing this energy (e.g., as a current) to compensate the line dependent signal generated by the current sense circuit.

For clarity, by way of example, assume that the voltage Vin is nominally around 36 V, but may fluctuate up to around 72 V, that the winding ratio of primary winding Np to auxiliary winding NA is 3-to-l, and that zener diode CR8 has a 12 V zener voltage. Thus, when Vin is about 36 V and switch SI is closed, capacitor C7 is not charged. When Vin is about 72 V, however, then when switch SI is closed auxiliary winding NA charges capacitor C7 through zener diode CR8 and diode CR7 to about 12 V. Then, upon turnoff of switch SI, the voltage across auxiliary winding NA reverses and capacitor C7 discharges through winding NA and resistor Rι₃, thus drawing cunent away from the node coupled to the non-inverting input of enor amplifier 42, compensating for the extra cunent flowing into that node through resistor R_J2 due to the increase in the line dependent output voltage of cunent sensing circuit 74. Accordingly, it may be appreciated that since both this discharge cunent through resistor Rι₃ (the voltage stored on capacitor C) and this cunent through resistor Rι₂ (the output voltage of current sensing circuit 74) are proportional to the line voltage, input line regulation is provided for the cunent control signal. Those skilled in the art will further appreciate that such an input line compensation/regulation circuit is not limited to compensation for cunent sensing according to the present invention, but is widely applicable for compensating or regulating input voltage dependent signals.

As described, in the embodiment of FIG. 12, regulation of the output voltage Vout is accomplished by peak current mode control, wherein comparator 46 compares a signal representative of the primary cunent during the on time of switch SI with enor voltage Ve. During normal operation, the voltage control loop regulates the power supply output voltage by establishing Ve according to Vout: a higher (lower) Vout results in an increased opto-coupler collector current, and thus a lower (higher) V_e; which therefore decreases (increases) the duty cycle, and accordingly decreases (increases) the output voltage Vout. When the output current increases such that the cunent control loop causes cunent to begin flowing into the feedback loop of enor network 42, then the cunent control loop begins overriding the voltage control loop to control the determination of the enor voltage Ve. As the output current continues increasing, the cunent loop reduces the output voltage to provide cunent limiting.

In view of the foregoing description of illustrative and preferred embodiments of the present invention, various illustrative variations or modifications thereof, and various background art, it may be appreciated that the present invention has many features, advantages, and attendant advantages. For example, current sensing according to the present invention generally provides higher performance and/or lower cost in specific applications. More specifically, in circuitry (e.g., converters, motors, etc.) that already include a snubber, the present invention may be implemented in a particularly compact, cost effective, and power efficient manner. Also, such cunent sensing is well suited for current mode control (e.g., peak and/or average) and/or current limiting.

Additionally, it may also be appreciated that the present invention is applicable to a wide variety of converter topologies, such as active-clamped forward converters, double-ended, full-bridge, half-bridge, etc. By way of example, alternative implementations that include power transfer from the power source across the transformer to the load when the primary switch is on (e.g., forward type converters) are not limited to converter topologies that have a small magnetizing current relative to the reflected load cunent during this on period, and those of ordinary skill in the art can appropriately account for the amount of magnetizing current such that the current sense circuit accurately represents the load current. In this regard, as used herein, a transformer is not limited to galvanically coupled windings with negligible energy storage (i.e., conesponding to a high magnetizing inductance), but may also embrace galvanically coupled windings having an intentional, non-negligible and/or significant energy storage (e.g, coupled inductors).

Further, it is emphasized that current sensing in accordance with the present invention is not limited to switching power converters, but is widely applicable to diverse circuits and systems that include a switch that selectively conducts a cunent that is directly or indirectly coupled to an inductive element. That is, as described above in connection with FIG. 7, cunent sensing according to the present invention may be implemented across any switching device that selectively conducts an inductive cunent. Thus, in power converters, for instance, the invention is not restricted to cunent sensing directly across a main (primary) switch, but may be alternatively implemented across, for example, an output rectifier (which may advantageously already include a snubber).

Accordingly, it is understood that although the above description provides many specificities, these enabling details should not be construed as limiting the scope of the invention, and it will be readily understood by those persons skilled in the art that the present invention is susceptible to many modifications, adaptations, and equivalent implementations without departing from this scope and without diminishing its attendant advantages. It is therefore intended that the present invention is not limited to the disclosed embodiments but should be defined in accordance with the claims which follow.

Claims

oWhat is claimed is:

1. A circuit comprising:

an inductive element that conducts an inductor current; a switch device that has a cunent path between two terminals, and has an ON state and an OFF state respectively characterized by said current path having a low conductance and a high conductance, said current path conducting a switch cunent that is a function of said inductor cunent when said switch is in the ON state;

10 a current sense network coupled to said switch device, and that generates a signal representative of said inductor cunent in response to at least a portion of said switch current that is a function of said inductor current flowing into said current sense network upon said switch device switching from said ON state to r said OFF state.

2. The circuit according to claim 1, wherein said current sense network is connected in parallel to said switch device and includes a sense capacitor that provides a voltage that is the signal representative of said inductor current.

0 3. The circuit according to claim 2, wherein said cunent sense network includes a resistor coupled to said sense capacitor through a unidirectional conducting device, said resistor generating a resistor voltage in response to said at least a portion of said switch cunent flowing into said cunent sense network, said unidirectional conducting device being oriented to charge said sense capacitor in 5 response to said resistor voltage.

4. The circuit according to claim 1, wherein said current sense network includes a snubber circuit connected in parallel to said switch device, a Q sense capacitor coupled to said snubber circuit such that the voltage across said sense capacitor is the signal representative of said inductor current.

5. The circuit according to claim 4, wherein said snubber network includes a capacitor connected in series with a resistor, and wherein said cunent sense network includes a unidirectional conducting device that connects said resistor with said sense capacitor.

6. The circuit according to claim 1, wherein said circuit is a switching mode power converter, said switch device being repetitively switched between the ON state and the OFF state.

7. The circuit according to claim 6, wherein said switch device is a transistor that selectively couples an input of said switching mode power converter to a power source.

8. The circuit according to claim 7, wherein said power converter includes a transformer having a primary winding and a secondary winding, and wherein said transistor selectively couples said primary winding to the power source.

9. The circuit according to claim 8, wherein said inductor is an output inductor coupled to said secondary winding.

10. The circuit according to claim 9, wherein said cunent sense network is connected in parallel to said transistor and includes a sense capacitor that provides a voltage that is the signal representative of said inductor current.

11. The circuit according to claim 10, wherein said cunent sense network includes a resistor coupled to said sense capacitor through a unidirectional conducting device.

12. The circuit according to claim 9, said current sense network including a discharge circuit, wherein during each said ON state of said switch device energy from the power source is stored in said output inductor and during each said OFF state of said transistor said output inductor delivers energy stored in said output inductor, and wherein upon said transistor switching from each said ON state to each said OFF state said sense capacitor charges by an amount proportional to the inductor cunent at the instant prior to said transistor from the ON state to the OFF state, and wherein prior to each switching of said transistor to the OFF state said discharge circuit discharges said sense capacitor by an amount proportional to the inductor current decrease associated with the delivery of energy by the inductor during the precedent OFF state.

13. The circuit according to claim 9, wherein said current sense network includes a snubber circuit connected in parallel to said transistor, a sense capacitor coupled to said snubber circuit such that the voltage across said sense

5 capacitor is the signal representative of said inductor current.

14. The circuit according to claim 13, wherein said snubber network includes a capacitor connected in series with a resistor, and wherein said current sense network includes a unidirectional conducting device that connects said 0 resistor with said sense capacitor.

15. The circuit according to claim 14, wherein said unidirectional conducting device is a diode or a second transistor. 5

16. The circuit according to claim 14, further comprising a control circuit that controls said transistor in response to said signal representative of said inductor current.

_π 17. The circuit according to claim 16, wherein said control circuit controls the duty cycle of said transistor in response to said signal representative of said inductor cunent.

18. The circuit according to claim 16, wherein said control circuit 5 implements peak cunent mode control, and includes a control loop for overcurrent protection that is dependent on said signal representative of said inductor current.

19. The circuit according to claim 16, wherein said control circuit implements average current control.

20. The circuit according to claim 19, wherein said cunent sense network includes a discharge circuit, wherein during each said ON state of said switch device energy from the power source is stored in said output inductor and during each said OFF state of said transistor said output inductor delivers energy stored in said output inductor, and wherein upon said transistor switching from each said ON state to each said OFF state said sense capacitor charges by an amount proportional to the inductor cunent at the instant prior to said transistor from the ON state to the OFF state, and wherein prior to each switching of said transistor to the OFF state said discharge circuit discharges said sense capacitor by an amount proportional to the inductor current decrease associated with the delivery of energy by the inductor during the precedent OFF state.

21. A method for sensing a first cunent that flows in an inductive element, comprising: opening a switch that conducts a current that is a function of said first cunent when the switch is closed; generating a signal that is representative of said first current using a current sense network coupled to said switch such that at least a portion of said current that is a function of said first cunent flows into said current sense network upon opening said switch.

22. The method according to claim 22, further comprising controlling said switch in response to said signal.

23. The method according to claim 22, wherein said inductive element is an output inductor of a switching mode power converter.

24. The method according to claim 24, wherein said switching mode power converter includes a transformer having a primary winding and a secondary winding, and wherein said switch is a transistor that selectively couples said primary winding to the power source, and said output inductor is coupled to said secondary winding.

25. The method according to claim 25, further comprising controlling said transistor according to average current control in response to said signal.

26. The method according to claim 25, wherein said signal represents an average of said first current.

27. The method according to claim 24, further comprising controlling said switching mode power converter according to peak current control in cooperation with said signal representative of said first cunent.

28. A circuit for sensing an inductor cunent conducted by an inductive element, comprising: means for switching a current that is a function of said inductor current, said means for switching conducting said current during a high conductance state; and sensing means for generating a signal representative of said inductor current in response to at least a portion of said current that is a function of said inductor current flowing into said sensing means upon said switch device switching from said high conductance state to a low conductance state.

29. The circuit according to claim 28, further comprising means for controlling said means for switching in response to said signal representative of said inductor cunent.

30. The circuit according to claim 28, wherein said sensing means includes a means for generating a voltage signal in response to said at least a portion of said cunent flowing into said sensing means, and a means for detecting the voltage signal.

31. The circuit according to claim 28, wherein said sensing means includes a discharging means.

32. A switching mode power converter comprising the circuit of claim 28, and an output inductor provided by said inductive element.

33. The switching mode power converter according to claim 32, wherein a snubber circuit is connected in parallel with said means for switching, and wherein said sensing means includes a sense capacitor coupled to said snubber circuit such that the voltage across said sense capacitor is the signal representative of said inductor current.

34. The switching mode power converter according to claim 32, wherein said means for switching is a transistor that selectively couples an input of said switching mode power converter to a power source.

35. The switching mode power converter according to claim 32, further comprising means for controlling said means for switching in response to said signal.

36. The switching mode power converter according to claim 32, further comprising controlling said means for switching according to average current control in response to said signal.

37. The switching mode power converter according to claim 36, wherein said signal represents an average of said first current.

38. The switching mode power converter according to claim 37, wherein said sensing means includes a sense capacitor that upon turning off said means for switching is charged by an amount proportional to said inductor current at turn-off of said means for switching, and wherein said sensing means includes a means for discharging said capacitor prior to each turning off of said means for switching by an amount proportional to the decrease in said inductor current during the time interval elapsed since the precedent turning off of said means for switching.

39. The switching mode power converter according to claim 36, further comprising controlling said switching mode power converter according to peak current control in cooperation with said signal representative of said inductor cunent.

40. A current sensing circuit for a switching mode power converter of the type having a switch for transferring power from a source to the primary winding of a power transformer when the switch is closed, an output circuit coupled to the secondary winding of the transformer, and a snubber network connected across the switch and including an impedance across which a voltage signal develops when the switch is in the OFF state, the sensing circuit comprising: a sense capacitor connected through a unidirectionally conducting element to the snubber network impedance so as to be charged in response to current flowing into the snubber network upon turning OFF said switch.

41. The cunent sensing circuit according to claim 40, further comprising a discharge circuit connected to said sense capacitor so as to discharge said sense capacitor at a rate controlled by a parameter of the converter.

42. The cunent sensing circuit according to claim 40, wherein the sense capacitor is coupled to a control circuit for establishing a duty cycle of the switch effective to limit the output current of the converter to a desired value.

43. A circuit for sensing an inductive current conducted by an inductive element that is coupled to a switch such that when the switch is on the switch conducts a switch current that is a function of the inductive cunent, said circuit comprising:

a network coupled to said switch and that generates a signal in response to a current that is diverted from conduction by said switch upon turning off said switch.

44. The circuit according to claim 43, wherein said network includes a capacitor that is charged in response to said current that is diverted.

45. The circuit according to claim 44, wherein said network includes a unidirectional conducting device coupled to said capacitor and to a snubber network that is connected in parallel with said switch.