WO2000072442A1 - Integrated electronic circuit comprising an electronic component and a delay element which has a twisted-pair conductor line structure - Google Patents

Integrated electronic circuit comprising an electronic component and a delay element which has a twisted-pair conductor line structure Download PDF

Info

Publication number
WO2000072442A1
WO2000072442A1 PCT/SE2000/000884 SE0000884W WO0072442A1 WO 2000072442 A1 WO2000072442 A1 WO 2000072442A1 SE 0000884 W SE0000884 W SE 0000884W WO 0072442 A1 WO0072442 A1 WO 0072442A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductor
electronic circuit
circuit according
conductors
antenna elements
Prior art date
Application number
PCT/SE2000/000884
Other languages
French (fr)
Inventor
Roger Ahlm
Mikael Gustavsson
Original Assignee
Avancerade Logikmaskiner Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Avancerade Logikmaskiner Ab filed Critical Avancerade Logikmaskiner Ab
Priority to AU47926/00A priority Critical patent/AU4792600A/en
Publication of WO2000072442A1 publication Critical patent/WO2000072442A1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/30Time-delay networks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region

Definitions

  • the invention relates to a delay circuit with at least one active electronic component and a delay element connected to the component.
  • components or configurations with a certain time constant or delay are used.
  • delay components separated from the other components.
  • An example of such an electronic circuit is the oscillator.
  • a well-known way to set up an oscillator is to feed back a gate circuit with an inverter function, for example a simple inverter, via some form of time delay.
  • the time delay can be implemented in various ways, for example by special delay circuits.
  • crystal oscillator In applications where high working frequencies are used, and particu- larly when the requirements of a frequency-stable oscillator are high, a crystal oscillator is used instead.
  • a problem with use of crystal oscillators is that they are relatively large. In connection with certain types of integrated circuits this becomes a problem in that a special circuit must be used with the oscillator or a crystal must be connected from outside the integrated circuit.
  • a phase array antenna incorporates a group of identical radiation elements. By controlled feeding of the elements by means of a conductor network so that they act in phase, an electromagnetic beam with good direc- tionality can be achieved.
  • the conductor network can also incorporate electronically controlled phase inverters and possibly amplifiers, one for each element, by means of which the direction of the beam can be varied without need of mechanically moveable components.
  • phase inverters are complicated and ex- pensive instruments, and for that reason this type of antenna has not enjoyed great commercial success.
  • Another factor which limits the use of this type of antenna is the frequency dependency of the phase inverters.
  • the foremost area of use for the phase array antenna is within the radar area.
  • One purpose of the invention is to produce an electronic circuit that can be embodied in a simple manner and that can be combined with other circuits in an integrated form.
  • the electronic circuit enables electronic delay of an electric signal. This purpose is achieved by inclusion in the invention of the special features cited in Claim 1.
  • an oscillator has been achieved that is realizable in all components in integrated form.
  • a delay conductor with twisted or crossing conductors is provided in a feedback loop.
  • an electronically controlled an- tenna has been achieved that lacks the disadvantages of the phase inverters.
  • Electric signals from individual antenna elements are differentially delayed dependent on the position of the antenna elements in relation to the impinging electromagnetic wave fronts. Emanating from one matrix of the antenna elements that are distributed across a surface, the signals can be selectively delayed from individual antenna elements and thus affect the direction in which the antenna will be sensitive.
  • the delay is produced in integrated circuits, which are provided in connection with the antenna elements.
  • an installation of double, twisted or crossing conductors of different length is provided between the antenna elements and a receiving unit.
  • a conductor of a certain length is switched on by a control unit dependent on the position of the antenna element in relation to an impinging wave front of an electromagnetic wave. The given position affects the detectable characteristics of the electric signals that are received.
  • the installation of conductors and the control unit are joined with other electronic components in a cell unit.
  • the conductor is embodied in integrated form on an insulating layer.
  • FIG 1 schematically shows an embodiment according to the invention of an electronic circuit in the form of an oscillator
  • FIG 2 schematically shows the distributed resistance and capacitance of a conductor
  • FIG 3 is a diagram of the delay in a conductor as a function of the length of the conductor
  • FIG 4 is a principle block diagram that shows an alternative embodiment according to the invention of an electronic circuit in the form of a cell unit with antenna peripherals
  • FIG 5 shows in principle how several cell units are provided on a portion of an antenna surface
  • FIG 6 schematically shows an embodiment of a delay element in the form of a conductor, which constitutes part of the invention
  • FIG 7 shows an embodiment schematically of a conductor that can be connected in different lengths
  • FIG 8 is a principal wiring diagram that shows a mixer included in an electronic circuit according to the invention
  • FIG 9 shows schematically a portion of a long conductor according to the invention with intermediately located ground conductors
  • FIG 10 is a principal wiring diagram that shows a digital amplifier included in an electronic circuit according to the invention.
  • FIG 11 is a principle wiring diagram that shows an analog amplifier included in an electronic circuit according to the invention.
  • FIG 12 is a cross-section view that shows a chip with conductors according to an embodiment of the invention.
  • an inverter coupling 10 is shown schematically, whose input 11 is connected to its output 12 via a long conductor 13.
  • a time period T is given by the following formula where v c is the velocity of electromagnetic propagation in the conductor.
  • the frequency is 200MHz. This is under the condition that the delay in the inverter coupling itself is on the magnitude of some picoseconds. With low propagation in the inverter coupling's delay of, for example, 10% the inaccuracy is in the same class as that of a crystal oscillator. This length required for attainment of the desired delay acts in many cases as a deterrent. The actually delay in the conductor is also dependent on the conductor's distributed resistance and the conductor's distributed capacitance.
  • the conductor is embodied as a metal conductor in an integrated process, for example a CMOS process.
  • Conductor 13 is embodied with width w and rests on some form of insulating layer 14.
  • the insulating layer contains both metal oxide and field oxide and has thickness b.
  • the dielectric constant of the insulating layer affects the choice of the dimensions of the conductor and of other components. As the dielectric constant of the insulating layer increases, the dimensions can be reduced.
  • Inverter coupling 10 and other semiconductor circuits can be embodied in semiconducting materials, whereby these are given access to the oscillator.
  • the insulating layer is constituted of silicon oxide.
  • the insulating layer can also be embodied in glass or another ceramic mate- rial.
  • the insulating layer can be embodied as an air layer.
  • the conductor rests on stanchion-like formations that extend from the semiconductor or base material used.
  • the conductor should be embodied so that it gives rise to as little inductance as possible.
  • the conductor preferably runs in a loop with several parallel conductor sections so that the directions of the current in adjacent conductor sections are opposite to each other. It is also possible to provide two parallel loops in opposition or in double loops.
  • the conductor is embodied in two loops running in parallel of which one is fed with the signal to be delayed and the other is fed with the inverse of the signal. See FIG 7 and FIG 9. In this way the influence of several different forms of interference is minimized.
  • time delay occurs as a result of the conductor's distributed resistance and the conductor's distributed capacitance according to the formula below.
  • the distributed characteristics can be illustrated ac- cording to FIG 2.
  • the total length of the conductor is I.
  • C is the total capacitance of the conductor
  • R is the total resistance of the conductor.
  • the resistance is generally given by the following formula:
  • K — .
  • c b ⁇ the dielectric constant for the insulating (oxide) layer
  • p the resistance in the conductor material
  • a the thickness of the conductor
  • b the thickness of the insulating (oxide) layer
  • w the narrowest width of the conductor.
  • the diagram in FIG 3 with the curve t A shows the delay that depends on the velocity of propagation in the conductor.
  • the curve t RC shows the delay that depends on the resistance R of the conductor and capacitance C.
  • the velocity of propagation v in the conductor cannot be affected to any great degree. It can be shown that
  • Insulation layer 14 is embodied preferably with significantly greater thickness b than the occurring oxide layer.
  • a suitable thickness exceeds 10 ⁇ m and is preferably in the range of 10-100 ⁇ m if the oscillator is to be used at frequencies around 1GHz.
  • a thickness b suitable for many applications is 20 ⁇ m. With increasing values of b other dimensions can also in- crease. External dimensions naturally also affect the final dimensions.
  • the thickness of conductor 13 is in commonly occurring processes around 1 ⁇ m, and an increase in thickness, but not width, improves the oscillator's characteristics and performance.
  • Inductive characteristics also need special attention as regards the length of the conductor. It is thus not suitable to embody the conductor in a spiral form or similar.
  • the length should also be suited to the desired wavelength of the oscillator.
  • the length of the conductor preferably amounts to a multiple of the half wavelength or, more preferably, half the wavelength.
  • the invention comprises an- tenna elements 16, which are connected to a cell unit 22.
  • Cell unit 22 which is designated by dashed lines in FIG 4, comprises an installation of individually switchable delay elements 18, by means of which a signal received in antenna element 16 is directed on to a receiver 17 acting in common for a number of cell units 22. The received signal is amplified in an amplifier 23.
  • Switching of delay elements 18 is accomplished in the embodiment according to FIG 4 by means of a demultiplexer 19 and a multiplexer 21.
  • Delay elements 18 in the form of conductors connect demultiplexer 19 and multiplexer 21 , and an individual delay element 18 is switched by means of adjustment of demultiplexer 19 and/or multiplexer 21. Adjustment is done by a control unit 20, which is connected to a central processing unit (CPU) 24 in common for several cell units 22.
  • CPU central processing unit
  • the incoming signal is prefera- bly merged with a signal from a local oscillator 25 and sent to a mixer 26. See also FIG 8. From mixer 26 the signal suitably has a frequency on the order of magnitude of some GHz.
  • the different control units 20 and possibly also the local oscillators 25 are connected to a CPU 24, preferably by a buss connection 27. It can be suitable to include in CPU 24 means for synchronization of the different oscillators 25. Synchronization can also occur via control unit 20.
  • the oscillator is not included in the cell unit. A common oscillator is instead preferably located in the CPU. The embodiment of the oscillator used should be adjustable for different frequency bands.
  • All components, which are included in cell unit 22, can be embodied to be integrated in semiconducting materials.
  • the semiconductor process used should be selected with regard to high frequency characteristics, especially as regards amplifier 23, and to characteristics that affect conductors that can be included in the delay elements.
  • the noise ratio should be on the order of magnitude of 0.5 dBu.
  • Very low capacity switches should be sought.
  • the conductor is embodied as a metal conductor in an integrated process, for example a CMOS process.
  • Receiver 17 can be embodied in a conventional way as a satellite re- ceiver. It can be the case that satellite receivers are provided with control instruments for motorized control of a conventional parabola antenna. Receiver 17 includes similar control instruments, and a control output 28 transfers control information to CPU 24.
  • the control information can include instructions to sweep with the electrically controlled antenna across a certain arc in connection with finding a new transmitter. When a transmitter is found, the control information will continuously control the adjustment of the antenna so that the transmitter can be followed if the antenna is physically angled or displaced in relation to the transmitter.
  • a signal conductor 29, preferably from each of the cell units 22, conducts a received signal from the an- tenna to receiver 17.
  • the quality and certain characteristics of the signal from the antenna affect how CPU 24 will be controlled in turn in order to af- feet the different control units 20 in the cell units 22.
  • the number of delay elements 18, which are required in order that the desired possibilities for fine tuning of the antenna can be achieved, varies with the current application. For normal satellite receiver application some hundreds of delay elements 18 should be sufficient.
  • the characteristics of amplifier 23 also affect how many delay elements 18 are required. With very good amplification characteristics and signal-noise relation in the amplifier the number of directionally adjusting delay elements 18 can be held down.
  • An antenna embodied with components according to the above can be embodied as indicated by FIG 5.
  • Provided on a surface are a number of cell units 22. Every cell unit 22 is connected to four antenna elements 16A-16D attached in pairs. Two opposing first antenna elements 16A and 16B are dedicated to reception of horizontally polarized signals, and two opposing second antenna elements 16C and 16D are dedicated to reception of verti- cally polarized signals. Other configurations can also be used for reception of different types of signals. Every antenna element 16A-16D can be some millimeters long and wide, and different forms can occur. Antenna elements 16A-16D are preferably embodied of metal. The outer dimensions of the antenna with a suitable number of antenna elements can be such that the sur- face of the antenna is on the order of magnitude of 0.1-1.0 m 2 .
  • Buss connection 27 preferably runs through or past each cell unit 22.
  • the different antenna elements 16A-16D can be attached to amplifier 23 directly or via a multiplexer, which is suitably controlled by control unit 20.
  • FIG 6 shows in principle how conductors 18 can be embodied.
  • Each conductor 18 is embodied with width w and rests on some form of insulating layer 14.
  • the insulating layer is normally comprised of both metal oxide and field oxide and had thickness b.
  • the semicon- ductive material amplifier 23 and further semiconductor circuits can be em- bodied.
  • the insulating layer is made of silicon oxide.
  • the insulating layer can also be embodied of glass.
  • the insulating layer can be embodied as a layer of air. In such an embodiment the conductor rests on stanchion-like formations which emerge from the semicon- ductive or base material used.
  • FIG. 7 An example of a double conductor with selectable delay is shown in FIG 7.
  • Signal S that is to be delayed is directed into a buffer or line amplifier 30.
  • the inverse of the signal S' is also directed into line amplifier 30.
  • Two parallel conductors that run together in a long loop extend from line amplifier 30. As indicated above, the total length of the loop can be as great as 0.5 m.
  • FIG 7 shows a simplified embodiment with only one crossing point in each loop.
  • Crossing points 39 should be set in stochastic distribution, i.e. so that the distance between adjacent crossing points varies randomly. In this way regular reflexes and standing waves caused by them are avoided.
  • Crossing or twisted conductors of this type mutually at the same distance from each other can be provided with so-called multi-metal layer technology In such a process up to 6-7 metal layers are used.
  • Strip 40 causes a magnetic field surrounding the conductors to concentrate in the area between the conductors.
  • connection between the conductor in a loop and conductors in another adjacent loop is lessened.
  • the strip suitably stops at crossing point 39 and immediately adjacent to crossing point 39. Rising inductance can balance the increased impedance of crossing point 39 relative to a non-crossed conductor by selection of a suitable dielectric constant.
  • terminal conductors 31 , 31' extend at different distances from the line amplifier to a joint output conductor 32 and 32', respectively. The selection of conductor length and thus the terminal conductor is made in a demultiplexer (not shown) that directs the delayed signal via control lines 33 and adjustable gate circuits 34.
  • the signal that is delayed can be analog, for example in conjunction with an antenna of the type that is shown in FIG 4 and FIG 5 or digital in conjunction with an oscillator or similar.
  • the delay can be selected in stepwise fashion with each step corresponding to the length of the conductor between two output sites.
  • mixer 26 is normally used.
  • An example of such a mixer 26 is shown in FIG 8.
  • Two signals in opposite phase are output from a local oscillator 25.
  • the signals in opposite phase are directed to a mixer 26 that comprises four MOS transistors in the embodiment shown.
  • a preferred embodiment of conductor 13 is shown in FIG 9.
  • a ground conductor 35 is located in each loop.
  • Ground conductor 35 suitably runs in the center between two loops and essentially to the bottom of a loop.
  • Ground conductor 35 is connected to a ground plane.
  • the distance between two conductors in a loop is on the same order of magnitude as the distance between two loops. These distances preferably are approximately 20 ⁇ m.
  • the width of the conductor is on the order of magnitude of half of the given distance or about 8 ⁇ m. See also FIG 12.
  • the total length of the conductor is determined by the current application and can be on the order of magnitude of 0.5 m or larger.
  • a ground conductor 35 can also be used if conductor 13 is embodied as a single conductor.
  • Amplifiers can be provided in different sections of the long conductor track.
  • a suitable embodiment of an amplifier for use in digital applications is shown in FIG 10.
  • Two NAND gate circuits 36 provided with two inputs are fed back via their outputs so that change in the gate circuits occurs at the same time.
  • the signal is directed to the amplifier as an input signal and its inverse S'.
  • FIG 12 shows schematically an example of how a chip with delay elements according to the invention can look in cross section.
  • Both the conductors 13 are embodied so that an insulating material 14 surrounds them.
  • the insulating material is made of silicon oxide.
  • Silicon oxide layer 14 has a thickness that means that the distance N to a underlying silicium layer can amount to 20 ⁇ m.
  • the width of conductors 13 amounts to approximately 8 ⁇ m, while the width of the ground conductor amounts to approximately 2 ⁇ m.
  • a glass layer 37 is provided on top of silicon oxide layer 14. If air is used as the insulating material, glass layer 37 can be eliminated.
  • strip 40 Two alternative locations of strip 40 are schematically shown in FIG 12.
  • the strip can either be applied on top of glass layer 37 and thus have an extension out over conductors 13 or in oxide layer 14 between conductors 13. In both embodiments the desired concentration of the electromagnetic fields around the conductors is achieved.

Abstract

An electronic circuit with at least one active electronic component (10) and a delay element connected to the component. The delay element comprises an electric conductor (13, 18) which is composed of a conductive material on an insulating layer (14) such that the conductor's capacitive coupling to the surrounding becomes low. The conductor (13, 18) is drawn such that its inductance is minimized. The electronic component (10) and conductor (13, 18) are integrated in an integrated circuit. Conductor (13, 18) is drawn in loops of some length, and ground conductor (35) of some length connected to a ground plane is provided between the loops. The conductors cross each other a number of times in each elongated loop. The delay element can be used in an oscillator coupling or in an electronically controlled antenna. In the oscillator coupling the electronic component (10) comprises an inverter coupling (11) with an input (11) and an output (12). The conductor (13) is provided to connect input (11) to output (12), thus creating an oscillator. The electronically controlled antenna comprises a receiver (17) and a number of antenna elements (16) connected to the receiver (17). Individual antenna elements (16) are connected to the receiver (17) via automatically selectable delay elements (18) such that electric signals from different antenna elements (16) are differentially delayed dependent on the position of the antenna elements in relation to the impinging electromagnetic wave fronts.

Description

INTEGRATED ELECTRONIC CIRCUIT COMPRISING AN ELECTRONIC COMPONENT AND A DELAY ELEMENT WHICH HAS A TWISTED-PAIR CONDUCTOR LINE STRUCTURE
SCOPE OF THE INVENTION
The invention relates to a delay circuit with at least one active electronic component and a delay element connected to the component.
STATE OF THE TECHNOLOGY
In many different types of electronic circuits, components or configurations with a certain time constant or delay are used. In electronic circuits which are realized in integrated form there are delay components separated from the other components. An example of such an electronic circuit is the oscillator. A well-known way to set up an oscillator is to feed back a gate circuit with an inverter function, for example a simple inverter, via some form of time delay. The time delay can be implemented in various ways, for example by special delay circuits.
In applications where high working frequencies are used, and particu- larly when the requirements of a frequency-stable oscillator are high, a crystal oscillator is used instead. An exactly embodied crystal oscillates mechanically at a well-defined and stable frequency, and the mechanical oscillation is converted to an electric oscillation.
A problem with use of crystal oscillators is that they are relatively large. In connection with certain types of integrated circuits this becomes a problem in that a special circuit must be used with the oscillator or a crystal must be connected from outside the integrated circuit.
With known oscillators the delay that arises in RC networks normally is used, i.e., electrical networks with both resistance and capacitance. Within higher frequency ranges antennas for transmission and reception of electromagnetic signals are used with a special embodiment for exploiting signals for strong directional effects. The currently most common type of antenna in this connection is the parabolic antenna. So-called elec- tronically controlled antennas or phase array antennas are becoming more common.
A phase array antenna incorporates a group of identical radiation elements. By controlled feeding of the elements by means of a conductor network so that they act in phase, an electromagnetic beam with good direc- tionality can be achieved. The conductor network can also incorporate electronically controlled phase inverters and possibly amplifiers, one for each element, by means of which the direction of the beam can be varied without need of mechanically moveable components.
The electronically controlled phase inverters are complicated and ex- pensive instruments, and for that reason this type of antenna has not enjoyed great commercial success. Another factor which limits the use of this type of antenna is the frequency dependency of the phase inverters. The foremost area of use for the phase array antenna is within the radar area.
SUMMARY OF THE INVENTION
One purpose of the invention is to produce an electronic circuit that can be embodied in a simple manner and that can be combined with other circuits in an integrated form. The electronic circuit enables electronic delay of an electric signal. This purpose is achieved by inclusion in the invention of the special features cited in Claim 1.
According to one aspect of the invention an oscillator has been achieved that is realizable in all components in integrated form. A delay conductor with twisted or crossing conductors is provided in a feedback loop. According to another aspect of the invention an electronically controlled an- tenna has been achieved that lacks the disadvantages of the phase inverters. Electric signals from individual antenna elements are differentially delayed dependent on the position of the antenna elements in relation to the impinging electromagnetic wave fronts. Emanating from one matrix of the antenna elements that are distributed across a surface, the signals can be selectively delayed from individual antenna elements and thus affect the direction in which the antenna will be sensitive. The delay is produced in integrated circuits, which are provided in connection with the antenna elements. According to one embodiment an installation of double, twisted or crossing conductors of different length is provided between the antenna elements and a receiving unit. A conductor of a certain length is switched on by a control unit dependent on the position of the antenna element in relation to an impinging wave front of an electromagnetic wave. The given position affects the detectable characteristics of the electric signals that are received. The installation of conductors and the control unit are joined with other electronic components in a cell unit. The conductor is embodied in integrated form on an insulating layer.
The following description, drawings, and dependent patent claims explicate further advantages and special features of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will now be described in more detail with the aid of examples of embodiments with reference to attached drawings, on which FIG 1 schematically shows an embodiment according to the invention of an electronic circuit in the form of an oscillator, FIG 2 schematically shows the distributed resistance and capacitance of a conductor, FIG 3 is a diagram of the delay in a conductor as a function of the length of the conductor, FIG 4 is a principle block diagram that shows an alternative embodiment according to the invention of an electronic circuit in the form of a cell unit with antenna peripherals,
FIG 5 shows in principle how several cell units are provided on a portion of an antenna surface,
FIG 6 schematically shows an embodiment of a delay element in the form of a conductor, which constitutes part of the invention,
FIG 7 shows an embodiment schematically of a conductor that can be connected in different lengths, FIG 8 is a principal wiring diagram that shows a mixer included in an electronic circuit according to the invention,
FIG 9 shows schematically a portion of a long conductor according to the invention with intermediately located ground conductors,
FIG 10 is a principal wiring diagram that shows a digital amplifier included in an electronic circuit according to the invention,
FIG 11 is a principle wiring diagram that shows an analog amplifier included in an electronic circuit according to the invention, and
FIG 12 is a cross-section view that shows a chip with conductors according to an embodiment of the invention.
THE INVENTION
In the embodiment according to FIG 1 an inverter coupling 10 is shown schematically, whose input 11 is connected to its output 12 via a long conductor 13. For a conductor of the length I, a time period T is given by the following formula where vc is the velocity of electromagnetic propagation in the conductor.
T = — (1)
At vc=200,000km/s and a given length I of 0.5m the frequency is 200MHz. This is under the condition that the delay in the inverter coupling itself is on the magnitude of some picoseconds. With low propagation in the inverter coupling's delay of, for example, 10% the inaccuracy is in the same class as that of a crystal oscillator. This length required for attainment of the desired delay acts in many cases as a deterrent. The actually delay in the conductor is also dependent on the conductor's distributed resistance and the conductor's distributed capacitance.
In an ideal conductor any variations in time period and thus in frequency depend only on performance characteristics in the inverter coupling. If the delay in inverter coupling 10 is small relative to the delay in conductor 13, which primarily is dependent on the length of the conductor, the inverter coupling affects accuracy very little. The conductor is embodied as a metal conductor in an integrated process, for example a CMOS process.
Conductor 13 is embodied with width w and rests on some form of insulating layer 14. The insulating layer contains both metal oxide and field oxide and has thickness b. The dielectric constant of the insulating layer affects the choice of the dimensions of the conductor and of other components. As the dielectric constant of the insulating layer increases, the dimensions can be reduced.
A semiconducting material 15, for example silicium, surrounds the por- tion that holds the conductor. Inverter coupling 10 and other semiconductor circuits can be embodied in semiconducting materials, whereby these are given access to the oscillator.
In one embodiment the insulating layer is constituted of silicon oxide. The insulating layer can also be embodied in glass or another ceramic mate- rial. As an alternative the insulating layer can be embodied as an air layer. In such an embodiment the conductor rests on stanchion-like formations that extend from the semiconductor or base material used.
The conductor should be embodied so that it gives rise to as little inductance as possible. The conductor preferably runs in a loop with several parallel conductor sections so that the directions of the current in adjacent conductor sections are opposite to each other. It is also possible to provide two parallel loops in opposition or in double loops. According to an especially preferred embodiment of the invention the conductor is embodied in two loops running in parallel of which one is fed with the signal to be delayed and the other is fed with the inverse of the signal. See FIG 7 and FIG 9. In this way the influence of several different forms of interference is minimized.
In an actual conductor, time delay occurs as a result of the conductor's distributed resistance and the conductor's distributed capacitance according to the formula below. The distributed characteristics can be illustrated ac- cording to FIG 2. The total length of the conductor is I. In FIG 2, C is the total capacitance of the conductor, and R is the total resistance of the conductor. The resistance is generally given by the following formula:
A a - w w p where K. = — and
A w - /
C = ε — = ε —r- = Kc - w J (3) d b c
where K = — . For the formulas: c b ε = the dielectric constant for the insulating (oxide) layer, p = the resistance in the conductor material, a = the thickness of the conductor, b = the thickness of the insulating (oxide) layer, and w = the narrowest width of the conductor.
From the relations above, the time delay is given:
n R C tRC = Y- ' - when n → ∞ (4) o n n The time delay can be reformulated as time delay in small time segments, where the following obtains:
Δ/ ΔtRC = ΔR - ΔC = Kr • — - Kc - w - Δ/ = Krc • Δ/2 (5) w
The constants used previously are consolidated here in a new con- stant Krc, for which the following obtains:
Figure imgf000009_0001
This constant is strongly dependent on temperature and voltage, for which reason it should be minimized. It should be noted that the time delay does not depend on the line width of the process. By means of transition to infinitely small time segments it can be determined that the result is a function that increases potentially.
The diagram in FIG 3 with the curve tA shows the delay that depends on the velocity of propagation in the conductor. The curve tRC shows the delay that depends on the resistance R of the conductor and capacitance C. The velocity of propagation v in the conductor cannot be affected to any great degree. It can be shown that
Figure imgf000009_0002
where c = the speed of light and εr= the dielectric constant of the ma- terial.
As emerges from the above formulas, the effect of tRC is lower the thicker the insulating layer is and the thicker the conductor which is used. The dashed line in FIG 3 shows how the curve tRC is affected when the insulating layer and the conductor are made thicker. By using the area in which the effect from tRC is low, the oscillator can have good stability and its frequency of oscillation is completely controlled essentially by the length of the conductor. Insulation layer 14 is embodied preferably with significantly greater thickness b than the occurring oxide layer. A suitable thickness exceeds 10 μm and is preferably in the range of 10-100 μm if the oscillator is to be used at frequencies around 1GHz. A thickness b suitable for many applications is 20 μm. With increasing values of b other dimensions can also in- crease. External dimensions naturally also affect the final dimensions. The thickness of conductor 13 is in commonly occurring processes around 1 μm, and an increase in thickness, but not width, improves the oscillator's characteristics and performance.
Inductive characteristics also need special attention as regards the length of the conductor. It is thus not suitable to embody the conductor in a spiral form or similar. The length should also be suited to the desired wavelength of the oscillator. The length of the conductor preferably amounts to a multiple of the half wavelength or, more preferably, half the wavelength.
In the embodiment according to FIG 4 the invention comprises an- tenna elements 16, which are connected to a cell unit 22. Cell unit 22, which is designated by dashed lines in FIG 4, comprises an installation of individually switchable delay elements 18, by means of which a signal received in antenna element 16 is directed on to a receiver 17 acting in common for a number of cell units 22. The received signal is amplified in an amplifier 23. Switching of delay elements 18 is accomplished in the embodiment according to FIG 4 by means of a demultiplexer 19 and a multiplexer 21. Delay elements 18 in the form of conductors connect demultiplexer 19 and multiplexer 21 , and an individual delay element 18 is switched by means of adjustment of demultiplexer 19 and/or multiplexer 21. Adjustment is done by a control unit 20, which is connected to a central processing unit (CPU) 24 in common for several cell units 22.
In order to lessen problems with persistent capacitive and inductive coupling, among other things, whereby the incoming signal can have a frequency on the order of magnitude of 12 GHz, the incoming signal is prefera- bly merged with a signal from a local oscillator 25 and sent to a mixer 26. See also FIG 8. From mixer 26 the signal suitably has a frequency on the order of magnitude of some GHz.
The different control units 20 and possibly also the local oscillators 25 are connected to a CPU 24, preferably by a buss connection 27. It can be suitable to include in CPU 24 means for synchronization of the different oscillators 25. Synchronization can also occur via control unit 20. According to an alternative embodiment (not shown) the oscillator is not included in the cell unit. A common oscillator is instead preferably located in the CPU. The embodiment of the oscillator used should be adjustable for different frequency bands.
All components, which are included in cell unit 22, can be embodied to be integrated in semiconducting materials. The semiconductor process used should be selected with regard to high frequency characteristics, especially as regards amplifier 23, and to characteristics that affect conductors that can be included in the delay elements. The noise ratio should be on the order of magnitude of 0.5 dBu. Very low capacity switches should be sought. The conductor is embodied as a metal conductor in an integrated process, for example a CMOS process.
Receiver 17 can be embodied in a conventional way as a satellite re- ceiver. It can be the case that satellite receivers are provided with control instruments for motorized control of a conventional parabola antenna. Receiver 17 includes similar control instruments, and a control output 28 transfers control information to CPU 24. The control information can include instructions to sweep with the electrically controlled antenna across a certain arc in connection with finding a new transmitter. When a transmitter is found, the control information will continuously control the adjustment of the antenna so that the transmitter can be followed if the antenna is physically angled or displaced in relation to the transmitter. A signal conductor 29, preferably from each of the cell units 22, conducts a received signal from the an- tenna to receiver 17. The quality and certain characteristics of the signal from the antenna affect how CPU 24 will be controlled in turn in order to af- feet the different control units 20 in the cell units 22. The number of delay elements 18, which are required in order that the desired possibilities for fine tuning of the antenna can be achieved, varies with the current application. For normal satellite receiver application some hundreds of delay elements 18 should be sufficient. The characteristics of amplifier 23 also affect how many delay elements 18 are required. With very good amplification characteristics and signal-noise relation in the amplifier the number of directionally adjusting delay elements 18 can be held down.
An antenna embodied with components according to the above can be embodied as indicated by FIG 5. Provided on a surface are a number of cell units 22. Every cell unit 22 is connected to four antenna elements 16A-16D attached in pairs. Two opposing first antenna elements 16A and 16B are dedicated to reception of horizontally polarized signals, and two opposing second antenna elements 16C and 16D are dedicated to reception of verti- cally polarized signals. Other configurations can also be used for reception of different types of signals. Every antenna element 16A-16D can be some millimeters long and wide, and different forms can occur. Antenna elements 16A-16D are preferably embodied of metal. The outer dimensions of the antenna with a suitable number of antenna elements can be such that the sur- face of the antenna is on the order of magnitude of 0.1-1.0 m2.
Buss connection 27 preferably runs through or past each cell unit 22. The different antenna elements 16A-16D can be attached to amplifier 23 directly or via a multiplexer, which is suitably controlled by control unit 20.
FIG 6 shows in principle how conductors 18 can be embodied. Each conductor 18 is embodied with width w and rests on some form of insulating layer 14. The insulating layer is normally comprised of both metal oxide and field oxide and had thickness b. A semiconducting material 15, for example silicium, surrounds the section that supports the conductor. In the semicon- ductive material amplifier 23 and further semiconductor circuits can be em- bodied. In one embodiment the insulating layer is made of silicon oxide. The insulating layer can also be embodied of glass. As an alternative the insulating layer can be embodied as a layer of air. In such an embodiment the conductor rests on stanchion-like formations which emerge from the semicon- ductive or base material used.
An example of a double conductor with selectable delay is shown in FIG 7. Signal S that is to be delayed is directed into a buffer or line amplifier 30. The inverse of the signal S' is also directed into line amplifier 30. Two parallel conductors that run together in a long loop extend from line amplifier 30. As indicated above, the total length of the loop can be as great as 0.5 m.
The two conductors cross each other at a number of intersections or crossing points 39 in each loop. FIG 7 shows a simplified embodiment with only one crossing point in each loop. Crossing points 39 should be set in stochastic distribution, i.e. so that the distance between adjacent crossing points varies randomly. In this way regular reflexes and standing waves caused by them are avoided. Crossing or twisted conductors of this type mutually at the same distance from each other can be provided with so-called multi-metal layer technology In such a process up to 6-7 metal layers are used. Between and parallel to conductors 13 a strip 40 of material with higher dielectric constant than surrounding oxide layers and other surrounding material is provided. Strip 40 causes a magnetic field surrounding the conductors to concentrate in the area between the conductors. In this way the connection between the conductor in a loop and conductors in another adjacent loop is lessened. The strip suitably stops at crossing point 39 and immediately adjacent to crossing point 39. Rising inductance can balance the increased impedance of crossing point 39 relative to a non-crossed conductor by selection of a suitable dielectric constant. From each of the two parallel conductors 13, terminal conductors 31 , 31' extend at different distances from the line amplifier to a joint output conductor 32 and 32', respectively. The selection of conductor length and thus the terminal conductor is made in a demultiplexer (not shown) that directs the delayed signal via control lines 33 and adjustable gate circuits 34. The signal that is delayed can be analog, for example in conjunction with an antenna of the type that is shown in FIG 4 and FIG 5 or digital in conjunction with an oscillator or similar. The delay can be selected in stepwise fashion with each step corresponding to the length of the conductor between two output sites. When the device according to the invention is used with antennas and receivers, mixer 26 is normally used. An example of such a mixer 26 is shown in FIG 8. Two signals in opposite phase are output from a local oscillator 25. The signals in opposite phase are directed to a mixer 26 that comprises four MOS transistors in the embodiment shown. A preferred embodiment of conductor 13 is shown in FIG 9. Conductor
13 runs in two parallel tracks in elongated loops. The tracks cross each other at crossing points 39 at a number of points in each loop. The two tracks are fed with signals in opposite phase. In this way the circuit is less sensitive to interference. A portion of a ground conductor 35 is located in each loop. Ground conductor 35 suitably runs in the center between two loops and essentially to the bottom of a loop. Ground conductor 35 is connected to a ground plane. The distance between two conductors in a loop is on the same order of magnitude as the distance between two loops. These distances preferably are approximately 20 μm. The width of the conductor is on the order of magnitude of half of the given distance or about 8 μm. See also FIG 12. The total length of the conductor is determined by the current application and can be on the order of magnitude of 0.5 m or larger. A ground conductor 35 can also be used if conductor 13 is embodied as a single conductor.
Amplifiers can be provided in different sections of the long conductor track. A suitable embodiment of an amplifier for use in digital applications is shown in FIG 10. Two NAND gate circuits 36 provided with two inputs are fed back via their outputs so that change in the gate circuits occurs at the same time. The signal is directed to the amplifier as an input signal and its inverse S'.
A corresponding amplifier for analog applications is shown schemati- cally in FIG 11. Both signal S and its inverse S' are also directed to the amplifier in this case.
FIG 12 shows schematically an example of how a chip with delay elements according to the invention can look in cross section. Two conductors 13 in a loop are embodied with an intermediate distance D = 20 μm. In addi- tion, another loop conductor runs parallel with a ground conductor 35 at essentially the same distance M = 20 μm. Both the conductors 13 are embodied so that an insulating material 14 surrounds them. In the embodiment shown the insulating material is made of silicon oxide. Silicon oxide layer 14 has a thickness that means that the distance N to a underlying silicium layer can amount to 20 μm. The width of conductors 13 amounts to approximately 8 μm, while the width of the ground conductor amounts to approximately 2 μm.
The distances mentioned are approximate and can vary depending on application and material selected for insulating layer 14. A glass layer 37 is provided on top of silicon oxide layer 14. If air is used as the insulating material, glass layer 37 can be eliminated.
Two alternative locations of strip 40 are schematically shown in FIG 12. The strip can either be applied on top of glass layer 37 and thus have an extension out over conductors 13 or in oxide layer 14 between conductors 13. In both embodiments the desired concentration of the electromagnetic fields around the conductors is achieved.

Claims

CLAIMS:
1. An electronic delay circuit with at least one active electronic component (10) and a delay element connected to the component, wherein the delay element comprises an electric conductor (13, 18), the conductor (13, 18) is formed by a conductive material on an insulating layer (14) such that the conductor's capacitive coupling to the surrounding becomes low, the conductor (13, 18) is drawn in elongated loops, the electronic component (10) and conductor (13, 18) are integrated in an integrated circuit, and the conductor (13, 18) is drawn in the form of conductor sections that run parallel, the directions of current being reverse in adjacent conductor sections, characterized in that portions of the conductors cross each other a number of times in each elongated loop.
2. An electronic circuit according to Claim ^characterized in that the insulating layer (14) is composed of oxide material.
3. An electronic circuit according to Claim 1, characterized in that the insulating layer (14) surrounds conductor (13, 18).
4. An electronic circuit according to Claim ^characterized in that the insulating layer (14) is composed of air.
5. An electronic circuit according to Claim ^characterized in that terminal conductors (31) are connected to conductor (13, 18) at cer- tain intervals, and that terminal conductors (31) are connected via transmission gates (34) to joint output conductors (32).
6. An electronic circuit according to Claim 5, characterized in that terminal conductors (31) are connected to the joint output conductors (32) via line amplifiers (30) and that line amplifiers (30) are embodied with higher amplification the longer conductor (13, 18) has been run at the connection with terminal conductor (31).
7. An electronic circuit according to Claim ^characterized in that the thickness of the insulating layer (14) exceeds 20 μm.
8. An electronic circuit according to Claim ^characterized in that the thickness of the conductor (13) exceeds 1 μm.
9. An electronic circuit according to Claim ^characterized in that the electronic component (10) comprises an inverter connection with input (11) and output (12) and that at least one conductor (13) is provided in order to connect input (11) to output (12) during formation of an oscillator.
10. An electronic circuit according to Claim 9, characterized in that inverter connection (10) and conductor (13) are made in a semicon- ductor process with semiconductor / metal on glass / ceramic.
11. An electronic circuit according to Claim 9, characterized in that said inverter coupling (10) is made of semiconductor material.
12. An electronic circuit according to Claim 9, characterized in that said inverter coupling (10) is made in a process which includes silicium on the insulator.
13. An electronic circuit according to Claim 1, characterized in that the length of said conductor (13) exceeds 0.2 m.
14. An electronic circuit according to Claim ^characterized in that the conductors are provided with intersections (39) at a number of points with mutually varying distance between the points.
15. An electronic circuit according to Claim 1, comprising an electronically controlled antenna, a receiver (17), and a number of antenna elements (16) connected to said receiver (17), c h a r a c t e r i z e d in that individual antenna elements (16) are connected to the receiver (17) via automatically selectable delay elements (18) such that electric signals from different antenna elements (16) are differentially delayed dependent on the position of the antenna elements in relation to the impinging electromagnetic wave fronts.
16. An electronic circuit according to Claim 15, characterized in that said delay elements (18) comprise electrical conductors of different lengths.
17. An electronic circuit according to Claim 11, characterized in that individual antenna elements (16) are connected to said delay elements (18) via a demultiplexer (19), that individual antenna elements (16) are connected to said receiver (17) via a multiplexer (21), and that said demultiplexer (19) is operatively connected to a control unit (20) such that an individual delay element (18) is switched dependent on the characteristics of the received electric signals.
18. An electronic circuit according to Claim 17, characterized in that said demultiplexer (19), multiplexer (21) and control unit (20) are provided together with said delay elements (18) in a cell unit (22) made as an integrated circuit, and that an antenna element (16) is associated with a cell unit (22).
19. An electronic circuit according to Claim 17, characterized in that said receiver (17) is connected to a Central Processing Unit (24) for transfer of control information for controlling the antenna, and that said CPU (24) is connected to the control units (20) associated with said antenna elements (16).
20. An electronic circuit according to Claim 17, characterized in that individual antenna elements (16) are connected to said demultiplexer
(19) via an amplifier (23).
21. An electronic circuit according to Claim 17, characterized in that individual antenna elements (16) are connected to said demultiplexer
(19) via a mixer (26), and that said mixer (26) is also connected to an oscillator (25).
22. An electronic circuit according to Claim ^characterized in that a strip (40) of material with higher dielectric constant than surrounding material is embodied between conductors in a loop.
23. An electronic circuit according to Claim 22, characterized in that strip (40) is embodied with interrupts in the vicinity of the intersections (39).
24. An electronic circuit according to Claim 22, c h a r a c t e r i z e d in that strip (40) is embodied on substantially the same plane as the plane supporting conductors (13).
25. An electronic circuit according to Claim 22, characterized in that strip (40) is embodied on a plane lying above the plane supporting conductors (13).
PCT/SE2000/000884 1999-05-05 2000-05-04 Integrated electronic circuit comprising an electronic component and a delay element which has a twisted-pair conductor line structure WO2000072442A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU47926/00A AU4792600A (en) 1999-05-05 2000-05-04 Integrated electronic circuit comprising an electronic component and a delay element which has a twisted-pair conductor line structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9901665A SE9901665D0 (en) 1999-05-05 1999-05-05 delay circuit
SE9901665-1 1999-05-05

Publications (1)

Publication Number Publication Date
WO2000072442A1 true WO2000072442A1 (en) 2000-11-30

Family

ID=20415511

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SE2000/000884 WO2000072442A1 (en) 1999-05-05 2000-05-04 Integrated electronic circuit comprising an electronic component and a delay element which has a twisted-pair conductor line structure

Country Status (3)

Country Link
AU (1) AU4792600A (en)
SE (1) SE9901665D0 (en)
WO (1) WO2000072442A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5030932A (en) * 1988-07-07 1991-07-09 Elmec Corporation Electromagnetic delay line
US5389735A (en) * 1993-08-31 1995-02-14 Motorola, Inc. Vertically twisted-pair planar conductor line structure
US5561434A (en) * 1993-06-11 1996-10-01 Nec Corporation Dual band phased array antenna apparatus having compact hardware
US5871655A (en) * 1998-03-19 1999-02-16 International Business Machines Corporation Integrated conductor magnetic recording head and suspension having cross-over integrated circuits for noise reduction
WO1999021274A2 (en) * 1997-10-22 1999-04-29 Avancerade Logikmaskiner Ab Integrated electronic circuit comprising an oscillator with passive circuit elements

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5030932A (en) * 1988-07-07 1991-07-09 Elmec Corporation Electromagnetic delay line
US5561434A (en) * 1993-06-11 1996-10-01 Nec Corporation Dual band phased array antenna apparatus having compact hardware
US5389735A (en) * 1993-08-31 1995-02-14 Motorola, Inc. Vertically twisted-pair planar conductor line structure
WO1999021274A2 (en) * 1997-10-22 1999-04-29 Avancerade Logikmaskiner Ab Integrated electronic circuit comprising an oscillator with passive circuit elements
US5871655A (en) * 1998-03-19 1999-02-16 International Business Machines Corporation Integrated conductor magnetic recording head and suspension having cross-over integrated circuits for noise reduction

Also Published As

Publication number Publication date
AU4792600A (en) 2000-12-12
SE9901665D0 (en) 1999-05-05

Similar Documents

Publication Publication Date Title
JP5132054B2 (en) On-chip circuit pad structure
US6674339B2 (en) Ultra wideband frequency dependent attenuator with constant group delay
US7629858B2 (en) Time delay oscillator for integrated circuits
US4931753A (en) Coplanar waveguide time delay shifter
US20100134369A1 (en) High gain steerable phased-array antenna
US4604591A (en) Automatically adjustable delay circuit having adjustable diode mesa microstrip delay line
KR20010013068A (en) A radio apparatus loop antenna
CN111048877B (en) Miniature slow wave transmission line with asymmetric grounding and related phase shifter system
US20090237306A1 (en) Compact integrated monopole antennas
KR100980678B1 (en) Phase shifter
US6522186B2 (en) Hierarchical clock grid for on-die salphasic clocking
US6486829B1 (en) Integrated electronic circuit comprising an oscillator with passive circuit elements
WO2000072442A1 (en) Integrated electronic circuit comprising an electronic component and a delay element which has a twisted-pair conductor line structure
JPH10505202A (en) Integrated circuit structure with active microwave device and at least one passive device
WO2000065714A1 (en) Integrated electronic circuit comprising an electronic component and a delay element which is connected to the component
US6791502B2 (en) Stagger tuned meanderline loaded antenna
US4490694A (en) Microwave switch wherein PIN diode is mounted orthogonal to microstrip substrate
US20220416382A1 (en) Tsv phase shifter
JP3398527B2 (en) Crossing structure of transmission line
US4359699A (en) PIN Diode attenuator exhibiting reduced phase shift and capable of fast switching times
JP2003188606A (en) Amplitude compensation circuit
US6420943B1 (en) Conducting path with two different end characteristic impedances determined by doping
JPH0646682B2 (en) Short-circuited microstrip antenna
RU1815699C (en) Controlled attenuator
JPH09172304A (en) Impedance adjusting unit for coplaner line

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AL AM AT AU AZ BA BB BG BR BY CA CH CN CR CU CZ DE DK DM EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR LR LS LT LU LV MA MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP