WO2000059021A1 - Enhancement of silicon oxide etch rate and substrate selectivity with xenon addition - Google Patents
Enhancement of silicon oxide etch rate and substrate selectivity with xenon addition Download PDFInfo
- Publication number
- WO2000059021A1 WO2000059021A1 PCT/US2000/006630 US0006630W WO0059021A1 WO 2000059021 A1 WO2000059021 A1 WO 2000059021A1 US 0006630 W US0006630 W US 0006630W WO 0059021 A1 WO0059021 A1 WO 0059021A1
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- Prior art keywords
- plasma
- oxide
- amount
- etching
- xenon
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- 229910052724 xenon Inorganic materials 0.000 title claims abstract description 51
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 title claims abstract description 45
- 239000000758 substrate Substances 0.000 title claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title description 16
- 229910052814 silicon oxide Inorganic materials 0.000 title description 6
- 238000000034 method Methods 0.000 claims abstract description 78
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
Definitions
- the invention relates generally to etching of silicon integrated circuits.
- the invention relates to etching silicon oxide and related materials in a process that is capable of greatly reduced etching rates for silicon nitride and other non-oxide materials but still produces a vertical profile in the oxide.
- Oxide etching has presented some of the most difficult challenges.
- Oxide is a somewhat generic term used for silica, particularly silicon dioxide (SiO 2 ) although slightly non-stoichiometric compositions SiO x are also included, as is well known.
- the term oxide also covers closely related materials, such as oxide glasses including borophosphosilicate glass (BPSG) and other silicate glasses. Some forms of silicon oxynitride are considered to more closely resemble an oxide than a nitride. Small fractions of dopants such as fluorine or carbon may be added to the silica to reduce its dielectric constant.
- Oxide materials are principally used for electrically insulating layers, often between different levels of the integrated circuit.
- the thickness of the oxide layers cannot be reduced to much below 0.5 to l ⁇ m.
- the minimum feature sizes of contact and via holes penetrating the oxide layer are being pushed to well below 0.5 ⁇ m, the current developmental goal being 0.13 ⁇ m.
- the holes etched in the oxide must be highly anisotropic and must have high aspect ratios, defined as the depth to the minimum width of a hole.
- the underlying silicon may be formed with active doped regions of thicknesses substantially less than the depth of the etched hole (the oxide thickness). Due to manufacturing variables, it has become impossible to precisely time a non-selective oxide etch to completely etch through the silicon oxide without a substantial probability of also etching through the underlying active silicon region.
- Anisotropic via profiles can obtained by dry plasma etching in which an etching gas, usually a fluorine-based gas, is electrically excited into a plasma.
- the plasma conditions may be adjusted to produce highly anisotropic etching in many materials.
- the anisotropy should not be achieved by operating the plasma reactor in a purely sputtering mode in which the plasma ejects particles toward the wafer with sufficiently high energy that they sputter the oxide.
- Sputtering is generally non-selective. High-energy sputtering also seriously degrades semiconducting silicon exposed at the bottom of the etched contact hole. If is metal is exposed at the bottom of a via, sputtering tends to sputter some metal onto the sidewalls of the via, vitiating the effect of subsequently deposited barrier layers.
- etching processes have been developed which depend more upon chemical effects. These processes are often described as reactive ion etching (RLE).
- RLE reactive ion etching
- the most popular active etching gas is a fluorocarbon (including hydro fluorocarbons) although some effort is being expended with other fluorinated gases such as SF 6 .
- a sufficiently high degree of selectivity allows new structures to be fabricated without the need for precise lithography for each level.
- An example of such an advanced structure is a self-aligned contact (SAC), illustrated in the cross-sectional view of FIG. 1.
- the illustrated SAC structure includes parts of two transistors formed on a silicon substrate 2.
- a polysilicon gate layer 4, a tungsten suicide barrier and glue layer 6, and a silicon nitride cap layer 8 are deposited and photolithographically formed into two closely spaced gate structures 10 having a gap 12 therebetween.
- Chemical vapor deposition (CVD) then deposits onto the wafer a substantially conformal layer 14 of silicon nitride (Si 3 N 4 ), which coats the top and sides of the gate structures 10 as well as a bottom 15 of the gap 12.
- the nitride deviates from the indicated stoichiometry and may have a composition of SiN x , where x is between 1 and 1.5; the nitride acts as an electrical insulator.
- Dopant ions are ion implanted using the gate structures 10 as a mask to form a self-aligned p-type or n-type well 16, which acts as a common source for the two transistors having respective gates 10.
- the drain structures of the two transistors are not illustrated.
- An oxide field layer 18 is deposited over this previously defined structure, and an organic photoresist layer 20 is deposited over the oxide layer 18 and photographically defined into a mask.
- a subsequent oxide etching step etches a contact hole 22 through the oxide layer 18 and stops on a portion 24 of the nitride layer 14 underlying the hole 22. It is called a contact hole because the metal subsequently deposited into the contact hole 22 forms a contact to underlying silicon rather than to a metallic interconnect layer.
- a soft post-etch plasma treatment with hydrogen or nitrogen removes the nitride portion 24 at the bottom 15 of the gap 12.
- the silicon nitride acts as an electrical insulator between the gate structure 10 and the metal, usually aluminum, thereafter filled into the contact hole 22.
- the SAC structure and process offer the advantage that the contact hole 22 may be wider than the width of the gap 12 between the gate structures 10.
- the gap 12 between the gate structures 10 may be very small, less than lOnm, while the width of the contact hole 22 may be significantly larger.
- the photolithographic registry of the contact hole 22 with the gate structures 10 need not be precise.
- the imprecise definition of the mask in the photoresist layer 20 may place one side of the contact hole 22 near the middle of the gap 12, as illustrated in FIG. 2, with a narrow side gap 26 forming at the bottom of the contact hole 22 on the side of one of the gate structures.
- the width of the side gap 26 may be 0.1 ⁇ m or less.
- the SAC oxide etch must be highly selective to nitride. That is, the process must produce an oxide etch rate that is much greater than the nitride etch rate. Numerical values of selectivity are calculated as the ratio of the oxide to nitride etch rates. Selectivity is especially critical at corners 28 of the nitride layer 14 above and next to the gap 12 or 26 since the nitride corners 28 are the portion of the nitride exposed the longest to the oxide etch. Furthermore, they have a geometry favorable to fast etching that tends to create facets at the nitride corners 28. The corners of the gate structures 10 will thereby be prematurely exposed if the faceting is severe enough.
- CMP chemical mechanical polishing
- the polishing planarization produces a flat top surface in the oxide layer over the wavy underlying substrate, thereby producing an oxide layer of significantly varying thickness.
- the time of the oxide etch must be set significantly higher, for example, by 100% than the etching time for the design thickness to assure penetration of the variable thickness oxide.
- This extra etching time, called over etch also accommodates other process variations.
- the nitride is exposed that much longer to the etching environment.
- the required degree of selectivity is reflected in the reduced probability of an electrical short through the nitride layer 14 between the gate structures 10 and the metal filled into the contact hole 22.
- the etch must also be selective to photoresist, for example, at facets 29 that develop at corners of the mask 20, but the requirement of photoresist selectivity is often not so stringent since the photoresist layer 20 may be made much thicker than the nitride layer 14.
- the photoresist thickness is limited so photoresist selectivity may become critical.
- HDP high-density plasma
- Such HDP etch reactors achieve a high-density plasma having a minimum average ion density of 10 u cm "3 across the plasma exclusive of the plasma sheath.
- electron cyclotron resonance and remote plasma sources the commercially most important techniques involve inductively coupling RF energy into the source region.
- the inductive coil may be cylindrically wrapped around the sides of chamber or be a flat coil above the top of the chamber or represent some intermediate or combination geometry or other variants.
- An example of an inductively coupled plasma etch reactor is the Inductive Plasma
- IPS Source (IPS) etch reactor, which is available from Applied Materials and which Collins et al. describe in U.S. Patent Application, Serial No. 08/733,544, filed October 21, 1996 and in European Patent Publication EP-840,365-A2.
- a wafer 30 to be processed is closely supported on a cathode pedestal 32 supplied with RF power from a first RF power supply 34.
- a silicon ring 36 surrounds the pedestal 32 and is controllably heated by an array of heater lamps 38.
- a grounded silicon wall 40 surrounds the plasma processing area.
- a silicon roof 42 overlies the plasma processing area, and lamps 44 and water cooling channels 46 control its temperature. In the described embodiments, the silicon roof 42 is grounded, but it may be separately RF biased for other applications.
- the volume of the vacuum processing chamber is about 23 liters for a 200mm wafer. Chamber volumes scale between the second and third power of the wafer diameter.
- the temperature-controlled silicon ring 36 and silicon roof 42 may be used to scavenge fluorine from the fluorocarbon plasma. For some applications, fluorine scavenging can be accomplished by a solid carbon body, such as amorphous or graphitic carbon, or by other non-oxide silicon-based or carbon- based materials, such as silicon carbide.
- Processing gas is supplied from one or more bottom gas feeds 48 through a bank of mass flow controllers 50 under the control of a system controller 52, in which is stored the process recipe in magnetic or semiconductor memory. Gas is supplied from respective gas sources 54, 56.
- the conventional oxide etch recipe uses a combination of a fluorocarbon or hydrofluorocarbon and argon. Octafluorocyclobutane (C 4 F 8 ) and trifluoromethane (CHF 3 ) are popular fluorocarbons, but other hydrogen-free fluorocarbons, hydro fluorocarbons, and combinations thereof are used.
- the etching gas composition is the subject of at least part of this invention.
- a metal manifold wall 58 connected mechanically and electrically to the silicon chamber wall 40 defines a pumping channel 59 surrounding the lower portion the main processing area and connected to it by an annular constricted orifice 60.
- An unillustrated robot blade transfers the wafer 30 into and out of the chamber through an unillustrated slit valve associated with an opening 61 in the manifold wall 58.
- An unillustrated vacuum pumping system connected to the a pumping channel 59 maintains the chamber at a preselected pressure, as set by the controller 52.
- the controller 52 controls the various reactor element according to the etch recipe and thus determines the etch process.
- the silicon roof 42 is grounded, but its semiconductor resistivity and thickness are chosen to pass generally axial RF magnetic fields produced by an inner inductive coil stack 62 and an outer inductive coil stack 64 positioned above the roof 42 and powered by respective RF power supplies 66, 68.
- a single RF power supply and an RF power splitter may be substituted.
- the frequencies of the three RF power supplies were different and all in the low megahertz range.
- Optical emission spectroscopy (OES) is a conventional monitoring process used for end-point detection in plasma etching.
- An optical fiber 70 is placed in a hole 72 penetrating the chamber wall 40 to laterally view the plasma area 74 above the wafer 30.
- An optical detector system 76 is connected to the other end of the fiber 70 and includes one or more optical filters and processing circuitry that are tuned to the plasma emission spectrum associated with the aluminum, copper, or other species in the plasma. Either the raw detected signals or a trigger signal is electronically supplied to the controller 52, which can use the signals to determine that one step of the etch process has been completed when either a new signal appears or an old one decreases. With this determination, the controller 52 can adjust the process recipe or end the etching step according to the power levels set primarily in the source power supplies 66, 68.
- the IPS chamber can be operated to produce a high-density or a low-density plasma.
- the temperature of the silicon surfaces and of the wafer can be controlled.
- the bias power applied to the cathode 32 by the bias power supply 34 can be adjusted independently of the source power 66, 68 applied to the coils 62, 64 and can be made small enough or even zero for a soft plasma etch process. Alternatively, it may be left electrically floating, but a negative DC self-bias generally develops nonetheless.
- etch stop This deleterious condition is referred to as etch stop.
- the selectivity is partly achieved in many recipes by the use of a chemically inactive diluent gas, most typically argon (Ar).
- argon is at least partially ionized in the plasma so that it is accelerated across the plasma sheath adjacent to the wafer 30.
- the energetic argon at least at lower energy, promotes the chemically based etching of silica and other oxide layers in a process often referred to as reactive ion etching (RLE).
- RLE reactive ion etching
- the directionality of the argon ions also promotes the formation of the protective polymer on the sidewalls while acting to prevent its formation on the hole bottom.
- argon is the most popular diluent gas.
- noble gases including helium, neon, xenon, and krypton (He, Ne, Xe, Kr) as alternatives to argon, but no advantage is ascribed to any of them. See, for example, U.S. Patents 5,173,151 to Namose and 5,81 1 ,357 to Armacost et al.
- xenon is preferred. See, for example, U.S. Patent 5,384,009 to Mak et al.
- the conditions may change over time on the order of minutes as the chamber warms up or on the order of days as the equipment ages or as chamber parts are replaced. It is felt that hardware can be controlled to no better than ⁇ 5% or 6%, and a safety margin or 3 to 6 is desired. Mass flow controllers 46 are difficult to control to less than ⁇ lsccm
- C 4 F g octafluorocyclobutane
- C 5 F g Another heavy fluorocarbon that is used for oxide etching is C 5 F g , typically in the form of one of the isomers of octafluoropentadiene.
- CO carbon monoxide
- C 4 F g Another heavy fluorocarbon that is used for oxide etching is C 5 F g , typically in the form of one of the isomers of octafluoropentadiene.
- CO carbon monoxide
- C 4 F g is not only toxic, it also forms carbonyls with nickel and iron in gas cylinders and supply lines. The carbonyls are believed to contaminate wafers. For these reasons, the use of CO is not preferred.
- Hexafluorobutadiene has the chemical structure illustrated in FIG. 4.
- the combination of C 4 F 6 and large amounts of Ar is shown to produce highly isotropic etching with acceptable selectivity to corner nitride in SAC and related applications.
- the process is shown to exhibit a wide process window.
- even better nitride selectivity is desired, and even wider process windows are desired.
- some applications involving a very deep oxide etch do not require such high nitride selectivity but require a high selectivity to photoresist.
- etching a trench for forming sidewall capacitors for dynamic random access memory (DRAM) may require etching the fairly narrow trench through 1.5 ⁇ m or more of oxide while using only a photoresist mask. In this application, trench profile is less an issue than is photoresist selectivity.
- DRAM dynamic random access memory
- xenon (Xe) as the diluent gas in fluorine-based oxide etching provides very high selectivity to nitride and a wide process window, especially in combination with heavy fluorocarbons, for example, hexafluorobutadiene (C 4 F 6 ).
- heavy fluorocarbons for example, hexafluorobutadiene (C 4 F 6 ).
- the amount of xenon should be approximately equal to or, in some circumstances, substantially greater than that of the fluorocarbon.
- Krypton (Kr) promises similar effects.
- Xenon dilution of a heavy fluorocarbon gas is particularly advantageous in etching an oxide layer in an area encompassing a hole etched into the oxide layer, thereby reducing faceting of the oxide corner.
- Xe and heavy fluorocarbons such as C 4 F 6 is also advantageous in avoiding faceting of oxide corners.
- the use of Xe or Kr as a carrier gas for oxide etching can also be extended to other fluorine-containing etching, especially the heavier hydrogen-free fluorocarbons.
- FIG. 1 is a cross-section view of a self-aligned contact (SAC) structure.
- FIG. 2 illustrates a variant of the structure of FIG. 1.
- FIG. 3 is a schematic view, partly in cross section, of an inductively coupled high- plasma density etch reactor.
- FIG. 4 illustrates the chemical structure of hexafluorobutadiene.
- FIG. 5 is a chart of histograms showing the distribution of radicals produced in a plasma of C 4 F 6 and different noble gases.
- FIG. 6 is a graph of the electron density as a function of pressure in a plasma of different noble gases.
- FIG. 7 is a graph of the average electronic density as a function of pressure in a plasma of different noble gases.
- FIG. 8 is a graph illustrating selectivity to nitride in a plasma etch process using C 4 F 6 and Xe.
- FIG. 9 is a cross-sectional view of an idealized dual-damascene structure formed by a timed counterbore etch.
- FIG. 10 is a cross-sectional view of a realistic but acceptable dual-damascene structure by a timed counterbore etch.
- FIG. 11 is a cross-section view of a unacceptable dual-damascene structure formed by a timed counterbore etch.
- FIG. 12 is a cross-sectional view of a structure produced by a timed trench etch of an oxide layer having exposed corners.
- FIGS. 13 and 14 are cross sectional view of a similar structure produced by a timed trench etch of an oxide layer having exposed corners.
- FIGS. 15 and 16 are graphs illustrating the dependence of faceting upon the flows of the heavy fluorocarbon and of xenon.
- Xenon (Xe) demonstrates a substantially different behavior from argon (Ar) when used as a diluent gas in fluorine-based oxide etching.
- a mass spectrometer was attached to the chamber while a mixture of C 4 F 6 and either helium (He), Ar, or Xe was admitted to the chamber and excited into a plasma under fairly realistic excitation power and pressure.
- the relative intensities for the ions C + , F + , CF + , CF 2 + , and CF 3 + are shown in FIG. 5 for the three diluents He, Ar, and Xe. No attempt was made to ionize neutral radicals.
- the electron densities n e for the four noble gases He, Ne, Ar, and Xe are plotted in the graph of FIG. 6 as a function of the pressure in the chamber.
- Krypton (Kr) is not included because it is considered to be too expensive for most commercial use.
- xenon produces a significantly higher electron density, which is not unexpected because the heavier noble gases have progressively lower ionization energies.
- the slope of the electron densities as a function of pressure is smaller above 10 milliTorr, indicating that a wider process window can be found at the higher pressures.
- the electron density equals the ion density, which is the density of interest in the etching plasma of the invention.
- the plasma also includes fluorocarbons or other fluorine-containing gases
- fluorine is the most electronegative atom and, in balancing positively charged ions with negatively charged particles, both electrons and negatively charged fluorine ions need to be considered.
- the average electron energies ⁇ E e > for the same noble gases are plotted in the graph of FIG. 7 as a function of chamber pressure. Three points are observed. First, a xenon plasma has the lowest average electron energy, though not substantially lower than an argon plasma. Secondly, all the gases show an inflection point at lower pressures. However, the inflection point for xenon is at the lowest pressure, about 5 milliTorr, and the electron energy is substantially flat above that pressure.
- radon would perhaps provide even more advantageous results than xenon, but it is extremely rare and is radioactive.
- Krypton (Kr) is expected to provide some advantages over argon, but not as much as xenon.
- the experimental etch gas is a combination of C 4 F 6 and either Ar and Xe.
- the selectivity to nitride is plotted in FIG. 8 for the two diluent gases as a function of the diluent flows.
- the two diluents exhibit significantly different behavior.
- the nitride selectivity for Ar is highest at low Ar flows and decreases at higher argon flow.
- the cited C 4 F 6 patent to Hung et al. demonstrates that in narrow geometries such as SAC structures, a higher argon flow is required to prevent etch stop.
- the data of FIG. 8 shows that nitride selectivity for Xe rises with increasing Xe flow.
- the data of FIG. 8 are derived from separately measured oxide and nitride losses.
- the oxide losses (oxide etch rate) for the two diluents do not significantly differ, both decreasing about 30% from 20sccm (standard cubic centimeters per minute) to 500sccm of the diluents.
- the nitride loss with Ar remains substantially constant from lOOsccm to 500sccm while that with Xe drops by almost a factor of three between 20sccm and 500sccm.
- the process etches a hole through 0.8 ⁇ m of oxide, which is underlaid with a nitride stop layer.
- An overlying photoresist layer is patterned with a 0.5 ⁇ m mask hole.
- the hole profile angle is about 88°, and a slight loss of nitride is observed.
- the hole profile angle decreases to 86°, but no nitride loss is visible.
- the SAC structure is etched with a bottom hole width of 0.36 ⁇ m and a side gap of 0.18 ⁇ m beside the gate structure.
- corner nitride selectivity is acceptable at the lower Xe flow
- corner nitride etching virtually disappears at the higher Xe flow.
- the etching was not carried to completion of the via hole.
- no polymer residue is observed in the narrow side gap.
- a related experiment was performed on a structure having a gap of 0.13 ⁇ m between the gate structures, the gate structures having a height as measured by the nitride of about 0.45 ⁇ m.
- the recipe follows that of TABLE 2 with a C 4 F 6 flow of 20sccm and a Xe flow of 15sccm.
- Substantial but acceptable nitride corner faceting is observed.
- no etch step is observed through the completion of the narrow hole etching.
- the oxide etch rate is 600nm/min. or a 200mm wafer
- the total source power density is 6.2W/cm 2
- the total bias power density is 5.7W/cm 2 .
- the profile angle is approximately 89°, but there is some barreling over 1.8 ⁇ m.
- the recipes of TABLES 2 and 3 are distinguished by the pressures, below 15 milliTorr versus above 25 milliTorr respectively, and in the latter case by a xenon flow of over 200sccm into a 23 liter chamber and a Xe/C 4 F 6 ratio of greater than 15, preferably above 20.
- a C 4 F 6 process flow window was established in a SAC structure for a lower bias power of 1400W.
- the oxide etch rate is slow, but the nitride comer selectivity is very good.
- the etch rate has improved, and this would probably represent the best C 4 F 6 flow.
- 14sccm a little oxide bottom comer tapering is observed.
- etch stop in the small side gap is beginning but is not severe. However, at 20sccm, the etch stop is complete at about halfway down the small side gap.
- a flow window of about 4sccm is observed at a C 4 F 6 flow of 12sccm, that is, a process window of
- a two-dimensional window study was performed by varying the pressure to 35 and 55 milliTorr and the xenon flow to 250 and 450sccm.
- the conditions were generally those of the baseline recipe of TABLE 3, but with a C 4 F 6 flow of 12sccm and 1400W of bias power.
- Better profiles are obtained at the lower Xe flow; better nitride comer selectivity is obtained at the higher Xe flow.
- the variations with pressure are less pronounced.
- Other studies show that the oxide etch rate increases somewhat with pressure, and in deep trenches more barreling is observed in the profile.
- the etch rate can be increased by lowering the pedestal temperature from +10°C to -10°C, but the profile angle is decreased somewhat. In neither case is comer loss a problem.
- xenon and hexafluorobutadiene or other fluorocarbon is a timed counterbore trench etch process for a dual-damascene structure.
- narrow via (or contact) holes are formed at the bottom of the oxide layer, and a larger trench is formed at the top of the oxide layer over several of the via holes.
- Both the trench and the via holes are filled in a single metal deposition step without any masking, but the metal filling may have several substeps, for example, barrier layers, conformal deposited seed layers, and a subsequent fill by electroplating.
- CMP Chemical mechanical polishing
- the counterbore version of dual-damascene first defines extended via holes in the oxide and thereafter defines the trench to extend only part way through the oxide.
- a substrate 80 is formed with several conductive features 82 in its top surface. These may, for example, be projecting gate structures such as the SAC structure in FIG. 1 or may be lower-level wiring features that cannot be directly connected because of horizontally intervening features. In the latter case, vias are being formed.
- a silicon nitride stop layer 84 is deposited over the substrate 80 and its conductive features 82, and an oxide layer 86 is deposited over the stop layer 84.
- Extended via (or contact) holes 88 are etched through the oxide layer to the portions of the nitride stop layer overlying the conductive features 82, it being understood that there are probably additional conductive features between those illustrated.
- the deep via etch must stop on nitride and not produce etch stop. However, this etch is not overly demanding other than the very high aspect ratios because no nitride comers are exposed so that only planar nitride selectivity is required.
- the via mask is removed, and a photoresist layer 90 is deposited over the top of the oxide 86 and patterned according to the intended trench.
- the second or trench etch is timed to extend approximately half-way through the oxide layer 86 to form an idealized trench 92, indicated by dotted lines in FIG. 9.
- the underlying nitride stop layer 84 at the bottom of the via hole 88 prevents further etching of underlying material.
- a subsequent single metal filling sequence fills both the bottom portions of the vias 88 and the trench 92 after whatever nitride 84 remains at the bottom of the vias has removed by a post-etch treatment.
- the timed counterbore trench etch does not rely upon another nitride stop layer formed between upper and lower portions of the oxide layer 86 to define the bottom of the trench 92 since the fluorocarbon etch can be made highly selective to nitride.
- the timed counterbore potentially simplifies both the deposition and the etching procedures in forming a dual-damascene stmcture.
- the timed counterbore process has not been found to be very successful in the past because of severe faceting of the oxide comers surrounding the via holes. Faceting is exhibited in silicon oxide in approximately 45° facets formed at the comer caused by the unfavorable geometry of an exposed 90° oxide comer during an oxide etch.
- facets 96 are formed both in the narrow horizontal oxide wall 98 and also at the intended side shelf 100, shown by dotted lines, of the idealized trench 92.
- the facets 96 however still leave vias 102 with substantial inter- via side walls 104 sufficient to isolate one via from another.
- a rough rule of thumb is that the via side wall 104 should be as tall as the width of the oxide 98 between two immediately adjacent vias 102 since there may be other conductive features on the same spacings that are not intended to be contacted.
- the resulting trench 106 is similarly isolated from portions of the substrate 80 not immediately adjacent the conductive features 82, which are being contacted anyway.
- Faceting CD loss can be quantified using the model presented in FIG. 12.
- a via hole 120 possibly including a portion of a trench, is formed through the vertically continuous oxide layer 86. It includes a lower portion 122 with sidewalls 124, which may have a non- perpendicular slope due to either the counterbore etch or the trench etch. It also includes an upper portion 126 with sidewalls or facets 128 that slope even more due to the timed etch of the oxide layer 86. Distinctive to the timed etch, the oxide layer 86 is unmasked in the vicinity of the via hole 120 and thus has exposed oxide comers at the top of the via during the oxide etching. Facets are likely to develop on such exposed comer. The degree of faceting E is the additional set back on one side caused by the faceting. The CD loss is twice E.
- FIGS. 13 through 14 Other figures for loss of CD are illustrated in FIGS. 13 through 14.
- the stmcture illustrated in FIG. 13 represents a narrow via in a wide trench, such as the middle via 88 in FIGS. 9 and 10, prior to the trench etch.
- an extended via hole 120 produced by the counterbore etch is assumed to have a 90° profile with a pre-etch CD measured by its bottom width a.
- the stmcture in FIG. 14 represents the via after the timed trench etch.
- the timed trench etch removes about half of the oxide layer 86 to leave a via hole 132 with oxide facets 134 at the top of the via hole 132.
- a first post-etch CD is the width c of the via hole 132 at the top of the fairly straight portion below the facets 134.
- a post-etch treatment removes the nitride layer 84 exposed at the bottom of the via hole 132.
- CD is the width b of the via hole 132 at the bottom of the nitride layer 84 next to the substrate 80.
- the etch bias is given by the difference a-b, which is usually negative, and represents the loss of CD due to widening of the via hole bottom.
- the CD loss at the top of the via hole 132 due to the slope induced in the main portion of the via hole is given by c-b.
- a C 4 F 6 /Xe recipe summarized in TABLE 4 has been developed in the LPS chamber for the timed trench etch in the counterbore dual-damascene process. The recipe of TABLE 4 differs in its low pressure from the recipe of TABLE 3. 10
- This recipes produces a stmcture similar to that illustrated in FIG. 10.
- the taper angle for the via is about 8614°.
- a similar recipe using C 4 F g /Ar produces significantly greater tapering and reduced sidewall height.
- the recipe of TABLE 4 is characterized by a low pressure below 15 milliTorr and by a relatively low Xe/C 4 F 6 down to about 50% though preferably at least 100%. Greater amounts of xenon can used. However, at 150sccm of Xe, the height of the via sidewall is reduced. That is, the oxide faceting is increased. On the other hand, substantially less Xe produces very poor results. With no xenon, the unacceptable stmcture of FIG. 1 1 is produced. Furthermore, polymer forms both on the trench shelf, which is not bad, but also on the bottom of the via hole, indicating etch stop.
- a C 4 F 6 /Xe recipe with at least as half as much Xe as C 4 F 6 is effective and preferably with at least as much Xe as C 4 F 6 .
- the recipe of TABLE 4 for a timed etch uses lower bias power, 1000W for a
- a range of 800 to 1200W applies to a timed etched while a range of 1400 to 1900W applies to the nitride-protected etch.
- Bias powers scales with the area of the wafer.
- the ratio of source to power is corresponding increased for the timed oxide etch over the nitride- protected oxide etch.
- the two ranges of ratios are 0.4 to 0.6 for the timed oxide etch and 0.8 to 1.5 for the nitride-protected etch.
- the chamber pressures also differ between the two recipes, above 25 milliTorr for a nitride-protected etch and below 10 milliTorr for a timed etch.
- the C 4 F 6 /Xe recipe has been further optimized and a stabilization step has been added, as summarized in TABLE 5.
- the stabilization step follows a striking step in which the plasma is ignited using only argon.
- the plasma is maintained, and C 4 F 6 and Xe are substituted for Ar but at very low bias power. This allows the argon ions to decay and for equilibrium conditions to be obtained without the wafer being significantly etched.
- the bias power during the etch step is at least twice that during the stabilization step and preferably at least four times as great.
- the optimized timed trench etch increases the Xe/C 4 F 6 ratio above 2.
- the baseline recipe was applied to the timed counterbore trench etch in a structure having a total TEOS oxide thickness of 1.5 ⁇ m and an under ing nitride thickness of 0.1 ⁇ m.
- the baseline recipe produces an oxide etch rate of about 522nm/min with a wafer uniformity of 0.5% for the oxide etch.
- the selectivity to the underlying nitride depended on the geometry. For isolated vias at different ends of a trench, the nitride selectivity varies between 20 and 36. However, for closely spaced vias, the nitride selectivity drops to about 60%) of the stated values.
- Oxide faceting for the C 4 F 6 /Xe baseline recipe is dramatically improved over the faceting observed for the conventional recipe of 16sccm of C ⁇ F g and 150sccm of Ar.
- the C 4 F 6 /Ar results are not acceptable for closely spaced vias.
- the oxide faceting values E defined in FIG. 12 were measured for variations of both the C ⁇ F 6 flow and the Xe flow about the baseline recipe values of 20sccm and 50sccm respectively.
- curve 140 in FIG. 15 the faceting decreases for increasing C 4 F 6 flows, and, as shown by curve 142 in FIG. 16, also decreases for increasing Xe flows.
- the multiple curves indicate the observed uniformity.
- the conventional C 4 F g /Ar recipe has been compared to the baseline C 4 F 6 /Xe in etching a wide trench including a narrow 0.4 ⁇ m extended via. as in FIGS. 13 and 14.
- the via critical dimension (CD) values are given in TABLE 6.
- the effect of faceting has been numerically determined as functions of both C 4 F 6 flow and Xe flow, otherwise using the recipe of TABLE 5, that is, a baseline C 4 F 6 flow of 20 seem and a baseline Xe flow of 50 seem.
- the results, as measured by the faceting characteristic F for varying flows of C 4 F 6 are shown by curves 140 in FIG. 15 and, for varying Xe, by curves 142 in FIG. 16.
- the spread in both curves 140, 142 indicate the uniformity observed over the wafer. In both cases, a higher flow reduced the faceting.
- Oxide etch rates were measured with similar variations in flow rates.
- the oxide etch rate increases with increasing C 4 F 6 flow with about 300nm min being observed at lOsccm and 600nm/min at 25sccm.
- the oxide rate does not strongly depend on the Xe flow.
- Nitride loss at the bottom of an extended via was also measured with such variations in flow rates.
- the nitride loss is reduced by about 50% from lOsccm of C 4 F 6 to 20sccm. Higher C 4 F 6 flows produce little change.
- the nitride loss somewhat though erratically increases with increasing Xe flow with a minimum at about 50 seem.
- Increasing the ring temperature from 270°C to 350°C decreases the nitride loss by more than 30%.
- a higher wafer temperature, 15°C chiller compared to -15°C, and a lower pressure (2.5 milliTorr compared to 7 milliTorr) also decreases nitride
- the trench profile was also measured for such variations in flow rates.
- the profile angle decreases with increasing flow. At the lowest flows, it may be between 85° and 87° at the highest flows, between 82° and 85°.
- the amount of power applied to the plasma reactor has a significant effect on the formation of the protective polymer.
- the baseline C 4 F 6 /Xe recipe produces an axis etch rate for some stmcture of about 450nm/min and a silicon nitride selectivity of 3.2. Decreasing the power by 35%> for the same stmcture while maintaining the same ratio of source/bias power (that is, 1335W of source power and 650W bias power) increases the oxide etch rate to 500nm/min and increases the nitride selectivity to 5.4. However, more polymer is visibly generated on the sidewalls and, in some cases, etch stop is observed. Hence, the condition of a high-density plasma is in some cases important.
- hexafluorobutadiene is the preferred fluorocarbon for use with the invention
- similar heavy fluorocarbons such as hexafluorocyclobutene (c-C 4 F 6 ), hexafluorobutyne (C 4 F 6 having one triple bond), hexafluorobenzene (C 6 F 6 ), and octafluoropentadiene (C 5 F g ) are expected to provide very similar etching results even if at least the first two are more difficult to handle. These all have long carbon chains of at least four carbons and favorably low F/C ratios below 2.
- fluorocarbons may also be used in conjunction with a high flow rate of xenon.
- Octafluorocyclobutane (C 4 F g ) is a similar fluorocarbon, which is widely used in oxide etching, but its F/C ratio is somewhat higher.
- Preliminary experiments have shown that a high xenon flow rate aids the selectivity of C 4 F g over nitride and provides a reasonable process window.
- the listed fluorocarbons contain no hydrogen, but one or perhaps two carbons in a heavy fluorocarbon should not significantly change its oxide etching properties.
- Xenon is also expected to produce beneficial results when used as the diluent in combination with other fluorine-based active etching gases, such as SF 6 .
- Carbon monoxide is a conventional additive to increase selectivity and the profile angle. It may be added to the fluorocarbon/xenon mixture, but it is not believed necessary, especially in view of the difficulty of handling it.
- the advantages can be obtained with an etching gas consisting of a fluorine-based gas and xenon and possibly another noble gas, without the addition of other elements, such as CO, O 2 , N 2 , or other gases.
- krypton is a noble gas heavier than the typical argon.
- krypton is not only expensive, xenon is heavier than it. It is also possible to tune the chemistry with a mixture of various noble gases.
- the invention is particularly useful for SAC stmctures and counterbore dual-damascene stmctures, there are other stmctures requiring high selectivity to nitride, for example, a nitride hard mask or a nitride stop layer in a damascene stmcture.
- the invention is also applicable to other non-oxide layer underlying an oxide layer.
- the non-oxide material may be, for example, silicon, polysilicon, or metals.
- the oxide material may include other materials containing at least 50 atomic %> of oxygen, such as some low-k dielectric materials based on either silicon or carbon.
- the invention thus provides advantageous results in oxide etching with commonly available fluorocarbons and xenon and using common operating parameters.
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- 2000-03-13 DE DE10084398T patent/DE10084398T1/en not_active Withdrawn
- 2000-03-13 WO PCT/US2000/006630 patent/WO2000059021A1/en active IP Right Grant
- 2000-03-13 KR KR10-2001-7012214A patent/KR100467133B1/en not_active Expired - Fee Related
- 2000-03-15 TW TW089104763A patent/TW479291B/en not_active IP Right Cessation
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10053780A1 (en) * | 2000-10-30 | 2002-05-16 | Infineon Technologies Ag | Process for structuring a silicon oxide layer |
WO2003023841A1 (en) * | 2001-09-06 | 2003-03-20 | APPLIED MATERIALS INC. (a corporation of Delaware) | Flash step preparatory to dielectric etch |
US6787475B2 (en) | 2001-09-06 | 2004-09-07 | Zhuxu Wang | Flash step preparatory to dielectric etch |
WO2003041148A1 (en) * | 2001-11-08 | 2003-05-15 | Zeon Corporation | Gas for plasma reaction, process for producing the same, and use |
CN1327492C (en) * | 2001-11-08 | 2007-07-18 | 日本瑞翁株式会社 | Gas for plasma reaction, process for producing the same, and use |
US7341764B2 (en) | 2001-11-08 | 2008-03-11 | Zeon Corporation | Gas for plasma reaction, process for producing the same, and use |
US7652179B2 (en) | 2001-11-08 | 2010-01-26 | Zeon Corporation | Gas for plasma reaction, process for producing the same, and use thereof |
WO2003077301A1 (en) * | 2002-03-12 | 2003-09-18 | Tokyo Electron Limited | Method of etching and etching apparatus |
US7943524B2 (en) | 2002-03-12 | 2011-05-17 | Tokyo Electrons Limited | Method of etching and etching apparatus |
Also Published As
Publication number | Publication date |
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KR100467133B1 (en) | 2005-01-24 |
KR20020010592A (en) | 2002-02-04 |
TW479291B (en) | 2002-03-11 |
JP2002540627A (en) | 2002-11-26 |
US6544429B1 (en) | 2003-04-08 |
DE10084398T1 (en) | 2002-03-14 |
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