WO2000028604A1 - Creation indirecte de motifs au laser sur du resist - Google Patents

Creation indirecte de motifs au laser sur du resist Download PDF

Info

Publication number
WO2000028604A1
WO2000028604A1 PCT/AU1999/000975 AU9900975W WO0028604A1 WO 2000028604 A1 WO2000028604 A1 WO 2000028604A1 AU 9900975 W AU9900975 W AU 9900975W WO 0028604 A1 WO0028604 A1 WO 0028604A1
Authority
WO
WIPO (PCT)
Prior art keywords
resist
layer
areas
laser
absorbing layer
Prior art date
Application number
PCT/AU1999/000975
Other languages
English (en)
Inventor
Paul Alan Basore
Trevor Lindsay Young
Neil Barrett
Original Assignee
Pacific Solar Pty. Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pacific Solar Pty. Limited filed Critical Pacific Solar Pty. Limited
Priority to EP99957707A priority Critical patent/EP1135810A1/fr
Priority to AU15329/00A priority patent/AU757477B2/en
Priority to JP2000581702A priority patent/JP2002529802A/ja
Publication of WO2000028604A1 publication Critical patent/WO2000028604A1/fr

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/18Working by laser beam, e.g. welding, cutting or boring using absorbing layers on the workpiece, e.g. for marking or protecting purposes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/009Working by laser beam, e.g. welding, cutting or boring using a non-absorbing, e.g. transparent, reflective or refractive, layer on the workpiece
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells

Definitions

  • the present invention relates generally to the field of semiconductor device fabrication and in particular, the invention provides an improved method of forming a resist mask over a surface.
  • a variety of methods are known for etching features in the surface of semiconductors.
  • a resist is placed over the surface to be etched, and then selected areas of the resist are removed in order to expose the surface in the desired pattern.
  • a suitable etchant is then applied.
  • the resist is substantially impervious to the etchant, and therefore only the exposed areas of the underlying layer are removed by the etchant.
  • the remaining resist may then be washed away or dissolved with an appropriate solvent, leaving the underlying layer etched in the desired pattern.
  • the selected areas of the resist may be removed by a number of methods.
  • a common technique is photolithography, in which the resist placed over the surface to be etched is a photoresist.
  • the photoresist is polymerised in selected areas by exposure to ultraviolet light in a pattern defined by a photographic mask. Those portions of the photoresist that have not been polymerised are dissolved and removed by the use of an appropriate chemical. This exposes the surface in the desired pattern, ready for etching.
  • Photolithography requires specific equipment which may be expensive, and may occupy a large space in the manufacturing area. The need for an appropriate photoresist may also add significantly to costs. The additional step of manufacturing a photographic mask may also be expensive. Positioning the mask requires a time consuming and therefore expensive alignment step. Because photolithography is relatively slow due to the multiple processing steps required, the obtainable throughput of this process is low.
  • Another technique used to selectively etch semiconductor devices is laser etching. In this technique a laser is used to directly etch a layer or to open a dielectric layer such as silicon oxide or silicon nitride which is then used as an etching mask.
  • Laser etching can be less expensive than photolithography in the fabrication of semiconductor devices having relatively simple design, however, laser etching is a disruptive technique which is not suitable for some thin film applications, particularly where the top layers are required to be etched without damage to thin underlying layers. Laser etching can create significant amounts of heat both in the layer being removed and in the underlying layer(s), which increases the risk of damaging the thin film layers and degrading the performance of the semiconductor device.
  • the present invention provides a method of forming a patterned resist mask over the surface of a layer to be selectively exposed, the method including the steps of: a) depositing a layer of resist over the surface; and b) removing the resist from selected areas of the surface, by heating an absorbing layer adjacent to the resist with a laser such that localised heating occurs in areas of the absorbing layer, the laser having an output at a wavelength that is absorbed by the absorbing layer, the areas of the absorbing layer conducting heat to the layer of resist, and the resist being formulated such that it is brittle in use and has a high thermal expansion coefficient, whereby rapid heating of a localised region of the resist causes shearing around the localised region.
  • the resist By having a high thermal expansion coefficient, the resist expands sufficiently during heating to cause fracturing around the heated area, and the heated area of the resist shears away from the layer to be selectively exposed and out of the layer of resist, creating the required masking pattern in the resist.
  • this mechanism reduces the energy input that is required from the laser compared to conventional laser etching, as the selected area of resist does not have to be melted or ablated, merely sufficiently heated to cause expansion. Consequently, the amount of potentially damaging heat and energy that is generated and transmitted through the layer to be selectively exposed to underlying material is greatly reduced.
  • the semiconductor itself serves as the absorbing layer.
  • the resist is preferably substantially transparent to light at the frequency of the laser.
  • Embodiments of the invention may have one or more layers between the absorbing layer and the resist. The one or more layers preferably conduct heat effectively from the absorbing layer to the resist. In embodiments where the laser passes through the one or more layers before being absorbed in the absorbing layer, the one or more layers are preferably substantially transparent to light at the frequency of the laser.
  • the one or more layers may include silicon oxide or silicon nitride layers.
  • Embodiments of the invention may incorporate the further step of urging the heated areas of resist away from the surface.
  • the heated areas of resist may be urged away from the surface by applying a high velocity jet of liquid or gas to the heated areas of the resist.
  • the heated area of the resist may be urged away from the surface by applying adhesive tape to the heated areas of the resist and then peeling the adhesive tape off the resist.
  • the heated areas of the resist may be subjected to ultrasonic vibrations, for instance by immersion in an ultrasonic bath, in order to facilitate the removal of the resist from the selected areas.
  • embodiments of the present invention may use an absorbing layer chosen or modified such that it has a high light absorption at the operating wavelength of the laser. This removes the requirement for dedicated resist-patterning laser equipment. For example, a Nd:YAG laser operating at 1064 nm or frequency doubled to operate at 532 nm may be used in silicon solar cell production.
  • the resist used in accordance with the invention is preferably based upon NovolacTM resin.
  • the present invention may be applied in the manufacture of thin film silicon solar cells which consist of a glass substrate, n-type and p-type layers, and a transparent dielectric layer, the dielectric being the layer to be selectively exposed.
  • the method of the present invention may be used as part of a process to create metal contacts with the p-type layer of such a thin film silicon solar cell.
  • the method of the invention may further include one or more of the following steps, not necessarily in this order: baking the cell to soften the resist to smooth the edges around the exposed areas and to improve adhesion; etching the dielectric to expose areas of the p-type layer in the pattern defined by the resist mask; optionally washing or dissolving the remaining resist off the surface of the dielectric layer; and depositing metal over the surface of the cell, to form contacts with the p-type layer in the exposed areas.
  • the etchant used in accordance with the preferred embodiment of the invention is dilute hydrofluoric acid, although any other suitable etchant to which the organic resist is substantially impervious may be used. Etching may be performed by reactive-ion plasma etching. Furthermore, the etchant preferably etches the dielectric layer much more rapidly than the p-type layer. This will minimise damage to the p-type layer when the etchant comes into contact with the p-type layer.
  • Embodiments of the invention are particularly useful for patterned etching of dielectric layers located over thin semiconductor films such as when contacts are required to be made to the semiconductor through the dielectric layer.
  • Figure 1 illustrates a semiconductor structure upon which a layer of resist has been deposited
  • Figure 2 illustrates the structure of Figure 1 where the layer of resist has heated and fractured
  • Figure 3 illustrates the semiconductor structure of Figure 1 where a portion of the resist has been removed
  • Figure 4 illustrates the result of the etching of the dielectric layer of the structure of Figure 3.
  • Figure 5 shows the semiconductor structure of Figure 4 after the resist has been washed off and metal has been deposited over the dielectric and the selected areas of the p-type layer.
  • Figures 1 to 5 portray an embodiment of the present invention in which a patterned resist mask is formed over the surface of a thin film solar cell as a step in the formation of a metal contact.
  • Figure 1 illustrates the thin film solar cell 10 during manufacture.
  • the cell 10 includes a glass substrate 11, a thin n-type layer 12, a thin p-type layer 13 and a dielectric layer 14.
  • the thicknesses of the n-type layer 12 and the p-type layer 13 are preferably each between OJ ⁇ m and 5 ⁇ m, and the thickness of the dielectric layer 14 is preferably between 0.05 ⁇ m and 2 ⁇ m.
  • a layer of resist 15 being brittle in use and having a high thermal expansion coefficient, has been deposited over the dielectric layer 14.
  • Radiation 16 from a laser (not shown) is applied to a selected area 17 of the semiconductor layer 13, which has a high light absorption at the frequency of the laser. Localised heating occurs in the selected area 17 as a result of the incident radiation 16.
  • the temperature rise in the surface of the semiconductor film is conducted through the dielectric layer 14 to the resist, causing localised expansion of the resist resulting in delamination, buckling and shearing of the resist.
  • the total amount of energy required from the laser in order to remove the selected area of resist 17 is too small to damage the layers 13 and 12.
  • the organic resist 15 used in this embodiment contains NovolacTM which is an organic resin. This resist has a high thermal expansion coefficient and is brittle in use.
  • Figure 2 illustrates the device 10 at a later moment in time, when heat has been transmitted to resist layer 15. Due to the high thermal expansion coefficient of the resist 15, the resist has expanded to cause fracturing 20.
  • Figure 3 illustrates the semiconductor device 10 at a later stage in the method, where the selected portion of resist has been removed.
  • the heated area of resist does not heat sufficiently for it to melt or ablate. Because the NovolacTM resist 15 has a high thermal expansion coefficient, the heat generated by the laser is sufficient for the selected area of resist to expand sufficiently that it will shear upwards and out of the layer of resist 15. This process can be aided by applying high velocity liquid or gas jets or adhesive tape or ultrasonic vibration to the resist.
  • This mechanism reduces the energy input that is required from the laser compared to conventional laser etching, as the resist does not have to be melted, merely sufficiently heated to cause expansion.
  • the maximum temperature generated during this process is lower, limiting the possibility of damage to the other layers 12, 13 and 14.
  • the next step in the formation of the metal contact is that of etching the dielectric layer 14 in the selected pattern defined by the resist mask 15 which has been formed in accordance with the present invention.
  • Figure 3 shows the etchant 18 as it is first applied. Because the resist 15 is substantially impervious to the etchant 18, the etchant 18 only acts on the exposed surface of the dielectric 14.
  • the etchant 18 used in accordance with such embodiments of the invention may be dilute hydrofluoric acid, or any other suitable etchant to which the organic resist 15 is substantially impervious. Furthermore, the etchant 18 preferably etches the dielectric layer 14 much more rapidly than the p-type layer 13. This will minimise damage to the p-type layer 13 when the etchant 18 comes into contact with it.
  • Figure 4 illustrates the result of the etching of the dielectric layer 14.
  • the resist 15 is substantially unchanged by the etchant, however the exposed area of the dielectric layer 14 has been completely etched away.
  • the etching period is determined such that where the etchant has come into contact with the p-type layer 13, the etchant has had little effect on the p-type layer.
  • Figure 5 shows the semiconductor 10 after the resist 15 has been removed by way of a suitable solvent. Alternatively, the resist may be left intact.
  • Aluminium layer 19 has been deposited over the dielectric layer 14 and the selected areas of the p-type layer 13, hence forming contacts with the p-type layer 13 only in those selected areas where the dielectric layer 14 has been etched. In order to provide a good ohmic contact between aluminium layer 19 and p-type layer 13, the aluminium layer 19 may be heated.
  • the effect of heating the aluminium layer 19 is to dissolve any thin interfacial oxide that may be present, and to alloy some aluminium into the p-type layer, forming a p region as part of each metal/semiconductor contact.
  • the semiconductor material is silicon, a small amount of silicon (perhaps 1-2%) is typically added to the aluminium metal to make the alloying process more reproducible.
  • the present invention may be applied in any process where it is desired to form a resist mask over a layer to be selectively exposed.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mechanical Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Manufacturing & Machinery (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Electromagnetism (AREA)
  • Weting (AREA)

Abstract

La présente invention concerne une technique de formation d'un masque de résist à motifs sur la surface d'une couche destinée à être exposée de manière sélective. La technique comprend une étape de dépôt d'une couche de résist sur la surface et une étape où le résist est supprimé des régions sélectionnées sur la surface. Le résist est supprimé desdites régions par chauffage d'une couche absorbante adjacente au résist à l'aide d'un laser, de telle manière qu'un chauffage localisé s'effectue dans les régions de la couche absorbante. Le laser possède une longueur d'onde en sortie qui est absorbée par la couche absorbante, et les régions ainsi chauffées de la surface absorbante conduisent la chaleur à la couche de résist. Le résist a une formulation qui le rend cassant et lui confère un coefficient d'expansion thermique élevé. Par conséquent le chauffage rapide d'une région localisée du résist provoque un cisaillage autour de la région localisée.
PCT/AU1999/000975 1998-11-06 1999-11-05 Creation indirecte de motifs au laser sur du resist WO2000028604A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP99957707A EP1135810A1 (fr) 1998-11-06 1999-11-05 Creation indirecte de motifs au laser sur du resist
AU15329/00A AU757477B2 (en) 1998-11-06 1999-11-05 Indirect laser patterning of resist
JP2000581702A JP2002529802A (ja) 1998-11-06 1999-11-05 間接的なレジストのレーザパタニング

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AUPP6996A AUPP699698A0 (en) 1998-11-06 1998-11-06 Indirect laser patterning of resist
AUPP6996 1998-11-06

Publications (1)

Publication Number Publication Date
WO2000028604A1 true WO2000028604A1 (fr) 2000-05-18

Family

ID=3811209

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/AU1999/000975 WO2000028604A1 (fr) 1998-11-06 1999-11-05 Creation indirecte de motifs au laser sur du resist

Country Status (4)

Country Link
EP (1) EP1135810A1 (fr)
JP (1) JP2002529802A (fr)
AU (1) AUPP699698A0 (fr)
WO (1) WO2000028604A1 (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7462514B2 (en) 2004-03-03 2008-12-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same, liquid crystal television, and EL television
US7749907B2 (en) 2006-08-25 2010-07-06 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7867907B2 (en) * 2006-10-17 2011-01-11 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
WO2010122028A3 (fr) * 2009-04-20 2011-09-22 Institut Für Solarenergieforschung Gmbh Procédé de fabrication d'un dispositif à semi-conducteurs, en particulier d'une cellule solaire, avec une couche diélectrique localement ouverte ainsi que dispositif à semi-conducteurs correspondant
US8222636B2 (en) 2004-03-24 2012-07-17 Semiconductor Energy Laboratory Co., Ltd. Method for forming pattern, thin film transistor, display device, method for manufacturing thereof, and television apparatus
US8528497B2 (en) 2003-04-25 2013-09-10 Semiconductor Energy Laboratory Co., Ltd. Drop discharge apparatus, method for forming pattern and method for manufacturing semiconductor device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5276811B2 (ja) * 2006-08-25 2013-08-28 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2008153354A (ja) * 2006-12-15 2008-07-03 Sony Corp 有機半導体パターンの形成方法および半導体装置の製造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4119483A (en) * 1974-07-30 1978-10-10 U.S. Philips Corporation Method of structuring thin layers
US4448636A (en) * 1982-06-02 1984-05-15 Texas Instruments Incorporated Laser assisted lift-off
US4780867A (en) * 1986-10-02 1988-10-25 Optical Data, Inc. Method for erasably recording data by viscoelastic shear deformation
JPH02141283A (ja) * 1988-11-22 1990-05-30 Kuraray Co Ltd 光学記録媒体
US5234539A (en) * 1990-02-23 1993-08-10 France Telecom (C.N.E.T.) Mechanical lift-off process of a metal layer on a polymer
US5679202A (en) * 1994-03-04 1997-10-21 Smaltirva S.P.A. Process for removing fluorocarbon resin-based coatings

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4119483A (en) * 1974-07-30 1978-10-10 U.S. Philips Corporation Method of structuring thin layers
US4448636A (en) * 1982-06-02 1984-05-15 Texas Instruments Incorporated Laser assisted lift-off
US4780867A (en) * 1986-10-02 1988-10-25 Optical Data, Inc. Method for erasably recording data by viscoelastic shear deformation
JPH02141283A (ja) * 1988-11-22 1990-05-30 Kuraray Co Ltd 光学記録媒体
US5234539A (en) * 1990-02-23 1993-08-10 France Telecom (C.N.E.T.) Mechanical lift-off process of a metal layer on a polymer
US5679202A (en) * 1994-03-04 1997-10-21 Smaltirva S.P.A. Process for removing fluorocarbon resin-based coatings

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
DATABASE WPI Derwent World Patents Index; Class T03, AN 1990-212394/28, XP002905601 *

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8528497B2 (en) 2003-04-25 2013-09-10 Semiconductor Energy Laboratory Co., Ltd. Drop discharge apparatus, method for forming pattern and method for manufacturing semiconductor device
US7462514B2 (en) 2004-03-03 2008-12-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same, liquid crystal television, and EL television
US7812355B2 (en) 2004-03-03 2010-10-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same, liquid crystal television, and EL television
US8222636B2 (en) 2004-03-24 2012-07-17 Semiconductor Energy Laboratory Co., Ltd. Method for forming pattern, thin film transistor, display device, method for manufacturing thereof, and television apparatus
US7749907B2 (en) 2006-08-25 2010-07-06 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US8043969B2 (en) 2006-08-25 2011-10-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
CN101131923B (zh) * 2006-08-25 2013-03-06 株式会社半导体能源研究所 半导体器件的制造方法
US7867907B2 (en) * 2006-10-17 2011-01-11 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
WO2010122028A3 (fr) * 2009-04-20 2011-09-22 Institut Für Solarenergieforschung Gmbh Procédé de fabrication d'un dispositif à semi-conducteurs, en particulier d'une cellule solaire, avec une couche diélectrique localement ouverte ainsi que dispositif à semi-conducteurs correspondant
CN102405528A (zh) * 2009-04-20 2012-04-04 太阳能研究所股份有限公司 一种用于制备具有局部开口的电介质层的半导体装置特别是太阳能电池的方法以及相应的半导体装置

Also Published As

Publication number Publication date
EP1135810A1 (fr) 2001-09-26
JP2002529802A (ja) 2002-09-10
AUPP699698A0 (en) 1998-12-03

Similar Documents

Publication Publication Date Title
KR102250628B1 (ko) 높은 다이 파괴 강도 및 평활한 측벽을 위한 레이저 스크라이빙 및 플라즈마 에칭
JP6198727B2 (ja) マルチステップ・非対称形状レーザビームスクライビング
US5552345A (en) Die separation method for silicon on diamond circuit structures
US4734152A (en) Dry etching patterning of electrical and optical materials
EP0611121A2 (fr) Procédé pour faire une configuration dans des diélectriques et structures en résultant
US20140057414A1 (en) Mask residue removal for substrate dicing by laser and plasma etch
US7960206B2 (en) Adjustment of masks by re-flow
WO2007059577A1 (fr) Procédé de métallisation pour structures semi-conductrices à couche mince
US7446051B2 (en) Method of etching silicon
WO2008102172A1 (fr) Dispositif photovoltaïque et procédé de fabrication pour celui-ci
JP2009111147A (ja) 半導体チップ及びその製造方法
Kumar et al. Femtosecond laser direct hard mask writing for selective facile micron-scale inverted-pyramid patterning of silicon
JP2021515986A (ja) マルチパスレーザスクライビングプロセスとプラズマエッチングプロセスを使用したハイブリッドウエハダイシングアプローチ
EP1135810A1 (fr) Creation indirecte de motifs au laser sur du resist
US9607854B2 (en) Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesives
US5509556A (en) Process for forming apertures in a metallic sheet
WO2009088357A1 (fr) Procédé pour couches de structuration de surface par procédé lift-off sur un substrat
AU757477B2 (en) Indirect laser patterning of resist
CN111599753A (zh) 一种薄晶圆散热片及其制作工艺
CN101569004B (zh) 用于将结构施加在半导体组件上的方法
JP2708440B2 (ja) 集積回路の製造方法
JPH0799335A (ja) 半導体膜の除去加工方法及び光起電力素子の製造方法
JPH0613356A (ja) 薄膜パターン形成方法
JPS5860560A (ja) 半導体装置の冗長回路およびそのフユ−ズ部切断方法
JP2009016582A (ja) パターン形成方法

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref country code: AU

Ref document number: 2000 15329

Kind code of ref document: A

Format of ref document f/p: F

AK Designated states

Kind code of ref document: A1

Designated state(s): AE AL AM AT AU AZ BA BB BG BR BY CA CH CN CR CU CZ DE DK DM EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
ENP Entry into the national phase

Ref country code: JP

Ref document number: 2000 581702

Kind code of ref document: A

Format of ref document f/p: F

WWE Wipo information: entry into national phase

Ref document number: 15329/00

Country of ref document: AU

WWE Wipo information: entry into national phase

Ref document number: 1999957707

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 09831237

Country of ref document: US

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

WWP Wipo information: published in national office

Ref document number: 1999957707

Country of ref document: EP

WWG Wipo information: grant in national office

Ref document number: 15329/00

Country of ref document: AU

WWW Wipo information: withdrawn in national office

Ref document number: 1999957707

Country of ref document: EP