WO2000005740A1 - Discharge tube for display and method for driving the same - Google Patents

Discharge tube for display and method for driving the same Download PDF

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Publication number
WO2000005740A1
WO2000005740A1 PCT/JP1998/003248 JP9803248W WO0005740A1 WO 2000005740 A1 WO2000005740 A1 WO 2000005740A1 JP 9803248 W JP9803248 W JP 9803248W WO 0005740 A1 WO0005740 A1 WO 0005740A1
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WO
WIPO (PCT)
Prior art keywords
electrode
display
address
discharge
electrodes
Prior art date
Application number
PCT/JP1998/003248
Other languages
French (fr)
Japanese (ja)
Inventor
Hideo Tanabe
Yuichi Kijima
Akira Shingai
Hiroshi Kawasaki
Akio Yamaguchi
Original Assignee
Hitachi, Ltd.
Hitachi Device Engineering Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd., Hitachi Device Engineering Co., Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP1998/003248 priority Critical patent/WO2000005740A1/en
Publication of WO2000005740A1 publication Critical patent/WO2000005740A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/20—Constructional details
    • H01J11/22—Electrodes, e.g. special shape, material or configuration
    • H01J11/24—Sustain electrodes or scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/298—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using surface discharge panels
    • G09G3/2983—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using surface discharge panels using non-standard pixel electrode arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/10—AC-PDPs with at least one main electrode being out of contact with the plasma
    • H01J11/12—AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided on both sides of the discharge space
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2211/00—Plasma display panels with alternate current induction of the discharge, e.g. AC-PDPs
    • H01J2211/20—Constructional details
    • H01J2211/22—Electrodes
    • H01J2211/32—Disposition of the electrodes
    • H01J2211/323—Mutual disposition of electrodes

Definitions

  • the present invention relates to a display discharge tube, and more particularly to a display discharge tube for selecting pixels by an address operation using plasma discharge and a driving method thereof.
  • FIG. 23 is a schematic perspective view of a conventional AC PDP disclosed in Japanese Patent Publication No. 3-76468
  • FIG. 24 is a schematic sectional view of the conventional AC PDP.
  • 1 is a transparent front glass substrate as a first substrate
  • 2 is a rear glass substrate as a second substrate
  • 3 is a partition
  • 5 is a display electrode (memory electrode).
  • 5a is a mother electrode
  • 5b is a transparent electrode
  • 11 is a first address electrode
  • 11a is a mother electrode
  • 11B is a transparent electrode
  • 7 is a second address electrode
  • 8a is a transparent dielectric layer
  • 9 is a protective film (Mg0)
  • 10 is a phosphor of RGB three primary colors.
  • the second substrate is shown rotated by 90 ° with respect to the first substrate for easy understanding of the structure.
  • a plurality of parallel second address electrodes 7 are formed on the rear glass substrate 2 by using a thick film technique such as a screen printing method or a thin film technique such as vapor deposition or etching. Further, a stripe-shaped partition wall 3 is formed by a screen printing method, a sand blast method, or the like so as to surround the second address electrode 7 in parallel with the second address electrode 7 on the rear glass substrate 2.
  • the phosphors 10 of the three primary colors of RGB are separately applied to the inside of the stripe-shaped partition walls 3 by a screen printing method, a sand plast method, or the like for each color.
  • a transparent front glass substrate 1 forming a tube in cooperation with the above-mentioned rear glass substrate 2 a plurality of parallel electrodes are formed so as to be orthogonal to the plurality of second address electrodes 7 formed on the rear glass substrate 2.
  • the first address electrode 11 and the display electrode 5 are formed by adhesion.
  • a transparent dielectric layer 8a is formed on the first address electrode 11 and the display electrode 5 by printing or the like, and a protective film (MgO film) 9 is deposited thereon.
  • a discharge gas is sealed in the inside of a tube composed of the front glass substrate 1, the rear glass substrate 2, and the like.
  • an address discharge is performed between the second address electrode 7 and the first address electrode 11, and then a display discharge is performed between the first address electrode 11 and the display electrode 5.
  • the phosphor 10 is excited by ultraviolet rays generated by the discharge plasma to emit visible light, and this light is displayed on the image through the front glass substrate 1.
  • the control of the presence / absence of discharge between the adjacent first address electrode and the display electrode is performed by controlling the distance between the first address electrode and the display electrode of the adjacent display cell. Perform by difference. For this reason, there is a problem that it is difficult to increase the definition and brightness of the PDP while ensuring the accuracy of the electrode dimensions. In general, high brightness and high efficiency can be achieved by increasing the distance between display electrodes. However, increasing the distance between the electrodes increases the discharge voltage. There is also a problem that becomes difficult.
  • FIG. 25 is a sectional view showing a configuration of a hybrid PDP disclosed in Japanese Patent Publication No. 3-76468.
  • a plurality of address electrodes 22 and 23 orthogonal to each other are provided on the rear glass substrate 2 side, and a transparent full-surface electrode 17 provided on the front glass substrate 1 side and a plurality of A semi-AC type memory part (semi-AC type memory part) composed of a perforated metal plate 20 having holes is provided.
  • an insulating substrate 24 is disposed in each gap between the plurality of address electrodes 22, and the transparent entire surface electrode 17 is covered with a transparent insulating layer 18.
  • Partition walls 19 and 21 are provided between the perforated metal plate 20 and the transparent insulating layer 18 and between the perforated metal plate 20 and the insulating substrate 24, respectively. It is enclosed in a tube composed of a glass substrate 2, a front glass substrate 1, and the like.
  • a tube composed of a glass substrate 2, a front glass substrate 1, and the like.
  • electrons generated by the discharge between the address electrodes 22 and 23 are drawn out to the semi-AC type memory section side by the voltage applied to the perforated metal plate 20 and covered with the transparent insulating layer 18. AC type discharge is maintained between the transparent entire surface electrode 17 and the perforated metal plate 20.
  • the conventional hybrid PDP shown in Fig. 25 has a complicated structure, which makes mass production difficult, and it is very difficult to optimize the diameter of the hole for connecting the discharge space on the address side and memory side. There is a point.
  • An object of the present invention is to provide a display discharge tube capable of solving the above-mentioned problems of the conventional PDP and enabling high-brightness, high-definition image display with a simple configuration, and a method of driving the display discharge tube. It is in.
  • the outline of the configuration of the present invention for achieving the above object is as follows.
  • the display discharge tube of the present invention includes, for each pixel (display cell), two pairs of electrodes, that is, a display electrode pair covered with a dielectric layer and a pad electrode pair, that is, four electrodes. It has a four-electrode structure in which at least one address electrode is covered with a dielectric layer. This makes it possible to increase the distance between the electrodes of the display electrode pair or to increase the electrode area, so that an image display with high efficiency and high luminance can be realized.
  • the display discharge tube of the present invention includes the display electrode pair and the address electrode pair independently of each other, the main discharge for image display is performed through a drive circuit connected to each of the display electrode pairs. It can be carried out. Therefore, even when the main discharge voltage rises due to the distance between the electrodes of the display electrode pair increasing, the load applied to the individual drive circuits can be reduced.
  • the driving method (driving waveform) specific to the four-electrode structure display cell of the present invention can realize high brightness, high contrast, and image display.
  • the configuration of the present invention is as follows.
  • a display discharge tube includes a first substrate (front plate) and a second substrate (back plate) facing each other, and a plurality of discharge tubes substantially parallel to each other on the first substrate surface.
  • a plurality of display electrodes, the display electrodes being covered with a dielectric, extending on the second substrate surface in a direction intersecting the display electrodes, and being substantially parallel to each other.
  • At least one of the first address electrode and the second address electrode is covered with a dielectric layer, and a discharge gas is sealed between the first substrate and the second substrate;
  • the display electrode pair for performing the main display discharge in (1) has substantially the same electrode width.
  • the power that becomes invalid in the display main discharge in (1) and (2) can be recovered to an external electric circuit through the electrode used in the main discharge.
  • the display discharge tube according to (1) or (2) further comprising: a display electrode pair that is parallelly arranged at a predetermined interval on the first substrate surface and covered with a dielectric layer. And a first address electrode covered with a dielectric layer.
  • the display discharge tube of the present invention according to (5) further comprising: a second address electrode on the second substrate; and a dielectric layer covering the second address electrode.
  • a second address electrode is provided on the second substrate, and the second address electrode is arranged so as to be exposed to a display discharge region, A phosphor was formed thereon.
  • the first address electrode extends between the electrodes of the display electrode pair.
  • the first address electrode is arranged close to one of the display electrode pairs.
  • the shape of the partition wall formed on the display electrode is substantially a lattice.
  • the partition formed on the display electrode has a lattice shape, and the partition wall is formed on the second substrate along the second address electrode.
  • the display has a stripe-shaped partition wall extending, and one electrode of the display electrode pair is common to two adjacent display cells.
  • the distance D (nnn) from the end facing the display electrode, and the pressure P (Torr) of the sealed discharge gas at 25 ° C.
  • the display electrode in (19), includes a transparent electrode, and a mother electrode that is a conductor having a different electrical resistance from the transparent electrode.
  • the mother electrode of the display electrode is formed by partitioning a partition formed on the display electrode in a portion parallel to an extending direction of the display electrode. Alternatively, the lattice-shaped partition formed on the second substrate is overlapped and arranged on a portion parallel to the extending direction of the display electrode.
  • the width (Ml) of an address electrode covered with the dielectric layer formed on the first substrate is 0.03: 1 to 0.4: 1.
  • the address electrode covered with the dielectric layer comprises a transparent electrode and a mother electrode which is a conductor having a different electrical resistance from the transparent electrode.
  • a width (nun) of a mother electrode constituting the address electrode and a display cell in a direction intersecting with a direction in which the display electrode pair extends are provided.
  • the ratio with the array pitch (band) is 0.03: 1 to 0.1: 1.
  • a display discharge tube includes a first substrate (front plate) and a second substrate (back plate) facing each other, and a plurality of substrates substantially parallel to each other on the first substrate surface.
  • a display electrode, the display electrode being covered with a dielectric, a plurality of first electrodes extending in a direction intersecting the display electrode on the second substrate surface, and being substantially parallel to each other.
  • At least one of the first address electrode or the second address electrode is covered with a dielectric layer, A discharge gas is sealed between the first substrate and the second substrate, and a display electrode pair for performing a main discharge for display in one display cell, a first address electrode for performing an address discharge, and a third electrode.
  • It has four electrodes consisting of two pairs of address electrodes and an address electrode pair consisting of address electrodes, and applies a signal for performing a main discharge for display between the electrodes of the display electrode pair. Drive.
  • the address electrode is driven by applying a trigger signal.
  • the wall charges are accumulated on the address electrodes, and the address electrodes are driven by applying a trigger signal having a polarity opposite to that of the wall charges.
  • the magnitude of the signal applied between the address electrodes at the time of the address discharge is a signal of a magnitude such that no wall charges are accumulated after the address discharge, and an electric field is applied between the pair of display electrodes during the address discharge or after the address discharge. Then, discharge is caused between the electrodes of the display electrode pair, or discharge is caused between the electrodes of the display electrode pair using the address discharge as a trigger, so that the wall charges are accumulated and driven.
  • the magnitude of the signal applied between the address electrodes during the address discharge is a magnitude signal at which no wall charge is accumulated after the address discharge, and the electrodes or electrodes of the address electrode and the display electrode after the address discharge.
  • An electric field is applied between the pair to cause discharge between the address electrode and the display electrode or the electrode pair, or discharge between the address electrode and the display electrode or the electrode pair by triggering the address discharge. It drives by accumulating wall charges.
  • the discharge between the address electrode pairs may be triggered, and the discharge between the display electrode pairs may be performed. Alternatively, it is driven by discharging between the address electrode and the display electrode or the display electrode pair.
  • the distance between the discharge electrodes can be increased, the luminous efficiency can be improved, the luminance can be greatly increased, the contrast can be improved, and a high-definition, high-quality image display can be obtained. be able to.
  • the load on the drive circuit can be reduced even if the discharge voltage of the main discharge increases, and the reactive power can be easily collected. I can do it.
  • FIG. 1 is an exploded perspective view showing a schematic structure of a display discharge tube according to Embodiment 1 of the present invention.
  • FIG. 2 is a sectional view of the display discharge tube shown in FIG.
  • FIG. 3 is an exploded perspective view illustrating a schematic structure of a display discharge tube according to a modification of the first embodiment of the present invention.
  • FIG. 4 is a sectional view showing a schematic structure of the display discharge tube shown in FIG.
  • FIG. 5 is a view showing a manufacturing process of a display discharge tube according to the first embodiment of the present invention and a modification of the first embodiment.
  • FIG. 6 is an exploded perspective view showing a schematic structure of a display discharge tube according to Embodiment 2 of the present invention.
  • FIG. 7 is a sectional view of a schematic structure of the display discharge tube shown in FIG.
  • FIG. 8 is an exploded perspective view showing a schematic structure of a display discharge tube according to a modification of the second embodiment of the present invention.
  • FIG. 9 is a sectional view of a schematic structure of the display discharge tube shown in FIG.
  • FIG. 10 is a view showing a manufacturing process of a display discharge tube according to the second embodiment of the present invention and a modification of the second embodiment.
  • FIG. 11 is a schematic sectional view of a front glass substrate of a display discharge tube according to Embodiment 3 of the present invention.
  • FIG. 12 is a schematic sectional view of a front glass substrate of a display discharge tube according to Embodiment 4 of the present invention.
  • FIG. 13 is a sectional view showing a schematic structure of a display discharge tube according to a modified example of the first to fourth embodiments of the present invention.
  • FIG. 14 is a schematic sectional view of a front glass substrate of a display discharge tube according to Embodiment 5 of the present invention.
  • FIG. 15 is a schematic sectional view of a display discharge tube according to Embodiment 6 of the present invention.
  • FIG. 16 is a driving waveform diagram of a discharge tube for display according to Embodiment 7 of the present invention.
  • FIG. 17 is a driving waveform diagram of a discharge tube for display according to Embodiment 8 of the present invention.
  • FIG. 18 is a driving waveform diagram of a discharge tube for display according to Embodiment 9 of the present invention.
  • FIG. 19 is a driving waveform diagram of a discharge tube for display according to Embodiment 9 of the present invention.
  • FIG. 20 is a driving waveform diagram of a discharge tube for display according to Embodiment 10 of the present invention.
  • FIG. 21 is a driving waveform diagram of a discharge tube for display according to Embodiment 11 of the present invention.
  • FIG. 22 is a driving waveform diagram of a discharge tube for display according to Embodiment 12 of the present invention.
  • FIG. 23 is a schematic perspective view of a conventional AC PDP.
  • FIG. 24 is a schematic sectional view of an AC type PDP according to the prior art.
  • FIG. 25 is a cross-sectional view of a conventional hybrid PDP.
  • FIG. 1 is an exploded perspective view illustrating a schematic structure of a display discharge tube according to the present embodiment
  • FIG. 2 is a cross-sectional view illustrating a schematic structure of the display discharge tube according to the present embodiment. It is.
  • the second substrate is 90 relative to the first substrate to facilitate understanding of the structure. It is rotated and displayed.
  • 1 is a transparent front glass substrate as a first substrate
  • 2 is a rear glass substrate as a second substrate
  • 3 and 4 are partition walls
  • 5 is a display electrode
  • 5a is a display
  • 5b is the transparent electrode part of the display electrode
  • 5M1 and 5M2 are the display electrode pair
  • 6 is the first address electrode
  • 6a is the mother electrode of the first address electrode
  • 6b is the first address electrode.
  • a transparent electrode portion 7 is a second address electrode
  • 8a is a transparent dielectric layer
  • 9 is a protective film (Mg0)
  • 10 is a phosphor of three primary colors of RGB.
  • the periphery of the front glass substrate 1 and the rear glass substrate 2 is sealed with a frit glass, and the following structure is housed in a sealed tube, and the tube is evacuated to helium.
  • a discharge gas such as a mixed gas of (He), neon (Ne), argon (Ar) and xenon (Xe) is sealed.
  • the structure housed in the tube is formed as follows.
  • the second address electrode 7 is formed on the rear glass substrate 2 by a thin film process or a thick film process such as printing.
  • grid-like partition walls 3 are formed by screen printing, sandblasting, or the like.
  • the lattice-shaped barrier ribs 3 are arranged such that the barrier ribs in one direction are parallel to the second address electrode 7 and are located in the gap between the second address electrodes 7, and the barrier ribs in another direction intersecting with the barrier ribs 3 in the front glass substrate 1.
  • the upper display electrode pairs 5M1 and 5M2 are formed so as to be disposed substantially at the centers thereof.
  • the respective phosphors 10 of the RGB primary colors are formed on the second address electrode 7 or on the inner wall surface of the grid-like partition 3 by printing or the like.
  • FIG. 3 is an exploded perspective view illustrating a schematic structure of a modification of the first embodiment of the display discharge tube according to the present invention.
  • FIG. 4 is a cross-sectional view for explaining the schematic structure of the display discharge tube shown in FIG. 3, and in order to facilitate understanding of the structure, the second substrate is rotated by 90 ° with respect to the first substrate. Is displayed.
  • Fig. 3 and Fig. 4 After the white dielectric layer 8b is formed on the electrode 7 by printing or the like, the grid-like partition walls 3 and the phosphors 10 may be sequentially formed.
  • Other configurations are the same as those of the first embodiment shown in FIGS.
  • display electrodes 5 composed of electrode pairs 5M1 and 5M2 are formed by a thin film process or a thick film process such as printing.
  • a first address electrode 6 is formed between the electrode pair 5M1 and 5M2 of the display electrode 5 by a thin film process or a thick film process such as printing.
  • a transparent dielectric layer 8a On the electrode pair 5M1, 5M2 of the display electrode 5 and the first address electrode 6, a transparent dielectric layer 8a, a grid-like partition 4 and a protective film 9 are formed.
  • the transparent dielectric layer 8a is formed by printing an insulator made of transparent glass or the like
  • the grid-like partition 4 is formed by printing an insulator made of black glass or the like.
  • the protective film 9 is an oxide thin film of MgO or the like having a high secondary electron emissivity, and is formed by evaporation or the like.
  • One display cell (hereinafter simply abbreviated as a cell) formed by a discharge area defined by the lattice-shaped barrier ribs 4 on the front glass substrate 1 side and the lattice-shaped barrier ribs 3 on the rear glass substrate 2 side is included.
  • the two electrode pairs 5M1, 5M2 of the display electrode 5, the first address electrode 6, and the second address electrode 7 are arranged.
  • the electrode for display can share the electrode 5M1 and the electrode 5M2 forming the electrode pair in the discharge region of the adjacent cell.
  • a discharge space discharge area
  • a grid-shaped partition wall 4 can be separated by forming a grid-shaped partition wall 4 on the approximate center of each of 5M1 and 5M2 so that their two sides overlap, and the display electrode is shared by adjacent cells. Even when used, a clear image without crosstalk can be reproduced.
  • Front glass substrate 1 and rear glass substrate 2 were made of soda glass with a thickness of 2.0.
  • the display cell pitch is 0.33 mm in width and 1,0 mm in height.
  • the thickness of the glass substrate is basically vacuum strength and is not particularly limited as long as there is no problem in handling. Further, as the material of the glass, it is preferable to use soda glass as long as a glass having a high strain point can be used.
  • transparent electrodes 5b and 6b as electrode pairs 5MK 5M2 and first address electrodes 6 of the display electrode 5 are formed on the front glass substrate 1 with a width of 0.60 band and 0.15 band, for example, using an IT0 film. .
  • Cr—Cu—Cr multilayer films each having a width of 0.06 mm are formed as mother electrodes 5a and 6a, for example, at the center on the transparent electrodes 5b and 6b.
  • the electrode width of the electrode pair 5M1 and 5M2 of the display electrode 5 is approximately 0.05 to 0.8 mm when the discharge cell (discharge area) pitch is 1.0 mm, and the electrode width of the transparent electrode constituting the electrode pair 5MK 5M2 The width ranges from 0.1 to 0.8. If the width of the electrode pair 5M1 and 5M2 of the display electrode is not less than 0.8, the electrode width of the first address electrode 6 formed on the same substrate cannot be sufficiently secured, and it takes time for address discharge, which is practical. is not.
  • the electrode width of the transparent electrode 5b constituting the electrode pair 5M1 and 5M2 is less than 0.1, the electric resistance of the transparent electrode increases, and the mother electrode 5a is thickened so that the electric resistance of the display electrode pair 5MU5M2 does not decrease. Must not increase the definition of the displayed image.
  • the width of the mother electrode 5a is approximately 0.05 to 0.3 mm.
  • the width of the mother electrode 5a is 0.3 mm or more, the light transmittance of the discharge cell decreases and the luminance decreases. If the width of the mother electrode 5a is less than 0.05, the electric resistance of the display electrode 5 (transparent electrode) does not decrease, and it is difficult to drive.
  • a transparent electrode and a mother electrode are used for the first address electrode 6 as well as the electrode pairs 5M1 and 5M2 of the display electrode 5, the decrease in light transmittance and the increase in electric resistance are suppressed, and the electrode area is reduced. Can be bigger. JP9 / 032 8
  • the electrode width of the first address electrode 6 is approximately 0.03 to 0.4 mm. If the electrode width of the first address electrode 6 is not more than 0.03, the electrode area is small, so that the voltage for the address discharge becomes high and it takes a long time to generate a reliable discharge, which is not preferable. If the electrode width of the first address electrode 6 is 0.4 mm or more, the electrode width of the display electrode 5 becomes small, and it is difficult to increase the brightness, which is not preferable.
  • the electrode width of the mother electrode 5a is approximately 0.03 to 0.1 mm. If the electrode width of the mother electrode 5a is more than 0.1, the transmittance of the discharge cells is reduced, and the luminance is undesirably reduced. When the width of the mother electrode 5a is less than 0.03 dragon, the electric resistance of the first address electrode does not decrease and the driving becomes difficult.
  • a transparent electrode for each electrode For example, in a pattern consisting of only the mother electrode 5a without using a transparent electrode for the electrode pair 5M1 and 5H2 of the display electrode 5, if the electrode width is set to 0.2 to 0.6, the electrode interval becomes wide. Although the sustaining voltage increases, the luminous efficiency can be increased.
  • the material of the mother electrodes 5a and 6a only needs to have a small electric resistance, and there is no problem even if the material is a metal such as Ag, Ni, Al, or Au, or a multilayer film such as Cr-Au-Cr.
  • a transparent dielectric layer 8a made of transparent glass or the like is formed on the entire surface so as to cover the electrodes, and further formed on the transparent electrode 5b of the electrode pair 5MK5M2 constituting the display electrode 5.
  • a grid-shaped partition wall 4 is formed at a height of 0.01 mm so that two sides of the four sides overlap substantially on the mother electrode 5a thus formed.
  • This lattice-shaped partition 4 is made of black glass or the like.
  • the formation position of the grid-shaped partition 4 is formed on the transparent electrode 5b of the display electrode, there is no problem in the image display function, but the grid-shaped partition 4 is parallel to the extending direction of the display electrode 5. If the partition wall 4 is formed so as to overlap the mother electrode 5a, the transmittance can be increased, and the display image becomes bright.
  • an MgO film is formed as a protective film 9 to a thickness of 500 to 800 nm by a known method such as electron beam evaporation (EB evaporation).
  • EB evaporation electron beam evaporation
  • a second electrode 7 is printed with a 0.10 mm-wide metal such as Ag, Ni, Al, Au or a multilayer film of Cr_Cu—Cr, Cr-Au-Cr or the like. Formed by a photo process.
  • a white dielectric layer 8b having a thickness of 0.015 mm is formed of an insulating material such as white glass by printing or the like.
  • the electrode width of the second address electrode 7 is approximately 0.05 to 0.2 thigh when the cell pitch is 0.33 mra. If the electrode width is less than 0.05 mm, the discharge starting voltage will be high or the discharge will take time, making it difficult to ensure address discharge.
  • the white dielectric 8b has no significant difference in basic functions whether or not it is formed. However, the utilization of the reflected light of the phosphor 10 is improved by forming the white dielectric 8b, and the role of the protective film of the second address electrode 7 when the grid-like partition 3 is formed by the sand-plast method. There are advantages to
  • the one-way wall of the grid-like partition 3 is parallel to the second address electrode 7 and is located in the gap between the second address electrodes 7, and this and the wall in the other direction of the partition 3 are the front glass substrate.
  • a grid-like partition wall 3 is formed by printing, sand blasting, or the like so as to be located substantially at the center of each of the display electrode pairs 5M1 and 5M2 on the upper part 1.
  • Grid-shaped bulkhead 3 has a width of 0.06 and a height of 0.15 mm It is.
  • the width of the lattice-shaped partition wall 3 is approximately 0.020. Lmm, and the height is 0.050. 25, which is formed by printing or sand plasting.
  • the width of the grid-like partition walls 3 is 0.1 mm or more, the aperture ratio becomes low, and it becomes difficult to increase the brightness of the display image.
  • the width is 0.02 mni or less, a partition having a sufficient height cannot be formed.
  • the height of the grid-shaped partition walls 3 is less than 0.05, it is not possible to apply a sufficient amount of phosphor, and if the height of the grid-shaped partition walls 3 is 0.25 mm or more, the partition walls will not be coated. Formation becomes difficult.
  • the phosphor 10 is formed on the rear glass substrate 2 by applying a paste-like phosphor by printing or the like to correspond to each of the RGB colors.
  • the lattice-shaped partitions 3 formed on the front glass substrate 1 and the rear glass substrate, the rear glass substrate 2 thus formed, and the lattice-shaped partitions 4 formed on the front glass substrate 1 are overlapped with each other. Seal and exhaust with frit glass so that the exhaust pipe (not shown) is fixed. Next, gas is sealed and the chip is turned off.
  • the filling gas is a gas that can be ionized by electric discharge such as He-Xe Ne-Xe, and is filled at 25 ° C with a pressure of approximately 400 Torr.
  • the grid-like partition walls 4 are formed on the front glass substrate 1 in substantially the same grid shape as the grid-like partition walls 3 on the rear glass substrate 2 by changing the height and color.
  • the grid-like partition walls 4 on the front glass substrate 1 may or may not be formed. If the grid-shaped partition walls 4 are not formed, the transmittance is reduced if the portions of the grid-shaped partition walls 3 that are parallel to the extending direction of the display electrode 5 overlap the mother electrodes 5a of the display electrodes 5. This is convenient.
  • at least the uppermost layer is preferably black to improve contrast.
  • the height of the partition walls 4 on the front glass substrate 1 depends on the type and pressure of the discharge gas to be sealed, but is as high as the thickness of the negative glow formed during discharge. If there is, a stripe-shaped partition wall in a direction parallel to or perpendicular to the second address electrode 7 may be used.
  • the electrode pair 5M1 which constitutes the display electrode 5
  • the display electrode pair for performing main discharge for display and the address electrode pair for mainly performing address discharge are separated, so that the reactive power of the main discharge can be easily collected. Can be done. That is, the display electrode pairs 5M1 and 5M2 that perform the main discharge are commonly connected, and the reactive power recovery circuit can be connected to the common connection portion.
  • a drive circuit common to each cell can be used for each of the display electrode pairs 5M1 and 5M2, and the electrodes are separated to obtain high brightness and high efficiency. As a result, the rise in the discharge voltage of the main discharge has little effect on the drive circuit.
  • FIG. 6 is an exploded perspective view illustrating a schematic structure of a display discharge tube according to the present embodiment
  • FIG. 7 is a cross-sectional view illustrating a schematic structure of the display discharge tube shown in FIG.
  • the second substrate is shown rotated by 90 ° with respect to the first substrate for easy understanding of the structure.
  • a transparent glass substrate is used as the first substrate, and the front glass substrate 1 is used.
  • the second substrate for example, a transparent glass substrate is used, and this is referred to as a rear glass substrate 2.
  • the periphery of the front glass substrate 1 and the rear glass substrate 2 is sealed with a frit glass, and the following structure is housed in a sealed tube, and the tube is evacuated to helium.
  • a discharge gas such as a mixture of (He), neon (Ne), argon (Ar), and xenon (Xe) is sealed.
  • the structure housed in the tube is formed as follows.
  • the second address electrode 7 is formed on the rear glass substrate 2 by a thin film process or a thick film process such as printing.
  • stripe-shaped partition walls 3 are formed by screen printing, sandblasting, or the like.
  • the stripe-shaped partition walls 3 are arranged in parallel with the second address electrodes 7.
  • each of the phosphors 10 of the three primary colors of RGB is formed on the second address electrode 7 and on the inner wall surface of the stripe-shaped partition wall 3 by a method such as printing.
  • FIG. 8 is an exploded perspective view illustrating a schematic structure of a modification of the second embodiment of the display discharge tube according to the present invention.
  • FIG. 9 is a cross-sectional view for explaining the schematic structure of the display discharge tube shown in FIG. 8, in which the second substrate is rotated by 90 ° with respect to the first substrate to facilitate understanding of the structure. It is displayed.
  • the white dielectric layer 8b is formed on the second address electrode 7 by printing or the like, the stripe-shaped partition walls 3 and the phosphor 10 may be formed.
  • Other configurations are the same as in the second embodiment.
  • the display electrode 5 composed of the electrode pairs 5M1 and 5M2 is formed by a thin film process or a thick film process such as printing.
  • a first address electrode 6 is formed between the electrode pair 5M1 and 5M2 of the display electrode 5 by a thin film process or a thick film process such as printing.
  • a transparent dielectric layer 8a On the electrode pair 5M1, 5M2 of the display electrode 5 and the first address electrode 6, a transparent dielectric layer 8a, a grid-like partition 4 and a protective film 9 are formed.
  • a transparent dielectric layer 8a an insulator made of transparent glass or the like was formed by printing or the like, and for the grid-like partition 4, an insulator made of black glass or the like was formed by printing or the like.
  • the protective film 9 is an oxide thin film such as MgO having a high secondary electron emissivity, and is formed by a vapor deposition method or the like.
  • Two display electrodes 5 are included in one display cell formed by a discharge region defined by the grid-like partition walls 4 on the front glass substrate 1 side and the stripe-shaped partition walls 3 on the rear glass substrate 2 side. Electrode pairs 5M1, 5M2, first address electrode 6, and second address electrode 7 are arranged.
  • the electrode for display can share the electrode 5M1 and the electrode 5M2 forming the electrode pair in the discharge region of the adjacent cell.
  • a discharge space discharge area
  • a grid-like partition 4 can be separated by forming a grid-like partition 4 on the substantially center of each of 5M1 and 5M2 so that the two sides thereof overlap.
  • the separation of the discharge area does not require the formation of the grid-shaped partition walls 4, but the distance D (band) and electrode width W (mm) between the electrode pair 5M1 and 5M2 of the display electrode 5, the front glass substrate 1 and the back
  • the display discharge tube of this embodiment is manufactured as follows.
  • the second embodiment shown in FIGS. 8 and 9 and a modification of the second embodiment will be described with reference to FIG. 10 which is a flowchart illustrating the outline of the manufacturing process of the display discharge tube according to the present invention.
  • the second embodiment and a modification of the second embodiment are different from the first embodiment in that the shape of the partition walls formed on the rear glass substrate 2 in the first embodiment is changed from a lattice shape to a stripe shape.
  • Soda glass with a thickness of 2.0 mm was used for the front glass substrate 1 and the rear glass substrate 2.
  • the display cell pitch is 0.33mm in width and 1.0 in height.
  • the thickness of the glass substrate is not particularly limited as long as it has vacuum strength and there is no problem in handling during manufacture. Further, the material of the glass is preferable to soda glass as long as high strain point glass can be used.
  • transparent electrodes 5b and 6b as electrode pairs 5M1 and 5M2 of the display electrode 5 and a first address electrode 6 are formed with a pattern of, for example, an IT0 film to a width of 0.60 mm and 0.15 mm, respectively.
  • a Cr—Cu—Cr multilayer film having a width of 0.06 mm, for example is formed on the transparent electrodes 5b and 6b, for example, as the mother electrodes 5a and 6a, respectively.
  • the electrode width of the electrode pair 5M1 and 5M2 of the display electrode 5 is approximately 0.05 to 0.8 when the discharge cell (discharge area) pitch is 1. Omm, and the electrodes constituting the electrode pair 5M1 and 5M2 are transparent.
  • the width of the electrodes is between 0.1 and 0.8 mni. If the width of the electrode pair 5M1 and 5M2 of the display electrode is 0.8 ram or more, the electrode width of the first address electrode 6 formed on the same substrate cannot be sufficiently secured, and it takes time for address discharge. Absent. Further, when the electrode width of the transparent electrode 5b constituting the electrode pair 5M1 and 5M2 is 0.1 mm or less, a thick mother electrode is required to reduce the electric resistance of the transparent electrode, so that the definition of the displayed image cannot be increased.
  • the width of the mother electrode 5a is approximately 0.05 to 0.3 mm.
  • the width of the mother electrode 5a is 0.3 or more, the light transmittance of the discharge cell decreases and the luminance decreases. If the width of the mother electrode 5a is less than 0.05, the electric resistance of the display electrode 5 (transparent electrode) does not decrease, and it is difficult to drive.
  • a transparent electrode and a mother electrode are used for the first address electrode 6 in the same manner as the electrode pairs 5M1 and 5M2 of the display electrode 5, a decrease in light transmittance and an increase in electric resistance are suppressed to increase the electrode area. be able to.
  • the electrode width of the first address electrode is approximately 0.03 to 0.4 mm when the discharge cell pitch is 1. Omm. If the electrode width of the first address electrode 6 is less than 0.03 dragon, the electrode area is reduced, so that the voltage of the address discharge is increased and it takes a long time to generate a reliable discharge, which is not preferable. If the electrode width of the first address electrode 6 is not less than 0.4 thigh, the electrode width of the display electrode 5 becomes narrow, and it is not preferable to increase the brightness.
  • the electrode width of the mother electrode formed on the transparent electrode of the first address electrode is approximately 0.03 to 0.1 mm. If the electrode width of the mother electrode is more than 0.1, the transmittance of the discharge cell is lowered, and the luminance is undesirably reduced. When the width of the mother electrode is less than 0.03 mm, the driving becomes difficult because the electric resistance of the first address electrode does not decrease.
  • the electrode pairs 5M1, 5M2 and the first address electrode of the display electrode 5 are used. It is not necessary to use a transparent electrode.
  • a transparent electrode for example, in a pattern composed of only the mother electrode without using a transparent electrode for the electrode pair 5M1 and 5M2 of the display electrode 5, for example, if the electrode width is set to 0.2 to 0.6, it is formed. Although the electrode spacing is widened and the sustaining voltage is high, the luminous efficiency can be increased.
  • the material of the mother electrodes 5a and 6a only needs to have a small electric resistance. P / P98 / 03248
  • a transparent dielectric layer 8a made of transparent glass or the like was formed on the entire surface to cover the electrodes, and further formed on the transparent electrode 5b of the electrode pair 5111 constituting the display electrode 5 and 5M2.
  • a grid-like partition wall 4 is formed at a height of 0.03 mm on the outline of the mother electrode 5a so that two opposing sides of the four sides overlap.
  • This lattice-shaped partition 4 is made of black glass or the like.
  • the grid-like partition 4 is formed on the transparent electrode 5b of the display electrode, there is no problem in the image display function. It is preferable to form a partition wall portion of the grid-like partition wall 4 parallel to the extending direction of the display electrode 5 so as to overlap the mother electrode 5a, since a decrease in transmittance can be suppressed and a display image becomes bright. .
  • an MgO film is formed as a protective film 9 to a thickness of 500 to 800 nm by a known method such as electron beam evaporation (EB evaporation).
  • EB evaporation electron beam evaporation
  • a second address electrode ⁇ is formed of a metal such as Ag, Ni, Al, Au or a metal such as Cr—Cu—Cr or Cr—Au—Cr with an electrode width of 0.10.
  • the layer film is formed by a printing method and a photo process.
  • a white dielectric layer 8b having a thickness of 0.015 mm is formed on the second address electrode 7 by printing a thread color edge material such as white glass.
  • the electrode width of the second address electrode 7 is approximately 0.05 to 0.2 when the discharge cell pitch is 0.33. If the electrode width is less than 0.05, the discharge starting voltage will be high and the discharge will take time, making it difficult to perform a reliable address discharge.
  • the white dielectric 8b has no significant difference in basic functions whether or not it is formed.
  • the phosphor 10 There is an advantage that the utilization rate of the reflected light is improved, and that it also functions as a protective film for the second address electrode 7 when the stripe-shaped partition walls 3 are formed by the sand blast method.
  • the stripe-shaped barrier ribs 3 are formed by printing, sand plasting, or the like so as to be located in the gaps in parallel with the second electrode electrodes 7.
  • the phosphors 10 of each of the RGB colors are formed on the inner wall surface of the upper stripe electrode-like partition wall 3 by printing or the like on the second address electrode 7.
  • the width of the stripe-shaped partition wall 3 is 0.60 ⁇ , and the height is 0.15 mm.
  • the width of the stripe-shaped partition wall 3 is approximately 0.02 to 0.1 and the height is 0.05 to 0.25 mm, and is formed by printing or sandblasting. If the width of the stripe-shaped partition walls 3 is more than 0.1 plate, the aperture ratio becomes low, and it becomes difficult to increase the brightness.
  • the opening ratio of the strip-shaped partition wall 3 is better as the width is smaller, but a partition wall of sufficient height cannot be formed if the width is less than 0.02 dragon. If the height of the strip-shaped partition walls 3 is less than 0.05, it is not possible to apply a sufficient amount of phosphor, and if the height of the strip-shaped partition walls 3 is 0.25 mm or more. It becomes difficult to form partition walls.
  • the phosphor 10 is formed on the rear glass substrate 2 by applying a paste-like phosphor by printing or the like in accordance with each of the RGB colors.
  • the sealing gas is an ionizable gas such as He-Xe, Ne-Xe, etc., and sealed at 25 ° C with a pressure of about 400 Torr.
  • Crosstalk can be suppressed to the extent that it does not hinder the function of the spray.
  • the height of the partition wall 4 necessary for suppressing the crosstalk is related to the thickness of the negative glow. For example, when the filling gas is He-5% Xe and 400 Torr, slight crosstalk occurs when the partition wall height is 0.01 mm. Further, if the height of the partition wall 4 is more than 0.1 band, the viewing angle of the displayed image is narrowed, which is not preferable.
  • the basic functions of the electrode pairs 5M1 and 5M2 constituting the display electrode 5 are not limited even if they are bundled outside the discharge tube or inside the discharge tube (in the panel). There is no big difference. Even if only one of the electrode pairs of the display electrode 5, for example, only 5M1 is bundled into a plurality, or the electrodes 5M1 and 5M2 are bundled depending on the electric capacity, there is no significant difference in the basic function.
  • the display electrode pairs 5MU and 5M2 are shared by the adjacent discharge areas, a structure in which the distance between the display electrode pairs is large can be obtained, so that light emission with high efficiency and high luminance can be obtained. be able to.
  • FIG. 11 is a schematic cross-sectional view for explaining the configuration of the front glass substrate of the display discharge tube according to the present embodiment.
  • the electrode pairs 5M1 and 5M2 constituting the display electrode 5 is used as an electrode of two discharge spaces (discharge areas) by the partition wall 4, and the other electrode 5M1 of the electrode pair is a partition wall. 4 are formed at symmetrical positions with respect to 4, and serve as display electrodes in adjacent discharge regions. Other configurations are the same as those of the first or second embodiment.
  • FIG. 12 is a schematic cross-sectional view for explaining the configuration of the front glass substrate of the display discharge tube according to the present embodiment, and the same reference numerals as those in the drawings of the above embodiments correspond to the same parts.
  • the electrode pairs 5M1 and 5M2 of the display electrode 5 are formed at symmetrical positions with respect to the partition wall 4, respectively. That is, one electrode 5M1-1 of the electrode pair and the other electrode 5M2-2 are arranged so as to constitute a display electrode in one discharge region, and the electrode 5M1-1 and the electrode 5M2-2 are connected to each other.
  • the first address electrode 6 is disposed between the two. Other configurations are the same as those of the first and second embodiments. According to this embodiment, since there are a pair of address electrodes and a pair of display electrodes, the distance between the pair of display electrodes can be increased.
  • the electrodes 5MK5M1-1) and the electrodes 5M2-2 that perform the main discharge are formed.
  • Distance Dl (mm) and distance D2 (II) between other electrode 5M2-1 and pressure of filled gas at 25 ° C P (Torr) and vertical direction of front glass substrate 1 and rear glass substrate 2 The relationship of the length L (mm) of the discharge space may satisfy the following equation. That is,
  • crosstalk occurs when the value of 0 is less than 0.5, and is not realistic when the value of ⁇ is greater than 2.
  • the pressure ⁇ of the gas limits the thickness of the negative glow, and the length L of the discharge space limits the spread of the electric field to control the spread of the discharge.
  • the first end electrode 6 may be arranged close to one of the display electrode pairs, for example, 5M1.
  • light emission at the time of discharge between the first address electrode 6 and one of the display electrode pairs 5M1 is achieved. Brightness can be suppressed and discharge can be easily generated.
  • the first address electrode 6 is composed of the mother electrode 6a and the transparent electrode 6b
  • one 5M1 of the display electrode pair and the transparent electrode 6b are arranged close to each other, and the mother electrode 6a contacts the transparent electrode 6b.
  • the mother electrode 6a contacts the transparent electrode 6b.
  • FIG. 14 is a schematic sectional view of a display discharge tube front glass substrate according to the present embodiment.
  • the display electrodes 5M1 and 5M2 are formed so as to be located on both sides of the partition wall 4, respectively. Is different from the third embodiment.
  • two pairs of electrodes ie, a pair of address electrodes and a pair of display electrodes, are provided in the same manner as in Embodiments 1 to 4. The distance between the electrodes of the pair of electrodes can be increased.
  • FIG. 15 is a schematic sectional view illustrating the configuration of a display discharge tube according to the present embodiment.
  • FIG. 15 shows the second substrate rotated by 90 ° with respect to the first substrate for easy understanding of the structure.
  • the electrode pairs 5M1 and 5M2 forming the display electrode 5 are arranged in the same discharge space on the front glass substrate 1, and the first address electrode 6 and the second address electrode 7 are connected to the rear glass substrate. It is formed on two sides.
  • the first address electrode 6 is formed on the upper surface of the rear glass substrate 1, and the second address electrode 7 is formed thereon via the dielectric layer 8b.
  • the same effect can be obtained even when the arrangement of the first address electrode 6 and the second address electrode 7 is reversed.
  • the formation positions of the endless electrodes are different from those of the first to fifth embodiments, but since they have a pair of address electrodes and a pair of display electrodes, they can be used in a conventional AC-type display discharge tube. In comparison, the distance between the pair of display electrodes can be increased.
  • the display electrode pair for performing main discharge for display and the address electrode pair for mainly performing address discharge are provided separately. Therefore, the display electrode pairs 5M1 and 5M2, which perform the main discharge, can be connected in common to each cell.This suppresses the effect of the increase in the discharge voltage of the main discharge due to the separation of the electrodes on the drive circuit, and the main discharge. Reactive power can be easily recovered without complicating the circuit.
  • FIG. 16 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment.
  • first in order to make all the discharge cells on the screen of the display discharge tube uniform, that is, the electrodes 5M1 and 5M2 and the first address electrode 6 constituting the electrode pair of the display electrode 5 are used.
  • PwSK pulse This is performed by applying a PwSK pulse to the first address electrode 6. Since this pulse is intended to erase the wall charge, it is a narrow pulse. Generally, in a so-called AC-type PDP, wall charges are not generated if the pulse width is small during discharge, and wall charges are generated if the pulse width is wide.
  • PwsA the pulse width of PwSK is 1 beta s
  • voltage PwsA is + 140 V
  • P WSK - 140 V.
  • This reset discharge is for the purpose of erasing the electric charge on the electrode surface in the cell, and if a discharge occurs, it is between the display electrode pair, between the address electrode pair, the display electrode or the electrode pair and the address electrode or A reset discharge may be performed between the electrode pairs.
  • Performing a reset discharge between the first address electrode 6 and the display electrode, for example, 5M1 produces less light emission due to the reset discharge than a reset discharge between the pair of display electrodes, resulting in better display image contrast. Become.
  • the display electrode width of each of the electrodes 5M1 and 5M2 is 0.6 mm, and the width of the first address electrode 6 is 0.2 band, the display electrode Assuming that the brightness due to the discharge between the electrodes 5M1 and 5M2 of the electrode pair constituting 5 is 1, the brightness due to the discharge between the first address electrode 6 and the electrode 5M1 is about 0.5.
  • the reset discharge is performed between the first address electrode 6 and the display electrode 5M1
  • the reset discharge is performed between the first address electrode 6 and the display electrodes 5M1 and 5M2.
  • the first electrode electrode 6 and the display electrode 5M1 are arranged close to each other, so that the display electrode Reset between 5M1 and first address electrode 6 CT / JP98 / 03248
  • the waveform shown in FIG. 16 is applied to the display electrodes 5M1, 5M2 and the first address electrode 6 during the electric field 1 application period.
  • the display electrodes 5M1, 5M2 and the first address electrode 6 are on the first substrate, a positive voltage is applied to the first substrate side, the second address electrode is on the second substrate, and the second Since the substrate side remains at 0 V, an electric field is applied between the electrode group of the first substrate and the electrode group of the second substrate, and the negative space charge generated by the discharge generated during the reset period is reduced to the first space. Positive space charges are accumulated as wall charges in the electrode group of the second substrate in the electrode group of the second substrate.
  • V M2 is + 70V
  • V C + is + 80V.
  • the waveforms of the address period after the electric field 1 application period in FIG. 16 are displayed.
  • the first address electrodes 6 (6-1, 6-2,... 6-n) correspond to so-called scan electrodes
  • the second address electrodes 7 (7-n) correspond to so-called data electrodes.
  • Discharge occurs between the first and second address electrodes. That the potential difference become as the pulse P C of the negative polarity to the first Adoresu electrode 6, a positive pulse PA is applied to the second Adoresu electrode 7, the wall charges on the first Adoresu electrode 6 and the second address electrodes 7 To accumulate.
  • V M1 + is applied to the display electrode 5M1 and a negative voltage V M1 — is applied to 5M2.
  • V M1 + applied to the display electrode 5M1 is a voltage that does not discharge any of the other electrodes (the display electrode 5M2, the first address electrode 6 and the second address electrode 7), and is applied to the display electrode 5M2.
  • V M1 — is a voltage that does not discharge any of the other electrodes (display electrode 5M1, first end electrode 6 and second address electrode 7).
  • VM1 + is + 60V
  • V M1 one is - 60V
  • P C pulse width with P A is 4 s
  • the voltage is P C - 140 V
  • P A is + 40V .
  • the wall charges can be accumulated on the display electrodes.
  • the first discharge can be easily generated. Therefore, after the address period of FIG. 16, the waveform of the electric field 2 application period is applied to the display electrodes 5M1, 5M2 and the first address electrode 6.
  • V M1 + is +60 V
  • V M1 — is ⁇ 60 V
  • V C — is ⁇ 140 V.
  • the waveform of the sustain period is applied to the display electrodes 5MK 5M2 and the first address electrode 6.
  • a trigger signal is input to the first address electrode 6, but there is no problem in basic functions without inputting a single trigger signal. In that case, it is only necessary to use the wall charges on the first address electrode 6 to discharge the trigger once.
  • the range of voltage setting that can be driven can be increased.
  • the wall charge is erased by the last pulse of the sustain period. However, there is no problem even if a wide pulse is applied without erasing. In that case, the pulse to be applied is set so that the generated wall charges facilitate the next reset discharge.
  • the reset discharge between the sustain period and the address period does not have to be performed, so that the number of reset discharges can be reduced. And the contrast of the displayed image can be improved.
  • Pulse PTC is applied to PTM2 and first address electrode 6. Pulse PTC is the pulse width 1 s enough to the wall electric load is not accumulated, the pulse P TM1 P T M2 is the 4 s enough wall charges are accumulated.
  • the voltage of the PTC is +80 V
  • the voltage of ⁇ is _100 V
  • the voltage of ⁇ 2 is +140 V.
  • Pulse for performing triggers discharge after the main discharge of the sustain period is a PSM + and PSM-, pulse width 4 mu s, in the present embodiment, the voltage P SM + is + 40V P SM - is - 200V It is.
  • the pulse for erasing the wall charge on the display electrode PSSM-PSSM + has the same pulse and voltage as the pulse for continuing the main discharge, and has a pulse width of 1 s.
  • a pulse in both the positive and negative polarities is applied as the pulse in the sustain period.
  • the present invention is not limited to this. As long as the potential does not discharge to the address electrode pair, it is sufficient that a predetermined potential is applied between the display electrode pair 5MK and 5M2. Even if the applied pulse is a pulse of only positive polarity or a pulse of only negative polarity, there is no problem. Absent.
  • the reset period, the electric field 1 application period, the address period, the electric field 2 application period, the sustain period, and the cycle adjustment period are shown in FIG. 16, but at least the address discharge performed between the address electrode pair is performed. It suffices if there is an address period in which the display is performed and a sustain period in which the main discharge for display performed between the display electrode pairs is performed. In the sustain period, there are cases where a main discharge for performing display and a trigger discharge prior to the main discharge occur. (Example 8)
  • FIG. 17 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment.
  • first in order to make all the discharge cells on the screen of the display discharge tube uniform, that is, the electrodes 5M1 and 5M2 constituting the display electrode pair, the first address electrode 6, and the second address are used.
  • the first address electrode 6 and the second address are used.
  • a reset discharge is performed between the display electrode 5M1 and the first address electrode 6 to erase the wall charge on the electrode in the display cell.
  • the pulse P WSK to the electrode 5M1 during the reset period of FIG. 17 is performed by applying a pulse of PwsA the first Adoresu electrode 6. Since this pulse is intended to erase the wall charge, it is a narrow pulse.
  • the pulse width of PWSA ⁇ PWSK is 1 s
  • the voltage PwsA is + 40V
  • the P WSK - is 240V.
  • this reset discharge is to erase the electric charge on the electrode surface in the cell. good.
  • a reset discharge is performed between the first address electrode 6 and the display electrode, for example, 5M1
  • less light is emitted due to the reset discharge than when a reset discharge is performed between the pair of display electrodes, and the display image contrast is improved.
  • the waveforms of the address period shown in Fig. 19 are displayed. Display electrodes 5M1, 5M2, 1st address electrode 6 (6-1, 6-2, 6-n) , And the second address electrode 7 (7-n).
  • the first address electrodes 6 (6-1, 6-2, ⁇ 6-n) correspond to so-called scan electrodes, and the second address electrodes 7 (7-1n) correspond to so-called data electrodes.
  • a negative pulse Pc is applied to the first address electrode 6 and a positive pulse PA is applied to the second address electrode 7 with a potential difference, and wall charges are accumulated on the first address electrode 6 and the second address electrode 7. Let it.
  • the waveform of the sustain period is applied to the display electrodes 5M1, 5M2 and the first address electrode 6.
  • a trigger discharge is generated between the first address electrode 6 and the display electrode 5M1, and the discharge is transferred to another electrode 5M2.
  • the pulse ⁇ has a pulse width of 1 Hs at which wall charges cannot be generated, and the pulse width of the pulse P S has a pulse width of 4 s at which wall charges are accumulated.
  • the voltage of the P T is + 200V, the voltage of P S is + 240V.
  • the trigger discharge occurs first between the first address electrode 6 and the electrode 5M1, and then the discharge occurs between the electrode 5M1 and the electrode 5M2. Will migrate.
  • the pulse width of the pulse P S is wide, and in the cell where the discharge occurred, the wall charge is formed on the display electrodes 5M1 and 5M2 by the discharge, and the discharge continues as the wall charge of the next discharge.
  • a trigger signal is applied to the first address electrode 6, but the trigger discharge is performed using only the wall charge on the first address electrode without applying the trigger signal. There is no problem.
  • the range of voltage settings that can be driven can be increased. Also applied to the display electrode during the sustain period
  • the positive pulse has been described as a positive pulse, the present invention is not limited to this, and it is also possible to use a negative pulse or a bipolar pulse.
  • FIGS. 18 and 19 are drive waveform diagrams for explaining a method of driving the display discharge tube according to the present embodiment.
  • Pulses (PwWK, PWWA) are applied to the electrode 5M1, the electrode 5M2, and the first address electrode 6 as shown in FIGS. 18 and 19 during the reset period. Since this pulse is intended to generate wall charges, the pulse width is long enough to accumulate wall charges (4, and the voltage of P ffffA is
  • the voltage of PffffK is _240V.
  • a wall width is not generated when the pulse width is narrow at the time of discharge, and a wall charge is generated when the pulse width is wide.
  • the reset discharge for accumulating wall charges on the electrodes may be either the first address electrode 6 or one of the display electrodes 5M1 and 5M2 as shown in FIG. That is, it is only necessary that wall charges are generated on the first address electrode 6.
  • the waveforms during the address period in FIGS. 18 and 19 are applied to the first address electrode 6, the second address electrode 7, and the electrodes 5M1 and 5M2 of the display electrode pair. .
  • the pulse width of Pc and PA is 1 ⁇ s, and the voltage is -140V for Pc and + 40V for PA.
  • the pulse applied to the address electrode is a pulse having a narrow pulse width at which no wall charge is generated in the address electrode, causing an address discharge, and the space charge after the address discharge erases the wall charge of the first address electrode 6.
  • an electric field may be applied between the electrodes to accumulate space charges in the cells on the electrodes.
  • the method of applying an electric field at this time is that an address discharge is performed, that is, a discharge cell in which space charge exists is a discharge cell that does not want to cause a main discharge for display, and an electrode used in the main discharge is An electric field is applied as the same potential.
  • an electric field may be applied between the display electrode pair 5M1, 5M2 and the first address electrode 6 with the same potential and the second address electrode 7.
  • the first discharge in the sustain period causes a trigger discharge between the first address electrode 6 and the display electrode 5M1, and transfers the discharge to another electrode 5M2.
  • a pulse Ps is applied to the electrode 5M2 and a pulse ⁇ is applied to the first address electrode 6 to the electrodes 5M1 and 5M2 of the display electrode pair and the first address electrode 6.
  • Pulse ⁇ is pulse width so as not to generate wall charge power (1 s)
  • the pulse width of the pulse P S is the pulse width extent that the wall charge is accumulated (4 s). Note that the voltage of ⁇ is 200 V and the voltage of Ps is 240 V.
  • the cell where no paddle discharge has occurred that is, the cell with the wall charge on the first paddle electrode 6 first triggers discharge between the first paddle electrode 6 and the electrode 5M1, and then between the electrodes 5M1 and 5M2.
  • the discharge shifts.
  • the pulse width of the pulse P S is large, the wall charges by the discharge in the discharge of happened cells respectively formed in the display electrode 5M1 and 5M2, discharge goes persist as the wall charges for the next discharge.
  • a trigger signal is applied to the first address electrode 6 in this embodiment.
  • a trigger is discharged using only the wall charges on the first address electrode without applying a trigger signal.
  • the range of voltage settings that can be driven can be increased.
  • the pulse applied to the display electrode during the sustain period has been described as a pulse of negative polarity, the present invention is not limited to this, and a pulse of positive polarity and bipolar may be used.
  • FIG. 20 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment.
  • the electrodes 5M1 and 5M2, which constitute the display electrode pair, and the first address electrode 6 A reset discharge for accumulating wall charges is performed between the display electrode 5M1 and the first address electrode 6 in order to initialize the upper charges.
  • the pulse (PwWK PWWA) shown during the reset period of FIG. 20 is applied to the display electrode 5M1 and the first address electrode 6 as shown in the figure. Since this pulse is that the purpose of the wall charges are generated, the pulse width is much long pulse (4 s) next to the wall charges are accumulated, the voltage of the voltage of PwwA is + 40V P WWK in one 240V is there.
  • the reset discharge is performed between the display electrode 5M1 and the first address electrode 6, but if there is a charge on the first address electrode 6 or the second address electrode 7 before the address discharge, the reset discharge is performed. It is good to apply an electric field at least between the pair of address electrodes even after a reset discharge between the first address electrode 6 and the electrode pair of the display electrode 5, or after the reset discharge. There is no problem with accumulating charge.
  • the waveform during the address period shown in FIG. 20 is changed to the first address electrode 6, the second address electrode 7, and the display electrode pair electrode 5M1. And 5M2.
  • a pulse P C of the negative polarity to the first Adoresu electrode 6 potentiometrically you discharge Adoresu period, the second Adoresu electrodes 7 for applying a positive pulse PA.
  • the pulse width of Pc PA is 1 s, and the voltage is -140V for Pc and + 40V for PA.
  • the pulse applied to the address electrode is a pulse having a narrow pulse width at which no wall charge is generated in the address electrode, causing an address discharge, and the space charge after the address discharge erases the wall charge of the first address electrode 6.
  • a pulse Ps is applied to the electrodes 5M1 and 5M2 of the display electrode pair and the first electrode 6 at the beginning of the sustain period shown in FIG. 20, and a pulse ⁇ is applied to the first address electrode 6.
  • the pulse ⁇ has a pulse width (1 ⁇ s) at which wall charges cannot be generated, and the pulse width of the pulse Ps has a pulse width (4 ⁇ s) at which wall charges are accumulated.
  • the voltage of the [rho T is + 40V
  • the voltage of the P S - is 200V.
  • the pulse ⁇ applied to the first address electrode 6 is a pulse having a polarity opposite to that of the wall charge existing on the first address electrode. Since no wall charge exists in the cell where the address discharge has occurred, and the wall charge exists in the cell where the address discharge has not occurred, the pulse having the opposite polarity to the wall charge existing on the first address electrode 6 is discharged.
  • a trigger discharge first occurs between the first address electrode 6 and the electrode 5M1, and thereafter, the electrode 5M1 and the electrode 5M1 The discharge shifts between 5 ⁇ 2, followed by the main discharge.
  • the pulse width of the pulse Ps is wide, and in the cell where the discharge has occurred, wall discharge is formed on the display electrodes 5M1 and 5M2 by the discharge, and the discharge continues as the wall charge of the next discharge.
  • the pulse applied to the display electrode during the sustain period has been described with the pulse of negative polarity, the present invention is not limited to this, and a pulse of positive polarity and bipolar may be used.
  • the driving voltage of the trigger discharge during the sustain period is increased, but there are advantages that the address speed is high and the contrast of the displayed image is high.
  • FIG. 21 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment.
  • an embodiment of the driving method of the display discharge tube will be described with reference to FIG.
  • the charges on the electrodes 5M1 and 5M2 and the first address electrode 6 constituting the electrode pair of the display electrode 5 are initialized.
  • a discharge is performed between the electrodes 5M1 and 5M2 to erase wall charges on the surface of the dielectric layer 8a. That is, the pulse P WSA the electrode 5M1 during the reset period of FIG. 21 is performed by applying a pulse of P ⁇ SK to 5M2. This pulse is narrow and a pulse because it is intended to prevent wall charges.
  • the pulse width of PwSA PfSK is 1 ⁇ s
  • the voltage of PffSA is + 40V P WSK
  • the waveform during the address period in FIG. 21 is applied to the first address electrode 6, the second address electrode 7, and the display electrodes 5M1 and 5M2.
  • a pulse P C of the negative polarity to the first Adoresu electrode 6 at a potential difference to discharge in the address period, a second ad A positive pulse PA is applied to the electrode 7.
  • a voltage + V higher than the potential of the discharge space generated by the address discharge is applied to one side of the electrode of the display electrode 5, for example, 5M1, so as not to cause a discharge with the first address electrode 6 on the low voltage side.
  • a voltage of 1 V M lower than the potential of the discharge space generated by the address discharge is applied to the second address electrode 7 on the high voltage side within a range in which no discharge occurs.
  • the pulse applied to these address electrodes is such that a pulse (Pc, PA) with a narrow pulse width that does not generate wall charges is applied to the address electrodes to cause an address discharge, and the space charges after the address discharge are applied to the display electrode 5.
  • the wall charges of the opposite polarities to the voltage applied to the electrodes 5M1 and 5M2 are accumulated.
  • the pulse width of the pulse Pc and the pulse PA is both a 1 mu s, the voltage of the pulse P C is an 140 V, pulse PA is + 40V, + VM is + 30V, one V M is one 30V .
  • the sustaining pulse Ps is applied to the electrodes 5M1 and 5M2 constituting the display electrodes during the sustain period shown in FIG.
  • discharge sustain during the sustain period can be controlled according to the presence or absence of the address discharge (image information).
  • FIG. 22 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment.
  • first in order to make all the discharge cells on the screen of the display discharge tube uniform, namely, the electrodes 5M1 and 5M2 of the electrode pair constituting the display electrode 5 and the first electrode 6
  • a discharge for accumulating wall charges is performed between the electrodes 5M1 and 5M2.
  • the pulse width of the PW K is 4 ⁇ s
  • the voltage of PwwA is + 40V
  • the voltage of the P WWK an 240V.
  • the waveform during the address period in FIG. 22 is applied to the first address electrode 6, the second address electrode 7, and the display electrodes 5M1 and 5M2.
  • the pulse applied to the address electrode applies a pulse with a narrow pulse width that does not generate wall charge to the address electrode, causing an address discharge, and the space charge after the address discharge erases the wall charge of the display electrodes 5M1 and 5M2.
  • the pulse width of the pulse p A is 1 beta s
  • pulse PA is + 40V.
  • a sustaining pulse P S was applied to the display electrodes 5M1 and 5M2, and no address discharge occurred.
  • cells having wall charges on the display electrodes were discharged, and an address discharge occurred. That is, a cell having no wall charge in the display electrode does not discharge.
  • the pulse width of Ps is 4 ⁇ s, and the voltage is -240 V.
  • the sustaining of the discharge during the sustain period can be controlled according to the presence or absence of the address discharge (that is, the image information).

Abstract

A discharge tube for display provided with an electrode group containing electrode pairs for display and first address electrodes on one of the facing surfaces of two opposing substrates and another electrode group containing second address electrodes on the other facing surface. The two electrode groups are arranged so that the electrodes of one group may intersect those of the other group and discharge areas enclosing a gas are provided at the intersections. The discharge areas are partitioned by partition walls arranged between the two substrates. The electrode pairs for display are covered with a dielectric layer and arranged nearly in parallel to each other. At least one of the first and second address electrodes are also covered with the dielectric layer. Each first address electrode is extended between each electrode of the electrode pairs for display and each partition wall is extended between each second address electrode. When the discharge tube is constituted in the above-mentioned way, the luminous efficiency and luminance of the tube are improved, because the electrode pairs for display and the address electrodes are independent of each other and the electrode pairs for display can be arranged at long intervals.

Description

明 細 書  Specification
表示用放電管とその駆動方法  Display discharge tube and its driving method
〔技術分野〕  〔Technical field〕
本発明は、 表示用放電管に係り、 特にプラズマ放電を用いたアドレス 動作により画素選択を行う表示用放電管とその駆動方法に関する。  The present invention relates to a display discharge tube, and more particularly to a display discharge tube for selecting pixels by an address operation using plasma discharge and a driving method thereof.
〔背景技術〕  (Background technology)
プラズマ放電を用いたァドレス動作により画素選択を行う表示用放電 管、 所謂プラズマディスプレイパネル (以下、 PDP と略す）は、 直流型 (DC 型）、 交流型（AC型）、 あるいはこれらを複合したハイプリッド型とがある。 第 23図〜第 25図を用いて従来技術の AC型 PDPについて説明する。 第 23図は特公平 3 - 76468号公報に開示されている従来技術の AC型 PDPの 概略斜視図、 第 24図は該従来技術の AC型 PDPの概略断面図である。  A display discharge tube that performs pixel selection by an address operation using plasma discharge, a so-called plasma display panel (hereinafter abbreviated as PDP) is a DC type (DC type), an AC type (AC type), or a hybrid of these types. There is a type. A conventional AC PDP will be described with reference to FIGS. 23 to 25. FIG. 23 is a schematic perspective view of a conventional AC PDP disclosed in Japanese Patent Publication No. 3-76468, and FIG. 24 is a schematic sectional view of the conventional AC PDP.
第 23図、 第 24図において、 1は第 1の基板である透明な前面ガラス基 板、 2は第 2の基板である背面ガラス基板、 3は隔壁、 5は表示用電極（メ モリ電極）、 5a は母電極、 5b は透明電極、 11 は第 1 ァドレス電極、 11a は母電極、 11Bは透明電極、 7は第 2アドレス電極、 8aは透明誘電体層、 9は保護膜 (Mg0)、 10は RGB 3原色の蛍光体である。 なお、 第 24図にお いて、 構造の理解を容易にするために、 第 2 の基板は第 1 の基板に対し て 90° 回転して表示してある。  23 and 24, 1 is a transparent front glass substrate as a first substrate, 2 is a rear glass substrate as a second substrate, 3 is a partition, and 5 is a display electrode (memory electrode). , 5a is a mother electrode, 5b is a transparent electrode, 11 is a first address electrode, 11a is a mother electrode, 11B is a transparent electrode, 7 is a second address electrode, 8a is a transparent dielectric layer, 9 is a protective film (Mg0), 10 is a phosphor of RGB three primary colors. In FIG. 24, the second substrate is shown rotated by 90 ° with respect to the first substrate for easy understanding of the structure.
この背面ガラス基板 2 上には複数の互いに並行なストライプ状の第 2 アドレス電極 7 がスクリーン印刷法等の厚膜技術や蒸着、 エッチング等 の薄膜技術によって被着形成されている。 また、 ストライプ状の隔壁 3 が背面ガラス基板 2上の第 2ァドレス電極 7 と平行に該第 2ァドレス電 極 7 を囲むようにスクリーン印刷法、 サンドプラスト法等により形成さ ている。 ストライプ状の隔壁 3の内側には RGB 3原色の蛍光体 10が各色 毎にスクリーン印刷法、 サンドプラスト法等で塗り分けられている。 上記の背面ガラス基板 2 と共同して管体を形成する透明な前面ガラス 基板 1上には、 背面ガラス基板 2に形成された複数の第 2ァドレス電極 7 と直交する如く、 複数の互いに並行な第 1ァドレス電極 11 と表示用電極 5が被着形成されている。 第 1ァドレス電極 11 と表示用電極 5の上には 透明誘電体層 8a が印刷等で形成されており、 その上に保護膜 (MgO膜） 9 が蒸着されている。 また、 前面ガラス基板 1 及び背面ガラス基板 2 等に より構成される管体の内部には、 放電用ガスが封入される。 A plurality of parallel second address electrodes 7 are formed on the rear glass substrate 2 by using a thick film technique such as a screen printing method or a thin film technique such as vapor deposition or etching. Further, a stripe-shaped partition wall 3 is formed by a screen printing method, a sand blast method, or the like so as to surround the second address electrode 7 in parallel with the second address electrode 7 on the rear glass substrate 2. The phosphors 10 of the three primary colors of RGB are separately applied to the inside of the stripe-shaped partition walls 3 by a screen printing method, a sand plast method, or the like for each color. On a transparent front glass substrate 1 forming a tube in cooperation with the above-mentioned rear glass substrate 2, a plurality of parallel electrodes are formed so as to be orthogonal to the plurality of second address electrodes 7 formed on the rear glass substrate 2. The first address electrode 11 and the display electrode 5 are formed by adhesion. A transparent dielectric layer 8a is formed on the first address electrode 11 and the display electrode 5 by printing or the like, and a protective film (MgO film) 9 is deposited thereon. In addition, a discharge gas is sealed in the inside of a tube composed of the front glass substrate 1, the rear glass substrate 2, and the like.
画像表示は、 第 2ァドレス電極 7と第 1ァドレス電極 11 との間でァド レス放電が行われ、 次に第 1ァドレス電極 11 と表示用電極 5の間で表示 放電する。 放電のプラズマが発生する紫外線で蛍光体 10 を励起して可視 光を発光し、 この光を前面ガラス基板 1を通して画像表示する。  In the image display, an address discharge is performed between the second address electrode 7 and the first address electrode 11, and then a display discharge is performed between the first address electrode 11 and the display electrode 5. The phosphor 10 is excited by ultraviolet rays generated by the discharge plasma to emit visible light, and this light is displayed on the image through the front glass substrate 1.
第 23図に示す従来技術による AC型 PDPでは、 隣合う第 1 ァドレス電 極と表示用電極間による放電の有無の制御を、 隣接する表示セルの第 1 アドレス電極と表示用電極との距離の差で行う。 そのために、 電極寸法 の精度を確保しながら PDP の高精細化や高輝度化が困難になる問題点が ある。 また、 一般に表示用電極の間隔を離すことにより高輝度，高効率 化ができるが、 電極の間隔を離すと放電電圧が上昇するために、 従来技 術では駆動回路が高コストになり、 実用化が難しくなる問題もある。  In the AC type PDP according to the prior art shown in FIG. 23, the control of the presence / absence of discharge between the adjacent first address electrode and the display electrode is performed by controlling the distance between the first address electrode and the display electrode of the adjacent display cell. Perform by difference. For this reason, there is a problem that it is difficult to increase the definition and brightness of the PDP while ensuring the accuracy of the electrode dimensions. In general, high brightness and high efficiency can be achieved by increasing the distance between display electrodes. However, increasing the distance between the electrodes increases the discharge voltage. There is also a problem that becomes difficult.
第 25図は特公平 3— 76468号公報に開示されているハイプリッ ド型 PDP の構成を示す断面図である。 第 25図に示すように、 背面ガラス基板 2側 に互いに直交する複数のアドレス電極 22、 23 が設けられ、 前面ガラス基 板 1側に設けられた透明全面電極 17及びこれに対向する複数の貫通孔を 有する有孔金属板 20 からなる半交流型メモリ一部 (半 AC型メモリー部） が設けられている。 また、 複数のアドレス電極 22 の各間隙に ¾·れぞれ絶 縁基板 24が配され、 透明全面電極 17は透明絶縁層 18で覆われている。 有孔金属板 20 と透明絶縁層 18 との間及び有孔金属板 20 と絶縁基板 24 との間には、 それぞれ隔壁 19、 21 が設けられており、 放電用ガスが背面 ガラス基板 2、 前面ガラス基板 1等からなる管体内に封入されている。 上記従来技術によるハイプリッド型 PDPでは、 ァドレス電極 22 23間 の放電で生じた電子を、 有孔金属板 20 に与えた電圧で上記半 AC型メモ リー部側に引き出し、 透明絶縁層 18 で覆われた透明全面電極 17 と有孔 金属板 20との間で、 AC型放電を維持する。 FIG. 25 is a sectional view showing a configuration of a hybrid PDP disclosed in Japanese Patent Publication No. 3-76468. As shown in FIG. 25, a plurality of address electrodes 22 and 23 orthogonal to each other are provided on the rear glass substrate 2 side, and a transparent full-surface electrode 17 provided on the front glass substrate 1 side and a plurality of A semi-AC type memory part (semi-AC type memory part) composed of a perforated metal plate 20 having holes is provided. Further, an insulating substrate 24 is disposed in each gap between the plurality of address electrodes 22, and the transparent entire surface electrode 17 is covered with a transparent insulating layer 18. Partition walls 19 and 21 are provided between the perforated metal plate 20 and the transparent insulating layer 18 and between the perforated metal plate 20 and the insulating substrate 24, respectively. It is enclosed in a tube composed of a glass substrate 2, a front glass substrate 1, and the like. In the above-described conventional hybrid PDP, electrons generated by the discharge between the address electrodes 22 and 23 are drawn out to the semi-AC type memory section side by the voltage applied to the perforated metal plate 20 and covered with the transparent insulating layer 18. AC type discharge is maintained between the transparent entire surface electrode 17 and the perforated metal plate 20.
第 25図に示す従来のハイプリッド型 PDPは、 構造が複雑であるため量 産が困難であり、 ァドレス側及びメモリ一側の放電空間を連結するため の孔の径の最適化が非常に難しい問題点がある。  The conventional hybrid PDP shown in Fig. 25 has a complicated structure, which makes mass production difficult, and it is very difficult to optimize the diameter of the hole for connecting the discharge space on the address side and memory side. There is a point.
本発明の目的は、 上記従来の PDP の諸問題を解消し、 単純な構成で高 輝度、 高精細な画像表示を可能とした表示用放電管とその表示用放電管 の駆動方法とを提供することにある。  An object of the present invention is to provide a display discharge tube capable of solving the above-mentioned problems of the conventional PDP and enabling high-brightness, high-definition image display with a simple configuration, and a method of driving the display discharge tube. It is in.
〔発明の開示〕  [Disclosure of the Invention]
上記目的を達成するための本発明の構成の概要は以下の通りである。 本発明の表示用放電管は、 各画素 （表示セル） に、 誘電体層で覆われた 表示用電極対と、 ァドレス用電極対との 2対の電極対すなわち 4個の電 極を具備し、 少なくとも 1 つのァドレス電極が誘電体層で覆われた 4電 極構造である。 これにより、 前記表示用電極対の各電極の距離を離した り、 あるいは電極面積を増大することが可能になるので、 高効率かつ高 輝度の画像表示が実現できる。  The outline of the configuration of the present invention for achieving the above object is as follows. The display discharge tube of the present invention includes, for each pixel (display cell), two pairs of electrodes, that is, a display electrode pair covered with a dielectric layer and a pad electrode pair, that is, four electrodes. It has a four-electrode structure in which at least one address electrode is covered with a dielectric layer. This makes it possible to increase the distance between the electrodes of the display electrode pair or to increase the electrode area, so that an image display with high efficiency and high luminance can be realized.
また本発明の表示用放電管は、 表示用電極対とアドレス用電極対とを それぞれ独立に具備しているので、 画像表示のための主放電を表示用電 極対それぞれに接続した駆動回路を通して行うことができる。 従って、 表示用電極対の電極間隔が離れて主放電電圧が上昇する場合であっても、 個別の駆動回路にかける負荷を小さくできる。 併せて、 本発明の 4 電極 構造表示セルに特有の駆動方法 (駆動波形）によって、 輝度， コントラス トの高 、画像表示を実現できる。 本発明の構成を列挙すると以下のとおりである。 Further, since the display discharge tube of the present invention includes the display electrode pair and the address electrode pair independently of each other, the main discharge for image display is performed through a drive circuit connected to each of the display electrode pairs. It can be carried out. Therefore, even when the main discharge voltage rises due to the distance between the electrodes of the display electrode pair increasing, the load applied to the individual drive circuits can be reduced. In addition, the driving method (driving waveform) specific to the four-electrode structure display cell of the present invention can realize high brightness, high contrast, and image display. The configuration of the present invention is as follows.
(1) 本発明の表示用放電管は、 対向する第 1の基板 (前面板）と第 2の基 板 (背面板）とを有していて、 第 1 の基板面に互いに略平行な複数の表示 用電極を有し、 該表示用電極は誘電体で被覆されており、 前記第 2 の基 板面には前記表示用電極に交差する方向に延在し、 かつ互いに略平行な 複数の第 2アドレス電極を有しており、 前記第 2アドレス電極に交差し、 かつ互いに略平行に配置された複数の第 1 アドレス電極を前記第 1 の基 板もしくは前記第 2 の基板のいづれかに有していて、 前記第 1 アドレス 電極もしくは第 2 ァドレス電極の少なくとも一方が誘電体層で覆われて おり、 前記第 1の基板と第 2の基板との間に放電ガスが封入されており、 1 つの表示セル内に表示用主放電を行う表示用電極対と、 アドレス放電を 行う第 1 アドレス電極と第 2 アドレス電極とからなるアドレス電極対と の 2組の電極対からなる 4本の電極を具備している。  (1) A display discharge tube according to the present invention includes a first substrate (front plate) and a second substrate (back plate) facing each other, and a plurality of discharge tubes substantially parallel to each other on the first substrate surface. A plurality of display electrodes, the display electrodes being covered with a dielectric, extending on the second substrate surface in a direction intersecting the display electrodes, and being substantially parallel to each other. A second address electrode, and a plurality of first address electrodes intersecting the second address electrode and arranged substantially in parallel with each other, in either the first substrate or the second substrate. At least one of the first address electrode and the second address electrode is covered with a dielectric layer, and a discharge gas is sealed between the first substrate and the second substrate; A display electrode pair for performing a main discharge for display in one display cell, and a first electrode for performing an address discharge. Les electrode and is provided with four electrodes consisting of two pairs of electrodes of the address electrode pairs and consisting of a second address electrode.
(2) 本発明の表示用放電管は、 前記（1)において表示用主放電を行う前 記表示用電極対の電極幅が概略同じである。  (2) In the display discharge tube of the present invention, the display electrode pair for performing the main display discharge in (1) has substantially the same electrode width.
(3) 本発明の表示用放電管は、 前記（1)、 （2)において表示用主放電で無 効となる電力を、 主放電で使用する電極を通して外部の電気回路に回収 できる。  (3) In the display discharge tube of the present invention, the power that becomes invalid in the display main discharge in (1) and (2) can be recovered to an external electric circuit through the electrode used in the main discharge.
(4) 本発明の表示用放電管は、 前記（1)、 （2)において、 前記表示用電極 対の一方の電極と、 前記第 2 ァドレス電極の延在方向に隣接する表示セ ルに配置された表示用電極対の一方の電極に隣接する電極を表示用主放 電時に同電位とする構造である。  (4) The display discharge tube according to (1) or (2), wherein the display discharge tube is disposed in one of the display electrode pairs and in a display cell adjacent to the second address electrode in the extending direction. In this structure, the electrodes adjacent to one of the paired display electrodes are set to the same potential at the time of the main discharge for display.
(5) 本発明の表示用放電管は、 前記 (1)、 （2)において、 前記第 1 の基板 面上に、 誘電体層で覆われた一定の間隔で平行配列した表示用電極対と、 誘電体層で覆われた第 1ァドレス電極とを備えている。  (5) The display discharge tube according to (1) or (2), further comprising: a display electrode pair that is parallelly arranged at a predetermined interval on the first substrate surface and covered with a dielectric layer. And a first address electrode covered with a dielectric layer.
(6) 本発明の表示用放電管は、 前記 (5)において、 前記第 2 の基板上に 第 2 アドレス電極と、 該第 2 アドレス電極を覆う誘電体層とを備えてい る。 (6) The display discharge tube of the present invention according to (5), further comprising: a second address electrode on the second substrate; and a dielectric layer covering the second address electrode. You.
(7) 本発明の表示用放電管は、 前記 (5)において、 前記第 2 の基板上に 第 2 ァドレス電極を具備すると共に、 前記第 2 ァドレス電極が表示放電 領域に露出して配置し、 その上に蛍光体を形成した。  (7) In the display discharge tube according to the present invention, in (5), a second address electrode is provided on the second substrate, and the second address electrode is arranged so as to be exposed to a display discharge region, A phosphor was formed thereon.
(8) 本発明の表示用放電管は、 前記 (6)または（7)において、 前記表示用 電極対の電極の間に前記第 1ァドレス電極が延在している。 (8) In the display discharge tube of the present invention, in (6) or (7), the first address electrode extends between the electrodes of the display electrode pair.
(9) 本発明の表示用放電管は、 前記 (8)において、 前記第 1 アドレス電 極が前記表示用電極対の一方の電極に近接して配置している。  (9) In the display discharge tube according to the present invention, in (8), the first address electrode is arranged close to one of the display electrode pairs.
(10) 本発明の表示用放電管は、 前記 (5)〜（9)において、 隣接する 2つ の表示セルが、 表示用電極対の表示用電極上に形成した隔壁で分離され ている。  (10) In the display discharge tube of the present invention, in the above (5) to (9), two adjacent display cells are separated by a partition wall formed on the display electrode of the display electrode pair.
(11) 本発明の表示用放電管は、 前記 (5)〜（9)において、 隣接する 2 つ の表示セルが、 各表示セルに配置した表示用電極対と表示電極対との間 に配置した隔壁で分離されている。  (11) In the display discharge tube according to the present invention, in (5) to (9), two adjacent display cells are arranged between the display electrode pair arranged in each display cell and the display electrode pair. Are separated by separated partitions.
(12) 本発明の表示用放電管は、 前記（10)、 （11)において、 前記表示用 電極上に形成した隔壁の形状が略格子状である。 (12) In the display discharge tube of the present invention, in (10) and (11), the shape of the partition wall formed on the display electrode is substantially a lattice.
(13) 本発明の表示用放電管は、 前記（1)(2)、 （5)〜（12)において、 前記 第 2 の基板上に前記第 2アドレス電極に沿って延在する概略ストライプ 形状を成す隔壁を備えた。  (13) The display discharge tube according to (1), (2), (5) to (12), which has a general stripe shape extending along the second address electrode on the second substrate. Was provided.
(14) 本発明の表示用放電管は、 前記（13)において、 前記表示用電極上 に形成した略格子状の隔壁を具備すると共に、 前記第 2 の基板に略スト ライプ状の隔壁を具備し、 前記略格子状の隔壁の 2 辺と前記略ストライ プ の隔壁とが重っている。 (14) The display discharge tube of the present invention according to (13), further comprising a substantially grid-shaped partition wall formed on the display electrode, and a substantially strip-shaped partition wall on the second substrate. The two sides of the substantially lattice-shaped partition and the substantially striped partition overlap.
(15) 本発明の表示用放電管は、 前記（10)において、 前記表示用電極上 に形成した隔壁が格子状であって、 前記第 2 の基板上に前記第 2 ァドレ ス電極に沿って延在するストライプ状を成す隔壁を備えており、 前記表 示用電極対の一方の電極が隣接して配置された 2 つの表示セルに共通す る一方の表示用電極であって、 前記共通する一方の表示用電極の幅 W (匪） と、 この共通する一方の表示用電極の端部と、 隣接する他方の表示用電 極の前記一方の表示電極に対向した端部との距離 D(nnn)、 および封入され た放電ガスの 25°Cでの圧力 P(Torr)と、 前記第 1の基板と前記第 2の基 板との間に形成された放電空間の垂直方向距離 L (匪）との間の関係が、 K = ( (D)/(W/2 + D))/(1000 x V~(L)/P) (1)式 (15) In the display discharge tube according to the present invention, in (10), the partition formed on the display electrode has a lattice shape, and the partition wall is formed on the second substrate along the second address electrode. The display has a stripe-shaped partition wall extending, and one electrode of the display electrode pair is common to two adjacent display cells. One of the common display electrodes, the width W (band) of the common one display electrode, the end of the common one display electrode, and the adjacent one of the other display electrodes. Between the first substrate and the second substrate, the distance D (nnn) from the end facing the display electrode, and the pressure P (Torr) of the sealed discharge gas at 25 ° C. The relationship between the vertical distance L (band) of the discharge space formed at the point is K = ((D) / (W / 2 + D)) / (1000 x V ~ (L) / P) (1 )formula
としたときに And when
0. 5≤K≤2 (2)式  0.5 ≤K≤2 (2)
を満足す 。 Satisfy.
(16) 本発明の表示用放電管は、 前記（15)において、 前記表示用電極上 に形成した隔壁の高さ d ( m)と、 前記封入された放電ガスの 25°Cでの圧 力 P(Torr)との関係が (16) In the display discharge tube according to the present invention, in (15), a height d (m) of a partition formed on the display electrode and a pressure of the sealed discharge gas at 25 ° C. Relationship with P (Torr)
4000/P≤d≤40000/P (3)式  4000 / P≤d≤40000 / P (3)
である。 It is.
(17) 本発明の表示用放電管は、 前記（1)、 （2)、 （5)〜（12)において、 前 記第 1 の基板に対向配置された前記第 2 の基板上に格子状の隔壁を備え ている。 (17) In the display discharge tube according to the present invention, in (1), (2), (5) to (12), a grid-like shape is formed on the second substrate opposed to the first substrate. The partition wall is provided.
(18) 本発明の表示用放電管は、 前記（10)、 （11)、 （17)において、 前記 第 1 の基板と前記第 2 の基板との間に形成された表示セルの放電空間の 垂直方向の距離が 60 250 mである。  (18) The display discharge tube according to (10), (11), or (17), wherein a discharge space of a display cell formed between the first substrate and the second substrate is provided. The vertical distance is 60 250 m.
(19) 本発明の表示用放電管は、 前記（10)、 （11)、 （17)において、 前記 隣接する表示セルにまたがる表示用電極の幅 (匪）と、 前記表示用電極の 延在方向に交差する方向の表示セルの配列ピッチ（腿）との比が 0. 05： 1~ 0. 8： 1である。  (19) The display discharge tube according to (10), (11), or (17), wherein the width of the display electrode spanning the adjacent display cell and the extension of the display electrode are provided. The ratio of the display cell array pitch (thigh) in the direction intersecting with the direction is 0.05: 1 to 0.8: 1.
(20) 本発明の表示用放電管は、 前記（19)において、 前記表示用電極が 透明電極と、 該透明電極とは電気抵抗が異なる導体である母電極とから 成る。 (21) 本発明の表示用放電管は、 前記 (20)において、 前記表示用電極の 母電極を、 該表示用電極上に形成された隔壁の表示用電極の延在方向と 平行な部分、 あるいは前記第 2 の基板形成された格子状の隔壁の表示用 電極の延在方向と平行な部分に重ね合わせて配置した。 (20) In the display discharge tube according to the present invention, in (19), the display electrode includes a transparent electrode, and a mother electrode that is a conductor having a different electrical resistance from the transparent electrode. (21) In the display discharge tube according to the present invention, in (20), the mother electrode of the display electrode is formed by partitioning a partition formed on the display electrode in a portion parallel to an extending direction of the display electrode. Alternatively, the lattice-shaped partition formed on the second substrate is overlapped and arranged on a portion parallel to the extending direction of the display electrode.
(22) 本発明の表示用放電管は、 前記（20)または（21 )において、 前記母 電極の電極幅 (匪）と、 前記表示用電極の延在方向と交差する方向の表示 セルの配列ピッチ（mm)との比が 0. 05： 1〜0. 3： 1である。 (22) In the display discharge tube according to the present invention, in (20) or (21), an array of display cells in a direction crossing an electrode width (band) of the mother electrode and an extending direction of the display electrode. The ratio to the pitch (mm) is 0.05: 1 to 0.3: 1.
(23) 本発明の表示用放電管は、 前記（1) (2)、 （5)〜（11)において、 前記 表示用電極の一端を表示用放電管内で共通に接続した。 (23) In the display discharge tube of the present invention, in (1), (2), and (5) to (11), one end of the display electrode is commonly connected in the display discharge tube.
(24) 本発明の表示用放電管は、 前記（1)〜（9)において、 前記第 1 の基 板に形成した前記誘電体層で覆われたァドレス電極の幅 (Ml)と、 前記表 示用電極対の延在方向と交差する方向の表示セルの配列ピッチ（匪）との 比が 0. 03： 1〜0. 4： 1である。 (24) In the display discharge tube according to the present invention, in any of (1) to (9), the width (Ml) of an address electrode covered with the dielectric layer formed on the first substrate; The ratio of the display cell array pitch in the direction intersecting with the extending direction of the display electrode pair is 0.03: 1 to 0.4: 1.
(25) 本発明の表示用放電管は、 前記（24)において、 前記誘電体層で覆 われたァドレス電極が、 透明電極と該透明電極と電気抵抗が異なる導体 である母電極とから成る。  (25) In the display discharge tube of the present invention, in (24), the address electrode covered with the dielectric layer comprises a transparent electrode and a mother electrode which is a conductor having a different electrical resistance from the transparent electrode.
(26) 本発明の表示用放電管は、 前記（25)において、 前記アドレス電極 を構成する母電極の幅 (nun)と、 前記表示用電極対の延在方向と交差する 方向の表示セルの配列ピッチ（匪）との比が 0. 03： 1〜0. 1： 1である。  (26) In the display discharge tube according to the present invention, in (25), a width (nun) of a mother electrode constituting the address electrode and a display cell in a direction intersecting with a direction in which the display electrode pair extends are provided. The ratio with the array pitch (band) is 0.03: 1 to 0.1: 1.
(27) 本発明の表示用放電管は、 対向する第 1 の基板 (前面板）と第 2 の 基板 (背面板）とを有していて、 第 1 の基板面に互いに略平行な複数の表 示用電極を有し、 該表示用電極は誘電体で被覆されており、 前記第 2 の 基板面には前記表示用電極に交差する方向に延在し、 かつ互いに略平行 な複数の第 2 ァドレス電極を有しており、 前記第 2 ァドレス電極に交差 し、 かつ互いに略平行に配置された複数の第 1 アドレス電極を前記第 1 の基板もしくは前記第 2 の基板に有していて、 前記第 1 アドレス電極も しくは第 2 アドレス電極の少なくとも一方が誘電体層で覆われており、 前記第 1の基板と第 2の基板との間に放電ガスが封入されており、 1つの 表示セル内に表示用主放電を行う表示用電極対と、 ァドレス放電を行う 第 1 アドレス電極と第 2 アドレス電極とからなるアドレス電極対との 2 組の電極対からなる 4 本の電極を具備していて、 前記表示用電極対の電 極間に表示のための主放電を行う信号を加えて駆動する。 (27) A display discharge tube according to the present invention includes a first substrate (front plate) and a second substrate (back plate) facing each other, and a plurality of substrates substantially parallel to each other on the first substrate surface. A display electrode, the display electrode being covered with a dielectric, a plurality of first electrodes extending in a direction intersecting the display electrode on the second substrate surface, and being substantially parallel to each other. A plurality of first address electrodes intersecting the second address electrode and arranged substantially in parallel with each other on the first substrate or the second substrate. At least one of the first address electrode or the second address electrode is covered with a dielectric layer, A discharge gas is sealed between the first substrate and the second substrate, and a display electrode pair for performing a main discharge for display in one display cell, a first address electrode for performing an address discharge, and a third electrode. (2) It has four electrodes consisting of two pairs of address electrodes and an address electrode pair consisting of address electrodes, and applies a signal for performing a main discharge for display between the electrodes of the display electrode pair. Drive.
(28) 本発明の表示用放電管の駆動方法は、 前記（27)において、 前記ァ ドレス電極を介してトリガ一放電した後に、 主放電を行う。  (28) In the driving method of the display discharge tube of the present invention, in the above (27), a main discharge is performed after a trigger discharge is performed via the address electrode.
(29) 本発明の表示用放電管は、 前記（28)において、 前記アドレス電極 にトリガー信号を加えて駆動する。  (29) In the display discharge tube of the present invention, in (28), the address electrode is driven by applying a trigger signal.
(30) 本発明の表示用放電管は、 前記 (29)において、 前記アドレス電極 上に壁電荷を蓄積し、 次に前記ァドレス電極に前記壁電荷と同極性のト リガー信号を加えて駆動する。 (30) In the display discharge tube according to the present invention, in (29), a wall charge is accumulated on the address electrode, and a trigger signal having the same polarity as the wall charge is applied to the address electrode and driven. .
(31) 本発明の表示用放電管は、 前記 (29)において、 前記アドレス電極 上に壁電荷を蓄積し、 前記ァドレス電極に前記壁電荷と逆極性のトリガ 一信号を加えて駆動する。  (31) In the display discharge tube of the present invention, in (29), the wall charges are accumulated on the address electrodes, and the address electrodes are driven by applying a trigger signal having a polarity opposite to that of the wall charges.
(32) 本発明の表示用放電管は、 前記 (27)において、 前記アドレス電極 と、 前記表示用電極との間のリセッ ト放電で電極表面に電荷を蓄積して 駆動する。  (32) The display discharge tube of the present invention according to (27), wherein the reset discharge between the address electrode and the display electrode accumulates electric charge on the electrode surface and drives the electrode.
(33) 本発明の表示用放電管は、 前記 (27)において、 前記アドレス電極 と前記表示用電極の電極との間のリセッ ト放電で電極表面の電荷を消去 して駆動する。  (33) In the display discharge tube according to the present invention, in (27), the electric charge on the electrode surface is erased by a reset discharge between the address electrode and the display electrode to drive the display discharge tube.
(34) 本発明の表示用放電管は、 前記 (27)において、 前記表示用電極の 間のリセット放電によつて電極表面に電荷を蓄積して駆動する。  (34) The display discharge tube of the present invention according to (27), wherein the reset discharge between the display electrodes accumulates electric charges on the electrode surface and is driven.
(35) 本発明の表示用放電管は、 前記 (27)において、 前記表示用電極の 間のリセッ 卜放電で電極表面の電荷を消去して駆動する。  (35) In the display discharge tube according to the present invention, in (27), the discharge on the electrode surface is erased by reset discharge between the display electrodes and driven.
(36) 本発明の表示用放電管は、 前記 (32)〜（35)において、 前記リセッ ト放電後に前記ァドレス電極対に電界を印加して空間電荷を前記ァドレ ス電極上に蓄積し、 次いで前記ァドレス電極間でァドレス放電を行って 駆動する。 (36) The display discharge tube according to the above (32) to (35), wherein an electric field is applied to the pair of address electrodes after the reset discharge so that space charges are removed. It accumulates on the electrode and then drives by performing an address discharge between the address electrodes.
(37) 本発明の表示用放電管は、 前記 (32)〜（35)において、 前記リセッ ト放電後に前記表示用電極対に電界を印加して空間電荷を前記表示用電 極上に蓄積し、 次いで前記ァドレス電極の間でァドレス放電を行って駆 動する。  (37) The display discharge tube according to (32) to (35), wherein an electric field is applied to the display electrode pair after the reset discharge to accumulate space charges on the display electrode. Next, an address discharge is performed between the address electrodes to drive the electrode.
(38) 本発明の表示用放電管は、 前記 (27)〜（32)、 （36)において、 前記 ァドレス電極間に電位差があるように壁電荷が蓄積された状態であつて、 ァドレス放電の際に前記ァドレス電極間に印加する信号の大きさが該ァ ドレス放電後にも壁電荷が保持されている大きさの信号で駆動される。 (38) The display discharge tube according to (27) to (32) or (36), wherein the wall charges are accumulated so that there is a potential difference between the address electrodes. In this case, the magnitude of the signal applied between the address electrodes is driven by a signal of a magnitude that retains the wall charges even after the address discharge.
(39) 本発明の表示用放電管は、 前記 (27)〜（32)、 （36)において、 前記 ァドレス電極間に電位差が存在して 、てかつ壁電荷が蓄積された状態で あって、 ァドレス放電の際に前記ァドレス電極間に印加する信号の大き さが該ァドレス放電後に壁電荷を消去する大きさの信号で駆動される。 (40) 本発明の表示用放電管は、 前記 (27)〜（31)、 （33)、 （35)において、 前記ァドレス電極、 前記表示用電極上での壁電荷が実質的に消去された 状態であって、 ァドレス放電の際に前記ァドレス電極間に印加する信号 の大きさが該ァドレス放電後に壁電荷が蓄積される大きさの信号で駆動 される。 (39) The display discharge tube according to (27) to (32) or (36), wherein a potential difference exists between the address electrodes and wall charges are accumulated. The magnitude of the signal applied between the address electrodes at the time of the address discharge is driven by a signal of a magnitude sufficient to erase the wall charges after the address discharge. (40) In the display discharge tube according to the present invention, in (27) to (31), (33), and (35), the wall charges on the address electrode and the display electrode are substantially eliminated. In this state, the magnitude of the signal applied between the address electrodes at the time of the address discharge is driven by a signal whose wall charge is accumulated after the address discharge.
(41) 本発明の表示用放電管は、 前記 (27)、 （33)、 （35)において、 前記 ァドレス電極、 前記表示用電極の電極上で壁電荷が実質的に消去された 状態で、 ァドレス放電の際に前記ァドレス電極間に印加する信号の大き さが該ァドレス放電後に壁電荷が蓄積されない大きさの信号であり、 該 ァドレス放電中あるいはァドレス放電後に表示用電極対間に電界を印加 して表示用電極対の電極間で放電させ、 もしくはァドレス放電をトリガ として表示用電極対の電極間で放電させることにより、 壁電荷を蓄積し て駆動する。 (42) 本発明の表示用放電管は、 前記 (27)〜（31)、 （33)、 （35)において、 前記ァドレス電極、 前記表示用電極の電極上で壁電荷が実質的に消去さ れた状態で、 ァドレス放電の際に前記ァドレス電極間に印加する信号の 大きさが該ァドレス放電後に壁電荷が蓄積されない大きさ信号であり、 ァドレス放電後にァドレス電極と表示用電極の電極または電極対間に電 界を印加してァドレス電極と表示用電極の電極または電極対間で放電さ せ、 あるいはァドレス放電をきつかけとしてァドレス電極と表示用電極 の電極または電極対間で放電させることにより、 壁電荷を蓄積して駆動 する。 (41) The display discharge tube according to (27), (33), or (35), wherein the wall charge is substantially eliminated on the electrode of the address electrode and the display electrode. The magnitude of the signal applied between the address electrodes at the time of the address discharge is a signal of a magnitude such that no wall charges are accumulated after the address discharge, and an electric field is applied between the pair of display electrodes during the address discharge or after the address discharge. Then, discharge is caused between the electrodes of the display electrode pair, or discharge is caused between the electrodes of the display electrode pair using the address discharge as a trigger, so that the wall charges are accumulated and driven. (42) In the display discharge tube according to the present invention, in any one of (27) to (31), (33) and (35), wall charges are substantially eliminated on the electrode of the address electrode and the electrode of the display. In this state, the magnitude of the signal applied between the address electrodes during the address discharge is a magnitude signal at which no wall charge is accumulated after the address discharge, and the electrodes or electrodes of the address electrode and the display electrode after the address discharge. An electric field is applied between the pair to cause discharge between the address electrode and the display electrode or the electrode pair, or discharge between the address electrode and the display electrode or the electrode pair by triggering the address discharge. It drives by accumulating wall charges.
(43) 本発明の表示用放電管は、 前記 (27)〜（31)、 （34)、 （37)において、 前記表示用電極対の電極上に壁電荷が蓄積された状態で、 ァドレス放電 の際に前記ァドレス電極間に印加する信号の大きさが該ァドレス放電後 に壁電荷が蓄積される大きさの信号で駆動する。 (43) The display discharge tube according to (27) to (31), (34), or (37), wherein an address discharge is performed in a state where wall charges are accumulated on the electrodes of the display electrode pair. In this case, the driving is performed with a signal whose magnitude is applied so that wall charges are accumulated after the address discharge.
(44) 本発明の表示用放電管は、 前記（27)(34)、 （37)において、 前記表 示用電極対の電極上に壁電荷が蓄積された状態で、 アドレス放電の際に 前記ァドレス電極間でに印加する信号の大きさが該ァドレス放電後に壁 電荷が消去される信号で駆動する。  (44) The display discharge tube according to (27), (34), or (37), wherein the wall charges are accumulated on the electrodes of the display electrode pair, and The magnitude of the signal applied between the address electrodes is driven by a signal from which the wall charges are erased after the address discharge.
(45) 本発明の表示用放電管は、 前記 (27)〜（40)、 （43)において、 前記 ァドレス放電中あるいはァドレス放電後に、 表示用電極対間に電界を印 加して、 前記表示用電極対の間でサスティン期間の放電を行うことによ り駆動する。  (45) The display discharge tube according to (27) to (40) or (43), wherein an electric field is applied between the pair of display electrodes during or after the address discharge. It is driven by performing a sustain period discharge between the electrode pairs.
(46) 本発明の表示用放電管は、 前記（27)〜（40)、 （43)において、 前記 ァドレス放電後に、 ァドレス電極と表示用電極の電極もしくは表示用電 極対との間に電界を印加して、 サスティン期間の放電をトリガして駆動 する。  (46) The display discharge tube according to (27) to (40) or (43), wherein after the address discharge, an electric field is applied between the address electrode and the display electrode or the display electrode pair. Is applied to trigger the discharge during the sustain period to drive.
(47) 本発明の表示用放電管は、 前記（27)(33)、 （35)において、 前記ァ ドレス電極対間のァドレス放電を卜リガにして、 前記表示用電極対間あ るいは前記ァドレス電極と前記表示用電極の電極もしくは表示用電極対 間で放電して駆動する。 (47) In the display discharge tube according to the present invention, in the above (27), (33) and (35), the discharge between the address electrode pairs may be triggered, and the discharge between the display electrode pairs may be performed. Alternatively, it is driven by discharging between the address electrode and the display electrode or the display electrode pair.
(48) 本発明の表示用放電管は、 前記 (27)〜（44)において、 前記サステ イン期間に信号を印加する電極を同極性にして電界を印加して駆動する。 (49) 本発明の表示用放電管は、 前記（27；)〜（48)において、 前記表示用 電極対間における表示用主放電の最後の信号の大きさが、 電極上に壁電 荷を形成しない大きさの信号で駆動する。  (48) The display discharge tube according to (27) to (44), in which the electrodes to which a signal is applied during the sustain period have the same polarity, and are driven by applying an electric field. (49) In the display discharge tube according to the present invention, in any one of (27;) to (48), the magnitude of the last signal of the main display discharge between the pair of display electrodes is such that a wall charge is placed on the electrode. Driving is performed with a signal of a size that is not formed.
本発明によれば、 放電電極間の距離を離すことができるため、 発光効 率が向上し、 輝度を大幅に増大することができるとともにコントラスト も向上し、 高精細な品質のよい画像表示を得ることができる。 また、 ァ ドレス電極対と独立に表示用電極対を設けたことにより、 主放電の放電 電圧が上昇しても駆動回路の負担を抑えることができ、 かつ無効電力の 回収も容易に行うこと力出来る。  According to the present invention, since the distance between the discharge electrodes can be increased, the luminous efficiency can be improved, the luminance can be greatly increased, the contrast can be improved, and a high-definition, high-quality image display can be obtained. be able to. In addition, by providing the display electrode pairs independently of the address electrode pairs, the load on the drive circuit can be reduced even if the discharge voltage of the main discharge increases, and the reactive power can be easily collected. I can do it.
〔図面の簡単な説明〕  [Brief description of drawings]
第 1 図は本発明実施例 1 による表示用放電管の概略構造を示す分解斜 視図である。  FIG. 1 is an exploded perspective view showing a schematic structure of a display discharge tube according to Embodiment 1 of the present invention.
第 2図は第 1図に示す表示用放電管の断面図である。  FIG. 2 is a sectional view of the display discharge tube shown in FIG.
第 3 図は本発明実施例 1 の変形例による表示用放電管の概略構造を説 明する分解斜視図である。  FIG. 3 is an exploded perspective view illustrating a schematic structure of a display discharge tube according to a modification of the first embodiment of the present invention.
第 4図は第 3図に示す表示用放電管の概略構造を示す断面図である。 第 5図は本発明実施例 1及び、 実施例 1 の変形例による表示用放電管 の製造工程図である。  FIG. 4 is a sectional view showing a schematic structure of the display discharge tube shown in FIG. FIG. 5 is a view showing a manufacturing process of a display discharge tube according to the first embodiment of the present invention and a modification of the first embodiment.
第 6 図は本発明実施例 2 による表示用放電管の概略構造を示す分解斜 視図である。  FIG. 6 is an exploded perspective view showing a schematic structure of a display discharge tube according to Embodiment 2 of the present invention.
第 7図は第 6図に示す表示用放電管の概略構造の断面図である。  FIG. 7 is a sectional view of a schematic structure of the display discharge tube shown in FIG.
第 8 図は本発明実施例 2 の変形例による表示用放電管の概略構造を示 す分解斜視図である。 第 9図は第 8図に示す表示用放電管の概略構造の断面図である。 FIG. 8 is an exploded perspective view showing a schematic structure of a display discharge tube according to a modification of the second embodiment of the present invention. FIG. 9 is a sectional view of a schematic structure of the display discharge tube shown in FIG.
第 10図は本発明実施例 2及び、 実施例 2の変形例による表示用放電管 の製造工程図である。  FIG. 10 is a view showing a manufacturing process of a display discharge tube according to the second embodiment of the present invention and a modification of the second embodiment.
第 11図は本発明実施例 3による表示用放電管の前面ガラス基板の概略 断面図である。  FIG. 11 is a schematic sectional view of a front glass substrate of a display discharge tube according to Embodiment 3 of the present invention.
第 12図は本発明実施例 4による表示用放電管の前面ガラス基板の概略 断面図である。  FIG. 12 is a schematic sectional view of a front glass substrate of a display discharge tube according to Embodiment 4 of the present invention.
第 13 図は本発明実施例 1〜4 の変形例による表示用放電管の概略構造 を示す断面図である。  FIG. 13 is a sectional view showing a schematic structure of a display discharge tube according to a modified example of the first to fourth embodiments of the present invention.
第 14図は本発明実施例 5による表示用放電管の前面ガラス基板の概略 断面図である。  FIG. 14 is a schematic sectional view of a front glass substrate of a display discharge tube according to Embodiment 5 of the present invention.
第 15図は本発明実施例 6による表示用放電管の概略断面図である。 第 16図は本発明実施例 7による表示用放電管駆動波形図である。  FIG. 15 is a schematic sectional view of a display discharge tube according to Embodiment 6 of the present invention. FIG. 16 is a driving waveform diagram of a discharge tube for display according to Embodiment 7 of the present invention.
第 17図は本発明実施例 8による表示用放電管駆動波形図である。  FIG. 17 is a driving waveform diagram of a discharge tube for display according to Embodiment 8 of the present invention.
第 18図は本発明実施例 9による表示用放電管駆動波形図である。  FIG. 18 is a driving waveform diagram of a discharge tube for display according to Embodiment 9 of the present invention.
第 19図は本発明実施例 9による表示用放電管駆動波形図である。  FIG. 19 is a driving waveform diagram of a discharge tube for display according to Embodiment 9 of the present invention.
第 20図は本発明実施例 10による表示用放電管駆動波形図である。 第 21図は本発明実施例 11による表示用放電管駆動波形図である。 第 22図は本発明実施例 12による表示用放電管駆動波形図である。 第 23図は従来技術による AC型 PDPの概略斜視図である。  FIG. 20 is a driving waveform diagram of a discharge tube for display according to Embodiment 10 of the present invention. FIG. 21 is a driving waveform diagram of a discharge tube for display according to Embodiment 11 of the present invention. FIG. 22 is a driving waveform diagram of a discharge tube for display according to Embodiment 12 of the present invention. FIG. 23 is a schematic perspective view of a conventional AC PDP.
第 24図は従来技術による AC型 PDPの概略断面図である。  FIG. 24 is a schematic sectional view of an AC type PDP according to the prior art.
第 25図は従来技術によるハイプリット型 PDPの断面図である。  FIG. 25 is a cross-sectional view of a conventional hybrid PDP.
〔発明を実施するための最良の形態〕  [Best mode for carrying out the invention]
以下、 本発明の実施の形態を図面を用いて詳細に説明する。  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
(実施例 1 ) (Example 1)
第 1 図は本実施例による表示用放電管の概略構造を説明する分解斜視 図、 第 2 図は本実施例による表示用放電管の概略構造を説明する断面図 である。 なお、 第 2図においては、 構造の理解を容易にするために、 第 2 の基板を第 1の基板に対して 90。 回転して表示してある。 FIG. 1 is an exploded perspective view illustrating a schematic structure of a display discharge tube according to the present embodiment, and FIG. 2 is a cross-sectional view illustrating a schematic structure of the display discharge tube according to the present embodiment. It is. In FIG. 2, the second substrate is 90 relative to the first substrate to facilitate understanding of the structure. It is rotated and displayed.
第 1図、 第 2図において、 1は第 1の基板である透明な前面ガラス基板、 2は第 2の基板である背面ガラス基板、 3と 4は隔壁、 5は表示用電極、 5a は表示用電極の母電極、 5b は表示用電極の透明電極部分、 5M1 と 5M2 は表示用電極対、 6は第 1 ァドレス電極、 6aは第 1 ァドレス電極の母電 極、 6bは第 1 ァドレス電極の透明電極部分、 7は第 2 ァドレス電極、 8a は透明誘電体層、 9は保護膜 (Mg0)、 10は RGB 3原色の蛍光体である。 前記前面ガラス基板 1 及び前記背面ガラス基板 2 の周辺はフリットガ ラスによって封着され、 封着で構成される管体内に下記の構造体が収納 されると共に、 管体内を真空に排気した後、 ヘリウム (He)、 ネオン (Ne)、 アルゴン (Ar)等とキセノン（Xe)との混合気体等の放電用ガスが封入され ている。  1 and 2, 1 is a transparent front glass substrate as a first substrate, 2 is a rear glass substrate as a second substrate, 3 and 4 are partition walls, 5 is a display electrode, and 5a is a display. 5b is the transparent electrode part of the display electrode, 5M1 and 5M2 are the display electrode pair, 6 is the first address electrode, 6a is the mother electrode of the first address electrode, and 6b is the first address electrode. A transparent electrode portion, 7 is a second address electrode, 8a is a transparent dielectric layer, 9 is a protective film (Mg0), and 10 is a phosphor of three primary colors of RGB. The periphery of the front glass substrate 1 and the rear glass substrate 2 is sealed with a frit glass, and the following structure is housed in a sealed tube, and the tube is evacuated to helium. A discharge gas such as a mixed gas of (He), neon (Ne), argon (Ar) and xenon (Xe) is sealed.
管体内に収納される構造体は以下のように形成する。 第 2 アドレス電 極 7 を、 薄膜プロセスや印刷等の厚膜プロセス等で背面ガラス基板 2 の 上に形成する。 次に、 格子状の隔壁 3 をスクリーン印刷やサンドブラス ト法等で形成する。 この格子状の隔壁 3 は、 一方向の隔壁が前記第 2 ァ ドレス電極 7 と平行であって第 2ァドレス電極 7の間隙に位置し、 これ と交差する別の方向の隔壁が前面ガラス基板 1 上の表示用電極対 5M1、 5M2 のそれぞれ略中央に配置するように形成する。 次に、 RGB3 原色の各 蛍光体 10を、 印刷等の方法で第 2ァドレス電極 7上や格子状の隔壁 3の 内壁面に形成する。  The structure housed in the tube is formed as follows. The second address electrode 7 is formed on the rear glass substrate 2 by a thin film process or a thick film process such as printing. Next, grid-like partition walls 3 are formed by screen printing, sandblasting, or the like. The lattice-shaped barrier ribs 3 are arranged such that the barrier ribs in one direction are parallel to the second address electrode 7 and are located in the gap between the second address electrodes 7, and the barrier ribs in another direction intersecting with the barrier ribs 3 in the front glass substrate 1. The upper display electrode pairs 5M1 and 5M2 are formed so as to be disposed substantially at the centers thereof. Next, the respective phosphors 10 of the RGB primary colors are formed on the second address electrode 7 or on the inner wall surface of the grid-like partition 3 by printing or the like.
本実施例の変形例を第 3 図を用いて説明する。 第 3 図は本発明による 表示用放電管の実施例 1 の変形例の概略構造を説明する分解斜視図であ る。 第 4 図は第 3 図に示す表示用放電管の概略構造を説明する断面図で あり、 構造の理解を容易にするために、 第 2 の基板を第 1 の基板に対し て 90° 回転して表示してある。 第 3図、 第 4図に示すように、 第 2アド レス電極 7の上に白色の誘電体層 8bを印刷等で形成後、 格子状の隔壁 3、 蛍光体 10を順次形成しても良い。 その他の構成は第 1図、 第 2図に示す 実施例 1と同様である。 A modification of this embodiment will be described with reference to FIG. FIG. 3 is an exploded perspective view illustrating a schematic structure of a modification of the first embodiment of the display discharge tube according to the present invention. FIG. 4 is a cross-sectional view for explaining the schematic structure of the display discharge tube shown in FIG. 3, and in order to facilitate understanding of the structure, the second substrate is rotated by 90 ° with respect to the first substrate. Is displayed. As shown in Fig. 3 and Fig. 4, After the white dielectric layer 8b is formed on the electrode 7 by printing or the like, the grid-like partition walls 3 and the phosphors 10 may be sequentially formed. Other configurations are the same as those of the first embodiment shown in FIGS.
一方、 第 2図、 第 4図において、 前面ガラス基板 1 には電極対 5M1、 5M2から構成される表示用電極 5が薄膜プロセスや印刷等の厚膜プロセス により形成されている。 この表示用電極 5の電極対 5M1、 5M2の間には第 1ァドレス電極 6が薄膜プロセスや印刷等の厚膜プロセスにて形成されて いる。  On the other hand, in FIGS. 2 and 4, on the front glass substrate 1, display electrodes 5 composed of electrode pairs 5M1 and 5M2 are formed by a thin film process or a thick film process such as printing. A first address electrode 6 is formed between the electrode pair 5M1 and 5M2 of the display electrode 5 by a thin film process or a thick film process such as printing.
表示用電極 5の電極対 5M1、 5M2及び第 1ァドレス電極 6の上には、 透 明誘電体層 8a、 格子状の隔壁 4及び保護膜 9が形成されている。 透明誘 電体層 8a は透明なガラス等からなる絶縁体を印刷等で形成し、 格子状の 隔壁 4は黒色のガラス等からなる絶縁体を印刷等で形成したものである。 また、 保護膜 9は 次電子放射率の高い MgO等の酸化物薄膜であり、 蒸 着等で形成されるものである。  On the electrode pair 5M1, 5M2 of the display electrode 5 and the first address electrode 6, a transparent dielectric layer 8a, a grid-like partition 4 and a protective film 9 are formed. The transparent dielectric layer 8a is formed by printing an insulator made of transparent glass or the like, and the grid-like partition 4 is formed by printing an insulator made of black glass or the like. The protective film 9 is an oxide thin film of MgO or the like having a high secondary electron emissivity, and is formed by evaporation or the like.
前面ガラス基板 1側の格子状の隔壁 4 と背面ガラス基板 2側の格子状 の隔壁 3 とで区画される放電領域で形成される 1つの表示セル (以下、 単 にセルと略す）中には表示用電極 5の 2本の電極対 5M1、 5M2 と第 1ァド レス電極 6、 および第 2ァドレス電極 7とが配置されている。  One display cell (hereinafter simply abbreviated as a cell) formed by a discharge area defined by the lattice-shaped barrier ribs 4 on the front glass substrate 1 side and the lattice-shaped barrier ribs 3 on the rear glass substrate 2 side is included. The two electrode pairs 5M1, 5M2 of the display electrode 5, the first address electrode 6, and the second address electrode 7 are arranged.
ァドレス用電極と表示用電極を分離することにより、 表示用電極は隣 接するセルの放電領域で電極対を構成する電極 5M1 と電極 5M2 とをそれ ぞれ共用できる。 例えば、 5M1及び 5M2のそれぞれ略中央の上に格子状の 隔壁 4 をその 2 辺が重なるように形成することにより放電空間（放電領 域)を分離でき、 表示用電極を隣接するセルで共通に使用してもクロスト ―クがない鮮明な画像を再現できる。  By separating the electrode for display and the electrode for display, the electrode for display can share the electrode 5M1 and the electrode 5M2 forming the electrode pair in the discharge region of the adjacent cell. For example, a discharge space (discharge area) can be separated by forming a grid-shaped partition wall 4 on the approximate center of each of 5M1 and 5M2 so that their two sides overlap, and the display electrode is shared by adjacent cells. Even when used, a clear image without crosstalk can be reproduced.
以下、 第 3図、 第 4図で示した実施例 1の変形例の製造方法を第 5図 に沿って説明する。 前面ガラス基板 1および背面ガラス基板 2は板厚 2. 0匪のソ一ダガラ スを使用した。 また、 表示セルピッチは横 0. 33mm、 縦 1, 0mmである。 な お、 ガラス基板の板厚は、 基本的に真空強度があって、 取り扱いに問題 がなければ特に制限がない。 また、 ガラスの材質としては、 高歪点ガラ スを用いることができればソーダガラスより好ましい。 Hereinafter, a method for manufacturing a modification of the first embodiment shown in FIGS. 3 and 4 will be described with reference to FIG. Front glass substrate 1 and rear glass substrate 2 were made of soda glass with a thickness of 2.0. The display cell pitch is 0.33 mm in width and 1,0 mm in height. The thickness of the glass substrate is basically vacuum strength and is not particularly limited as long as there is no problem in handling. Further, as the material of the glass, it is preferable to use soda glass as long as a glass having a high strain point can be used.
先ず、 前面ガラス基板 1上に表示用電極 5の電極対 5MK 5M2および第 1 ァドレス電極 6 として透明電極 5bおよび 6bを、 それぞれ幅 0. 60匪、 0. 15匪 に例えば IT0膜でパターン形成する。 次に薄膜プロセスで、 前記 透明電極 5b、 6b上の例えば中央部に、 それぞれ幅 0. 06mmの Cr— Cu - Cr 多層膜を母電極 5a、 6a として形成する。 表示用電極 5に透明電極 5b と 母電極 5a とを使用することで、 光の透過率の低下と電気抵抗の上昇とを 抑えて電極面積を大きくすることができる。  First, transparent electrodes 5b and 6b as electrode pairs 5MK 5M2 and first address electrodes 6 of the display electrode 5 are formed on the front glass substrate 1 with a width of 0.60 band and 0.15 band, for example, using an IT0 film. . Next, in a thin film process, Cr—Cu—Cr multilayer films each having a width of 0.06 mm are formed as mother electrodes 5a and 6a, for example, at the center on the transparent electrodes 5b and 6b. By using the transparent electrode 5b and the mother electrode 5a as the display electrode 5, it is possible to increase the electrode area while suppressing a decrease in light transmittance and an increase in electric resistance.
表示用電極 5の電極対 5M1、 5M2の電極幅は放電セル (放電領域）ピッチ が 1. Ommの時、 概略 0. 05〜0. 8mmであり、 電極対 5MK 5M2を構成する透 明電極の幅は 0. 1〜0. 8匪である。 表示用電極の電極対 5M1、 5M2 の幅が 0. 8匪以上であると、 同一基板上に形成する第 1アドレス電極 6の電極幅 を十分確保できず、 アドレス放電の時間がかかり、 現実的ではない。 また、 電極対 5M1、 5M2を構成する透明電極 5bの電極幅が 0. 1匪以下 では透明電極の電気抵抗が高くなり、 母電極 5a を太く して表示電極対 5MU 5M2 の電気抵抗を下げなくてはならないのため、 表示画像の精細度 を高くできない。  The electrode width of the electrode pair 5M1 and 5M2 of the display electrode 5 is approximately 0.05 to 0.8 mm when the discharge cell (discharge area) pitch is 1.0 mm, and the electrode width of the transparent electrode constituting the electrode pair 5MK 5M2 The width ranges from 0.1 to 0.8. If the width of the electrode pair 5M1 and 5M2 of the display electrode is not less than 0.8, the electrode width of the first address electrode 6 formed on the same substrate cannot be sufficiently secured, and it takes time for address discharge, which is practical. is not. Also, if the electrode width of the transparent electrode 5b constituting the electrode pair 5M1 and 5M2 is less than 0.1, the electric resistance of the transparent electrode increases, and the mother electrode 5a is thickened so that the electric resistance of the display electrode pair 5MU5M2 does not decrease. Must not increase the definition of the displayed image.
母電極 5aの幅は概略 0. 05〜0. 3mmである。 母電極 5aの幅が 0. 3mm以 上になると放電セルの光透過率が低くなり、 輝度が低下する。 また、 母 電極 5aの幅が 0. 05匪以下では表示用電極 5(透明電極）の電気抵抗が低下 せず、 駆動が難しい。 なお、 第 1 ァドレス電極 6 にも表示用電極 5の電 極対 5M1、 5M2 と同様に透明電極と母電極とを使用すると、 光透過率の低 下と電気抵抗の上昇を抑えて電極面積を大きくすることができる。 JP9 /032 8 The width of the mother electrode 5a is approximately 0.05 to 0.3 mm. When the width of the mother electrode 5a is 0.3 mm or more, the light transmittance of the discharge cell decreases and the luminance decreases. If the width of the mother electrode 5a is less than 0.05, the electric resistance of the display electrode 5 (transparent electrode) does not decrease, and it is difficult to drive. When a transparent electrode and a mother electrode are used for the first address electrode 6 as well as the electrode pairs 5M1 and 5M2 of the display electrode 5, the decrease in light transmittance and the increase in electric resistance are suppressed, and the electrode area is reduced. Can be bigger. JP9 / 032 8
1 6 -  1 6-
第 1 ァドレス電極 6の電極幅は放電セルピッチが 1. 0mmの場合、 概略 0. 03〜0. 4mmである。 第 1ァドレス電極 6の電極幅が 0. 03匪以下では電 極面積が少なくなるため、 ァドレス放電のための電圧が高くなつたり、 確実な放電を生じるために長時間を要するので好ましくない。 第 1 アド レス電極 6の電極幅が 0. 4mm以上になると、 表示用電極 5の電極幅が狭 くなり、 高輝度化し難いので好ましくない。 また、 母電極 5a の電極幅は 概略 0. 03〜0. lmmである。 母電極 5aの電極幅が 0. 1匪以上になると放電 セルの透過率が低くなり、 輝度が低下するので好ましくない。 また、 母 電極 5aの幅が 0. 03龍以下では第 1ァドレス電極の電気抵抗が低下せず、 駆動が難しくなる。 When the discharge cell pitch is 1.0 mm, the electrode width of the first address electrode 6 is approximately 0.03 to 0.4 mm. If the electrode width of the first address electrode 6 is not more than 0.03, the electrode area is small, so that the voltage for the address discharge becomes high and it takes a long time to generate a reliable discharge, which is not preferable. If the electrode width of the first address electrode 6 is 0.4 mm or more, the electrode width of the display electrode 5 becomes small, and it is difficult to increase the brightness, which is not preferable. The electrode width of the mother electrode 5a is approximately 0.03 to 0.1 mm. If the electrode width of the mother electrode 5a is more than 0.1, the transmittance of the discharge cells is reduced, and the luminance is undesirably reduced. When the width of the mother electrode 5a is less than 0.03 dragon, the electric resistance of the first address electrode does not decrease and the driving becomes difficult.
本実施例及び変形例では表示用電極 5の電極対 5M1、 5M2及び第 1ァド レス電極 6 に透明電極を使用した例を説明したが、 表示用電極 5 の電極 対 5M1、 5M2及び第 1了ドレス電極にそれぞれ透明電極を使用しなくても 良い。 例えば、 表示用電極 5の電極対 5M1、 5H2に透明電極を使用しない で、 母電極 5a のみで構成するパターンでは、 電極幅を 0. 2〜0. 6匪 にす ると、 電極間隔が広くなり、 放電維持電圧は高くなるが、 発光効率を高 くできる。 また、 母電極 5a、 6aの材質は電気抵抗が小さければよく、 Ag、 Ni、 Al、 Au等の金属や Cr- Au - Cr等の多層膜等であっても問題ない。  In the present embodiment and the modified example, an example is described in which transparent electrodes are used for the electrode pairs 5M1 and 5M2 of the display electrode 5 and the first address electrode 6, but the electrode pairs 5M1, 5M2 and the first It is not necessary to use a transparent electrode for each electrode. For example, in a pattern consisting of only the mother electrode 5a without using a transparent electrode for the electrode pair 5M1 and 5H2 of the display electrode 5, if the electrode width is set to 0.2 to 0.6, the electrode interval becomes wide. Although the sustaining voltage increases, the luminous efficiency can be increased. The material of the mother electrodes 5a and 6a only needs to have a small electric resistance, and there is no problem even if the material is a metal such as Ag, Ni, Al, or Au, or a multilayer film such as Cr-Au-Cr.
上記では、 透明電極に IT0膜を用いた例を説明したが、 光透過率を下 げずに十分な電極面積を確保できれば問題ないので、 ネサ膜等を用いる ことも可能である。  In the above, an example in which an IT0 film is used for the transparent electrode has been described. However, if a sufficient electrode area can be secured without lowering the light transmittance, there is no problem, and a Nesa film or the like can be used.
上記の電極を形成した後、 この上を覆つて透明なガラス等からなる透 明誘電体層 8a を全面に形成し、 さらに表示用電極 5 を構成する電極対 5MK 5M2の透明電極 5b上に形成した母電極 5aの略上に、 4辺のうちの 2 辺が重なるように格子状の隔壁 4を 0. 01mmの高さに形成する。 この格子 状の隔壁 4は黒色ガラス等からなる。 格子状の隔壁 4を、 例えば 1 回あ るいは複数回の印刷で積層する場合は少なくとも第 1 層を黒色とするこ とでコントラストが向上し好適である。 After the above electrodes are formed, a transparent dielectric layer 8a made of transparent glass or the like is formed on the entire surface so as to cover the electrodes, and further formed on the transparent electrode 5b of the electrode pair 5MK5M2 constituting the display electrode 5. A grid-shaped partition wall 4 is formed at a height of 0.01 mm so that two sides of the four sides overlap substantially on the mother electrode 5a thus formed. This lattice-shaped partition 4 is made of black glass or the like. When the grid-like partition walls 4 are laminated, for example, by one or more printings, at least the first layer should be black. Is preferable because the contrast is improved.
また、 格子状の隔壁 4の形成位置は表示用電極の透明電極 5bの上に形 成されれば、 画像表示機能上の問題はないが、 表示用電極 5 の延在方向 と平行な格子状の隔壁 4の部分を、 母電極 5aの上に重なるように形成す ると透過率を高くでき、 表示画像が明るくなる。  In addition, if the formation position of the grid-shaped partition 4 is formed on the transparent electrode 5b of the display electrode, there is no problem in the image display function, but the grid-shaped partition 4 is parallel to the extending direction of the display electrode 5. If the partition wall 4 is formed so as to overlap the mother electrode 5a, the transmittance can be increased, and the display image becomes bright.
格子状の隔壁 4を形成後、 保護膜 9として MgO膜を 500〜800nmの厚さ に例えば電子ビーム蒸着 (EB蒸着)等の公知の方法にて形成する。  After forming the grid-like partition walls 4, an MgO film is formed as a protective film 9 to a thickness of 500 to 800 nm by a known method such as electron beam evaporation (EB evaporation).
一方、 背面ガラス基板 2の上に、 第 2了ドレス電極 7が電極幅 0. 10mm の Ag、 Ni、 Al、 Au等の金属や Cr_Cu— Cr、 Cr-Au-Cr等の多層膜が印 刷法ゃフォトプロセスで形成される。 この第 2 アドレス電極 7 の上に白 色の誘電体層 8bを 0. 015mmの厚さで白色ガラス等の絶縁材を印刷等によ り形成する。 なお、 第 2 アドレス電極 7 の電極幅はセルのピッチが 0. 33mraの場合、 概略 0. 05〜0. 2腿である。 電極幅が 0. 05mm以下では放電 開始電圧が高くなつたり、 放電に時間を要するために、 確実なアドレス 放電カ難しくなる。 白色誘電体 8b は、 特に形成してもしなくても基本的 な機能において大きな差はない。 しかし、 白色誘電体 8bを形成すること によって蛍光体 10 の反射光の利用率の向上がなされたり、 格子状の隔壁 3をサンドプラスト法で形成する際の第 2アドレス電極 7の保護膜の役割 をする利点がある。  On the other hand, on the rear glass substrate 2, a second electrode 7 is printed with a 0.10 mm-wide metal such as Ag, Ni, Al, Au or a multilayer film of Cr_Cu—Cr, Cr-Au-Cr or the like. Formed by a photo process. On the second address electrode 7, a white dielectric layer 8b having a thickness of 0.015 mm is formed of an insulating material such as white glass by printing or the like. In addition, the electrode width of the second address electrode 7 is approximately 0.05 to 0.2 thigh when the cell pitch is 0.33 mra. If the electrode width is less than 0.05 mm, the discharge starting voltage will be high or the discharge will take time, making it difficult to ensure address discharge. The white dielectric 8b has no significant difference in basic functions whether or not it is formed. However, the utilization of the reflected light of the phosphor 10 is improved by forming the white dielectric 8b, and the role of the protective film of the second address electrode 7 when the grid-like partition 3 is formed by the sand-plast method. There are advantages to
次に、 格子状の隔壁 3の一方向の壁が前記第 2ァドレス電極 7 と平行 であって第 2ァドレス電極 7の間隙に位置し、 これと隔壁 3の他の方向 の壁が前面ガラス基板 1上の表示用電極対 5M1、 5M2のそれぞれ略中央に 位置するように、 印刷やサンドプラスト法等で格子状の隔壁 3 を形成す る。  Next, the one-way wall of the grid-like partition 3 is parallel to the second address electrode 7 and is located in the gap between the second address electrodes 7, and this and the wall in the other direction of the partition 3 are the front glass substrate. A grid-like partition wall 3 is formed by printing, sand blasting, or the like so as to be located substantially at the center of each of the display electrode pairs 5M1 and 5M2 on the upper part 1.
その後、 第 2 了ドレス電極 7上や格子状の隔壁 3の内壁面に、 例えば 第 1了ドレス電極 7の延在方向に同色となるように RGB各色の蛍光体 10 を印刷等により形成する。 格子状の隔壁 3の幅は 0. 06匪、 高さは 0. 15mm である。 この格子状の隔壁 3 の幅は概略 0. 02 0. lmm、 高さは 0. 05 0. 25匪であり、 印刷あるいはサンドプラスト等にて形成される。 Thereafter, phosphors 10 of RGB colors are formed by printing or the like on the second electrode 7 and on the inner wall surface of the grid-like partition 3 so as to have the same color in the extending direction of the first electrode 7, for example. Grid-shaped bulkhead 3 has a width of 0.06 and a height of 0.15 mm It is. The width of the lattice-shaped partition wall 3 is approximately 0.020. Lmm, and the height is 0.050. 25, which is formed by printing or sand plasting.
格子状の隔壁 3 の幅が 0. 1mm以上であると開口率が低くなり、 表示画 像の輝度を高くすることが難しくなる。 隔壁 3 の幅が狭ければ狭いほど 開口率が良くなるが、 幅が 0. 02mni以下では、 充分な高さの隔壁を形成で きない。 格子状の隔壁 3の高さが 0. 05匪以下であると十分な量の蛍光体 を塗布することができず、 また、 格子状の隔壁 3の高さが 0. 25mm以上で あると隔壁の形成が困難になる。  If the width of the grid-like partition walls 3 is 0.1 mm or more, the aperture ratio becomes low, and it becomes difficult to increase the brightness of the display image. The smaller the width of the partition 3 is, the better the aperture ratio is. However, if the width is 0.02 mni or less, a partition having a sufficient height cannot be formed. If the height of the grid-shaped partition walls 3 is less than 0.05, it is not possible to apply a sufficient amount of phosphor, and if the height of the grid-shaped partition walls 3 is 0.25 mm or more, the partition walls will not be coated. Formation becomes difficult.
背面ガラス基板 2への蛍光体 10の形成は、 ペースト状の蛍光体を印刷 等で、 RGB各色に対応して塗り分ける。  The phosphor 10 is formed on the rear glass substrate 2 by applying a paste-like phosphor by printing or the like to correspond to each of the RGB colors.
このようにして作製した前面ガラス基板 1 と背面ガラス基板 、 背 面ガラス基板 2上に形成した格子状の隔壁 3 と前面ガラス基板 1上に形 成した格子状の隔壁 4 とが重なるように、 かつ排気管（図示せず)が固定 されるようにフリツ トガラスにて封着、 排気する。 次にガスを封入して チップオフする。 封入ガスは He— Xe Ne -Xe等の放電によってイオン化 可能なガスであり、 25°Cで概略 400 Torrの圧力で封入する。  The lattice-shaped partitions 3 formed on the front glass substrate 1 and the rear glass substrate, the rear glass substrate 2 thus formed, and the lattice-shaped partitions 4 formed on the front glass substrate 1 are overlapped with each other. Seal and exhaust with frit glass so that the exhaust pipe (not shown) is fixed. Next, gas is sealed and the chip is turned off. The filling gas is a gas that can be ionized by electric discharge such as He-Xe Ne-Xe, and is filled at 25 ° C with a pressure of approximately 400 Torr.
なお本実施例では、 前面ガラス基板 1 上に格子状の隔壁 4 を、 背面ガ ラス基板 2上の格子状の隔壁 3 と高さおよび色を変えてほぼ同一の格子 状に形成した場合を説明したが、 前面ガラス基板 1 上の格子状の隔壁 4 は形成してもしなくても良い。 格子状の隔壁 4 を形成しない場合、 格子 状の隔壁 3のうち表示用電極 5の延在方向と平行な部分が、 表示用電極 5 の母電極 5a と重なるように配置すると、 透過率の低下を抑えることがで き都合が良い。 なおこのとき背面ガラス基板 2 上の格子状の隔壁 3 を例 えば印刷で積層して形成する場合等、 少なくとも最上層は黒色とすると コントラスト向上に好適である。  In the present embodiment, a case is described in which the grid-like partition walls 4 are formed on the front glass substrate 1 in substantially the same grid shape as the grid-like partition walls 3 on the rear glass substrate 2 by changing the height and color. However, the grid-like partition walls 4 on the front glass substrate 1 may or may not be formed. If the grid-shaped partition walls 4 are not formed, the transmittance is reduced if the portions of the grid-shaped partition walls 3 that are parallel to the extending direction of the display electrode 5 overlap the mother electrodes 5a of the display electrodes 5. This is convenient. At this time, when the lattice-shaped barrier ribs 3 on the rear glass substrate 2 are formed by lamination by printing, for example, at least the uppermost layer is preferably black to improve contrast.
また、 前面ガラス基板 1 上の隔壁 4 の高さは、 封入する放電用ガスの 種類や圧力にも依存するが放電時に形成される負グロ一の厚さ程度の高 さがあれば第 2 アドレス電極 7 に平行な方向、 あるいは垂直な方向のス トライプ状の隔壁でも良い。 The height of the partition walls 4 on the front glass substrate 1 depends on the type and pressure of the discharge gas to be sealed, but is as high as the thickness of the negative glow formed during discharge. If there is, a stripe-shaped partition wall in a direction parallel to or perpendicular to the second address electrode 7 may be used.
本発明による表示用放電管では、 表示用電極 5を構成する電極対 5M1、 In the display discharge tube according to the present invention, the electrode pair 5M1, which constitutes the display electrode 5,
5M2のそれぞれを放電管外で束ねても、 または放電管内 (パネル内）で束ね ても基本的な機能には大差がない。 電気的容量により表示用電極 5 の電 極対の一方例えば 5M1 のみを複数個に束ねても、 あるいは電極 5M1 と電 極 5M2それぞれを束ねても基本的な機能には大差がな 、。 There is no significant difference in the basic functions when the 5M2s are bundled outside the discharge tube or inside the discharge tube (in the panel). Even if only one of the electrode pairs of the display electrode 5, for example, only 5M1 is bundled into a plurality, or the electrode 5M1 and the electrode 5M2 are bundled depending on the electric capacity, there is no significant difference in the basic function.
また、 本発明による表示用放電管では、 表示のための主放電を行う表 示用電極対と主にァドレス放電を行うァドレス電極対を分離したことに より、 主放電の無効電力の回収を容易に行うことができる。 すなわち主 放電を行う表示用電極対 5M1、 5M2 をそれぞれ共通に接続して、 この共通 接続部分に、 前記無効電力の回収回路を接続できる。  Further, in the display discharge tube according to the present invention, the display electrode pair for performing main discharge for display and the address electrode pair for mainly performing address discharge are separated, so that the reactive power of the main discharge can be easily collected. Can be done. That is, the display electrode pairs 5M1 and 5M2 that perform the main discharge are commonly connected, and the reactive power recovery circuit can be connected to the common connection portion.
さらに、 表示のための主放電には、 表示用電極対 5M1、 5M2 のそれぞれ に各セル共通の駆動回路を使用することが可能となり、 高輝度 ·高効率 を得るために電極の間隔を離したことによる主放電の放電電圧の上昇が 駆動回路に与える影響が少ない。  Furthermore, for the main discharge for display, a drive circuit common to each cell can be used for each of the display electrode pairs 5M1 and 5M2, and the electrodes are separated to obtain high brightness and high efficiency. As a result, the rise in the discharge voltage of the main discharge has little effect on the drive circuit.
以上説明したように本実施例によれば、 表示用電極対 5M1、 5M2 をそれ ぞれ隣接するセルで共用することにより、 表示用電極対間の距離を十分 離した構造とすることができる。 そして格子状の隔壁 4、 3 を表示用電極 対 5M1、 5M2 の上に配置することにより、 表示用電極対 5M1、 5M2 をそれ ぞれ隣接するセルで共用しても、 クロストークを生じることなく、 高い 効率で高 、輝度の発光を実現できる。  As described above, according to the present embodiment, by sharing the display electrode pairs 5M1 and 5M2 with adjacent cells, a structure in which the distance between the display electrode pairs is sufficiently large can be obtained. By arranging the grid-like partition walls 4 and 3 on the display electrode pairs 5M1 and 5M2, crosstalk does not occur even if the display electrode pairs 5M1 and 5M2 are shared by adjacent cells. High efficiency and high luminance can be achieved.
(実施例 2)  (Example 2)
第 6 図は本実施例による表示用放電管の概略構造を説明する分解斜視 図、 第 7 図は第 6 図に示す表示用放電管の概略構造を説明する断面図で ある。 なお、 第 7 図においては、 構造の理解を容易にするために、 第 2 の基板を第 1 の基板に対して 90° 回転して表示してある。 この表示用放 P T/JP98/03248 FIG. 6 is an exploded perspective view illustrating a schematic structure of a display discharge tube according to the present embodiment, and FIG. 7 is a cross-sectional view illustrating a schematic structure of the display discharge tube shown in FIG. In FIG. 7, the second substrate is shown rotated by 90 ° with respect to the first substrate for easy understanding of the structure. This display release PT / JP98 / 03248
2 0  2 0
電管は、 第 1 の基板として、 例えば、 透明なガラス基板を使用し、 前面 ガラス基板 1 とする。 また、 第 2 の基板として、 例えば、 透明なガラス 基板を使用し、 これを背面ガラス基板 2とする。 For the electric tube, for example, a transparent glass substrate is used as the first substrate, and the front glass substrate 1 is used. Further, as the second substrate, for example, a transparent glass substrate is used, and this is referred to as a rear glass substrate 2.
前記前面ガラス基板 1 及び前記背面ガラス基板 2 の周辺はフリットガ ラスによって封着され、 封着で構成される管体内に下記の構造体が収納 されると共に、 管体内を真空に排気した後、 ヘリウム (He)、 ネオン (Ne)、 アルゴン（Ar)等とキセノン（Xe)の混合気体等の放電用ガスが封入されて いる。  The periphery of the front glass substrate 1 and the rear glass substrate 2 is sealed with a frit glass, and the following structure is housed in a sealed tube, and the tube is evacuated to helium. A discharge gas such as a mixture of (He), neon (Ne), argon (Ar), and xenon (Xe) is sealed.
管体内に収納される構造体は以下のように形成する。 第 2 アドレス電 極 7 を背面ガラス基板 2 の上に、 薄膜プロセスや印刷等の厚膜プロセス 等で形成する。 次にストライプ状の隔壁 3 をスクリーン印刷やサンドブ ラスト法等で形成する。 このストライプ状の隔壁 3は第 2ァドレス電極 7 に平行に配置されている。 次いで RGB 3原色の各蛍光体 10を、 第 2アド レス電極 7 の上並びにストライプ状の隔壁 3 の内壁面に印刷等の方法で 形成する。  The structure housed in the tube is formed as follows. The second address electrode 7 is formed on the rear glass substrate 2 by a thin film process or a thick film process such as printing. Next, stripe-shaped partition walls 3 are formed by screen printing, sandblasting, or the like. The stripe-shaped partition walls 3 are arranged in parallel with the second address electrodes 7. Next, each of the phosphors 10 of the three primary colors of RGB is formed on the second address electrode 7 and on the inner wall surface of the stripe-shaped partition wall 3 by a method such as printing.
本実施例の変形例を第 8図、 第 9図を用いて説明する。 第 8図は本発 明による表示用放電管の実施例 2 の変形例の概略構造を説明する分解斜 視図である。 第 9 図は第 8 図に示す表示用放電管の概略構造を説明する 断面図であり、 構造の理解を容易にするために、 第 2 の基板を第 1 の基 板に対して 90° 回転して表示してある。 第 8図、 第 9図に示すように、 第 2ァドレス電極 7の上に白色の誘電体層 8bを印刷等で形成後、 ストラ イブ状の隔壁 3及び蛍光体 10を形成しても良い。 その他の構成は実施例 2と同様である。  A modified example of the present embodiment will be described with reference to FIGS. FIG. 8 is an exploded perspective view illustrating a schematic structure of a modification of the second embodiment of the display discharge tube according to the present invention. FIG. 9 is a cross-sectional view for explaining the schematic structure of the display discharge tube shown in FIG. 8, in which the second substrate is rotated by 90 ° with respect to the first substrate to facilitate understanding of the structure. It is displayed. As shown in FIGS. 8 and 9, after the white dielectric layer 8b is formed on the second address electrode 7 by printing or the like, the stripe-shaped partition walls 3 and the phosphor 10 may be formed. Other configurations are the same as in the second embodiment.
一方、 第 7図、 第 9図において、 前面ガラス基板 1 には電極対 5M1、 5M2から構成される表示用電極 5が薄膜プロセスや印刷等の厚膜プロセス により形成されている。 この表示用電極 5の電極対 5M1、 5M2の間には第 1ァドレス電極 6が薄膜プロセスもしくは印刷等の厚膜プロセスで形成さ P 3 On the other hand, in FIGS. 7 and 9, on the front glass substrate 1, the display electrode 5 composed of the electrode pairs 5M1 and 5M2 is formed by a thin film process or a thick film process such as printing. A first address electrode 6 is formed between the electrode pair 5M1 and 5M2 of the display electrode 5 by a thin film process or a thick film process such as printing. P 3
2 1  twenty one
れている。 表示用電極 5の電極対 5M1、 5M2及び第 1アドレス電極 6の上 には、 透明誘電体層 8a、 格子状の隔壁 4及び保護膜 9が形成されている。 透明誘電体層 8a は透明なガラス等からなる絶縁体を印刷等で形成し、 格子状の隔壁 4 は黒色のガラス等からなる絶縁体を印刷等で形成した。 保護膜 9は 2次電子放射率の高い MgO等の酸化物薄膜であり、 蒸着法等 で形成した。 Have been. On the electrode pair 5M1, 5M2 of the display electrode 5 and the first address electrode 6, a transparent dielectric layer 8a, a grid-like partition 4 and a protective film 9 are formed. For the transparent dielectric layer 8a, an insulator made of transparent glass or the like was formed by printing or the like, and for the grid-like partition 4, an insulator made of black glass or the like was formed by printing or the like. The protective film 9 is an oxide thin film such as MgO having a high secondary electron emissivity, and is formed by a vapor deposition method or the like.
前面ガラス基板 1側の格子状の隔壁 4 と背面ガラス基板 2側のストラ イブ状の隔壁 3 とで区画される放電領域で形成される 1 つの表示セル中 には表示用電極 5の 2本の電極対 5M1、 5M2と第 1アドレス電極 6、 およ び第 2アドレス電極 7とが配置される。  Two display electrodes 5 are included in one display cell formed by a discharge region defined by the grid-like partition walls 4 on the front glass substrate 1 side and the stripe-shaped partition walls 3 on the rear glass substrate 2 side. Electrode pairs 5M1, 5M2, first address electrode 6, and second address electrode 7 are arranged.
ァドレス用電極と表示用電極とを分離することにより、 表示用電極は 隣接するセルの放電領域で電極対を構成する電極 5M1 と電極 5M2 をそれ ぞれ共用できる。 例えば、 5M1及び 5M2のそれぞれ略中央の上に格子状の 隔壁 4をその 2辺が重なるように形成することにより、 放電空間 (放電領 域)を分離できる。  By separating the electrode for display and the electrode for display, the electrode for display can share the electrode 5M1 and the electrode 5M2 forming the electrode pair in the discharge region of the adjacent cell. For example, a discharge space (discharge area) can be separated by forming a grid-like partition 4 on the substantially center of each of 5M1 and 5M2 so that the two sides thereof overlap.
なお、 放電領域の分離は格子状の隔壁 4 を形成しなくとも、 表示用電 極 5の電極対 5M1、 5M2間の距離 D (匪）と電極幅 W(mm)、 前面ガラス基板 1 と背面ガラス基板 2の垂直方向の放電空間の長さ L(mm)及び封入されたガ スの 25°Cでの圧力 P(Torr)と特定の範囲に設定することにより可能であ る。 すなわち、 前記寸法 D(nuii)、 W (龍)、 L(mm)、 P(Torr)との間の関係 K = (v/"(D)/(W/2 + D))/( 1000 X v^(L)/P) ( 1 )式 としたときに In addition, the separation of the discharge area does not require the formation of the grid-shaped partition walls 4, but the distance D (band) and electrode width W (mm) between the electrode pair 5M1 and 5M2 of the display electrode 5, the front glass substrate 1 and the back This is possible by setting the length L (mm) of the discharge space in the vertical direction of the glass substrate 2 and the pressure P (Torr) of the enclosed gas at 25 ° C. to a specific range. That is, the relationship between the dimensions D (nuii), W (dragon), L (mm), and P (Torr) K = (v / "(D) / (W / 2 + D)) / (1000 X v ^ (L) / P) (1)
0. 5≤K≤2 (2)式 を満足するように構成すればよい。 実験によると、 Κが 0. 5より小さいと クロストークが発生する。 また、 Κ 2 より大きいと前記電極対 5Μ1、 5Μ2間の距離 D (匪)が大きくなりすぎ表示用放電管として現実的ではない。 放電をする電極間の距離 D と放電をしてはならない電極までの距離 (WZ2 + D)、 ガス圧 P と放電空間の垂直方向の長さ L とが上記（1)式、 （2)式の 関係を満足するように構成すれば隣接する放電領域を分離することがで きる。 なお、 ガス圧 P は、 負グロ一の厚さに影響を与え、 放電空間の長 さ Lは電界の広がりを制限して放電の広がりを制御する。 0.5 ≤ K ≤ 2 What is necessary is just to make it satisfy | fill expression (2). According to experiments, when Κ is less than 0.5, crosstalk occurs. On the other hand, if it is larger than Κ2, the distance D (band) between the electrode pairs 5Μ1 and 5Μ2 becomes too large, which is not practical as a display discharge tube. The distance D between the discharging electrodes and the distance between the electrodes that must not discharge (WZ2 + D), if the gas pressure P and the vertical length L of the discharge space satisfy the relationship of the above formulas (1) and (2), the adjacent discharge regions can be separated. . The gas pressure P affects the thickness of the negative glow, and the length L of the discharge space limits the spread of the electric field to control the spread of the discharge.
本実施例の表示用放電管は次のようにして製造される。 以下、 第 8図、 第 9図で示した実施例 2及び実施例 2の変形例を、 第 10図の本発明によ る表示用放電管の製造プロセスの概略を説明する工程図に従って説明す る。 実施例 2及び実施例 2の変形例では前記実施例 1 における背面ガラ ス基板 2 上に形成する隔壁形状を格子状からストライプ状に変えた点が 実施例 1と異なる。  The display discharge tube of this embodiment is manufactured as follows. Hereinafter, the second embodiment shown in FIGS. 8 and 9 and a modification of the second embodiment will be described with reference to FIG. 10 which is a flowchart illustrating the outline of the manufacturing process of the display discharge tube according to the present invention. You. The second embodiment and a modification of the second embodiment are different from the first embodiment in that the shape of the partition walls formed on the rear glass substrate 2 in the first embodiment is changed from a lattice shape to a stripe shape.
前面ガラス基板 1 および背面ガラス基板 2 には板厚 2. 0咖のソーダガ ラスを使用した。 表示セルピッチは横 0. 33mm、 縦 1. 0匪である。 なお、 ガラス基板の板厚は真空強度があつて、 製造時の取り扱いに問題がなけ れば特に制限がない。 また、 ガラスの材質は、 高歪点ガラスを用いるこ とが可能であればソーダガラスより好ましい。  Soda glass with a thickness of 2.0 mm was used for the front glass substrate 1 and the rear glass substrate 2. The display cell pitch is 0.33mm in width and 1.0 in height. The thickness of the glass substrate is not particularly limited as long as it has vacuum strength and there is no problem in handling during manufacture. Further, the material of the glass is preferable to soda glass as long as high strain point glass can be used.
先ず、 前面ガラス基板 1上に表示用電極 5の電極対 5M1、 5M2および第 1 ァドレス電極 6 として透明電極 5bおよび 6bを、 それぞれ幅 0. 60匪、 0. 15mm に例えば IT0膜でパターン形成する。 次に薄膜プロセスで、 前記 透明電極 5b、 6b上の例えば中央部にそれぞれ幅 0. 06mmの Cr一 Cu - Cr多 層膜を母電極 5a、 6a とし形成される。 表示用電極 5 に透明電極 5b と母 電極 5a とを使用することで、 光の透過率の低下と電気抵抗の上昇とを抑 えて電極面積を大きくすることができる。  First, on the front glass substrate 1, transparent electrodes 5b and 6b as electrode pairs 5M1 and 5M2 of the display electrode 5 and a first address electrode 6 are formed with a pattern of, for example, an IT0 film to a width of 0.60 mm and 0.15 mm, respectively. . Next, in a thin film process, a Cr—Cu—Cr multilayer film having a width of 0.06 mm, for example, is formed on the transparent electrodes 5b and 6b, for example, as the mother electrodes 5a and 6a, respectively. By using the transparent electrode 5b and the mother electrode 5a for the display electrode 5, it is possible to increase the electrode area while suppressing a decrease in light transmittance and an increase in electric resistance.
表示用電極 5の電極対 5M1、 5M2の電極幅は放電セル (放電領域）ピッチ が 1. Ommの時、 概略 0. 05〜0. 8匪であり、 電極対 5M1、 5M2を構成する透 明電極の幅は 0. l〜0. 8mniである。 表示用電極の電極対 5M1、 5M2 の幅が 0. 8ram以上であると、 同一基板上に形成する第 1ァドレス電極 6の電極幅 を十分確保できず、 アドレス放電に時間がかかり、 現実的ではない。 また、 電極対 5M1、 5M2を構成する透明電極 5bの電極幅を 0. lmm以下 では透明電極の電気抵抗を下げるために太い母電極が必要になるため、 表示画像の精細度を高くできない。 The electrode width of the electrode pair 5M1 and 5M2 of the display electrode 5 is approximately 0.05 to 0.8 when the discharge cell (discharge area) pitch is 1. Omm, and the electrodes constituting the electrode pair 5M1 and 5M2 are transparent. The width of the electrodes is between 0.1 and 0.8 mni. If the width of the electrode pair 5M1 and 5M2 of the display electrode is 0.8 ram or more, the electrode width of the first address electrode 6 formed on the same substrate cannot be sufficiently secured, and it takes time for address discharge. Absent. Further, when the electrode width of the transparent electrode 5b constituting the electrode pair 5M1 and 5M2 is 0.1 mm or less, a thick mother electrode is required to reduce the electric resistance of the transparent electrode, so that the definition of the displayed image cannot be increased.
母電極 5aの幅は概略 0. 05〜0. 3mmである。 母電極 5aの幅が 0. 3匪以 上になると放電セルの光透過率が低くなり、 輝度が低下する。 また、 母 電極 5aの幅が 0. 05匪以下では表示用電極 5(透明電極）の電気抵抗が低下 せず、 駆動が難しい。 なお、 第 1 ァドレス電極 6 にも表示用電極 5の電 極対 5M1、 5M2 と同様に透明電極と母電極を使用すると、 光透過率の低下 と電気抵抗の上昇を抑えて電極面積を大きくすることができる。  The width of the mother electrode 5a is approximately 0.05 to 0.3 mm. When the width of the mother electrode 5a is 0.3 or more, the light transmittance of the discharge cell decreases and the luminance decreases. If the width of the mother electrode 5a is less than 0.05, the electric resistance of the display electrode 5 (transparent electrode) does not decrease, and it is difficult to drive. When a transparent electrode and a mother electrode are used for the first address electrode 6 in the same manner as the electrode pairs 5M1 and 5M2 of the display electrode 5, a decrease in light transmittance and an increase in electric resistance are suppressed to increase the electrode area. be able to.
第 1ァドレス電極の電極幅は放電セルピッチが 1. Ommの時、 概略 0. 03 〜0, 4mmである。 第 1ァドレス電極 6の電極幅が 0. 03龍以下では電極面 積が少なくなるため、 アドレス放電の電圧が高くなつたり、 確実な放電 を生じるために長い時間を要するので好ましくない。 第 1ァドレス電極 6 の電極幅が 0. 4腿以上になると、 表示用電極 5 の電極幅が狭くなり、 輝 度を高くし難いので好ましくない。  The electrode width of the first address electrode is approximately 0.03 to 0.4 mm when the discharge cell pitch is 1. Omm. If the electrode width of the first address electrode 6 is less than 0.03 dragon, the electrode area is reduced, so that the voltage of the address discharge is increased and it takes a long time to generate a reliable discharge, which is not preferable. If the electrode width of the first address electrode 6 is not less than 0.4 thigh, the electrode width of the display electrode 5 becomes narrow, and it is not preferable to increase the brightness.
第 1 アドレス電極の透明電極上に形成する母電極の電極幅は概略 0. 03 〜0. lmmである。 母電極の電極幅が 0. 1匪以上になると放電セルの透過率 が低くなり、 輝度が低下するので好ましくない。 また、 母電極の幅が 0. 03mm以下では第 1 アドレス電極の電気抵抗が低下しないので、 駆動が 難しくなる。  The electrode width of the mother electrode formed on the transparent electrode of the first address electrode is approximately 0.03 to 0.1 mm. If the electrode width of the mother electrode is more than 0.1, the transmittance of the discharge cell is lowered, and the luminance is undesirably reduced. When the width of the mother electrode is less than 0.03 mm, the driving becomes difficult because the electric resistance of the first address electrode does not decrease.
なお、 ここでは、 表示用電極 5の電極対 5M1、 5M2及び第 1アドレス電 極 6に透明電極を使用した例で説明したが、 表示用電極 5の電極対 5M1、 5M2及び第 1ァドレス電極にそれぞれ透明電極を使用しなくても良い。 例 えば、 表示用電極 5の電極対 5M1、 5M2に透明電極を使用しないで、 母電 極のみで構成するパターンでは、 例えば電極幅を 0. 2〜0, 6匪 に設定して 形成すると、 電極間隔が広くなり、 放電維持電圧が高くなるが、 発光効 率を高くできる。 また、 母電極 5a、 6a の材質は電気抵抗が小さければよ P / P98/03248 Here, an example in which transparent electrodes are used for the electrode pairs 5M1 and 5M2 of the display electrode 5 and the first address electrode 6 has been described, but the electrode pairs 5M1, 5M2 and the first address electrode of the display electrode 5 are used. It is not necessary to use a transparent electrode. For example, in a pattern composed of only the mother electrode without using a transparent electrode for the electrode pair 5M1 and 5M2 of the display electrode 5, for example, if the electrode width is set to 0.2 to 0.6, it is formed. Although the electrode spacing is widened and the sustaining voltage is high, the luminous efficiency can be increased. The material of the mother electrodes 5a and 6a only needs to have a small electric resistance. P / P98 / 03248
2 4 へ  To 2 4
く、 Ag、 Ni、 Al、 Au等の金属や Cr一 Au- Cr等の多層膜等であっても問題 ない。 There is no problem even if it is a metal such as Ag, Ni, Al, or Au, or a multilayer film such as Cr-Au-Cr.
上記では、 透明電極に IT0膜を用いた例を説明したが、 光の透過率を 下げずに十分な電極面積を確保できれば問題はないので、 ネサ膜等を用 いることも可能である。  In the above, an example was described in which an IT0 film was used for the transparent electrode. However, if there is no problem if a sufficient electrode area can be secured without lowering the light transmittance, a Nesa film or the like can be used.
上記の電極を形成した後、 この上を覆う透明なガラス等からなる透明 誘電体層 8aを全面に形成し、 さらに表示用電極 5を構成する電極対 5111、 5M2の透明電極 5b上に形成した母電極 5aの概略上に、 4辺のうちの対向 する 2辺が重なるように格子状の隔壁 4を 0. 03mmの高さに形成する。 こ の格子状の隔壁 4は黒色ガラス等からなる。 格子状の隔壁 4を、 例えば 1 回あるいは複数回の印刷で積層する場合は少なくとも第 1 層は黒色とす ることが表示画像のコントラストが向上するので好適である。  After forming the above-mentioned electrodes, a transparent dielectric layer 8a made of transparent glass or the like was formed on the entire surface to cover the electrodes, and further formed on the transparent electrode 5b of the electrode pair 5111 constituting the display electrode 5 and 5M2. A grid-like partition wall 4 is formed at a height of 0.03 mm on the outline of the mother electrode 5a so that two opposing sides of the four sides overlap. This lattice-shaped partition 4 is made of black glass or the like. When the grid-like partition walls 4 are laminated by, for example, one or more times of printing, it is preferable that at least the first layer be black because the contrast of a displayed image is improved.
また、 格子状の隔壁 4を表示用電極の透明電極 5bの上に形成すれば、 画像表示機能上の問題はない。 格子状の隔壁 4 の表示用電極 5 の延在方 向と平行な隔壁部分を、 母電極 5a の上に重なるように形成すると透過率 の低下を抑えることができ、 表示画像が明るくなるので好ましい。  Further, if the grid-like partition 4 is formed on the transparent electrode 5b of the display electrode, there is no problem in the image display function. It is preferable to form a partition wall portion of the grid-like partition wall 4 parallel to the extending direction of the display electrode 5 so as to overlap the mother electrode 5a, since a decrease in transmittance can be suppressed and a display image becomes bright. .
格子状の隔壁 4を形成後、 保護膜 9として MgO膜を 500〜800nmの厚さ に例えば電子ビーム蒸着 (EB蒸着)等の公知の方法にて形成する。  After forming the grid-like partition walls 4, an MgO film is formed as a protective film 9 to a thickness of 500 to 800 nm by a known method such as electron beam evaporation (EB evaporation).
一方、 背面ガラス基板 2 の上には、 第 2 ァドレス電極 Ί が電極幅 0. 10隨にて Ag、 Ni、 Al、 Au等の金属や Cr— Cu— Cr、 Cr-Au-Cr等の多 層膜で印刷法ゃフォトプロセスにて形成される。 この第 2アドレス電極 7 の上に白色の誘電体層 8bを 0. 015mmの厚さで白色ガラス等の糸色縁材の印 刷等により形成する。 なお、 第 2 ァドレス電極 7 の電極幅は放電セルピ ッチが 0. 33匪の時、 概略 0. 05〜0. 2匪である。 電極幅が 0. 05匪以下で は放電開始電圧が高くなつたり、 放電に時間を要するため、 確実なァド レス放電が難しくなる。 白色誘電体 8bは、 形成してもしなくても基本的 な機能において大差はない。 しかし、 白色誘電体 8bによって、 蛍光体 10 の反射光の利用率の向上がなされたり、 またストライプ状の隔壁 3 をサ ンドプラスト法で形成する際の第 2 ァドレス電極 7 の保護膜の役割をす る利点がある。 On the other hand, on the back glass substrate 2, a second address electrode Ί is formed of a metal such as Ag, Ni, Al, Au or a metal such as Cr—Cu—Cr or Cr—Au—Cr with an electrode width of 0.10. The layer film is formed by a printing method and a photo process. A white dielectric layer 8b having a thickness of 0.015 mm is formed on the second address electrode 7 by printing a thread color edge material such as white glass. The electrode width of the second address electrode 7 is approximately 0.05 to 0.2 when the discharge cell pitch is 0.33. If the electrode width is less than 0.05, the discharge starting voltage will be high and the discharge will take time, making it difficult to perform a reliable address discharge. The white dielectric 8b has no significant difference in basic functions whether or not it is formed. However, the phosphor 10 There is an advantage that the utilization rate of the reflected light is improved, and that it also functions as a protective film for the second address electrode 7 when the stripe-shaped partition walls 3 are formed by the sand blast method.
次に、 ストライプ状の隔壁 3を、 前記第 2 了ドレス電極 7 と平行でそ の間隙に位置するように印刷やサンドプラスト法等で形成する。  Next, the stripe-shaped barrier ribs 3 are formed by printing, sand plasting, or the like so as to be located in the gaps in parallel with the second electrode electrodes 7.
その後、 第 2ァドレス電極 7上ゃス卜ライプ状の隔壁 3の内壁面に RGB 各色の蛍光体 10 をストライプ状に印刷等により形成する。 ストライプ状 の隔壁 3の幅は 0· 06πιπι、 高さは 0. 15mmである。 このストライプ状の隔壁 3 の幅は概略 0. 02〜0. 1匪、 高さは 0. 05〜0. 25mm であり、 印刷あるいは サンドブラスト等にて形成される。 ストライプ状の隔壁 3 の幅が 0. 1皿 以上であると開口率が低くなり、 輝度を高くすることが難しくなる。 ス トライプ状の隔壁 3 はその幅が狭ければ狭いほど開口率が良くなるが、 その幅が 0. 02龍以下では、 充分な高さの隔壁を形成できない。 ストライ プ状の隔壁 3の高さが 0. 05匪以下であると十分な量の蛍光体を塗布する ことができず、 また、 ストライプ状の隔壁 3の高さが 0. 25mm以上である と隔壁の形成が困難になる。  After that, the phosphors 10 of each of the RGB colors are formed on the inner wall surface of the upper stripe electrode-like partition wall 3 by printing or the like on the second address electrode 7. The width of the stripe-shaped partition wall 3 is 0.60πιπι, and the height is 0.15 mm. The width of the stripe-shaped partition wall 3 is approximately 0.02 to 0.1 and the height is 0.05 to 0.25 mm, and is formed by printing or sandblasting. If the width of the stripe-shaped partition walls 3 is more than 0.1 plate, the aperture ratio becomes low, and it becomes difficult to increase the brightness. The opening ratio of the strip-shaped partition wall 3 is better as the width is smaller, but a partition wall of sufficient height cannot be formed if the width is less than 0.02 dragon. If the height of the strip-shaped partition walls 3 is less than 0.05, it is not possible to apply a sufficient amount of phosphor, and if the height of the strip-shaped partition walls 3 is 0.25 mm or more. It becomes difficult to form partition walls.
この背面ガラス基板 2への蛍光体 10の形成は、 ペースト状の蛍光体を 印刷等で、 RGB各色に対応して塗り分ける。  The phosphor 10 is formed on the rear glass substrate 2 by applying a paste-like phosphor by printing or the like in accordance with each of the RGB colors.
このようにして製作した前面ガラス基板 1 と背面ガラス基板 2 カ^ 背 面ガラス基板 2上に形成したストライプ状の隔壁 3 と前面ガラス基板 1 上に形成した格子状の隔壁 4の 2辺が重なるように、 かつ排気管（図示せ ず)が固定されるようにフリッ トガラスにて封着後、 排気する。 次いでガ スを封入してチップオフする。 封入ガスは He— Xe、 Ne-Xe等のイオン化 可能なガスであり、 25°Cで概略 400Torr程の圧力で封入する。  The two sides of the stripe-shaped partition walls 3 formed on the front glass substrate 1 and the rear glass substrate 2 thus formed on the rear glass substrate 2 and the lattice-shaped partition walls 4 formed on the front glass substrate 1 overlap each other. Then, the air is exhausted after sealing with frit glass so that the exhaust pipe (not shown) is fixed. Next, gas is enclosed and the chip is chipped off. The sealing gas is an ionizable gas such as He-Xe, Ne-Xe, etc., and sealed at 25 ° C with a pressure of about 400 Torr.
なお本実施例では、 前面ガラス基板 1 上に格子状の隔壁 4 を、 形成し た場合について説明したが、 前記（1)式、 （2)式を満たす構成であれば必 ずしもこの前面ガラス基板 1 上の格子状の隔壁 4 は形成しなくとも、 デ CT/JP98/032 8 In the present embodiment, the case where the lattice-shaped partition walls 4 are formed on the front glass substrate 1 has been described. However, if the configuration satisfies the above-mentioned expressions (1) and (2), the front surface is not necessarily required. Even if the grid-like partition 4 on the glass substrate 1 is not formed, CT / JP98 / 032 8
2 6  2 6
イスプレイとしての機能において支障ない範囲にクロストークを抑える ことが出来る。 Crosstalk can be suppressed to the extent that it does not hinder the function of the spray.
クロストークの抑制に必要な隔壁 4 の高さは負グロ一の厚さと関係が ある。 例えば、 封入ガスが He— 5%Xe、 400Torr の場合、 隔壁の高さが 0. 01mm では若干のクロストークが発生した。 また、 隔壁 4 の高さが 0. 1匪以上では表示される画像の視野角が狭まるので好ましくない。  The height of the partition wall 4 necessary for suppressing the crosstalk is related to the thickness of the negative glow. For example, when the filling gas is He-5% Xe and 400 Torr, slight crosstalk occurs when the partition wall height is 0.01 mm. Further, if the height of the partition wall 4 is more than 0.1 band, the viewing angle of the displayed image is narrowed, which is not preferable.
本実施例による表示用放電管では、 表示用電極 5を構成する電極対 5M1、 5M2のそれぞれを放電管外で束ねても、 または放電管内 (パネル内）で束ね ても基本的な機能には大きな差はない。 電気的容量により表示用電極 5 の電極対の一方例えば 5M1 のみを複数個に束ねても、 あるいは電極 5M1 と電極 5M2それぞれを束ねても基本的な機能には大きな差はない。  In the display discharge tube according to the present embodiment, the basic functions of the electrode pairs 5M1 and 5M2 constituting the display electrode 5 are not limited even if they are bundled outside the discharge tube or inside the discharge tube (in the panel). There is no big difference. Even if only one of the electrode pairs of the display electrode 5, for example, only 5M1 is bundled into a plurality, or the electrodes 5M1 and 5M2 are bundled depending on the electric capacity, there is no significant difference in the basic function.
本実施例によれば、 表示用電極対 5MU 5M2 をそれぞれ隣接する放電領 域で共用することにより、 表示用電極対間の距離を離した構造にできる ので、 高い効率で輝度の高い発光を得ることができる。  According to this embodiment, since the display electrode pairs 5MU and 5M2 are shared by the adjacent discharge areas, a structure in which the distance between the display electrode pairs is large can be obtained, so that light emission with high efficiency and high luminance can be obtained. be able to.
(実施例 3) (Example 3)
第 11 図は本実施例による表示用放電管の前面ガラス基板の構成を説明 する概略断面図であって、 前記各実施例の図面と同一符号は同一部分に 対応する。  FIG. 11 is a schematic cross-sectional view for explaining the configuration of the front glass substrate of the display discharge tube according to the present embodiment.
本実施例では、 表示用電極 5を構成する電極対 5M1と 5M2の例えば 5M2 だけを隔壁 4により 2つの放電空間 (放電領域）の電極としたものであり、 電極対の他方の電極 5M1 は隔壁 4 に関して対称の位置に形成され、 それ ぞれ隣接する放電領域での表示用電極となる。 その他の構成は実施例 1 または実施例 2の構成と同じである。  In this embodiment, for example, only 5M2 of the electrode pairs 5M1 and 5M2 constituting the display electrode 5 is used as an electrode of two discharge spaces (discharge areas) by the partition wall 4, and the other electrode 5M1 of the electrode pair is a partition wall. 4 are formed at symmetrical positions with respect to 4, and serve as display electrodes in adjacent discharge regions. Other configurations are the same as those of the first or second embodiment.
(実施例 4) (Example 4)
第 12 図は本実施例による表示用放電管の前面ガラス基板の構成を説明 する概略断面図であって、 前記各実施例の図面と同一符号は同一部分に 対応する。 本実施例では表示用電極 5の電極対 5M1 と 5M2はそれぞれ隔壁 4に対 して対称の位置に形成された構造である。 すなわち、 電極対の一方の電 極 5M1 - 1 と他方の電極 5M2 - 2 とが 1つの放電領域での表示用電極を構 成するように配置され、 前記電極 5M1 - 1 と電極 5M2— 2 との間に第 1 ァ ドレス電極 6 が配置される。 その他の構成は第 1実施例、 実施例 2 の構 成と同様である。 本実施例によればァドレス電極対と表示用電極対を有 するため、 表示用電極対の間の距離を離すことができる。 FIG. 12 is a schematic cross-sectional view for explaining the configuration of the front glass substrate of the display discharge tube according to the present embodiment, and the same reference numerals as those in the drawings of the above embodiments correspond to the same parts. In this embodiment, the electrode pairs 5M1 and 5M2 of the display electrode 5 are formed at symmetrical positions with respect to the partition wall 4, respectively. That is, one electrode 5M1-1 of the electrode pair and the other electrode 5M2-2 are arranged so as to constitute a display electrode in one discharge region, and the electrode 5M1-1 and the electrode 5M2-2 are connected to each other. The first address electrode 6 is disposed between the two. Other configurations are the same as those of the first and second embodiments. According to this embodiment, since there are a pair of address electrodes and a pair of display electrodes, the distance between the pair of display electrodes can be increased.
なお、 本実施例では背面ガラス基板 2 に形成される隔壁 3 がストライ プ状で、 かつ前面ガラス基板 1に隔壁 4がない場合でも、 電極 5MK5M1— 1)と主たる放電を行う 5M2— 2 との距離 Dl(mm)と他の電極 5M2— 1 との距 離 D2(I I)、 および封入されたガスの 25°C時の圧力 P(Torr)と前面ガラス 基板 1と背面ガラス基板 2の垂直方向の放電空間の長さ L(mm)の関係が次 式を満足するように構成すればよい。 すなわち、  In this embodiment, even when the partition walls 3 formed on the rear glass substrate 2 are strip-shaped and the front glass substrate 1 does not have the partition walls 4, the electrodes 5MK5M1-1) and the electrodes 5M2-2 that perform the main discharge are formed. Distance Dl (mm) and distance D2 (II) between other electrode 5M2-1 and pressure of filled gas at 25 ° C P (Torr) and vertical direction of front glass substrate 1 and rear glass substrate 2 The relationship of the length L (mm) of the discharge space may satisfy the following equation. That is,
K = (^(01)/02)/( 1000 X T(L) /P) (1)式  K = (^ (01) / 02) / (1000 X T (L) / P) (1)
とした時、 When
0. 5≤K≤2 (2)式  0.5 ≤K≤2 (2)
の関係にあれば良い。 実験によれば、 Κの値が 0. 5より小さいとクロス卜 —クが発生し、 Κ の値が 2 より大きいと現実的でない。 前記ガスの圧力 Ρは負グロ一の厚さを制限し、 前記放電空間の長さ Lは電界の広がりを制 限して放電の広がりを制御する。 It should be in the relationship. According to experiments, crosstalk occurs when the value of 0 is less than 0.5, and is not realistic when the value of Κ is greater than 2. The pressure Ρ of the gas limits the thickness of the negative glow, and the length L of the discharge space limits the spread of the electric field to control the spread of the discharge.
なお、 上記実施例 1 3並びに本実施例では、 第 1ァドレス電極 6を表 示用電極対 5M1 と 5Μ2 の略中央に配置した図を用いて説明したが、 第 1 ァドレス電極 6は必ずしも表示用電極対 5M1 と 5Μ2の略中央に配置する 必要はない。 第 13図に示すように例えば表示用電極対 5M1 と 5Μ2との間 隔が大きい場合等には、 表示用電極対の一方の例えば 5M1に近接して第 1 了ドレス電極 6 を配置するとよい。 このような構成とすることにより、 第 1 ァドレス電極 6 と表示用電極対の一方の 5M1 との間の放電時の発光 輝度を低く抑えたり、 放電を発生しやすくすることができる。 これによ り、 リセット時の発光輝度を低く抑えて表示画像のコントラストを向上 したり、 あるいは主放電に先立つ卜リガ一としての機能を向上すること ができる。 Note that, in the above-described Embodiment 13 and the present embodiment, the description has been made with reference to the drawings in which the first address electrode 6 is arranged substantially at the center of the display electrode pair 5M1 and 5Μ2, but the first address electrode 6 is not necessarily used for display. It is not necessary to place them approximately at the center of the electrode pairs 5M1 and 5Μ2. As shown in FIG. 13, for example, when the distance between the display electrode pair 5M1 and 5Μ2 is large, the first end electrode 6 may be arranged close to one of the display electrode pairs, for example, 5M1. With such a configuration, light emission at the time of discharge between the first address electrode 6 and one of the display electrode pairs 5M1 is achieved. Brightness can be suppressed and discharge can be easily generated. As a result, it is possible to improve the contrast of the displayed image by suppressing the light emission luminance at the time of resetting, or to improve the function as a trigger prior to the main discharge.
さらに、 第 1ァドレス電極 6を母電極 6a と透明電極 6bで構成した場 合、 表示用電極対の一方の 5M1 と透明電極 6bを近接して配置し、 母電極 6aは透明電極 6bに接触しかつ表示用電極対 5M1と 5M2の略中央に配置す ると、 コントラス トのバランスを維持しつつ、 リセッ ト時の発光輝度を 抑えてコントラストを向上したり、 あるいは主放電に先立つトリガ一と しての機能を向上することができる。  Further, when the first address electrode 6 is composed of the mother electrode 6a and the transparent electrode 6b, one 5M1 of the display electrode pair and the transparent electrode 6b are arranged close to each other, and the mother electrode 6a contacts the transparent electrode 6b. Also, by arranging them approximately at the center of the display electrode pairs 5M1 and 5M2, it is possible to suppress the light emission brightness during reset to improve the contrast while maintaining the balance of contrast, or as a trigger that precedes the main discharge. Functions can be improved.
(実施例 5) (Example 5)
第 14 図は本実施例による表示用放電管前面ガラス基板の概略断面図で ある。 本実施例では、 表示用電極 5M1 と 5M2がそれぞれ隔壁 4の両側に 位置するように形成され、 第 1ァドレス電極 6が表示用電極対 5M1と 5M2 の中間ではなく、 隔壁 4側に配置している点が実施例 3 と異なる。 本実 施例によれば、 実施例 1〜実施例 4と同様にァドレス電極対と表示用電極 対の 2対の電極とを具備するため、 従来技術の AC型表示用放電管に比べ、 表示用電極対の電極間距離を大きくすることができる。  FIG. 14 is a schematic sectional view of a display discharge tube front glass substrate according to the present embodiment. In the present embodiment, the display electrodes 5M1 and 5M2 are formed so as to be located on both sides of the partition wall 4, respectively. Is different from the third embodiment. According to the present embodiment, two pairs of electrodes, ie, a pair of address electrodes and a pair of display electrodes, are provided in the same manner as in Embodiments 1 to 4. The distance between the electrodes of the pair of electrodes can be increased.
(実施例 6) (Example 6)
第 15 図は本実施例による表示用放電管の構成を説明する概略断面図で ある。 第 15図は構造の理解を容易にするために第 2の基板を第 1の基板 に対して 90° 回転させて表示してある。  FIG. 15 is a schematic sectional view illustrating the configuration of a display discharge tube according to the present embodiment. FIG. 15 shows the second substrate rotated by 90 ° with respect to the first substrate for easy understanding of the structure.
本実施例では、 表示用電極 5を構成する電極対 5M1 と 5M2 は前面ガラ ス基板 1上の同一の放電空間内に配置し、 第 1ァドレス電極 6 と第 2ァ ドレス電極 7が背面ガラス基板 2側に形成している。  In this embodiment, the electrode pairs 5M1 and 5M2 forming the display electrode 5 are arranged in the same discharge space on the front glass substrate 1, and the first address electrode 6 and the second address electrode 7 are connected to the rear glass substrate. It is formed on two sides.
すなわち、 背面ガラス基板 1の上面に第 1ァドレス電極 6が形成され、 その上に誘電体層 8bを介して第 2ァドレス電極 7が形成されている。 なお、 第 15図において、 第 1ァドレス電極 6と第 2ァドレス電極 7の 配置が逆の場合においても全く同様の効果を得ることができる。 That is, the first address electrode 6 is formed on the upper surface of the rear glass substrate 1, and the second address electrode 7 is formed thereon via the dielectric layer 8b. In FIG. 15, the same effect can be obtained even when the arrangement of the first address electrode 6 and the second address electrode 7 is reversed.
その他の構成は第 1 または 2 実施例の構成と同じである。 本実施例に よれば、 了ドレス電極の形成位置は実施例 1〜実施例 5の構成と異なるが、 一対のァドレス電極と一対の表示用電極を有するため、 従来の AC型表示 用放電管に比べ、 当該表示用電極対の間の距離を離すことができる。  Other configurations are the same as those of the first or second embodiment. According to the present embodiment, the formation positions of the endless electrodes are different from those of the first to fifth embodiments, but since they have a pair of address electrodes and a pair of display electrodes, they can be used in a conventional AC-type display discharge tube. In comparison, the distance between the pair of display electrodes can be increased.
上記実施例 1〜実施例 6においては、 表示のための主放電を行う表示用 電極対と主にァドレス放電を行うァドレス電極対をそれぞれ分離して設 けてある。 したがって、 主放電を行う表示用電極対 5M1 5M2 はそれぞれ 各セル共通に接続可能となり、 電極の間隔を離したことによる主放電の 放電電圧の上昇が駆動回路に与える影響を抑えると共に、 主放電の無効 電力を回路を複雑にすることなしに容易に回収できる。  In Embodiments 1 to 6, the display electrode pair for performing main discharge for display and the address electrode pair for mainly performing address discharge are provided separately. Therefore, the display electrode pairs 5M1 and 5M2, which perform the main discharge, can be connected in common to each cell.This suppresses the effect of the increase in the discharge voltage of the main discharge due to the separation of the electrodes on the drive circuit, and the main discharge. Reactive power can be easily recovered without complicating the circuit.
次に、 本発明による表示用放電管の駆動方法の実施例について説明す る。 実施例 1 および実施例 2 に示す構造の表示用放電管の駆動方法を説 明するが、 これら実施例の構造の表示用放電管に限定されるものではな く、 本発明のアドレス電極対と表示用電極対との合計 4 本の電極を有す る 4電極構造を備えた表示用放電管であれば、 前記実施例 1及び実施例 2 以外の表示用放電管の駆動方法に関しても有効である。  Next, an embodiment of a method for driving a display discharge tube according to the present invention will be described. Driving methods for the display discharge tubes having the structures shown in the first and second embodiments will be described. However, the present invention is not limited to the display discharge tubes having the structures of these embodiments. If the display discharge tube has a four-electrode structure having a total of four electrodes including the display electrode pair, the display discharge tube driving method other than the first and second embodiments is also effective. is there.
(実施例 7) (Example 7)
第 16 図は本実施例による表示用放電管の駆動方法を説明する駆動波形 図である。 第 16 図において、 まず、 表示用放電管の画面上の全放電セル を均一な状態にするために、 すなわち、 表示用電極 5 の電極対を構成す る電極 5M1と 5M2および第 1アドレス電極 6、 第 2アドレス電極 7上の電 荷を初期状態にするために、 表示用電極 5M1 と第 1 ァドレス電極 6間で 表示セル内の電極上の壁電荷を消去するためのリセッ ト放電を行う。  FIG. 16 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment. In FIG. 16, first, in order to make all the discharge cells on the screen of the display discharge tube uniform, that is, the electrodes 5M1 and 5M2 and the first address electrode 6 constituting the electrode pair of the display electrode 5 are used. To reset the charge on the second address electrode 7 to an initial state, a reset discharge is performed between the display electrode 5M1 and the first address electrode 6 to erase wall charges on the electrodes in the display cell.
すなわち、 第 16図のリセット期間中に電極 5M1 に PWSAのパルスを、 P P98/03248 That is, the pulse P WS A to electrode 5M1 during the reset period of FIG. 16, P P98 / 03248
3 0  3 0
第 1ァドレス電極 6に PwSKのパルスを印加して行う。 このパルスは壁電 荷を消去することを目的にしているため、 幅が狭いパルスである。 一般 に、 所謂 AC型 PDPにおいては、 放電時にパルス幅が狭いと壁電荷が生成 せず、 パルス幅が広いと壁電荷が生じる。 なお、 本実施例では、 PwsA、 PwSKのパルス幅は 1 β sであり、 電圧は PwsAが + 140V、 PWSKが— 140V である。 This is performed by applying a PwSK pulse to the first address electrode 6. Since this pulse is intended to erase the wall charge, it is a narrow pulse. Generally, in a so-called AC-type PDP, wall charges are not generated if the pulse width is small during discharge, and wall charges are generated if the pulse width is wide. In this embodiment, PwsA, the pulse width of PwSK is 1 beta s, voltage PwsA is + 140 V, is P WSK - is 140 V.
このリセッ ト放電はセル内の電極表面上の電荷を消去する目的のため であり、 放電発生するのであれば、 表示用電極対間、 アドレス電極対間、 表示用電極あるいは電極対とァドレス電極あるいは電極対間でリセッ ト 放電を行っても良い。 第 1 ァドレス電極 6 と表示用電極、 例えば 5M1 と の間でリセッ ト放電を行うと表示用電極対間でリセッ ト放電を行うより もリセッ ト放電に伴う発光が少なく、 表示画像のコントラストが良くな る。  This reset discharge is for the purpose of erasing the electric charge on the electrode surface in the cell, and if a discharge occurs, it is between the display electrode pair, between the address electrode pair, the display electrode or the electrode pair and the address electrode or A reset discharge may be performed between the electrode pairs. Performing a reset discharge between the first address electrode 6 and the display electrode, for example, 5M1, produces less light emission due to the reset discharge than a reset discharge between the pair of display electrodes, resulting in better display image contrast. Become.
例えば、 表示セルピッチが横 0. 33腿、 縦 1. 00腿 で、 電極 5M1 と電極 5M2の電極幅がそれぞれ 0. 6mm、 第 1ァドレス電極 6の幅が 0. 2匪の場合、 表示用電極 5を構成する電極対の電極 5M1 と 5M2の間の放電による明る さを 1 とすると第 1アドレス電極 6 と電極 5M1 の間の放電による明るさ は 0. 5程度である。  For example, if the display cell pitch is 0.33 horizontal thighs and 1.00 vertical thighs, the electrode width of each of the electrodes 5M1 and 5M2 is 0.6 mm, and the width of the first address electrode 6 is 0.2 band, the display electrode Assuming that the brightness due to the discharge between the electrodes 5M1 and 5M2 of the electrode pair constituting 5 is 1, the brightness due to the discharge between the first address electrode 6 and the electrode 5M1 is about 0.5.
つまり、 リセット放電を表示用電極 5M1、 5M2間の放電で行う代わりに、 第 1アドレス電極 6と表示用電極 5M1の間、 あるいはリセッ ト放電を第 1 アドレス電極 6 と表示用電極 5M1、 5M2 との間で行うことにより、 リセッ ト放電に起因する発光輝度を抑え、 表示画像のコントラス卜を向上でき る。  That is, instead of performing the reset discharge by discharging between the display electrodes 5M1 and 5M2, the reset discharge is performed between the first address electrode 6 and the display electrode 5M1, or the reset discharge is performed between the first address electrode 6 and the display electrodes 5M1 and 5M2. By doing so, light emission luminance caused by reset discharge can be suppressed, and contrast of a displayed image can be improved.
また、 表示用電極対 5M1 と 5M2の間隔が特に大きい場合には、 第 15図 に示すように、 第 1 ァドレス電極 6 と表示用電極 5M1 を近接配置した構 造とすることにより、 表示用電極 5M1 と第 1 ァドレス電極 6 間のリセッ CT/JP98/03248 In addition, when the distance between the display electrode pair 5M1 and 5M2 is particularly large, as shown in FIG. 15, the first electrode electrode 6 and the display electrode 5M1 are arranged close to each other, so that the display electrode Reset between 5M1 and first address electrode 6 CT / JP98 / 03248
3 1  3 1
ト放電の発光を少なくすることができ、 コントラス卜の改善に対して有 効である。 It is possible to reduce the light emission of the discharge, which is effective for improving the contrast.
このリセット放電の後 (全面壁電荷消去後)、 第 16図の電界 1印加期間 に図示の波形を表示用電極 5M1、 5M2及び第 1ァドレス電極 6に印加する。 表示用電極 5M1、 5M2及び第 1ァドレス電極 6は第 1の基板上にあり、 第 1 の基板側に正の電圧が印加され、 第 2ァドレス電極は第 2 の基板上 にあり、 第 2の基板側は 0Vのままであるため、 第 1の基板の電極群と第 2の基板の電極群の間に電界がかかり、 リセッ ト期間中に起こった放電で 生じた負の空間電荷が第 1 の基板の電極群に、 正の空間電荷が第 2 の基 板の電極群に壁電荷として蓄積される。  After this reset discharge (after erasing the entire wall charge), the waveform shown in FIG. 16 is applied to the display electrodes 5M1, 5M2 and the first address electrode 6 during the electric field 1 application period. The display electrodes 5M1, 5M2 and the first address electrode 6 are on the first substrate, a positive voltage is applied to the first substrate side, the second address electrode is on the second substrate, and the second Since the substrate side remains at 0 V, an electric field is applied between the electrode group of the first substrate and the electrode group of the second substrate, and the negative space charge generated by the discharge generated during the reset period is reduced to the first space. Positive space charges are accumulated as wall charges in the electrode group of the second substrate in the electrode group of the second substrate.
なお、 リセット放電後の電界は印加しなくとも基本的な駆動には問題 がないが、 電界を印加することにより、 表示セル内の空間電荷を電極上 に蓄積させて、 アドレス電圧を低くできる。 つまりアドレス電極対間に 相対的に電界が印加されれば良く、 電圧印加は例えば第 1ァドレス電極 6 だけでもよい。 なお、 表示用電極対への電圧は印加してもしなくても基 本的な機能には問題はない。  There is no problem in basic driving without applying an electric field after a reset discharge. However, by applying an electric field, space charges in the display cell can be accumulated on the electrodes, and the address voltage can be reduced. That is, an electric field may be applied relatively between the address electrode pairs, and the voltage may be applied only to the first address electrode 6, for example. Note that there is no problem in the basic function whether or not a voltage is applied to the display electrode pair.
この壁電荷によって、 第 16図のァドレス期間での、 第 1ァドレス電極 Due to this wall charge, the first address electrode during the address period shown in Fig. 16
6と第 2ァドレス電極 7間の放電を、 第 16図の電界 1印加期間の波形を 印加しない場合に比べ、 容易に起こさせることができる。 本実施例では、 VM2が + 70V、 VC +が + 80Vである。 The discharge between the electrode 6 and the second address electrode 7 can be easily caused as compared with the case where the waveform during the electric field 1 application period in FIG. 16 is not applied. In this embodiment, V M2 is + 70V, V C + is + 80V.
第 16図の電界 1印加期間の後にァドレス期間の波形を表示用電極 5M1、 5112、 第 1ァドレス電極 6(6— 1、 6— 2、 · · ·、 6— n)、 および第 2ァド レス電極 7(7— n)に印加する。 なお、 第 1 ァドレス電極 6(6— 1、 6— 2、 · · 6— n)は所謂スキャン電極、 第 2アドレス電極 7(7— n)は所謂デ一 タ電極に相当する。  The waveforms of the address period after the electric field 1 application period in FIG. 16 are displayed. The display electrodes 5M1, 5112, the first address electrode 6 (6-1, 6-2, ···, 6-n), and the second address To the electrode 7 (7-n). The first address electrodes 6 (6-1, 6-2,... 6-n) correspond to so-called scan electrodes, and the second address electrodes 7 (7-n) correspond to so-called data electrodes.
第 1 ァドレス電極と第 2 ァドレス電極間で放電（ァドレス放電)が生じ る電位差となるように第 1ァドレス電極 6に負極性のパルス PCを、 第 2 ァドレス電極 7に正極性のパルス PAを印加し、 第 1ァドレス電極 6及び 第 2アドレス電極 7上に壁電荷を蓄積させる。 Discharge (address discharge) occurs between the first and second address electrodes. That the potential difference become as the pulse P C of the negative polarity to the first Adoresu electrode 6, a positive pulse PA is applied to the second Adoresu electrode 7, the wall charges on the first Adoresu electrode 6 and the second address electrodes 7 To accumulate.
この時、 表示用電極 5M1 に正の電圧 VM1 +を、 5M2に負の電圧 VM1—を 印加する。 表示用電極 5M1に印加する VM1 +は他の電極 (表示用電極 5M2、 第 1ァドレス電極 6及び第 2ァドレス電極 7)のいずれとも放電しない程 度の電圧であり、 表示用電極 5M2 に印加する VM1—は他の電極 (表示用電 極 5M1、 第 1 了ドレス電極 6及び第 2ァドレス電極 7)のいずれとも放電 しない程度の電圧である。 At this time, a positive voltage V M1 + is applied to the display electrode 5M1 and a negative voltage V M1 — is applied to 5M2. V M1 + applied to the display electrode 5M1 is a voltage that does not discharge any of the other electrodes (the display electrode 5M2, the first address electrode 6 and the second address electrode 7), and is applied to the display electrode 5M2. V M1 — is a voltage that does not discharge any of the other electrodes (display electrode 5M1, first end electrode 6 and second address electrode 7).
なお、 本実施例では、 VM1 +が + 60V、 VM1一が— 60V、 PC、 PA ともパル ス幅は 4 sであり、 電圧は PCが— 140V、 PAが + 40Vである。 In this embodiment, VM1 + is + 60V, V M1 one is - 60V, P C, pulse width with P A is 4 s, the voltage is P C - 140 V, is P A is + 40V .
本実施例では PC；、 PAのパルス幅が 4 sの場合について説明したが、 これとは別に第 1 アドレス電極 6 上に積極的には壁電荷を形成しない駆 動方法もある。 例えば Pc、 PA のパルスを壁電荷が生じない細幅、 例えば 1 s とし、 アドレス放電中、 あるいはアドレス放電後に表示用電極対 5MK 5M2 間に電界を印加し、 セル内の空間電荷を表示用電極 5 上に蓄積 させる。 次にこの蓄積された壁電荷を利用して主放電を行う。 この方法 はァドレス電圧は高くなる力、 ァドレス期間を短くできる利点がある。 ァドレス放電でァドレス電極上に壁電荷を蓄積しても空間電荷は残つ ており、 表示用電極に電圧を印加することで、 表示用電極に壁電荷を蓄 積させることができ、 サスティン期間で最初の放電を容易に起こさせる ことができる。 そこで第 16図のァドレス期間の後に電界 2印加期間の波 形を表示用電極 5M1、 5M2及び第 1ァドレス電極 6に印加する。  In this embodiment, the case where the pulse width of PC; PA is 4 s has been described, but there is another driving method in which wall charges are not actively formed on the first address electrode 6. For example, a pulse of Pc or PA is set to a narrow width that does not generate wall charge, for example, 1 s.An electric field is applied between the display electrode pair 5MK and 5M2 during or after address discharge, and the space charge in the cell is used as the display electrode. 5 Store on top. Next, a main discharge is performed using the accumulated wall charges. This method has the advantages of increasing the address voltage and shortening the address period. Even if wall charges are accumulated on the address electrodes by the pad discharge, space charges remain, and by applying a voltage to the display electrodes, the wall charges can be accumulated on the display electrodes. The first discharge can be easily generated. Therefore, after the address period of FIG. 16, the waveform of the electric field 2 application period is applied to the display electrodes 5M1, 5M2 and the first address electrode 6.
この電界 2 印加期間で、 アドレス放電で生じた空間電荷を表示用電極 5MK 5M2と、 第 1ァドレス電極 6に壁電荷として蓄積する。 電界 2印加 期間を設けることにより、 セル内の空間電荷を電圧印加した電極上に蓄 積させ、 サスティン期間の最初の放電の電圧を下げると共に、 アドレス をしなかったセルに空間電荷が移動することを防ぎ、 誤放電を減少させ る。 前記実施例 2 の表示用放電管に示す背面ガラス基板 2 にストライプ 状の隔壁 3 を使用する場合は本実施例の駆動方法による効果が特に大き い。 本実施例では、 VM1 +が + 60V、 VM1—がー 60V、 VC _がー 140Vである。 第 16図の電界 2印加期間の後に、 サスティン期間の波形を表示用電極 5MK 5M2、 第 1 アドレス電極 6 に印加する。 サスティン期間の最初、 す なわち表示のための主放電の前に第 1ァドレス電極 6にパルス PTC、 表示 用電極 5M1にパルス PTM 1を印加し、 その電極間でトリガ一放電を起こし、 その放電をパルス PTM2を印加したもう 1つの表示用電極 5Μ2に移行させ る。 During this electric field 2 application period, space charges generated by the address discharge are accumulated as wall charges on the display electrodes 5MK 5M2 and the first address electrode 6. By providing an electric field 2 application period, the space charge in the cell is stored on the electrode to which voltage is applied. In addition to lowering the voltage of the first discharge in the sustain period, it also prevents space charges from migrating to unaddressed cells and reduces false discharges. When the stripe-shaped barrier ribs 3 are used for the rear glass substrate 2 shown in the display discharge tube of the second embodiment, the effect of the driving method of this embodiment is particularly large. In the present embodiment, V M1 + is +60 V, V M1 — is −60 V, and V C — is −140 V. After the electric field 2 application period in FIG. 16, the waveform of the sustain period is applied to the display electrodes 5MK 5M2 and the first address electrode 6. The first sustain period, pulse PTC to the first Adoresu electrode 6, the pulse P TM 1 to the display electrode 5M1 applied before the main discharge for ie display, cause triggers discharge between the electrodes, the The discharge is shifted to another display electrode 5Μ2 to which the pulse PTM2 is applied.
第 1 了ドレス電極 6 と表示用電極 5M1 の間の放電が、 表示用電極 5M1 と 5Μ2の間の放電に移行した後は、 表示用電極 5M1 と 5Μ2の間に 2種類 のパルス PSM +、 ？SM—を交互に印加して、 主放電を行い、 サスティン期 間の最後に表示用電極 5 上の壁電荷を消去するため幅の狭いパルス PsSM 一、 PSSM +を印加する。  After the discharge between the first dress electrode 6 and the display electrode 5M1 has shifted to the discharge between the display electrodes 5M1 and 5Μ2, two types of pulses PSM +,? The main discharge is performed by alternately applying SM—, and at the end of the sustain period, narrow pulses PsSM 1 and PSSM + are applied to erase the wall charges on the display electrode 5.
本実施例では第 1 ァドレス電極 6 にトリガー信号を入れた場合の例で 説明しているが、 トリガ一信号を入れなくとも基本的な機能には問題が ない。 その場合、 第 1 ァドレス電極 6 上の壁電荷を利用してトリガ一放 電させれば良い。 本実施例のように第 1 ァドレス電極にトリガ一信号を 入れることにより、 駆動できる電圧設定の幅を大きくすることができる。 また、 本実施例ではサスティン期間の最後のパルスで壁電荷を消去し ているが、 消去せず、 幅の広いパルスを印加しても問題はない。 その場 合、 印加するパルスは生成される壁電荷が次のリセッ 卜放電を容易にす るように設定する。 本実施例のように、 サスティン期間の最後のパルスで壁電荷を消去す ることにより、 サスティン期間とアドレス期間の間のリセッ ト放電がな くともよいので、 リセッ ト放電の回数を低減することが可能となり、 表 示画像のコントラストを向上できる。 In the present embodiment, an example is described in which a trigger signal is input to the first address electrode 6, but there is no problem in basic functions without inputting a single trigger signal. In that case, it is only necessary to use the wall charges on the first address electrode 6 to discharge the trigger once. By applying a trigger signal to the first address electrode as in the present embodiment, the range of voltage setting that can be driven can be increased. In this embodiment, the wall charge is erased by the last pulse of the sustain period. However, there is no problem even if a wide pulse is applied without erasing. In that case, the pulse to be applied is set so that the generated wall charges facilitate the next reset discharge. By erasing the wall charges with the last pulse of the sustain period as in the present embodiment, the reset discharge between the sustain period and the address period does not have to be performed, so that the number of reset discharges can be reduced. And the contrast of the displayed image can be improved.
サスティン期間の最初に表示用電極 5M1 にパルス PTM1 5M2 にパルス Pulse on display electrode 5M1 at start of sustain period P TM1 Pulse on 5M2
PTM2、 第 1ァドレス電極 6にパルス PTCを印加する。 パルス PTCは壁電 荷が蓄積されない程度のパルス幅 1 sであり、 パルス PTM1 PTM2は壁 電荷が蓄積される程度の 4 sである。 なお、 本実施例では PTCの電圧 は + 80Vであり、 ΡτΜΙの電圧は _ 100V ΡτΜ2の電圧は + 140Vである。 サスティン期間のトリガ一放電以降の主放電を行うためのパルスは、 PSM+と PSM—であり、 パルス幅は 4 μ s、 本実施例では、 電圧は PSM +が + 40V PSM—が— 200Vである。 Pulse PTC is applied to PTM2 and first address electrode 6. Pulse PTC is the pulse width 1 s enough to the wall electric load is not accumulated, the pulse P TM1 P T M2 is the 4 s enough wall charges are accumulated. In this embodiment, the voltage of the PTC is +80 V, the voltage of {τ} is _100 V, and the voltage of {τ} 2 is +140 V. Pulse for performing triggers discharge after the main discharge of the sustain period is a PSM + and PSM-, pulse width 4 mu s, in the present embodiment, the voltage P SM + is + 40V P SM - is - 200V It is.
サスティン期間の最後で、 表示用電極上の壁電荷を消去するためのパ ルス PSSM― PSSM +は主放電を継続するためのパルスと電圧は等しく、 パルス幅が 1 sである。  At the end of the sustain period, the pulse for erasing the wall charge on the display electrode PSSM-PSSM + has the same pulse and voltage as the pulse for continuing the main discharge, and has a pulse width of 1 s.
本実施例ではサスティン期間のパルスは正負両極性のパルスを印加し た例を説明しているが、 これに限定されるものではない。 アドレス電極 対に対して放電しない電位であれば、 表示用電極対 5MK 5M2 間に相対的 に所定の電位がかかれば良く、 印加するパルスは正極性のみのパルス、 負極性のみのパルスでも問題はない。  In the present embodiment, an example is described in which a pulse in both the positive and negative polarities is applied as the pulse in the sustain period. However, the present invention is not limited to this. As long as the potential does not discharge to the address electrode pair, it is sufficient that a predetermined potential is applied between the display electrode pair 5MK and 5M2. Even if the applied pulse is a pulse of only positive polarity or a pulse of only negative polarity, there is no problem. Absent.
本実施例では第 16図にリセッ ト期間、 電界 1印加期間、 ァドレス期間、 電界 2 印加期間、 サスティン期間、 周期調整期間で構成しているが、 少 なくとも前記ァドレス電極対間で行うァドレス放電が行われるアドレス 期間と前記表示用電極対間で行う表示のための主放電が行われるサステ イン期間があれば良い。 なお、 サスティン期間には表示を行うための主 放電と、 主放電に先立つトリガー放電する場合がある。 (実施例 8) In this embodiment, the reset period, the electric field 1 application period, the address period, the electric field 2 application period, the sustain period, and the cycle adjustment period are shown in FIG. 16, but at least the address discharge performed between the address electrode pair is performed. It suffices if there is an address period in which the display is performed and a sustain period in which the main discharge for display performed between the display electrode pairs is performed. In the sustain period, there are cases where a main discharge for performing display and a trigger discharge prior to the main discharge occur. (Example 8)
第 17 図は本実施例による表示用放電管の駆動方法を説明する駆動波形 図である。 第 17 図において、 まず表示用放電管の画面上の全放電セルを 均一な状態にするために、 すなわち、 表示用電極対を構成する電極 5M1 と 5M2、 および第 1ァドレス電極 6、 第 2ァドレス電極 7上の電荷を初期 状態にするために、 表示用電極 5M1 と第 1 ァドレス電極 6間で表示セル 内の電極上の壁電荷を消去するためのリセット放電を行う。  FIG. 17 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment. In FIG. 17, first, in order to make all the discharge cells on the screen of the display discharge tube uniform, that is, the electrodes 5M1 and 5M2 constituting the display electrode pair, the first address electrode 6, and the second address are used. In order to reset the charge on the electrode 7 to an initial state, a reset discharge is performed between the display electrode 5M1 and the first address electrode 6 to erase the wall charge on the electrode in the display cell.
すなわち、 第 17図のリセット期間中に電極 5M1 に PWSKのパルスを、 第 1ァドレス電極 6に PwsAのパルスを印加して行う。 このパルスは壁電 荷消去することを目的にしているため、 幅が狭いパルスである。 That is, the pulse P WSK to the electrode 5M1 during the reset period of FIG. 17 is performed by applying a pulse of PwsA the first Adoresu electrode 6. Since this pulse is intended to erase the wall charge, it is a narrow pulse.
一般に、 所謂 AC型表示用放電管においては、 放電時にパルス幅が狭い と壁電荷が生成せず、 パルス幅が広いと壁電荷が生じる。 本実施例では、 PWSAヽ PWSKのパルス幅は 1 sであり、 電圧は PwsAが + 40V、 PWSKが— 240Vである。 Generally, in a so-called AC-type display discharge tube, wall charges are not generated when the pulse width is small during discharge, and wall charges are generated when the pulse width is wide. In this embodiment, the pulse width of PWSAヽPWSK is 1 s, the voltage PwsA is + 40V, the P WSK - is 240V.
このリセット放電はセル内の電極表面上の電荷を消去する目的であり、 表示用電極対間、 アドレス電極対間、 表示用電極あるいは電極対とアド レス電極あるいは電極対間で放電を行っても良い。 第 1 アドレス電極 6 と表示用電極、 例えば 5M1 との間でリセット放電を行うと、 表示用電極 対間でリセッ ト放電を行うよりもリセッ ト放電による発光が少なく、 表 示画像のコントラストが良くなる。  The purpose of this reset discharge is to erase the electric charge on the electrode surface in the cell. good. When a reset discharge is performed between the first address electrode 6 and the display electrode, for example, 5M1, less light is emitted due to the reset discharge than when a reset discharge is performed between the pair of display electrodes, and the display image contrast is improved. Become.
リセット放電の後 (全面壁電荷消去後)、 第 19 図のァドレス期間の波形 を表示用電極 5M1、 5M2、 第 1 ァドレス電極 6(6— 1、 6— 2、 · · ·、 6— n)、 および第 2アドレス電極 7(7— n)に印加する。 なお、 第 1アドレス電 極 6(6— 1、 6— 2、 · · 6— n)は所謂スキャン電極、 第 2アドレス電極 7(7 一 n)は所謂データ電極に相当する。  After the reset discharge (after erasing the entire wall charge), the waveforms of the address period shown in Fig. 19 are displayed. Display electrodes 5M1, 5M2, 1st address electrode 6 (6-1, 6-2, 6-n) , And the second address electrode 7 (7-n). The first address electrodes 6 (6-1, 6-2, ··· 6-n) correspond to so-called scan electrodes, and the second address electrodes 7 (7-1n) correspond to so-called data electrodes.
サスティン期間で主放電させる放電セルでは、 ァドレス期間で放電す る電位差で第 1ァドレス電極 6に負極性のパルス Pcを、 第 2ァドレス電 極 7に正極性のパルス PAを印加し、 第 1ァドレス電極 6及び第 2ァドレ ス電極 7上に壁電荷を蓄積させる。 In a discharge cell that performs main discharge during the sustain period, discharge occurs during the address period. A negative pulse Pc is applied to the first address electrode 6 and a positive pulse PA is applied to the second address electrode 7 with a potential difference, and wall charges are accumulated on the first address electrode 6 and the second address electrode 7. Let it.
本実施例ではァドレス期間中に表示用電極間に電界を印加していない カ^ 表示用電極間に電界を印加しても問題はない。 ただし、 個々の電極 が放電しない範囲の電位差とする。 本実施例では、 Pc、 PA ともパルス幅 は 4 sであり、 電圧は Pcが— 140V、 PAが + 40Vである。 In this embodiment, no electric field is applied between the display electrodes during the address period. There is no problem even if an electric field is applied between the display electrodes. However, the potential difference is such that each electrode does not discharge. In this embodiment, Pc, pulse width with PA is 4 s, the voltage Pc is - 140 V, a P A is + 40V.
第 17 図のアドレス期間の後に、 サスティン期間の波形を表示用電極 5M1、 5M2、 第 1アドレス電極 6に印加する。 サスティン期間では最初に、 第 1ァドレス電極 6と表示用電極 5M1との間でトリガー放電を起こさせ、 その放電をもう 1つの電極 5M2に移行させる。  After the address period in FIG. 17, the waveform of the sustain period is applied to the display electrodes 5M1, 5M2 and the first address electrode 6. In the sustain period, first, a trigger discharge is generated between the first address electrode 6 and the display electrode 5M1, and the discharge is transferred to another electrode 5M2.
表示用電極対の電極 5M1と 5M2及び第 1ァドレス電極 6に第 17図のサ スティン期間の最初に電極 5M2にパルス PSを、 第 1ァドレス電極 6にパ ルス Ρτを印加する。 パルス Ρτは壁電荷ができない程度のパルス幅 1 H sであり、 パルス PSのパルス幅は壁電荷が蓄積される程度の 4 sであ る。 なお、 PTの電圧は + 200Vであり、 PSの電圧は + 240Vである。 The first pulse P S to the electrodes 5M2 Sa Sutin period 17 Figure electrode 5M1 electrode pairs for display and 5M2 and first Adoresu electrode 6 applies a pulse Ρτ the first Adoresu electrode 6. The pulse Ρτ has a pulse width of 1 Hs at which wall charges cannot be generated, and the pulse width of the pulse P S has a pulse width of 4 s at which wall charges are accumulated. The voltage of the P T is + 200V, the voltage of P S is + 240V.
了ドレス放電の起きた、 すなわち、 第 1 ァドレス電極 6 に壁電荷のあ るセルは第 1ァドレス電極 6 と電極 5M1 の間でまずトリガー放電が起こ り、 その後、 電極 5M1 と電極 5M2間に放電が移行する。 パルス PSのパル ス幅は広く、 放電の起こったセルでは放電により壁電荷は表示用電極 5M1 と 5M2 にそれぞれ形成され、 次の放電の壁電荷として放電が持続して行 く。 本実施例では第 1 アドレス電極 6 にトリガ一信号を印加している例 で説明しているが、 トリガ一信号を加えず、 第 1 アドレス電極上の壁電 荷のみを利用してトリガー放電させても問題がない。 なお、 第 1 ァドレ ス電極にトリガ一信号を加えることにより、 駆動できる電圧設定の幅を 大きくすることができる。 また、 サスティン期間中に表示用電極に印加 するパルスは正極性のパルスについて説明してきたが、 これに限らず、 負極性、 両極性のパルスを使用することも可能である。 In the cell where the first address electrode 6 has a wall charge, the trigger discharge occurs first between the first address electrode 6 and the electrode 5M1, and then the discharge occurs between the electrode 5M1 and the electrode 5M2. Will migrate. The pulse width of the pulse P S is wide, and in the cell where the discharge occurred, the wall charge is formed on the display electrodes 5M1 and 5M2 by the discharge, and the discharge continues as the wall charge of the next discharge. In this embodiment, an example is described in which a trigger signal is applied to the first address electrode 6, but the trigger discharge is performed using only the wall charge on the first address electrode without applying the trigger signal. There is no problem. By applying a trigger signal to the first address electrode, the range of voltage settings that can be driven can be increased. Also applied to the display electrode during the sustain period Although the positive pulse has been described as a positive pulse, the present invention is not limited to this, and it is also possible to use a negative pulse or a bipolar pulse.
(実施例 9) (Example 9)
第 18 図と第 19 図は本実施例による表示用放電管の駆動方法を説明す る駆動波形図である。 第 19 図に示すようにまず、 表示用放電管の画面上 の全放電セルを均一な状態にするため、 すなわち、 表示用電極対を構成 する電極 5M1と 5M2、 および第 1ァドレス電極 6上の電荷を初期状態にす るために、 表示用の電極 5M1 と 5M2 と第 1ァドレス電極 6の間で壁電荷 を蓄積するためのリセット放電を行う。  FIGS. 18 and 19 are drive waveform diagrams for explaining a method of driving the display discharge tube according to the present embodiment. First, as shown in FIG. 19, in order to make all the discharge cells on the screen of the display discharge tube uniform, that is, the electrodes 5M1 and 5M2 constituting the display electrode pair and the first address electrode 6 A reset discharge for accumulating wall charges is performed between the display electrodes 5M1 and 5M2 and the first address electrode 6 in order to reset the charges to the initial state.
第 18 図、 第 19 図のリセット期間中にパルス（PwWK、 PWWA)を電極 5M1 と電極 5M2及び第 1ァドレス電極 6にそれぞれ図示したように印加する。 このパルスは壁電荷が生成することを目的にしているため、 パルス幅は 壁電荷が蓄積される程度の長いパルス（4 であって、 PffffA の電圧はPulses (PwWK, PWWA) are applied to the electrode 5M1, the electrode 5M2, and the first address electrode 6 as shown in FIGS. 18 and 19 during the reset period. Since this pulse is intended to generate wall charges, the pulse width is long enough to accumulate wall charges (4, and the voltage of P ffffA is
+ 40V、 PffffKの電圧は _240Vである。 一般に、 所謂 AC型 PDPにおいては、 放電時にパルス幅が狭 t、と壁電荷が生成せず、 パルス幅が広 、と壁電荷 が生じる。 + 40V, the voltage of PffffK is _240V. In general, in a so-called AC PDP, a wall width is not generated when the pulse width is narrow at the time of discharge, and a wall charge is generated when the pulse width is wide.
なお、 電極上に壁電荷を蓄積させるリセット放電は、 第 18 図に示すよ うに第 1アドレス電極 6 と表示用の電極 5M1 と 5M2の一方でも良い。 す なわち第 1ァドレス電極 6に壁電荷が生じさえすれば良い。  The reset discharge for accumulating wall charges on the electrodes may be either the first address electrode 6 or one of the display electrodes 5M1 and 5M2 as shown in FIG. That is, it is only necessary that wall charges are generated on the first address electrode 6.
リセット放電の後 (全面壁電荷蓄積後)、 第 18 図、 第 19 図のァドレス 期間中の波形を第 1ァドレス電極 6、 第 2ァドレス電極 7、 表示用電極対 の電極 5M1と 5M2に印加する。  After the reset discharge (after the entire wall charge accumulation), the waveforms during the address period in FIGS. 18 and 19 are applied to the first address electrode 6, the second address electrode 7, and the electrodes 5M1 and 5M2 of the display electrode pair. .
サスティン期間で主放電したくない放電セルでは、 ァドレス期間で放 電する電位差で第 1ァドレス電極 6に負極性のパルス PCを、 第 2ァドレ ス電極 7には正極性のパルス PAを印加する。 Pc、 PAのパルス幅は 1 β s であり、 電圧は Pcが— 140V、 PAが + 40Vである。 ァドレス電極に印加するパルスはァドレス電極に壁電荷が生じないパ ルス幅が狭いパルスであり、 アドレス放電を起こし、 当該アドレス放電 後の空間電荷が第 1ァドレス電極 6の壁電荷を消去させる。 In the discharge cells not want the main discharge in the sustain period, a negative pulse P C to the first Adoresu electrode 6 at a potential difference to electrostatic discharge in Adoresu period, the second Adore source electrode 7 for applying a positive pulse PA . The pulse width of Pc and PA is 1βs, and the voltage is -140V for Pc and + 40V for PA. The pulse applied to the address electrode is a pulse having a narrow pulse width at which no wall charge is generated in the address electrode, causing an address discharge, and the space charge after the address discharge erases the wall charge of the first address electrode 6.
なお、 アドレス放電の後に図示していないが、 電極間に電界を印加し て、 セル内の空間電荷を電極上に蓄積しても良い。 この時の電界の印加 の仕方はァドレス放電が行われた、 すなわち空間電荷が存在している放 電セルは表示のための主放電をさせたくない放電セルのため、 主放電で 使用する電極は同電位として電界を印加する。 例えば、 表示用電極対 5M1、 5M2と第 1ァドレス電極 6を同電位として、 第 2ァドレス電極 7との間で 電界をかければ良い。  Although not shown after the address discharge, an electric field may be applied between the electrodes to accumulate space charges in the cells on the electrodes. The method of applying an electric field at this time is that an address discharge is performed, that is, a discharge cell in which space charge exists is a discharge cell that does not want to cause a main discharge for display, and an electrode used in the main discharge is An electric field is applied as the same potential. For example, an electric field may be applied between the display electrode pair 5M1, 5M2 and the first address electrode 6 with the same potential and the second address electrode 7.
サスティン期間の最初の放電は、 第 1 ァドレス電極 6 と表示用の電極 5M1との間でトリガ一放電を起こさせ、 その放電をもう 1つの電極 5M2に 移行させる。  The first discharge in the sustain period causes a trigger discharge between the first address electrode 6 and the display electrode 5M1, and transfers the discharge to another electrode 5M2.
表示用電極対の電極 5M1と 5M2及び第 1ァドレス電極 6に第 18図、 第 19図のサスティン期間の最初に電極 5M2にパルス Psを、 第 1ァドレス電 極 6 にパルス Ρτを印加する。 パルス Ρτは壁電荷力発生しない程度のパ ルス幅（1 s )であり、 パルス PS のパルス幅は壁電荷が蓄積される程度 のパルス幅（4 s )である。 なお、 Ρτの電圧は一 200Vであり、 Psの電圧 は一 240Vである。 At the beginning of the sustain period in FIGS. 18 and 19, a pulse Ps is applied to the electrode 5M2 and a pulse Δτ is applied to the first address electrode 6 to the electrodes 5M1 and 5M2 of the display electrode pair and the first address electrode 6. Pulse Ρτ is pulse width so as not to generate wall charge power (1 s), the pulse width of the pulse P S is the pulse width extent that the wall charge is accumulated (4 s). Note that the voltage of Ρτ is 200 V and the voltage of Ps is 240 V.
ァドレス放電の起こらなかった、 すなわち、 第 1 ァドレス電極 6 に壁 電荷のあるセルは第 1 了ドレス電極 6 と電極 5M1 の間でまずトリガ一放 電が起こり、 その後、 電極 5M1 と電極 5M2 間に放電が移行する。 なお、 パルス PSのパルス幅は広く、 放電の起こったセルでは放電により壁電荷 は表示用電極 5M1 と 5M2 にそれぞれ形成され、 次の放電の壁電荷として 放電が持続して行く。 In the cell where no paddle discharge has occurred, that is, the cell with the wall charge on the first paddle electrode 6 first triggers discharge between the first paddle electrode 6 and the electrode 5M1, and then between the electrodes 5M1 and 5M2. The discharge shifts. The pulse width of the pulse P S is large, the wall charges by the discharge in the discharge of happened cells respectively formed in the display electrode 5M1 and 5M2, discharge goes persist as the wall charges for the next discharge.
本実施例では第 1 ァドレス電極 6 にトリガー信号を印加している例で 説明しているが、 トリガー信号を加えず、 第 1 アドレス電極上の壁電荷 のみを利用してトリガ一放電させても問題がない。 なお、 第 1 アドレス 電極にトリガ一信号を加えることにより、 駆動できる電圧設定の幅を大 きくすることができる。 また、 サスティン期間中に表示用電極に印加す るパルスは負極性のパルスにて説明してきたが、 これに限らず、 正極性、 両極性のパルスを使用することも可能である。 In this embodiment, an example in which a trigger signal is applied to the first address electrode 6 is described. As described above, there is no problem if a trigger is discharged using only the wall charges on the first address electrode without applying a trigger signal. By applying a trigger signal to the first address electrode, the range of voltage settings that can be driven can be increased. Further, although the pulse applied to the display electrode during the sustain period has been described as a pulse of negative polarity, the present invention is not limited to this, and a pulse of positive polarity and bipolar may be used.
(実施例 10) (Example 10)
第 20 図は本実施例による表示用放電管の駆動方法を説明する駆動波形 図である。 第 20 図に示すようにまず、 表示用放電管の画面上の全放電セ ルを均一な状態にするために、 すなわち、 表示用電極対を構成する電極 5M1と 5M2、 および第 1ァドレス電極 6上の電荷を初期状態にするために、 表示用電極 5M1 と第 1 ァドレス電極 6の間で壁電荷を蓄積するためのリ セット放電を行う。  FIG. 20 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment. As shown in FIG. 20, first, in order to make all the discharge cells on the screen of the display discharge tube uniform, the electrodes 5M1 and 5M2, which constitute the display electrode pair, and the first address electrode 6 A reset discharge for accumulating wall charges is performed between the display electrode 5M1 and the first address electrode 6 in order to initialize the upper charges.
第 20 図のリセット期間中に図示したパルス (PwWK PWWA)を表示用電極 5M1と第 1ァドレス電極 6にそれぞれ図示したように印加する。 このパル スは壁電荷が生成することを目的にしているため、 パルス幅は壁電荷が 蓄積される程度の長いパルス（4 s )となり、 PwwA の電圧は + 40V PWWK の電圧は一 240Vである。 The pulse (PwWK PWWA) shown during the reset period of FIG. 20 is applied to the display electrode 5M1 and the first address electrode 6 as shown in the figure. Since this pulse is that the purpose of the wall charges are generated, the pulse width is much long pulse (4 s) next to the wall charges are accumulated, the voltage of the voltage of PwwA is + 40V P WWK in one 240V is there.
本実施例ではリセット放電を表示用電極 5M1 と第 1 ァドレス電極 6 と の間で行っているが、 アドレス放電前に第 1アドレス電極 6あるいは第 2 ァドレス電極 7 の電極上に電荷が存在すれば良く、 第 1 ァドレス電極 6 と表示用電極 5 の電極対との間でのリセッ ト放電でも、 あるいはリセッ ト放電後、 少なくともアドレス電極対間に電界を印加して、 アドレス電 極の電極上に電荷を蓄積させても問題がな 、。  In this embodiment, the reset discharge is performed between the display electrode 5M1 and the first address electrode 6, but if there is a charge on the first address electrode 6 or the second address electrode 7 before the address discharge, the reset discharge is performed. It is good to apply an electric field at least between the pair of address electrodes even after a reset discharge between the first address electrode 6 and the electrode pair of the display electrode 5, or after the reset discharge. There is no problem with accumulating charge.
リセット放電の後 (全面壁電荷蓄積後)、 第 20 図のァドレス期間中の波 形を第 1了ドレス電極 6、 第 2ァドレス電極 7、 表示用電極対の電極 5M1 と 5M2に印加する。 After the reset discharge (after the entire wall charge accumulation), the waveform during the address period shown in FIG. 20 is changed to the first address electrode 6, the second address electrode 7, and the display electrode pair electrode 5M1. And 5M2.
サスティン期間で主放電したい放電セルでは、 ァドレス期間で放電す る電位差で第 1ァドレス電極 6に負極性のパルス PCを、 第 2ァドレス電 極 7には正極性のパルス PAを印加する。 Pc PAのパルス幅は 1 sであ り、 電圧は Pcがー 140V PAが + 40Vである。 In the discharge cells to be the main discharge in the sustain period, a pulse P C of the negative polarity to the first Adoresu electrode 6 potentiometrically you discharge Adoresu period, the second Adoresu electrodes 7 for applying a positive pulse PA. The pulse width of Pc PA is 1 s, and the voltage is -140V for Pc and + 40V for PA.
ァドレス電極に印加するパルスはァドレス電極に壁電荷が生じないパ ルス幅が狭いパルスであり、 アドレス放電を起こし、 当該アドレス放電 後の空間電荷が第 1ァドレス電極 6の壁電荷を消去させる。  The pulse applied to the address electrode is a pulse having a narrow pulse width at which no wall charge is generated in the address electrode, causing an address discharge, and the space charge after the address discharge erases the wall charge of the first address electrode 6.
表示用電極対の電極 5M1と 5M2及び第 1了ドレス電極 6に第 20図のサ スティン期間の最初に電極 5M1にパルス Psを、 第 1ァドレス電極 6にパ ルス Ρτを印加する。 パルス Ρτは壁電荷ができない程度のパルス幅（1 β s )であり、 パルス Ps のパルス幅は壁電荷が蓄積される程度のパルス幅 (4 β s )である。 なお、 ΡΤの電圧は + 40Vであり、 PSの電圧は— 200Vで ある。 At the beginning of the sustain period in FIG. 20, a pulse Ps is applied to the electrodes 5M1 and 5M2 of the display electrode pair and the first electrode 6 at the beginning of the sustain period shown in FIG. 20, and a pulse Δτ is applied to the first address electrode 6. The pulse Ρτ has a pulse width (1 β s) at which wall charges cannot be generated, and the pulse width of the pulse Ps has a pulse width (4 β s) at which wall charges are accumulated. The voltage of the [rho T is + 40V, the voltage of the P S - is 200V.
第 1ァドレス電極 6に印加するパルス Ρτは第 1ァドレス電極上に存在 する壁電荷と逆極性のパルスである。 ァドレス放電がおきたセルでは壁 電荷が存在せず、 ァドレス放電が起きなかったセルでは壁電荷が存在す るため、 第 1 アドレス電極 6 の電極上に存在する壁電荷と逆極性のパル スを印加することによりアドレス放電の起きた、 すなわち、 第 1 ァドレ ス電極 6に壁電荷のないセルは第 1 Ύドレス電極 6 と電極 5M1の間でま ずトリガー放電が起こり、 その後、 電極 5M1 と電極 5Μ2 間に放電が移行 し、 続いて主放電が開始する。  The pulse Δτ applied to the first address electrode 6 is a pulse having a polarity opposite to that of the wall charge existing on the first address electrode. Since no wall charge exists in the cell where the address discharge has occurred, and the wall charge exists in the cell where the address discharge has not occurred, the pulse having the opposite polarity to the wall charge existing on the first address electrode 6 is discharged. In a cell in which an address discharge has occurred by applying the voltage, that is, in a cell having no wall charge in the first address electrode 6, a trigger discharge first occurs between the first address electrode 6 and the electrode 5M1, and thereafter, the electrode 5M1 and the electrode 5M1 The discharge shifts between 5Μ2, followed by the main discharge.
なお、 パルス Psのパルス幅は広く、 放電の起こったセルでは放電によ り壁電荷は表示用電極 5M1 と 5M2 にそれぞれ形成され、 次の放電の壁電 荷として放電が持続して行く。 また、 サスティン期間中に表示用電極に印加するパルスは負極性のパ ルスにて説明してきたが、 これに限らず、 正極性、 両極性のパルスを使 用することも可能である。 Note that the pulse width of the pulse Ps is wide, and in the cell where the discharge has occurred, wall discharge is formed on the display electrodes 5M1 and 5M2 by the discharge, and the discharge continues as the wall charge of the next discharge. In addition, although the pulse applied to the display electrode during the sustain period has been described with the pulse of negative polarity, the present invention is not limited to this, and a pulse of positive polarity and bipolar may be used.
本実施例の駆動方法ではサスティン期間中のトリガー放電の駆動電圧 が高くなるが、 アドレススピードが速く、 かつ表示画像のコントラスト が高くなるというメリットを有する。  In the driving method of this embodiment, the driving voltage of the trigger discharge during the sustain period is increased, but there are advantages that the address speed is high and the contrast of the displayed image is high.
(実施例 11) (Example 11)
第 21 図は本実施例による表示用放電管の駆動方法を説明する駆動波形 図である。 以下、 表示用放電管の駆動方法の実施例を第 21 図を参照して 説明する。  FIG. 21 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment. Hereinafter, an embodiment of the driving method of the display discharge tube will be described with reference to FIG.
まず、 表示用放電管の画面上の全放電セルを均一な状態にするために、 すなわち、 表示用電極 5の電極対を構成する電極 5M1 と 5M2および第 1 了ドレス電極 6上の電荷を初期状態にするために、 電極 5M1 と 5M2間で 誘電体層 8aの表面にある壁電荷を消去するための放電を行う。 すなわち、 第 21図のリセット期間中に電極 5M1に PWSAのパルスを、 5M2に P^SKの パルスを印加して行う。 このパルスは壁電荷がつかないようにすること を目的にしているため、 幅が狭 、パルスである。 First, in order to make all the discharge cells on the screen of the display discharge tube uniform, that is, the charges on the electrodes 5M1 and 5M2 and the first address electrode 6 constituting the electrode pair of the display electrode 5 are initialized. In order to make the state, a discharge is performed between the electrodes 5M1 and 5M2 to erase wall charges on the surface of the dielectric layer 8a. That is, the pulse P WSA the electrode 5M1 during the reset period of FIG. 21 is performed by applying a pulse of P ^ SK to 5M2. This pulse is narrow and a pulse because it is intended to prevent wall charges.
一般に、 所謂 AC型表示用放電管においては、 放電時にパルス幅が狭い と壁電荷が生成せず、 パルス幅が広いと壁電荷が生じる。 本実施例では PwSA PfSKのパルス幅は 1 ^ sであり、 PffSAの電圧は + 40V PWSKは—Generally, in a so-called AC-type display discharge tube, wall charges are not generated when the pulse width is small during discharge, and wall charges are generated when the pulse width is wide. In this embodiment, the pulse width of PwSA PfSK is 1 ^ s, and the voltage of PffSA is + 40V P WSK
240Vである。 240V.
この放電の後 (すなわち、 全面リセット後）、 第 21 図のァドレス期間中 の波形を第 1 ァドレス電極 6、 第 2 ァドレス電極 7、 表示用電極 5M1 と 5M2に印加する。  After this discharge (that is, after a full reset), the waveform during the address period in FIG. 21 is applied to the first address electrode 6, the second address electrode 7, and the display electrodes 5M1 and 5M2.
サスティン期間で主放電を起こしたい放電セルでは、 アドレス期間で 放電する電位差で第 1ァドレス電極 6に負極性のパルス PCを、 第 2アド レス電極 7には正極性のパルス PAを印加する。 この時、 表示用電極 5の 電極の片側、 例えば 5M1 には低圧側である第 1 ァドレス電極 6 と放電を 起こさない範囲で、 ァドレス放電で生じる放電空間の電位より高い電圧 + V を印加し、 もう 1つの電極 5M2には、 高圧側である第 2ァドレス電 極 7 と放電を起こさない範囲でァドレス放電で生じる放電空間の電位よ り低い電圧一 VMを印加する。 In the discharge cell to be cause main discharge in the sustain period, a pulse P C of the negative polarity to the first Adoresu electrode 6 at a potential difference to discharge in the address period, a second ad A positive pulse PA is applied to the electrode 7. At this time, a voltage + V higher than the potential of the discharge space generated by the address discharge is applied to one side of the electrode of the display electrode 5, for example, 5M1, so as not to cause a discharge with the first address electrode 6 on the low voltage side. To the other electrode 5M2, a voltage of 1 V M lower than the potential of the discharge space generated by the address discharge is applied to the second address electrode 7 on the high voltage side within a range in which no discharge occurs.
これらのァドレス電極に印加するパルスは当該ァドレス電極に壁電荷 が生じないパルス幅が狭いパルス（Pc、 PA)を印加して、 アドレス放電を 起こし、 ァドレス放電後の空間電荷が表示用電極 5の電極 5M1 と 5M2に 印加した電圧とそれぞれ逆極性の壁電荷を蓄積させる。 なお、 パルス Pc とパルス PA のパルス幅は何れも 1 μ sであり、 パルス PC の電圧は一 140V、 パルス PAは + 40Vであり、 + VMは + 30V、 一 VMは一 30Vである。 サスティン期間では、 表示用電極を構成する電極 5M1 と 5M2に第 21図 のサスティン期間に放電維持パルス Psが印加され、 アドレス放電の起こ つた、 すなわち表示用電極 5 に壁電荷のあるセルは放電し、 アドレス放 電の起こらなかった、 すなわち表示用電極 5 に壁電荷のないセルは放電 しない。 なお、 Psはパルス幅は 4 s、 電圧は— 240Vであり、 放電の起 こったセルでは放電により壁電荷が形成される。 The pulse applied to these address electrodes is such that a pulse (Pc, PA) with a narrow pulse width that does not generate wall charges is applied to the address electrodes to cause an address discharge, and the space charges after the address discharge are applied to the display electrode 5. The wall charges of the opposite polarities to the voltage applied to the electrodes 5M1 and 5M2 are accumulated. The pulse width of the pulse Pc and the pulse PA is both a 1 mu s, the voltage of the pulse P C is an 140 V, pulse PA is + 40V, + VM is + 30V, one V M is one 30V . In the sustain period, the sustaining pulse Ps is applied to the electrodes 5M1 and 5M2 constituting the display electrodes during the sustain period shown in FIG. 21, and the address discharge occurs, that is, the cells having the wall charges on the display electrode 5 are discharged. However, a cell in which no address discharge has occurred, that is, a cell having no wall charge in the display electrode 5 does not discharge. Ps has a pulse width of 4 s and a voltage of -240 V. In the cell where the discharge has occurred, wall charges are formed by the discharge.
このように、 ァドレス放電（画像情報）の有無にしたがってサスティン 期間中の放電維持をコントロールできる。  In this way, discharge sustain during the sustain period can be controlled according to the presence or absence of the address discharge (image information).
(実施例 12) (Example 12)
第 22 図は本実施例による表示用放電管の駆動方法を説明する駆動波形 図である。 本実施例では、 まず、 表示用放電管の画面上の全放電セルを 均一な状態にするために、 すなわち、 表示用電極 5 を構成する電極対の 電極 5M1 と 5M2および第 1 了ドレス電極 6上の電荷を初期状態にするた めに、 電極 5M1と 5M2間で壁電荷を蓄積するための放電を行う。 第 22図のリセット期間中に電極 5M1に PWFFAのパルスを、 5M2に Ρ ¾ のパルスを印加して行う。 このパルスは壁電荷を蓄積することを目的に しているため、 パルス幅は壁電荷が蓄積される程度広いパルスとなる。 FIG. 22 is a drive waveform diagram for explaining a method of driving the display discharge tube according to the present embodiment. In this embodiment, first, in order to make all the discharge cells on the screen of the display discharge tube uniform, namely, the electrodes 5M1 and 5M2 of the electrode pair constituting the display electrode 5 and the first electrode 6 In order to set the upper charge to the initial state, a discharge for accumulating wall charges is performed between the electrodes 5M1 and 5M2. The pulses of FIG. 22 of the reset period P WFF A to electrode 5M1 during, performed by applying a pulse of [rho ¾ to 5M2. Since this pulse is intended to accumulate wall charges, the pulse width is wide enough to accumulate wall charges.
PWWA、 PW Kのパルス幅は 4 ^ sであり、 PwwAの電圧は + 40V、 PWWKの電 圧は一 240Vである。 Pro Wrestling Women's Alliance, the pulse width of the PW K is 4 ^ s, the voltage of PwwA is + 40V, the voltage of the P WWK an 240V.
この放電の後 (全面壁電荷蓄積後)、 第 22 図のアドレス期間中の波形を 第 1ァドレス電極 6、 第 2ァドレス電極 7、 表示用電極 5M1 と 5M2に印加 する。 サスティン期間で主放電したくない放電セルでは、 アドレス期間 で放電する電位差で第 1了ドレス電極 6に負極性のパルス PCを、 第 2ァ ドレス電極 7には正極性のパルス PAを印加する。 After this discharge (after the entire wall charge accumulation), the waveform during the address period in FIG. 22 is applied to the first address electrode 6, the second address electrode 7, and the display electrodes 5M1 and 5M2. In the discharge cells not want the main discharge in the sustain period, a pulse P C of the negative polarity to the first completion dress electrode 6 at a potential difference to discharge in the address period, the second § address electrodes 7 for applying a positive pulse PA .
ァドレス電極に印加するパルスはァドレス電極に壁電荷が生じないパ ルス幅が狭いパルスを印加して、 アドレス放電を起こし、 アドレス放電 後の空間電荷が表示用電極 5M1 と 5M2 の壁電荷を消去させる。 なお、 パ ノレス Pc、 パルス pAのパルス幅は 1 β sであり、 パルス Pc の電圧は— 140V、 パルス PAは + 40Vである。 The pulse applied to the address electrode applies a pulse with a narrow pulse width that does not generate wall charge to the address electrode, causing an address discharge, and the space charge after the address discharge erases the wall charge of the display electrodes 5M1 and 5M2. . Incidentally, Pa Noresu Pc, the pulse width of the pulse p A is 1 beta s, the voltage of the pulse Pc - 140 V, pulse PA is + 40V.
サスティン期間では、 表示用電極 5M1、 5M2 に放電維持パルス PSが印 加され、 アドレス放電の起こらなかった、 すなわち、 表示用電極に壁電 荷のあるセルは放電し、 アドレス放電の起こった、 すなわち、 表示用電 極に壁電荷のないセルは放電しない。 Psのパルス幅は 4 ^ s、 電圧は- 240Vであり、 放電の起こったセルでは放電により壁電荷が形成される。 このように、 アドレス放電（すなわち、 画像情報）の有無にしたがって サスティン期間中の放電維持をコントロールできる。 In the sustain period, a sustaining pulse P S was applied to the display electrodes 5M1 and 5M2, and no address discharge occurred.In other words, cells having wall charges on the display electrodes were discharged, and an address discharge occurred. That is, a cell having no wall charge in the display electrode does not discharge. The pulse width of Ps is 4 ^ s, and the voltage is -240 V. In the cell where the discharge occurred, the wall charge is formed by the discharge. Thus, the sustaining of the discharge during the sustain period can be controlled according to the presence or absence of the address discharge (that is, the image information).

Claims

請 求 の 範 囲 The scope of the claims
1. 第 1 の基板と、 該第 1の基板に対向する第 2 の基板と、 前記第 1 の 基板の第 2 の基板の対向面に配設した互いに略平行な複数の電極群と、 該複数の電極群に交差するように前記第 2 の基板の第 1基板の対向面に 配設した電極群と、 前記第 1 の基板と第 2 の基板との間に配設した隔壁 とを備え、 前記第 1 の基板に配設した電極群と第 2 の基板に配設した電 極群の交差部分にガスを封入して放電領域を形成した表示用放電管にお いて、  1. a first substrate, a second substrate facing the first substrate, a plurality of substantially parallel electrode groups disposed on a surface of the first substrate facing the second substrate, An electrode group disposed on the surface of the second substrate facing the first substrate so as to intersect the plurality of electrode groups; and a partition wall disposed between the first substrate and the second substrate. In a display discharge tube in which a gas is sealed at the intersection of the electrode group provided on the first substrate and the electrode group provided on the second substrate to form a discharge region,
前記第 1 の基板に配設した電極群が単位表示セル内で主放電する表示 用電極対と第 1 ァドレス電極とを具備し、 前記第 2 の基板に配設した電 極群が第 2 アドレス電極を具備し、 前記表示用電極対を被覆する誘電体 層と、 前記第 1 アドレス電極を被覆する誘電体層と、 前記第 2アドレス 電極を被覆する蛍光体とを具備したことを特徴とする表示用放電管。 The electrode group provided on the first substrate includes a display electrode pair for performing main discharge in a unit display cell and a first address electrode, and the electrode group provided on the second substrate has a second address. An electrode, a dielectric layer covering the display electrode pair, a dielectric layer covering the first address electrode, and a phosphor covering the second address electrode. Display discharge tube.
2. 前記表示用電極対の電極幅が実質的に同じであることを特徴とする 請求の範囲第 1項に記載の表示用放電管。 2. The display discharge tube according to claim 1, wherein the electrode widths of the display electrode pairs are substantially the same.
3. 前記表示用電極対を構成する電極の間に前記第 1 ァドレス電極を配 設したことを特徴とする請求の範囲 1項に記載の表示用放電管。  3. The display discharge tube according to claim 1, wherein the first address electrode is disposed between the electrodes constituting the display electrode pair.
4. 前記表示用電極対を構成する電極の間に配設した前記第 1 アドレス 電極が、 前記表示用電極対を構成する一方の電極に近接して配設された ことを特徴とする請求の範囲第 3項に記載の表示用放電管。  4. The first address electrode disposed between the electrodes constituting the display electrode pair is disposed in close proximity to one of the electrodes constituting the display electrode pair. 4. The display discharge tube according to item 3 of the scope.
5. 前記表示用電極が透明電極と、 当該透明電極とは電気抵抗が異なる 導体からなる母電極を備えていることを特徴とする請求の範囲第 1 項に 記載の表示用放電管。  5. The display discharge tube according to claim 1, wherein the display electrode includes a transparent electrode and a mother electrode made of a conductor having a different electrical resistance from the transparent electrode.
6. 前記誘第 1 アドレス電極が、 透明電極とこの透明電極とは電気抵抗 の異なる導体とからなる母電極を有していることを特徴とする請求の範 囲第 1項に記載の表示用放電管。 6. The display according to claim 1, wherein the first address electrode has a mother electrode including a transparent electrode and a conductor having a different electrical resistance from the transparent electrode. Discharge tube.
7. 前記第 1の基板と第 2の基板との間に配設した隔壁が、 前記第 2ァ ドレス電極の間で一方向に配設されていることを特徴とする請求の範囲 第 1項に記載の表示用放電管。 7. The partition wall disposed between the first substrate and the second substrate is disposed in one direction between the second address electrodes. 2. The display discharge tube according to claim 1.
8. 前記第 1の基板と第 2の基板との間に配設し、 隣接する前記第 2ァ ドレス電極の間で一方向に配設された隔壁部分に交差する別の隔壁部分 を備えたことを特徴とする請求の範囲第 Ί項に記載の表示用放電管。 8. Disposed between the first substrate and the second substrate, and provided with another partition portion that intersects a partition portion disposed in one direction between the adjacent second address electrodes. The display discharge tube according to claim 6, wherein:
9. 前記表示用電極対の一方の電極が隣接する 2 つの放電空間に共通す る一方の表示用電極であって、 該共通する一方の表示用電極幅 W(M1)と、 この共通の一方の表示用電極に隣接する表示用電極を構成する他方の電 極との距離 D (匪)、 および封入されたガスの圧力 P(Torr)と、 一方の基板 平面と他方の基板平面に対して略垂直方向の放電空間の距離 L (匪）との間 に 9. One electrode of the display electrode pair is one display electrode common to two adjacent discharge spaces, the one common display electrode width W (M1), and the one common electrode. The distance D (band) between the display electrode and the other electrode that constitutes the display electrode adjacent to the display electrode, and the pressure P (Torr) of the enclosed gas, with respect to the plane of one substrate and the plane of the other substrate Between the distance L (band) in the almost vertical discharge space
K= (^(D)/(W/2 + D))/(1000 x (L)/P) (1)式 としたときに  K = (^ (D) / (W / 2 + D)) / (1000 x (L) / P) (1)
0. 5≤K≤2 (2)式 であることを特徴とする請求の範囲第 8項に記載の表示用放電管。  9. The display discharge tube according to claim 8, wherein 0.5 ≦ K ≦ 2 (2).
10. 前記表示用電極上に形成した隔壁の高さ d ( m)と、 前記封入され たガスの圧力 P(Torr)との関係が  10. The relationship between the height d (m) of the partition wall formed on the display electrode and the pressure P (Torr) of the sealed gas is as follows.
4000/P≤d≤40000/P  4000 / P≤d≤40000 / P
であることを特徴とする請求の範囲第 9項に記載の表示用放電管。 10. The display discharge tube according to claim 9, wherein:
11. 第 1の基板と、 該第 1の基板に対向する第 2の基板と、 前記第 1の 基板の第 2 の基板の対向面に配設した互いに略平行な複数の電極群と、 該複数の電極群に交差するように前記第 2 の基板の第 1基板の対向面に 配設した電極群と、 前記第 1 の基板と第 2 の基板との間に配設した隔壁 とを備え、 前記第 1 の基板に配設した電極群と第 2 の基板に配設した電 極群の交差部分にガスを封入して放電領域を形成した表示用放電管にお いて、 前記第 1 の基板に配設した電極群が単位表示セル内で主放電する表示 用電極対と第 1 アドレス電極とを具備し、 前記第 2 の基板に配設した電 極群が第 2 アドレス電極を具備し、 前記表示用電極対を被覆する誘電体 層と、 前記第 1 アドレス電極と第 2 アドレス電極とを被覆する誘電体層 と、 前記第 2アドレス電極を被覆する蛍光体とを具備したことを特徴と する表示用放電管。 11. a first substrate, a second substrate facing the first substrate, a plurality of substantially parallel electrode groups disposed on a surface of the first substrate facing the second substrate, An electrode group disposed on the surface of the second substrate facing the first substrate so as to intersect the plurality of electrode groups; and a partition wall disposed between the first substrate and the second substrate. In a display discharge tube in which a gas is sealed at the intersection of the electrode group provided on the first substrate and the electrode group provided on the second substrate to form a discharge region, The electrode group provided on the first substrate includes a display electrode pair for performing main discharge in a unit display cell and a first address electrode, and the electrode group provided on the second substrate has a second address electrode. An electrode; a dielectric layer covering the display electrode pair; a dielectric layer covering the first address electrode and the second address electrode; and a phosphor covering the second address electrode. A display discharge tube characterized by the following.
12. 前記第 1の基板と第 2の基板との間に配設した隔壁が、 前記第 2ァ ドレス電極の間で一方向に配設されていることを特徴とする請求の範囲 第 11項に記載の表示用放電管。  12. The partition disposed between the first substrate and the second substrate, the partition being disposed in one direction between the second address electrodes. 2. The display discharge tube according to claim 1.
13. 前記第 1の基板と第 2の基板との間に配設されていて、 隣接する前 記第 2 アドレス電極の間で一方向に配設された隔壁部分に交差する別の 隔壁部分とを備えたことを特徴とする請求の範囲第 12項に記載の表示用 放電管。 13. Another partition portion disposed between the first substrate and the second substrate and intersecting a partition portion disposed in one direction between the adjacent second address electrodes. 13. The display discharge tube according to claim 12, comprising:
14. リセッ ト期間と、 アドレス期間と、 サスティン期間とを有する表示 用放電管の駆動方法において、  14. A method of driving a display discharge tube having a reset period, an address period, and a sustain period,
前記サスティン期間の主放電を、 ァドレス電極対とは別に設けた表示 用電極対の電極間で行うことを特徴とする表示用放電管の駆動方法。 A method for driving a display discharge tube, characterized in that the main discharge in the sustain period is performed between electrodes of a display electrode pair provided separately from the address electrode pair.
15. 前記ァドレス期間に前記ァドレス電極対のァドレス電極にトリガ一 信号を印加してトリガー放電し、 その後に前記サスティン期間の主放電 を行うことを特徴とする請求の範囲第 14項に記載の表示用放電管の駆動 方法。 15. The display according to claim 14, wherein a trigger signal is applied to an address electrode of the pair of address electrodes during the address period to trigger discharge, and then a main discharge is performed during the sustain period. Method of driving the discharge tube for the
16. 前記リセッ ト期間に、 前記ァドレス電極と前記表示用電極との間ま たは、 前記表示用電極対の電極間でリセッ ト放電し電極上に電荷を蓄積 することを特徴とする請求の範囲第 15項に記載の表示用放電管の駆動方 法。  16. A reset discharge is performed between the address electrode and the display electrode or between the electrodes of the display electrode pair to accumulate charges on the electrodes during the reset period. Item 15. The method for driving a display discharge tube according to Item 15.
17. 前記リセッ ト期間に、 前記ァドレス電極と前記表示用電極との間ま たは、 前記表示用電極対の電極間でリセッ ト放電し電極上に電荷を消去 することを特徴とする請求の範囲第 15項に記載の表示用放電管の駆動方 17. During the reset period, a reset discharge is performed between the address electrode and the display electrode or between the electrodes of the display electrode pair to erase charges on the electrodes. The driving method of the display discharge tube according to claim 15, wherein
18. 前記ァドレス期間に、 前記ァドレス電極対の電極間に電界を印加し、 ァドレス電極対の電極上に電荷を蓄積し、 次にァドレス電極対の電極の 間でアドレス放電をすることを特徴とする請求の範囲第 15項に記載の表 示用放電管の駆動方法。 18. In the address period, an electric field is applied between the electrodes of the address electrode pair to accumulate charges on the electrodes of the address electrode pair, and then an address discharge is performed between the electrodes of the address electrode pair. 16. The method for driving a display discharge tube according to claim 15, wherein:
19. 前記アドレス期間に、 前記表示用電極対の電極間に電界を印加し、 表示用電極対の電極上に電荷を蓄積し、 次にァドレス電極対の電極の間 でアドレス放電をすることを特徴とする請求の範囲第 15項に記載の表示 用放電管の駆動方法。  19. During the address period, applying an electric field between the electrodes of the display electrode pair, accumulating charges on the electrodes of the display electrode pair, and then performing address discharge between the electrodes of the address electrode pair. 16. The method for driving a discharge tube for display according to claim 15, wherein:
20. 前記ァドレス放電時にァドレス電極対の電極間に印加する信号波形 が、 該ァドレス放電後に前記電極上に蓄積された電荷を消去する信号波 形であることを特徴とする請求の範囲第 18項に記載の表示用放電管の駆 動方法。  20. The signal waveform according to claim 18, wherein the signal waveform applied between the electrodes of the pair of address electrodes during the address discharge is a signal waveform for erasing charges accumulated on the electrodes after the address discharge. Driving method of display discharge tube described in 4.
21. 前記ァドレス放電時にァドレス電極対の電極間に印加する信号波形 力^ 該ァドレス放電後に前記電極上に電荷を蓄積する信号波形であるこ とを特徴とする請求の範囲第 17項に記載の表示用放電管の駆動方法。  21. The display according to claim 17, wherein a signal waveform applied between the electrodes of the pair of address electrodes during the address discharge is a signal waveform for accumulating charges on the electrodes after the address discharge. Method of driving the discharge tube.
PCT/JP1998/003248 1998-07-21 1998-07-21 Discharge tube for display and method for driving the same WO2000005740A1 (en)

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EP1659609A1 (en) * 2004-11-17 2006-05-24 Samsung SDI Co., Ltd. Plasma display panel
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