WO1999048078A1 - Circuit a transistors, panneau d'affichage et appareil electrique - Google Patents

Circuit a transistors, panneau d'affichage et appareil electrique Download PDF

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Publication number
WO1999048078A1
WO1999048078A1 PCT/JP1999/001342 JP9901342W WO9948078A1 WO 1999048078 A1 WO1999048078 A1 WO 1999048078A1 JP 9901342 W JP9901342 W JP 9901342W WO 9948078 A1 WO9948078 A1 WO 9948078A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
gate
voltage
tft
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP1999/001342
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
Mutsumi Kimura
Yojiro Matsueda
Tokuroh Ozawa
Michael Quinn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to KR10-1999-7010600A priority Critical patent/KR100533450B1/ko
Priority to KR1020037016789A priority patent/KR100545884B1/ko
Priority to US09/424,043 priority patent/US6362798B1/en
Priority to EP99909217A priority patent/EP1003150B1/en
Priority to DE69926972T priority patent/DE69926972T2/de
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of WO1999048078A1 publication Critical patent/WO1999048078A1/ja
Anticipated expiration legal-status Critical
Priority to US10/384,756 priority patent/US7173584B2/en
Priority to US11/490,239 priority patent/US8576144B2/en
Priority to US12/222,639 priority patent/US20080316152A1/en
Priority to US13/018,749 priority patent/US20110122124A1/en
Priority to US14/743,483 priority patent/US20150287363A1/en
Ceased legal-status Critical Current

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Classifications

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    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3291Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/0698Local interconnections
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    • G09G2300/0421Structural details of the set of electrodes
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Definitions

  • the present invention belongs to a technical field of a transistor circuit including a plurality of transistors such as a thin film transistor (hereinafter, referred to as a TFT), a field effect transistor, and a bipolar transistor.
  • a current control type current drive type
  • a transistor has various voltage-current characteristics and thresholds depending on various conditions such as the film quality of a semiconductor film, film thickness, impurity concentration and diffusion region, film quality of a gate insulating film, film thickness, and operating temperature. Large or small variations occur. In the case of a bipolar transistor using crystal silicon, such a variation in threshold value is relatively small, but in the case of TFT, such a variation is usually large. In particular, in the case of a large number of TFTs formed over a wide area on a TFT array substrate in a display panel such as a liquid crystal panel, an EL panel, etc., such variations in current-voltage characteristics and threshold values become extremely large. Often. For example, even if this type of TFT is manufactured to have a threshold value of about 2 V (volts) (+2 V for N-channel and ⁇ 2 V for P-channel), the variation is about several volts. Or become.
  • the voltage-current characteristics of a driving TFT provided in each pixel portion are determined. Threshold variations are relatively rare. That is, in this case, even if there is some variation in the current-voltage characteristic and the threshold value of the TFT, if a sufficient switching time is given, the voltage supplied to each pixel unit from the outside via the TFT is provided. By increasing the accuracy, the table in each pixel This is because the display density and brightness can be accurately controlled. Therefore, even in display TFT liquid crystal panels, etc., in which display density and brightness unevenness in each pixel area are important, high-quality TFTs with relatively large variations in current-voltage characteristics and thresholds are used. It can display images.
  • a display panel having a current-control-type light-emitting element such as an organic EL, which emits light in such a manner that its brightness changes in accordance with the amount of current supplied, has been developed in a pixel portion. It has attracted attention as a display panel that can display images without using it, consumes low power, has little dependence on the viewing angle, and sometimes realizes flexibility.
  • a driving TFT is used in each pixel portion in order to perform active matrix driving. For example, the drain of the driving TFT is connected to the EL element via the hole injection electrode, and is supplied to the EL element from the power supply wiring connected to the source according to the voltage of the data signal applied to the gate.
  • the driving TFT is configured to control (change) the drive current.
  • the drive current flowing through the EL element is controlled by controlling the conductance between the source and the drain according to the voltage change of the input signal, and the brightness (luminance) in each pixel portion is controlled. Can be changed, and image display and the like can be performed.
  • a current control type element such as the above-described EL panel or the like
  • the voltage-current characteristics and threshold value variations in the driving TFT provided in each pixel portion pose a problem.
  • the variation in the voltage-current characteristics and the threshold value of the driving TFT causes the driving current of the data signal to vary. Since it appears as a variation as it is, the accuracy of the drive current is reduced. As a result, the brightness in each pixel portion also varies according to the variation in the threshold value of the driving TFT. In particular, in current low-temperature polysilicon TFT manufacturing technology, such variations in voltage-current characteristics and threshold values occur to a large extent, so this problem is extremely large in practical use.
  • each TFT is manufactured to reduce the variation in the voltage-current characteristics and the threshold value, the yield will be reduced, and in particular, the TFT is configured using a large number of TFTs such as a display panel. In the case of equipment, the yield is extremely reduced. Contradicts the general demand for lower costs. Alternatively, it is almost impossible to manufacture a TFT that reduces such variations. In addition, even if an attempt is made to separately provide a circuit for compensating the variation of the current-voltage characteristics and the threshold value of each TFT, the device becomes complicated and large, and the power consumption also increases. It is expected that the yield of the arranged display panels will be reduced again, or it will be difficult to respond to recent demands for lower power consumption and smaller and lighter devices. Disclosure of the invention
  • the present invention has been made in view of the above-described problems, and is a transistor circuit that performs conductance control in a driving transistor in accordance with the voltage of an input signal.
  • the conductance control can be performed by a relatively low-voltage input signal.
  • a transistor circuit capable of compensating for variations in current-voltage characteristics and threshold characteristics of a driving transistor with a relatively small number of transistors and a relatively small power consumption. It is an object to provide a display panel and an electronic device which are used.
  • a first transistor circuit according to the present invention has a first gate, a first source, and a first drain, and the first source circuit according to a voltage of an input signal supplied to the first gate. And a driving transistor whose conductance is controlled between the first drain and a second gate, a second source, and a second drain. The second gate is connected to one of the second source and the second drain. A direction that allows the input signal to be supplied to the first gate via the second source and the second drain, and enables the first gate to move the charge in a direction to reduce the conductance. And a compensating transistor connected to the first gate.
  • one of the second source and the second drain of the compensating transistor is connected to the first gate of the driving transistor, and the driving source is connected via the second source and the second drain.
  • An input signal is supplied to the first gate of the transistor.
  • this first gate The conductance between the first source and the first drain is controlled according to the voltage of the supplied input signal.
  • the compensating transistor has a second gate connected to the second drain or the second source, and performs a charge transfer in the direction of reducing the conductance between the first source and the first drain with respect to the first gate. It is connected to the first gate in a possible orientation. That is, the compensating transistor has diode characteristics. For example, if the driving transistor is an N-channel type, current can be supplied only from the first gate to the input signal source. Alternatively, if the driving transistor is a P-channel type, current can flow from the input signal source to the first gate.
  • the gate voltage of the first gate is lower than the voltage of the input signal at the time when the signal is input to the compensation transistor.
  • the voltage is boosted to the side where the conductance of the driving transistor is increased by the threshold value. Therefore, in order to obtain a desired conductance in the driving transistor, the input signal having a voltage lower than the gate voltage corresponding to the conductance by the threshold value (voltage) of the compensating transistor is used. It suffices to supply the voltage via a transistor. In this way, the gate voltage for the input signal can be boosted by the threshold value (voltage) of the compensating transistor. Compared to the case without the compensating transistor, the same conductance control can be performed with a lower input signal voltage. It is possible to do.
  • this input signal often has a higher frequency than other signals, and if a lower input signal is sufficient, considerable reduction in power consumption can be expected.
  • the voltage of the input signal is boosted by the compensating transistor to become the gate voltage in the first gate.
  • the source and the drain of the driving transistor whose conductance is controlled are controlled.
  • the threshold value of the input signal with respect to the driving current flowing through the transistor is lower than the threshold voltage of the driving transistor by the threshold voltage of the compensating transistor which is a boosted voltage from the input voltage to the gate voltage. That is, in the threshold value of the input voltage with respect to the drive current, the threshold value of the compensation transistor and the threshold value of the drive transistor are offset. Therefore, the threshold value of the input signal with respect to the drive current can be made closer to zero by making the threshold characteristics and the voltage-current characteristics closer to each other. It works.
  • the threshold value of the input signal of the entire transistor circuit can approach a certain value (zero). That is, when a plurality of transistor circuits are formed using a plurality of driving transistors having different threshold values, the threshold values of the driving transistor and the compensation transistor in each transistor circuit portion are brought closer to each other. In this case (ideally, when the two are matched), the difference in threshold between the transistors is smaller than the difference in threshold between the driving transistors (ideally, Is almost gone). Therefore, even when a plurality of driving transistors having different threshold values are used when a plurality of the transistor circuits are formed, a plurality of transistor circuits with little or no variation in the threshold value can be obtained. Becomes
  • the second transistor circuit of the present invention in the above-mentioned first transistor circuit, is a value of conductance higher than a maximum value of the conductance controlled in accordance with the input signal with respect to the first gate.
  • a reset unit that supplies a reset signal having a voltage corresponding to the input signal before the input signal is supplied.
  • the reset signal is supplied to the first gate by the reset means, the reset signal having a voltage corresponding to a value of the conductance higher than the maximum value of the conductance of the driving transistor controlled according to the input signal.
  • the gate voltage of the driving transistor can be kept constant by the reset means regardless of the magnitude of the voltage value of the input signal, and the charge can be moved in the direction of decreasing the conductance after reset.
  • the input signal can be supplied to the first gate via the compensation transistor connected to the first gate.
  • the reset signal is set to a voltage higher than a maximum voltage of the input signal by a threshold voltage of the compensation transistor. It is characterized by having.
  • the reset means supplies a reset signal having a voltage higher than the input signal to the first gate of the driving transistor. Furthermore, since the voltage of the reset signal is set to be higher than the maximum voltage of the input signal by the threshold voltage of the compensation transistor, if the input signal is input after reset, the voltage of the input signal becomes higher. Voltage that is higher than the input signal voltage by the threshold voltage of the driving transistor through the compensation transistor It can be supplied to the first gate of the transistor.
  • the reset means has a third gate, a third source, and a third drain, and the third source and the third One of the drains is connected to the first gate, and when a reset timing signal is supplied to the third gate before the supply of the input signal, the reset signal is supplied through the third source and the third drain. And a reset transistor for supplying the first gate to the first gate.
  • the reset signal when the reset timing signal is supplied to the third gate of the reset transistor, the reset signal drives the reset signal via the third source and the third drain. It is supplied to the first gate of the transistor. As a result, the gate voltage of the driving transistor can be reset to a constant value by the supply timing of the reset timing signal. Therefore, the operation described for the second or third transistor circuit can be performed.
  • the driving transistor and the compensation transistor are transistors of the same conductivity type. I do.
  • the driving transistor and the compensating transistor are transistors of the same conductivity type.
  • “the same conductivity type” means that the conductivity type of the transistor is the same.
  • the compensation transistor is also an N-channel type.
  • the compensation transistor is also a P-channel type. Therefore, the threshold value of the compensation transistor and the threshold value of the driving transistor are different. Since these are almost equal to each other, these threshold values cancel each other out in the transistor circuit. As a result, it is possible to perform the conductance control by setting the threshold value of the input signal with respect to the drive current to substantially zero. Further, even when a plurality of transistor circuits are formed using a plurality of driving transistors having different threshold values, it is possible to compensate for variations in the threshold values.
  • a sixth transistor circuit according to the present invention in any one of the first to fifth transistor circuits described above, further includes a fourth gate, a fourth source, and a fourth drain, and the fourth gate includes a switching timing signal. And a switching transistor connected to supply the input signal to the compensation transistor via the fourth source and the fourth drain when is supplied.
  • the input signal when the switching timing signal is supplied to the fourth gate of the switching transistor, the input signal is compensated through the fourth source and the fourth drain of the switching transistor. Is supplied to the transistor for use. As a result, the input signal can be supplied to the drive transistor at the supply timing of the switching timing signal.
  • a storage capacitor connected to the first gate is further provided.
  • the seventh transistor circuit when an input signal is supplied to the first gate, the voltage is held by the storage capacitor connected to the one gate. Therefore, even when the input signal is supplied for a certain period, the voltage applied to the first gate can be maintained for a longer period.
  • the eighth transistor circuit according to the present invention provides any one of the first to seventh transistors described above.
  • the transistor circuit is characterized in that the transistor circuit is constituted by a thin film transistor formed on the same substrate.
  • the effect of the current-voltage characteristic and the threshold characteristic on the driving current in the driving thin-film transistor formed on the same substrate can be compensated by the compensation thin-film transistor.
  • both thin film transistors are formed on the same substrate by the same thin film forming process, the characteristics between the two transistors are more similar, so that a plurality of transistor circuits with little variation in current-voltage characteristics and threshold characteristics are connected to the same substrate.
  • a ninth transistor circuit according to the present invention is the transistor circuit according to any one of the first to seventh transistors, wherein each of the transistors corresponds to a base, a collector, and a drain, respectively. It consists of a bipolar transistor.
  • the influence of the current-voltage characteristics and the threshold characteristics of the driving bipolar transistor on the driving current can be compensated for by the compensating bipolar transistor.
  • the degree of similarity in characteristics between the two transistors generally increases, so that it is possible to obtain a plurality of transistor circuits with small variations in current-voltage characteristics and threshold characteristics. .
  • the input signal is a voltage signal whose voltage is controlled by an input signal source;
  • the transistor is characterized in that one of the first source and the first drain is connected to a current control type element, and controls the current flowing through the current control type element by controlling the conductance.
  • the driving transistor when a voltage signal whose voltage is controlled by the input signal source is supplied as an input signal through the compensating transistor, the driving transistor causes a change in the voltage of the voltage signal. Accordingly, the conductance between the first source and the first drain is controlled. Thereby, the current control type element connected to one of the first source and the first drain is controlled in current. Therefore, it is possible to drive the current control type device with a relatively low voltage input signal. It is also possible to accurately control the current of a plurality of current-driven elements in accordance with the voltage of the voltage signal, regardless of the variation in the current-voltage characteristics, the threshold, and the value characteristics among the number of driving transistors.
  • a plurality of pixel units each including the above-described 10th transistor circuit and arranged in a matrix are provided, and the current control type element is provided in each of the plurality of pixel units.
  • a display panel is provided.
  • the current control type light emitting element is current-controlled by the driving transistor in accordance with the voltage of the input signal.
  • the brightness of the current-controlled light-emitting element is not affected by variations in the current-voltage characteristics and threshold characteristics between the driving transistors.
  • an electronic device including the above-described display panel.
  • FIG. 1 is a circuit diagram in one embodiment of a transistor circuit of the present invention.
  • FIG. 2 is a timing chart of various signals in the transistor circuit (FIG. 2 (A)), and a timing chart of various signals in the transistor circuit of FIG. 1 (FIG. 2 (B)).
  • FIG. 3 is a characteristic diagram (FIG. 3 (A)) showing threshold characteristics in a comparative example having a driving TFT, and the present embodiment having a compensation TFT and a driving TFT.
  • FIG. 3 is a characteristic diagram (FIG. 3 (B)) showing a threshold characteristic.
  • FIG. 4 is a characteristic diagram showing a change in the drive current Id with respect to a threshold variation ⁇ V th in various cases.
  • FIG. 5 is a timing chart showing the step-down operation of the compensation TFT when the reset signal V rsig is set to 5 V in the present embodiment (FIG. 5A), and the reset signal V rsig is set to 0 V.
  • Fig. 5 (B)) is a evening chart showing the step-down effect of the compensation TFT when it is set to the above condition.
  • FIG. 6 is a circuit diagram of another embodiment of the transistor circuit.
  • FIG. 7 is a plan view showing the overall configuration of the embodiment of the display panel.
  • FIG. 8 is a plan view of one pixel portion of the display panel of FIG.
  • Fig. 9 is a sectional view taken along line A-A of Fig. 8 (Fig. 9 (A)), a sectional view of BB '(Fig. 9 (B)) and a sectional view of C-C' (Fig. 9 (c)). ).
  • FIG. 10 is a circuit diagram of four adjacent pixel units in the display panel of FIG.
  • FIG. 11 is a block diagram showing a schematic configuration of an embodiment of an electronic device according to the present invention.
  • FIG. 12 is a schematic diagram showing a personal computer as an example of an electronic device.
  • FIG. 13 is a perspective view showing a liquid crystal device using TCP as another example of the electronic apparatus.
  • FIG. 1 is a circuit diagram of a transistor circuit according to the present embodiment.
  • FIGS. 2A and 2B are timing charts showing timings and voltages of various signals in the transistor circuit, respectively.
  • the transistor circuit 100 includes a driving TFT 110 (P-channel type), a compensation TFT 120 (P-channel type), a reset TFT 130 (N-channel type), and a switching TFT 140 ( N-channel type) ing.
  • driving TFT 110 P-channel type
  • compensation TFT 120 P-channel type
  • reset TFT 130 N-channel type
  • switching TFT 140 N-channel type
  • a driving TFT 110 constituting an example of a driving transistor is applied to a gate 111 based on an input signal supplied via a switching TFT 140 and a compensation TFT 120.
  • the configuration is such that the conductance between the source 112 and the drain 113 is controlled in accordance with the applied gate voltage Vg.
  • the gate 121 is connected to one of the source 122 and the drain 123 (the drain 123 in FIG. 1). That is, the compensating TFT 120 is so-called diode-connected.
  • the compensating transistor 120 is connected to the gate 112 via the source 122 and the drain 123 so that the input signal is supplied to the gate 111 and the conductance of the compensating transistor 120 is reduced with respect to the gate 111.
  • the gate is connected to the gate 11 1 in the direction that allows charge transfer (in FIG. 1, the side of the drain 1 23).
  • the reset TFT 130 which constitutes an example of the reset means, one of a source 13 2 and a drain 13 (in FIG. 1, the drain 13 33) is connected to the gate 11.
  • a reset scan signal of a voltage V rscan (hereinafter referred to as a reset scan signal V rscan) as an example of a reset evening signal is supplied to the gate 13 1 before the input signal V sig is supplied, the source 13 2
  • a reset signal of a voltage V rsig (hereinafter, referred to as a reset signal V rsig) is supplied to the gate 111 via the drain 133.
  • a scanning signal of a voltage Vscan as an example of a switching timing signal (hereinafter, referred to as a scanning signal Vscan) is supplied to the gate 141.
  • the input signal source and the compensation TFT 1 so that the input signal of the voltage V sig (hereinafter, referred to as the input signal V sig) is supplied to the compensation TFT 120 via the source 144 and the drain 144. Connected between 20.
  • a current control type (current drive type) element 500 such as an EL element is connected to the source 112 of the drive transistor 110.
  • the other end is connected to a negative power supply 1 Vc having a predetermined potential.
  • a positive power supply + Vc of a predetermined potential is connected to the drain 113 of the driving transistor 110.
  • a storage capacitor 160 is connected to the gate 111 of the driving transistor 110. Therefore, the gate voltage Vg once applied is held by the holding capacitor 160.
  • the reset scanning signal V rscan is applied to the reset TFT 130.
  • the reset TFT 130 is turned on, a reset signal V rsig is supplied to the gate 111 of the driving TFT 110, and the gate voltage Vg of the gate 111 is set to the reset signal V rsig Voltage
  • the level is almost equal to V rsig.
  • the gate voltage Vg of the driving TFT 110 can be reset to a constant voltage (ie, the voltage Vrsig) at the supply timing of the reset scanning signal Vrsig regardless of the magnitude of the voltage Vsig of the input signal Vsig. Then, when the reset period ends and the scanning signal V scan is supplied to the switching TFT 140, the switching TFT 140 is turned on, and the gate 111 of the driving TFT 110 is connected to the compensation TFT 120.
  • V sig is supplied.
  • the gate 121 is connected to the drain 123 in the compensating TFT 120 (that is, it is diode-connected)
  • a negative voltage is applied to the gate 111 to make it possible to pass through.
  • the gate voltage Vg of the driving TFT 110 which is a P-channel type TFT that is in the state, is lowered to the negative voltage side by the threshold voltage Vth2 of the compensation TFT 120 from the voltage Vsig of the data signal Vsig. Then, the gate voltage Vg thus reduced is applied to the scanning signal
  • the gate voltage Vg is equal to the reset signal V rsig voltage. It is enough to have only Vrsig time. Therefore, the driving period can be set to be much longer than the reset period. Even if the driving TFT 110 is turned on by the reset signal Vrsig during the reset period, the driving TFT T 110 can be set during this period. The influence of the current flowing through the source 112 and the drain 113 of 11 ° on the drive current I d can be made negligibly small.
  • the threshold voltage of compensation TFT 120 is
  • equivalent conductance control can be performed using the lower input signal V sig voltage V sig compared to the case without the compensation TFT 120. This can be performed in the TFT 110.
  • FIG. 2B is a timing chart when an N-channel TFT is used as both the driving TFT 110 and the compensating TFT 120. In this case, a positive voltage must be applied to the gate 111.
  • the gate voltage Vg of the driving TFT 110 which is an N-channel TFT that is turned on by the
  • the voltage After being set to the voltage V rsig of V rsig, the voltage is boosted to the positive voltage side by the threshold voltage Vth2 of the compensation TFT 120 from the voltage V sig of the input signal V sig.
  • V sig is directly input, that is, if the voltage V sig of the input signal V sig matches the gate voltage Vg, FIG. 3 (A) (this is because the driving TFT 110 is an N-channel TFT)
  • the driving current Id has a characteristic that rises from the threshold voltage V thl of the driving TFT 110 as shown in FIG. For example, this threshold voltage
  • the variation of the threshold value is about several volts. Then, the variation in the threshold voltage V thl in the driving TFT 110 appears directly as the variation in the driving current Id.
  • the input signal V sig is input to the driving TFT 110 via the compensation TFT 120, that is, the voltage V sig of the input signal V sig is set to the threshold of the compensation TFT 120.
  • the threshold of the compensation TFT 120 The value voltage Vth2 and the threshold voltage Vthl of the driving TFT 110 cancel each other, and the threshold voltage Vth of the input signal Vsig for the entire transistor circuit 100 approaches zero.
  • the threshold voltage Vth becomes substantially zero.
  • matching the threshold voltages Vthl and Vth2 can be achieved, for example, by configuring the driving TFT 110 and the compensation TFT 120 from the same conductivity type TFT at close positions on the same semiconductor substrate. You can do it relatively easily.
  • each of the TFTs a planar shape of each component such as a film thickness of a gate insulating film and a semiconductor film to be formed as a thin film, a channel length and the like, a channel forming region, a source region, and a drain region. Since the impurity concentration of the TFT and the temperature state during operation can be easily matched, the threshold voltages Vthl and Vth2 of both TFTs can be completely or almost completely matched. is there. In order to approximate the threshold value characteristics, the channel length should be the same, but the channel width does not need to be the same.
  • the drive current I d is obtained by making the threshold characteristics and the voltage-current characteristics of the drive TFT 110 and the compensation TFT 120 close (ideally, by matching). It is possible to make the threshold voltage Vth of the input signal V sig with respect to the value close to zero (ideally match it to zero).
  • the threshold voltages V thl of the driving TFTs 110 varied from one another.
  • the threshold voltage Vth of each transistor circuit 100 is set to a value close to zero by the operation of each compensation TFT 120. That is, a large number of transistor circuits 100 having a constant threshold voltage Vth can be manufactured. This is particularly useful for applications such as display panels in which variation in threshold voltage Vth among a large number of transistor circuits 100 becomes a problem as described later.
  • each transistor circuit 100 matching the threshold voltage V thl of the pair of driving TFTs 110 arranged close to each other with the threshold voltage V th2 of the compensation TFT 120 is separated by a distance. Before matching the threshold voltages V thl of the two driving TFTs 110 that are separately arranged As described above, since it is much easier, the configuration in which the threshold voltage V thl in each transistor circuit 100 is compensated by the compensation TFT 120 in this way is composed of a plurality of transistor circuits 100. It can be said that it is extremely effective in reducing the variation of the threshold voltage Vth between 0.
  • a plurality of driving TFTs 110 having different threshold voltages V thl that is, a threshold as a design reference value. Even if a plurality of driving TFTs 110 each having a threshold voltage V thl that greatly varies from the value voltage (for example, 2.5 V) are used, the variation of the threshold voltage V th is little or no. It is possible to obtain a plurality of transistor circuits 100 without any. For this reason, the conditions required for TFT in the current-voltage characteristics are relaxed, and the yield can be improved and the manufacturing cost can be reduced.
  • the conductance control in each driving TFT 110 can be controlled by the input signal V sig.
  • the first effect is that it can be performed using a gate voltage Vg higher than the voltage Vsi
  • the second effect is that the variation in the threshold voltage Vth among the plurality of transistor circuits 100 is reduced.
  • the threshold voltage V thl of the driving TFT 110 and the threshold voltage V th2 of the compensating TFT 120 need not be completely matched in each transistor circuit 100. Since the two threshold voltages cancel each other, the first and second effects can be obtained to an extent corresponding to the similarity between the two threshold voltages.
  • a reset signal V rsig having a voltage corresponding to a conductance value higher than the highest value of the conductance controlled according to the input signal V sig is supplied to the gate 11 1. It is configured. Therefore, after resetting regardless of the magnitude of the voltage value V sig of the input signal V sig, the compensation TFT 12 0 connected to the gate 11 1 in a direction that allows the charge to move in a direction to reduce the conductance is reset.
  • the input signal V sig can be supplied to the gate 111 through the gate.
  • the reset signal V rsig is set to a voltage higher than the maximum voltage of the input signal V sig by at least the threshold voltage V th2 of the compensation TFT 120.
  • the voltage V sig of the input signal V sig is Irrespective of the magnitude of the threshold voltage V th2 of the compensating TFT 120 or the magnitude of the threshold voltage V th2 of the compensating TFT 120, a voltage higher than the voltage V sig of the input signal V sig by the threshold voltage V th2 of the compensating TFT 120 is always obtained.
  • the reset signal described above is applied to all the input signals Vsig including the inverted input signal. It is desirable that the relationship of V sig be established.
  • FIG. 4 shows that the design reference value of the threshold value is -2.5 V, for example, and the variation of the drive current I d with respect to the variation of the threshold voltage ⁇ V th from the reference value is as follows.
  • the input signal V sig is directly supplied to the driving TFT 110 without the TFT 120 (characteristic curve C 1)
  • the reset signal V rsig is set to 5 V and the driving TFT 110 is supplied to the driving TFT 110 via the compensation TFT 120.
  • FIG. 5 (A) shows the variation range of the gate voltage Vg with respect to the characteristic curve C2
  • FIG. 5 (B) shows the variation range of the gate voltage Vg corresponding to the characteristic curve C3.
  • Vsig 7.5 V
  • + Vc 10 V
  • one Vc 5 V.
  • the variation in the threshold voltage AVth appears as the variation in the drive current Id as it is. .
  • the threshold voltage variation AVth is considerably compensated for on the positive side, but is compensated for on the negative side. It appears as a variation in the drive current Id.
  • the gate voltage Vg is reduced by the threshold voltage V th2 from the input signal V sig. This is because the voltage cannot be reduced (compensated) to the negative voltage side.
  • the compensation TFT 120 which is a diode, can move the gate voltage Vg from the reset signal V rsig to the input signal V sig but cannot move it away. Because.
  • the compensation TFT 120 regardless of the magnitude of the input voltage V sig and the magnitude of the threshold voltage V th2 of the compensation TFT 110, the compensation TFT 120 always exceeds the voltage of the input signal V sig.
  • a voltage Vg lower by the threshold voltage V th2 of the driving TFT 110 can be applied to the gate 111 of the driving TFT 110.
  • the gate voltage Vg is held by the holding capacitor 160 during the driving period.
  • the storage capacitor 160 can also reduce (compensate) variations in the storage characteristics of the gate voltage Vg between the plurality of transistor circuits 100.
  • the current control element 500 such as the EL element It is possible to drive the current with the sig, and furthermore, regardless of the variation of the current-voltage characteristics and the threshold characteristics among the plurality of driving TFTs 110, the plurality of current control elements 500 can be driven by the voltage of the input signal V sig. The current can be accurately controlled according to the current.
  • both the P-channel TFT and the N-channel TFT are used, but all TFTs may be composed of the N-channel TFT, Alternatively, all TFTs may be composed of P-channel TFTs.
  • the driving TFT 110 and the compensating TFT 120 are formed of the same conductivity type by the same process. It is more advantageous to configure it as TFT.
  • both TFTs are If formed in the film forming step, the degree of similarity in characteristics between the two TFTs generally increases, so that the transistor circuit 100 having no or almost no variation in the current-voltage characteristics and the threshold characteristics is used.
  • the reset TFT 130 and the switching TFT 140 may be a P-channel type or an N-channel type regardless of whether the driving TFT 110 is a P-channel type or an N-channel type. However, it is often advantageous in manufacturing that all TFTs have the same conductivity type TFT.
  • the various TFTs 110 to 140 in the present embodiment may be constituted by any type of field effect transistor (FET) such as a junction type, a parallel type, a serial type and the like.
  • FET field effect transistor
  • the transistor circuit as described above may be constituted by a bipolar transistor.
  • the above-mentioned gate, source and drain correspond to the base, the emitter and the collector, respectively, and the driving transistor 110 'is formed from the bipolar transistor, and the compensation transistor 120' is formed from the bipolar transistor.
  • the transistor circuit 100 may be used.
  • the threshold voltage is around 0.7 V, for example, and its variation is smaller than that of a TFT.
  • the current in the driving transistor 110 ' is small. The effect of variations in voltage characteristics and threshold characteristics on the drive current Id can be compensated for by the compensation transistor 120 '.
  • the driving by the driving transistor 110 can be performed at a relatively low voltage.
  • the degree of similarity between these two transistors generally increases, so that there is almost no variation in current-voltage characteristics and threshold characteristics.
  • Examples of the current control element 500 in the above embodiments include various elements such as a current control light emitting element such as an organic EL element and an inorganic EL element, and a current control type thermal transfer element.
  • FIG. 7 is a block diagram showing the overall configuration of the display panel
  • FIG. 8 is a plan view of one pixel portion of the display panel, which is shown in FIGS. 9 (A), 9 (B) and 9 (B).
  • Figures 9 (C) and 9 (C) are AA, sectional view, B_B, sectional view and C-C, sectional view, respectively
  • Fig. 10 is a circuit diagram of four adjacent pixel sections.
  • the display panel in this embodiment includes a plurality of pixel portions each including the above-described transistor circuit of the present invention and arranged in a matrix.
  • the plurality of pixel portions includes an example of a current-controlled light-emitting element.
  • EL elements 50 are provided respectively.
  • the display panel 200 has a TFT array substrate 1, and a plurality of pixel units 2 are arranged in a matrix on the TFT array substrate 1. And a plurality of data lines 11 extending in the X direction, a plurality of scanning lines 12 extending in the X direction and arranged in the Y direction, and a plurality of data lines 11 extending in the Y direction. And a plurality of common power supply lines 13.
  • the display panel 1 further includes a data line driving circuit 21 for supplying a data signal to each data line 11 around the screen display area, a pair of scanning line driving circuits 22 for supplying a scanning signal to each scanning line 12, and It is provided with an inspection circuit 23 for inspecting a path failure, insulation failure, element defect, etc.
  • each drive circuit is formed on the TFT array substrate 1 in the same process as the pixel portion 2, but may be a circuit not on the TFT array substrate 1, or It may be formed in a step different from that of the pixel portion 2.
  • each pixel section 2 has a driving TFT 110, a compensation TFT 120, a reset TFT 130, a switching TFT 140, and a holding TFT described with reference to FIGS. 1 to 6.
  • a capacity 160 is provided.
  • the former scanning line 12b becomes the wiring for the reset scanning signal Vrscan in FIG. 1
  • the latter scanning line 12a becomes the wiring for the scanning signal Vscan and the wiring for the reset signal Vrsig in FIG.
  • the data line 11a at this stage is a wiring for the input signal V sig (data signal) in FIG.
  • the common power supply line 13 is connected to the positive power supply + V
  • the EL element 50 is connected between the driving TFT 110 and a counter electrode described later
  • the counter electrode is connected to the negative power supply 1 V.
  • the switching TFT 140, the compensation TFT 120, and the storage capacitor 160 are provided on the TFT array substrate 1 along the AA ′ cross section of FIG. Polysilicon film) 4, Gate insulating film 5 consisting of silicon oxide film and silicon nitride film, Ta (tantalum) film 6, First interlayer insulating film 7 consisting of silicon oxide film and silicon nitride film, and A1 film 8 I have. Note that a low-resistance polysilicon film may be formed instead of the Ta film 6 for forming the gate electrode.
  • the switching TFT 140 is a top-gate type TFT having a gate 141 made of a polysilicon film 6, and a semiconductor layer 4 portion opposed to the gate 141 via the gate insulating film 5. It is configured as an N-channel TFT with a source 142 and a drain 143 which are heavily doped with n-type on both sides as a channel forming region.
  • the source 142 is connected to a data line 11a made of the A1 film 8 via a contact hole formed in the gate insulating film 5 and the first interlayer insulating film 7.
  • the drain 143 is connected to the compensation TFT 120 via a contact hole opened in the gate insulating film 5 and the first interlayer insulating film and the A1 film 8.
  • the compensation TFT 120 is a top-gate TFT having a gate 121 formed of a Ta film 6, and a portion of the semiconductor film opposed to the gate 121 via the gate insulating film 5 is formed as a channel forming region. It is configured as a P-channel type TFT having a source 122 and a drain 123 heavily doped with p-type on both sides thereof. Then, the switching TFT 140, the holding capacitor 160, and the gate of the driving TFT 110 are relayed through the contact hole and the A1 film 8 opened in the gate insulating film 5 and the first interlayer insulating film 7. It is connected to the.
  • the storage capacitor 160 is arranged such that the semiconductor film 4, the Ta film 6, and the A1 film 8 are opposed to each other via the gate insulating film 5 and the first interlayer insulating film so as to have a double capacitor configuration. It is configured to be placed.
  • the portion of the semiconductor film 4 that forms the storage capacitor is connected to the A 1 film 8 via a contact hole opened in the gate insulating film 5 and the first interlayer insulating film 7, and the Ta that forms the storage capacitor is formed.
  • the film 6 is connected to the Al film 8 via a contact hole formed in the first interlayer insulating film 7.
  • the resetting TFT 130 is BB, Along the surface, on a TFT array substrate 1, a semiconductor film 4, a gate insulating film 5, a Ta film 6, a first interlayer insulating film 7, and an A1 film 8 are formed.
  • the reset TFT 130 is a top-gate TFT having a gate 131 made of a Ta film 6, and forms a channel in a portion of the semiconductor layer 4 facing the gate 131 through a gate insulating layer 5. It is configured as an N-channel TFT having a source 132 and a drain 133 which are heavily doped with n-type on both sides as the application region. Then, the source 132 and the drain 133 are relayed through the contact hole formed in the gate insulating film 5 and the first interlayer insulating film 7 and the A1 film 8 to form the scanning line 12a and the Each is connected to the gate 111 of the driving TFT 110.
  • the driving TFT 110 has a semiconductor film 4, a gate insulating film 5, and a Ta film 1 on the TFT array substrate 1 along the C—C ′ section of FIG. It is composed of a film 6, a first interlayer insulating film 7, and an A1 film 8. Then, on the second interlayer insulating film 9, an ITO film 51 connected to the drain 113 of the driving TFT 110 via the contact hole and the A1 film 8 is formed, and the EL element 50 is formed thereon. It is formed. On the other hand, the source 112 of the driving TFT 110 is connected to the common power supply line 13 made of the A1 film 8 via a contact hole.
  • the EL elements 50 in the pixel units 2 adjacent to each other are separated by an electrically insulating bank 52.
  • the bank 52 has a light shielding property.
  • the bank 52 may be made of, for example, a light-blocking resist, and the bank 52 may be provided in a peripheral parting area that covers the periphery of the screen display area of the display panel 200.
  • a counter electrode (upper electrode) 56 made of a low-resistance metal such as A1 or ITO is provided on the EL element 50.
  • the display panel 200 has a configuration in which the positive power supply + V is supplied to both the pixel units 2 adjacent to each other in the X direction by the common power supply line 13.
  • the number of power supply wires is reduced to about half compared to the case where power supply wires for V supply are simply provided for each column of the pixel unit 2.
  • the reset scanning signal Vrscan input to the gate 131 of the reset TFT 130 is supplied by the preceding scanning line 12b, and the reset signal Vrsig input to the reset TFT 130 is scanned by this scanning.
  • the number of signal lines is reduced as compared with the case where a line dedicated to the reset scan signal Vrscan or a line dedicated to the reset signal Vrsig is provided.
  • a common power supply line is provided for each pixel to make the pattern the same for each pixel, a wiring dedicated to the reset scanning signal Vrscan, a wiring dedicated to the reset signal Vrsig, and the like. The technical idea of the present invention can be applied to a device provided with wiring.
  • the space occupied by the wiring may be saved to secure a space for forming various TFTs in the pixel portion 2, and the size of each EL element 50 may be reduced. Thereby, a space for forming various TFTs in the pixel portion 2 may be secured.
  • the scanning signal Vscan is supplied from the scanning line drive circuit 22 to the preceding scanning line 12b, this is input to the gate 131 of the resetting TFT 130 of this stage as the reset scanning signal Vrscan of this stage.
  • a reset signal V rsig is supplied from the scanning line drive circuit 22 to the corresponding scanning line 12 a, and the gate voltage Vg of the driving TFT 110 at this stage is set to the potential of the reset signal V rsig. (See Fig. 2 (A)).
  • the reset signal V rsig may be the same as the off potential of the scan signal V scan.
  • a scanning signal Vscan is supplied from the scanning line drive circuit 22 to the scanning line 12a of the stage, this is input to the gate 141 of the switching TFT 140 of the stage.
  • the input signal V sig data overnight signal
  • the data signal V sig is supplied via the switching TFT 140 and the compensation TFT 120.
  • This voltage V sig is reduced by the threshold voltage V th2 of the compensating TFT 120, and the gate V 111 is connected to the gate 111 of the driving TFT 110 of this stage. It is supplied as voltage V g (see Fig. 2 (A)).
  • the conductance between the source 112 and the drain 113 of the driving TFT 110 is controlled in accordance with the stepped-down gate voltage V g, and the positive power supply + V and the negative power supply-V During this period, the drive current Id flowing through the EL element 50 is controlled.
  • the variation of the threshold voltage V thl in the driving TFT 110 provided in each pixel unit 2 is compensated by the threshold V th2 of the compensation TFT 120, and the variation between the plurality of pixel units 2
  • the variation of the threshold value of the overnight signal V sig with respect to the drive current I d hardly fluctuates, and an even image can be displayed with uniform brightness over the entire screen display area of the display panel 200.
  • the driving current Id can be controlled using the data signal V sig of a relatively small voltage by the step-down action of the compensation TFT F 120.
  • the gate voltage V g is reset by the reset TFT 130 before the supply of the input signal V sig. For example, during a still image display period, the gate voltage V g is reset by the same input signal V sig. Since the drive current Id may be controlled over a plurality of frames, it is not necessary to perform such a reset operation for each scan. In addition, the gate voltage V g is reset by light irradiation instead of the electrical reset signal V rsig as described above.
  • the reset signal V rsig may be supplied via the switching TFT 140 or the compensation TFT 120 instead of the reset TFT 130.
  • switching is not performed, such as active matrix driving, it is needless to say that the switching operation is not required for the TFT140 switching operation.
  • FIG. 11 An embodiment of an electronic device including the display panel 200 described in detail above will be described with reference to FIGS. 11 to 13.
  • FIG. 11 An embodiment of an electronic device including the display panel 200 described in detail above will be described with reference to FIGS. 11 to 13.
  • FIG. 11 shows a schematic configuration of an electronic device including the display panel 200 as described above.
  • the electronic device includes a display information output source 1000, a display information processing circuit 1002, a drive circuit 1004, a display panel 1006, a clock generation circuit 1108, and It is configured to include a power supply circuit 110.
  • the display panel 200 in the embodiment described above corresponds to the display panel 106 and the driver circuit 104 in the present embodiment. Therefore, the driver circuit 104 may be mounted on the TFT array substrate constituting the display panel 106, and the display information processing circuit 1002 may be mounted thereon. Alternatively, the driving circuit 1004 may be externally attached to a TFT array substrate on which the display panel 1006 is mounted.
  • the display information output source 100 00 includes a ROM (Read Only Memory), a RAM (Random Access Memory), a memory such as an optical disk device, a tuning circuit for tuning and outputting a TV signal, and the like.
  • display information such as an image signal in a predetermined format is output to the display information processing circuit 102.
  • the display information processing circuit 1002 includes various known processing circuits such as an amplification / polarity inversion circuit, a phase expansion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and is configured based on a clock signal. Digital signals are sequentially generated from the input display information and output to the drive circuit 104 together with the clock signal CL.
  • the driving circuit 100 4 drives the display panel 200.
  • the power supply circuit 110 supplies a predetermined power to each of the circuits described above.
  • FIGS. 12 to 13 show specific examples of the electronic device configured as described above.
  • a laptop personal computer (PC) 1200 compatible with multimedia which is another example of electronic equipment, has the above-described display panel 200 provided in a top cover case 126. And a main body 124 containing a CPU, a memory, a modem, and the like, and having a keyboard 122 built therein.
  • IC 132 including the circuit 1002 is mounted on a tape carrier package (TCP) 132 mounted on polyimide tape 1322, and anisotropically mounted on the periphery of the TFT array substrate 1. It is also possible to physically, electrically connect via a conductive film to produce, sell, use, etc. as a display panel.
  • TCP tape carrier package
  • the brightness is increased over the entire surface of the display panel.
  • Various electronic devices can be realized which have less unevenness and can be driven at a relatively low voltage.
  • the gate voltage can be reduced or boosted with respect to the voltage of the input signal by the threshold voltage of the compensating transistor. Therefore, the conductance in the driving transistor can be reduced by the low input signal voltage. Control can be performed. Further, by making the threshold characteristics and the voltage-current characteristics of the compensation transistor and the driving transistor close to each other, it becomes possible to make the threshold voltage of the input signal with respect to the driving current close to zero. Furthermore, when a plurality of transistor circuits are formed using a plurality of driving transistors having different threshold characteristics, a plurality of driving transistors having different threshold voltages, that is, a large variation from the design reference value. Even if a plurality of driving transistors each having the threshold voltage are used, it is possible to obtain a plurality of transistor circuits with little or no variation in the threshold voltage among the plurality of transistor circuits.
  • image display with reduced brightness unevenness can be realized using a low-voltage input signal.
  • a display panel capable of displaying an image with reduced brightness unevenness using the transistor circuit of the present invention can be obtained.
  • a display panel is a laptop personal computer (PC), a television, a viewfinder type or a monitor direct-view type video tape recorder, a power navigation device, an electronic organizer, etc., which require high-quality image display. It can be suitably used for electronic devices such as calculators, word processors, engineering workstations (EWS), mobile phones, videophones, point-of-sale terminals, pagers, and devices with a touch panel.
  • PC personal computer
  • EWS engineering workstations
  • mobile phones videophones, point-of-sale terminals, pagers, and devices with a touch panel.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
PCT/JP1999/001342 1998-03-18 1999-03-17 Circuit a transistors, panneau d'affichage et appareil electrique Ceased WO1999048078A1 (fr)

Priority Applications (10)

Application Number Priority Date Filing Date Title
KR10-1999-7010600A KR100533450B1 (ko) 1998-03-18 1999-03-17 트랜지스터 회로, 표시 패널 및 전자기기
KR1020037016789A KR100545884B1 (ko) 1998-03-18 1999-03-17 트랜지스터 회로, 표시 패널 및 전자 기기
US09/424,043 US6362798B1 (en) 1998-03-18 1999-03-17 Transistor circuit, display panel and electronic apparatus
EP99909217A EP1003150B1 (en) 1998-03-18 1999-03-17 Transistor circuit, display panel and electronic apparatus
DE69926972T DE69926972T2 (de) 1998-03-18 1999-03-17 Transistorschaltung, anzeigepaneel und elektronisches gerät
US10/384,756 US7173584B2 (en) 1998-03-18 2003-03-11 Transistor circuit, display panel and electronic apparatus
US11/490,239 US8576144B2 (en) 1998-03-18 2006-07-21 Transistor circuit, display panel and electronic apparatus
US12/222,639 US20080316152A1 (en) 1998-03-18 2008-08-13 Transistor circuit, display panel and electronic apparatus
US13/018,749 US20110122124A1 (en) 1998-03-18 2011-02-01 Transistor circuit, display panel and electronic apparatus
US14/743,483 US20150287363A1 (en) 1998-03-18 2015-06-18 Transistor circuit, display panel and electronic apparatus

Applications Claiming Priority (2)

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JP06914798A JP3629939B2 (ja) 1998-03-18 1998-03-18 トランジスタ回路、表示パネル及び電子機器
JP10/69147 1998-03-18

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US09/424,043 A-371-Of-International US6362798B1 (en) 1998-03-18 1999-03-17 Transistor circuit, display panel and electronic apparatus
US10/067,763 Division US20020070913A1 (en) 1998-03-18 2002-02-08 Transistor circuit, display panel and electronic apparatus

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CN (4) CN1151482C (https=)
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DE69926972T2 (de) 2006-03-09
US20020070913A1 (en) 2002-06-13
US20080316152A1 (en) 2008-12-25
CN1516090A (zh) 2004-07-28
EP1003150A4 (en) 2004-04-14
CN100592356C (zh) 2010-02-24
CN1909039A (zh) 2007-02-07
US20150287363A1 (en) 2015-10-08
US8576144B2 (en) 2013-11-05
EP2280389B1 (en) 2013-03-13
CN1937019A (zh) 2007-03-28
EP1594116A2 (en) 2005-11-09
JP3629939B2 (ja) 2005-03-16
KR100545884B1 (ko) 2006-01-25
EP1594116A3 (en) 2006-09-20
US20060256047A1 (en) 2006-11-16
EP1003150B1 (en) 2005-08-31
EP2237256B1 (en) 2013-01-02
CN100538796C (zh) 2009-09-09
KR100533450B1 (ko) 2005-12-06
JPH11272233A (ja) 1999-10-08
EP2237256A2 (en) 2010-10-06
CN1258367A (zh) 2000-06-28
TW447137B (en) 2001-07-21
US20030169218A1 (en) 2003-09-11
EP1003150A1 (en) 2000-05-24
CN100524422C (zh) 2009-08-05
US20110122124A1 (en) 2011-05-26
DE69926972D1 (de) 2005-10-06
CN1151482C (zh) 2004-05-26
EP2237256A3 (en) 2010-10-20
US7173584B2 (en) 2007-02-06
KR20040007750A (ko) 2004-01-24
EP2280389A1 (en) 2011-02-02
KR20010012639A (ko) 2001-02-26
US6362798B1 (en) 2002-03-26

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