WO1999039401A1 - Time-delay device - Google Patents

Time-delay device Download PDF

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Publication number
WO1999039401A1
WO1999039401A1 PCT/US1999/001836 US9901836W WO9939401A1 WO 1999039401 A1 WO1999039401 A1 WO 1999039401A1 US 9901836 W US9901836 W US 9901836W WO 9939401 A1 WO9939401 A1 WO 9939401A1
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WO
WIPO (PCT)
Prior art keywords
delay
time
connected
switch
state
Prior art date
Application number
PCT/US1999/001836
Other languages
French (fr)
Inventor
Paul E. Bauhahn
Original Assignee
Honeywell Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US1621798A priority Critical
Priority to US09/016,217 priority
Application filed by Honeywell Inc. filed Critical Honeywell Inc.
Publication of WO1999039401A1 publication Critical patent/WO1999039401A1/en

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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/18Phase-shifters
    • H01P1/185Phase-shifters using a diode or a gas filled discharge tube

Abstract

A delay cell having a quadrature coupler having an input, an output, and two ports. Two high isolation varactors or other types of switches are connected to the two ports of the coupler. Connected to each of the switches is a transmission line stub for providing a time-delay to a signal propagating through the delay cell. The varactor switches may be micromachined electro-mechanical switches of which each has a low series capacitance when open and a high series capacitance when closed. The switches connect the transmission line stubs to the coupler when it is determined to delay the signal propagating through the coupler. If the switches are open, then such delay is not imposed on the signal. Numerous delay cells may be connected together to provide a selective choice of various delays upon the signal. A typical bandwidth of this time-delay device is from 40 to 60 GHz. Such delay cells may be monolithically fabricated on a chip. These delay cells may be put together to form a phased array antenna.

Description

-1-

TIME-DELAY DEVICE BACKGROUND

The invention is related to phase-shifting or time delay devices and particularly to micromachined monolithic phase shifters. More particularly, the invention pertains to such phase shifters having low insertion losses and broad band width.

Related art phase shifters have phase shifting that varies with frequency. They have poor isolation and higher insertion losses.

The U.S. Government may have certain rights in the subject invention.

SUMMARY OF THE INVENTION

The present invention includes a quadrature coupler having an input, .an output, .and two ports connected to varactor switches that connect, as determined, the two ports respectively to transmission lines of specific lengths. This assembly, consists of a phase shifter cell. Several cells may be connected to each other to provide a selectable time or phase delay. The coupler, for instance, may be a Lange or a branch-line coupler that splits the incoming signal into two ports, one of which is delayed by a nominal ninety degrees. The signals are coupled through the respective varactor switches to transmission line stubs. The signals are reflected from open circuits at the ends of the stubs and are recombined by the coupler and provided at the output of the coupler. Control over the delay is controlled by the varactor switches. The switches are micro- electrical-mechanical structure (MEMS) devices. This time delay device or cell has low insertion loss and high isolation which results in very wide bandwidth time delay operation. A practical bandwidth for the device is more than an octave for frequencies from 10 to 100 GHz and for one realization it is 40 to 80 GHz. The insertion loss for the delay states of the cell does not include the losses directly associated with the switched capacitance but such losses are typically only 0.5 dB per cell or bit. Solid state devices, e.g., having FET's instead of the varactor switches, have parasitic capacitances and series resistances that are much higher than that for the present invention. The insertion loss of the present device is about 6 dB less than FET phase shifters. The solid state device would typically have a narrow bandwidth of about 3 to 4 GHz. -2-

BRIEF DESCRIPTION OF THE DRAWING

Figure 1 reveals a basic time delay cell of the invention. Figure 2 illustrates a five-bit time delay device. Figure 3a, 3b and 3c show example switches. Figures 4a, 4b, 4c, 4d, 4e, 4f and 4g show an outline of fabrication of a micromachined varactor switch.

DESCRIPTION OF THE EMBODIMENT

Figure 1 is a schematic that shows the basic layout of a time delay device 10. An input signal 11 is inserted at which enters an input 12 of a first leg 14 of a Lange quadrature coupler 15. A signal 16 exits at port 17 of leg 14 and a signal 18 exits at port 18 of a second leg 20 of coupler 15. Coupler 15 is a 3 dB coupler in that signal 11 is effectively split into two signals of the same magnitude. Varactor switches 21 and 22 are variable capacitors which have two states of capacitances— high and low. At the high capacitance, switches 21 and 22 are effectively closed for purpose of conducting high frequency signals 16 and 18, and at low capacitances, switches 21 and 22 are effectively open and block signals 21 and 22. Switches 21 and 22 are connected to transmission lines 23 and 24, respectively. When switch 21 is closed, signal 16, which is in phase relative to the import signal, propagates from port 17 through switch 21 into transmission line stub 23. Simultaneously, signal 18, which is shifted ninety degrees out of phase relative to input signal 11, propagates from port 18 through closed switch 22 into transmission line stub 24. Both signals 16 and 18 are reflected from the open at the ends of lines 23 and 24, respectively, out of lines 23 and 24 through switches 21 and 22, respectively. Reflected signal 16 enters port 17 of leg 13 and is phase shifted ninety degrees when it is coupled to, enters leg 20 and is output at port 25. Reflected signal 18 enters port 19 of leg 20 and keeps the same phase as it is output at port 25. Both signals 16 and 19 are in phase at port 25 and are recombined as output signal 26 of device 10. Output signal 26 has a delay relative to input signal 11, and such delay is determined by the lengths and terminations of transmission line stubs 23 and 24. Signal 26 is delayed by an amount which is approximately equal to twice the time required for signals 17 and

18 to transmit or travel the lengths of stubs 23 and 24, respectively, after the switchable varactors 21 and 22. -3-

A multiple cell or bit device may be utilized. A five-bit device 30 is shown in Figure 2. Each bit of device 30 is a cell or device 10 as shown in Figure 1. Each cell or bit has a set of open-circuit transmission-line stubs that are of a particular length for a desired delay of the signal in the respective cell. First cell or bit 10 of Figure 2 has stubs 23 and 24, each of which has a length that causes, if switches 21 and 22 are closed, about one-half of a pico second delay of the signal going through cell 10. This time delay is equivalent of a 11.25 degree phase delay of signal 11 at 60 GHz. A second cell or bit 29 has stubs 27 and 28 that have lengths so as to cause about a one pico second delay of a signal going from port 12 to port 25. This delay is equivalent to a 22.5 degree phase delay of a 60 GHz signal. A third cell or bit 31 has stubs 32 and 33 that have lengths which cause about a two pico second delay which is equivalent to a 45 degree phase delay of a 60 GHz signal. Fourth and fifth cells 34 and 35 have pairs of stubs 36 and 37, and 38 and 39, that have lengths which cause approximately four and eight pico second delays, respectively, which are equivalent to 90 and 180 degree phase delays of a 60 GHz signal. The noted delays for the various cells or bits take place only when switches 21 and 22 are closed. If switches 21 and 22 are open, then the respective delays will not be effected by the cells or bits. The 180, 90, 45, 22.5 and 11.25 degree shifts are true time delay phase shifts. The time delays do not vary with frequency change because of good isolation as the solid-state switched prior art devices do because their poor isolation. By selective closing of switches 21 and 22 for a certain cell or cells, a particular delay can be effected. Device 30 itself has a propagation delay of several pico seconds which is constant. The latter delay is of no consequence because it does not vary and is not varied. A group of five-bit delay devices 30 or other multiple- bit devices may be used in phased-array antennas. Each of switches 21 and 22 may be a micromachined micro-electro-mechanical varactor switch 40, 50 or 60 of Figure 3a, 3b or 3c, respectively.

In Figure 3 a, a signal 16 or 18 may enter switch 40 at terminal 41 or 42. Assuming a signal 17 is coupled to metal electrode 43 via capacitor 44, terminal 42 would be connected to a transmission line stub. Formed on electrode 43 is dielectric 45. Formed on dielectric 46 is a metal cantilever beam electrode 47. Electrode 43 is likewise formed on dielectric 46. Dielectric 46 is formed on a substrate 51. Another coupling capacitor is connected to electrode 47. One or both coupling capacitors 44 -4-

may or may not be required. A switchable or variable control voltage source 48 is connected to electrodes 43 and 47 via isolation resistor 49. When the voltage of source 48 is increased in magnitude, an electrostatic force is developed and an attraction between electrodes 43 and 47 occurs, resulting in cantilever beam electrode 47 bending to contact dielectric 45. The magnitude of increased voltage is about 10 volts. The capacitance between electrodes 43 and 47 drastically increases and conduction of signal 17 from electrode 43 to electrode 47 occurs. A typical frequency of signal 17 is greater than 20 GHz. When the voltage of source 48 is sufficiently decreased in magnitude, the electrostatic force decreases between electrodes 43 and 47 and cantilever beam electrode 47 springs back to its original position away from dielectric 45. This position of electrode 47 results in drastically reduced capacitance between electrodes 43 and 47 and prevents the conduction of signal 17 from electrode 43 to electrode 47.

Figure 3b shows a switch 50 designed for the conduction of signal 17 having a frequency down to 5 GH. Switch 50 is similar to switch 40, except that no dielectric is formed on electrode 43 and thus direct rather than capacitive contact results between electrodes 43 .and 47. Further, there is an isolated electrode 52 that is covered with a dielectric 54. Electrode 52 is connected to voltage source 48 via isolation resistor 53. Electrode 43 is connected to the same polarity of voltage source 48 as electrode 52. When the magnitude of voltage source 48 is increased, then an electrostatic force between metal cantilever beam electrode 47 and electrodes 43 and 52 becomes sufficient to bend beam electrode 47, so as to contact electrode 43 and to permit direct conduction of signal 17 from electrode 43 to electrode 47. Electrode 52 merely aids in moving beam 47 towards electrode 43. Decreasing the voltage magnitude of source 48 results in an open switch 50. Switch 60 of figure 3c is designed for nearly any frequency, including DC. No coupling capacitors 44 are present or needed in configuration 60. Cantilever electrode 56 and electrode 52 are only for opening and closing switch 60 with electrostatic force. Electrode 52 is covered with dielectric 54. Electrodes 52 and 56 are not used for the conduction of signal 17. Signal 17 goes to electrode 43 via terminal 41. Electrode 58 is connected to a transmission line stub via terminal 42. Electrodes 43 and 58 are formed on dielectric 46 which in turn is formed on substrate 51. Instead of a metal cantilever beam, switch 60 has a dielectric cantilever beam 55. Electrode 56 is formed in beam 55 -5-

and pulls beam 55 from its original position in accordance with electrostatic force formed between electrodes 52 and 56 if sufficient voltage is applied to the latter electrodes. Dielectric beam 55 also has formed in it a metal strip 57 that is positioned over electrodes 43 and 58. When beam 55 is pulled from its original position by the electrostatic force of electrodes 52 and 56, metal strip 57 contacts electrodes 43 and 58 so as to close switch 60 wherein signal 17 goes from electrode 43 through bridging strips 57 and to electrode 58. Signal 17 then goes to terminal 42 and a transmission line stub. When the voltage to electrodes 52 and 56 is reduced, beam 55 returns to its original position and shorting strip 57 is removed from contacts or electrodes 43 and 58 thereby resulting in an open switch 60.

Varactor switch 40 is a micromachined device which is fabricated typically in accordance with a brief summary to steps shown in Figures 4a-4g. One starts with a substrate in Figure 4a. A dielectric layer 46 is formed on substrate 51, as shown in Figure 4b. A first metal is formed and etched to result in metals 43 and 61 on dielectric 46 in Figure 4c. Figure 4d shows the forming of a dielectric layer 45 on metals 43 and

61 and a portion of dielectric 46. Layer 45 is etched in figure 4e. In figure 4f, a sacrificial layer 62 is formed and etched, and a second metal 47 is formed on sacrificial layer 62, and on metals 43 and 61. Metal 47 is etched and sacrificial material 62 is removed to result in a basic varactor switch 40 in Figure 4g. Substrate 51 may be silicon. Dielectric materials 45 and 46 may be silicon nitride (Si3N4) or silicon dioxide (SiO2). The sacrificial layer material 62 may be polymide. Metals 43, 47 and 61 may be tungsten. Metals 43 and 61 may be about 0.5 micron thick. The cantilevered beam 47 or 55 may be 100 to 300 microns long and about 0.5 to two microns thick. The spacing between the beam 47 or 55 and dielectric 45 or metal contact 43, 57 or 58 without the application of electrostatic force is typically two to four microns.

Claims

-6-THE CLAIMS
1. A time-delay network comprising: a quadrature coupler having an input and an output; a first high isolation switch having a first terminal connected to a first port of said quadrature coupler; a second high isolation switch having a first terminal connected to a second port of said quadrature coupler; a first time delay stub connected to a second terminal of said first isolation switch; and a second time delay stub connected to a second terminal of said second isolation switch.
2. The time-delay network of claim 1 wherein: said first high isolation switch is a first micro-electro-mechanical switch; and said second high isolation switch is a second micro-electro-mechanical switch.
3. The time-delay network of claim 1 wherein: said first high isolation switch is a first varactor switch; and said second high isolation switch is a second varactor switch.
4. The time-delay network of claim 3 wherein each of said first and second varactor switches is a switch that has a first state of low capacitance and a second state of high capacitance, and can be switched as needed from one state to the other state.
5. The time-delay network of claim 3 wherein said quadrature coupler is a Lange coupler.
6. The time-delay network of claim 3 wherein said quadrature coupler is a branch- line coupler. -7-
7. The time-delay network of claim 2 wherein each of said first and second high isolation switches is a switch that has a first state of high impedance and a second state of low impedance, and can be switched as needed from one state to the other state.
8. The time-delay network of claim 4 wherein said first and second time delay stubs are transmission lines, each line having a length selected to provide a particular time delay of a signal that enters and is reflected by the transmission line.
9. The time-delay network of claim 7 wherein each of said first and second high isolation switches has a capacitor connected in series with it.
10. The time-delay network of claim 2 wherein said quadrature coupler is a 3dB coupler.
11. A time-delay network comprising: a plurality of time-delay cells connected in series; and wherein each of said plurality of time delay cells comprises: a quadrature coupler; a first high isolation switch connected to said quadrature coupler; a second high isolation switch connected to said quadrature coupler; a first transmission line connected to said first high isolation switch; and a second transmission line connected to said second high isolation switch.
12. The time-delay network of claim 11 wherein each of said first and second high isolation switches is a varactor switch.
13. The time-delay network of claim 12 wherein the varactor switch is a micromachined micro-electro-mechanical switch. -8-
14. The time-delay network of claim 13 wherein: the varactor switch has a first state of low capacitance and a second state of high capacitance, and can be switched as needed from one state to the other state; and the first state is essentially an open circuit; and the second state is essentially a closed circuit.
15. The time-delay network of claim 14 wherein said quadrature coupler is a 3dB coupler.
16. The time-delay network of claim 15 wherein said quadrature coupler is a Lange coupler.
17. The time-delay network of claim 15 wherein said quadrature coupler is a branch- line coupler.
18. The time-delay network of claim 17 wherein said first and second transmission lines of each cell of said plurality of time-delay cells have lengths selected for providing particular time delays of a signal that enters said first and second transmission lines of each cell.
19. The time-delay network of claim 18 wherein said first and second high isolation switches of each cell of said plurality of time-delay cells, connect or disconnect said first and second transmission lines in order to delay or not delay a signal conveyed by each cell of said plurality of time-delay cells.
20. A time-delay network comprising: a first time-delay cell comprising: a quadrature coupler having an input port, a first delay port, a second delay port and an output port; a first high isolation switch connected to the first delay port; a second high isolation switch connected to the second delay port; -9- a first time-delay device connected to said first high isolation switch; and a second time-delay device connected to said second high isolation switch; and a second time-delay cell comprising: a quadrature coupler having an input connected to the output port of said quadrature coupler of said first time-delay cell, a first delay port, a second delay port and an output; a first high isolation switch connected to the first delay port; a second high isolation switch connected to the second delay port; a first time-delay device connected to said first high isolation switch; and a second time-delay device connected to said second high isolation switch.
21. The time delay network of claim 20 further comprising: a first time-delay control device connected to said first and second high isolation switches of said first time delay cell; and a second time-delay control device connected to said first and second high isolation switches of said second time delay cell; and wherein various delays provided by said first and second delay cells can be selected via said first and second time-delay control devices.
22. The time-delay network of claim 21 further comprising at least one additional time-delay cell comprising: a quadrature coupler having an input port, a first delay port, a second delay port, and an output port; a first high isolation switch connected to the first delay port; a second high isolation switch connected to the second delay port; a first time-delay device connected to said first high resolution switch; and a second time-delay device connected to said second high resolution switch.
23. The time-delay network of claim 22 wherein said first, second and at least one additional time-delay cells are arranged as at least a portion of a phased array antenna. -10-
24. The time-delay network of claim 23 wherein: said first high isolation switches are varactor switches; said second high isolation switches are varactor switches; said first time-delay devices are transmission lines; and said second time-delay devices are transmission lines.
25. The time-delay network of claim 24 wherein said quadrature couplers are Lange couplers.
26. The time-delay network wherein said network is of a monolithic device.
27. A time-delay network comprising: coupling means for splitting an input signal into first and second signals having a phase difference of about ninety degrees; first switching means, connected to said coupling means, for selectively conducting the first signal; second switching means, connected to said coupling means, for selectively conducting the second signal; first delay means, connected to said first switching means, for delaying the first signal; and second delay means, connected to said second switching means, for delaying the second signal.
28. The time-delay network of claim 27 wherein said coupling means further is for combining the first and second signals into an output signal.
29. The time-delay network of claim 28 wherein: said first switching means has a first state of low impedance and a second state of high impedance, and can be affected to select the first state or the second state; and -11- said second switching means has a first state of low impedance and a second state of high impedance, and can be affected to select the first state or the second state.
30. A method for time-delaying of signals comprising: splitting an input signal into first and second signals having a phase difference of about ninety degrees; selectively conducting the first signal; selectively conducting the second signal; time delaying the first signal if selectively conducted; time delaying the second signal if selectively conducted; phase-shifting the time-delayed first or second signal so that the first and second signals are approximately in phase; and combining the first and second signals into an output signal.
PCT/US1999/001836 1998-01-30 1999-01-29 Time-delay device WO1999039401A1 (en)

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US1621798A true 1998-01-30 1998-01-30
US09/016,217 1998-01-30

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011017829A1 (en) * 2009-08-10 2011-02-17 Mediatek Inc. Phase shifter and related load device with linearization technique employed therein

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JPH07226601A (en) * 1994-02-15 1995-08-22 Hitachi Ltd Phase shifter
EP0709911A2 (en) * 1994-10-31 1996-05-01 Texas Instruments Incorporated Improved switches
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JPH07226601A (en) * 1994-02-15 1995-08-22 Hitachi Ltd Phase shifter
EP0709911A2 (en) * 1994-10-31 1996-05-01 Texas Instruments Incorporated Improved switches
JPH09232802A (en) * 1996-02-21 1997-09-05 Nec Corp Hybrid reflection phase device

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Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011017829A1 (en) * 2009-08-10 2011-02-17 Mediatek Inc. Phase shifter and related load device with linearization technique employed therein
US9231549B2 (en) 2009-08-10 2016-01-05 Mediatek Inc. Phase shifter and and related load device

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