WO1999029037A1 - High frequency power amplifying circuit, and mobile communication apparatus using it - Google Patents

High frequency power amplifying circuit, and mobile communication apparatus using it Download PDF

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Publication number
WO1999029037A1
WO1999029037A1 PCT/JP1997/004356 JP9704356W WO9929037A1 WO 1999029037 A1 WO1999029037 A1 WO 1999029037A1 JP 9704356 W JP9704356 W JP 9704356W WO 9929037 A1 WO9929037 A1 WO 9929037A1
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WO
WIPO (PCT)
Prior art keywords
output
frequency power
amplifying
power
power amplifier
Prior art date
Application number
PCT/JP1997/004356
Other languages
French (fr)
Japanese (ja)
Inventor
Yasuhiro Nunogawa
Tetsuaki Adachi
Original Assignee
Hitachi, Ltd.
Hitachi Toubu Semiconductor, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd., Hitachi Toubu Semiconductor, Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP1997/004356 priority Critical patent/WO1999029037A1/en
Publication of WO1999029037A1 publication Critical patent/WO1999029037A1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/60Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
    • H03F3/602Combinations of several amplifiers
    • H03F3/604Combinations of several amplifiers using FET's
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216Continuous control
    • H03F1/0233Continuous control by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers

Definitions

  • the present invention relates to a high-frequency power amplifier circuit and a mobile communication device using the same, and relates mainly to a battery-driven high-frequency power amplifier circuit and an effective technique used for controlling high-frequency power in a mobile communication device using the same. is there. Background art
  • a power coupler as high-frequency power detection for transmission power control
  • those that sense the power supply current of a high-frequency power amplifier circuit since a part of the transmission wave is extracted and detected, the insertion loss is 0.2 to 0.3 dB, and the transmission efficiency is deteriorated.
  • a resistor for sensing is inserted in series in the power supply line of the high-frequency power amplifier circuit. The usage efficiency deteriorates and the battery life is shortened.
  • the output power is small, and in that area, the sense output power is reduced, resulting in a high output, and the low power control with high accuracy cannot be performed. There is also a problem.
  • An object of the present invention is to provide a low-frequency amplifier circuit capable of detecting power with high accuracy by using the same and a mobile communication device using the same.
  • Another object of the present invention is to provide a high-frequency amplifier circuit capable of operating up to a low voltage and a mobile communication device using the same.
  • the present invention uses a first amplifying element and a second amplifying element having the same structure as the above-mentioned first amplifying element and having a small element size of 1 ZM, and from a power control circuit.
  • the same bias voltage is supplied to the first amplification element and the second amplification element, and the power output of the first amplification element is determined based on the output current output from the output terminal of the second amplification element. judge.
  • FIG. 1 is a main block diagram showing an embodiment of a mobile communication device using the high-frequency power amplifier circuit according to the present invention
  • FIG. 2 is a basic circuit diagram showing one embodiment of the high-frequency power amplifier circuit according to the present invention
  • FIG. 3 is a basic circuit diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention.
  • FIG. 4 is a characteristic diagram showing a relationship between output power and detection current for explaining an example of the operation of the high-frequency power amplifier circuit according to the present invention
  • FIG. 5 is a characteristic diagram illustrating a relationship between output power and a detection current for explaining another example of the operation of the high-frequency power amplifier circuit according to the present invention.
  • FIG. 14 shows another embodiment of the amplifier circuit.
  • FIG. 7 is a circuit diagram, FIG. 7 is a basic configuration diagram showing one embodiment of a high-frequency power amplifier circuit according to the present invention,
  • FIG. 8 is a circuit diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention.
  • FIG. 9 is a circuit diagram showing another embodiment of the high frequency power amplifier circuit according to the present invention.
  • FIG. 10 is a characteristic diagram showing a relationship between output power and detected current for explaining an example of the operation of the high-frequency power amplifier circuit according to the present invention.
  • FIG. 11 is a circuit diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention.
  • FIG. 12 is a block diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention.
  • FIG. 13 is an overall block diagram showing one embodiment of a mobile communication device using the high-frequency power amplifier circuit according to the present invention.
  • FIG. 1 is a block diagram of a main part showing an embodiment of a mobile communication device using a high-frequency power amplifier circuit according to the present invention.
  • the power source of the mobile communication device is not particularly limited, but a lithium ion battery is used.
  • a lithium ion battery is used.
  • the voltage of a lithium ion battery is a small voltage such as 3.6 V, it is necessary to obtain a required high-frequency power amplification output at such a low voltage and to minimize the power consumption thereof.
  • a sense circuit for high-frequency power output is a small voltage such as 3.6 V.
  • the input signal Pin is supplied to the input terminal of the input stage amplifier (1).
  • a power distribution circuit (2) is provided at the output of the input stage amplifier (1).
  • the power distribution circuit (2) distributes the output signal of the input stage amplifier (1) and distributes power to a plurality of output stage amplifiers (3-1) to (3-N), Perform impedance matching.
  • the output terminals of the output stage amplifiers (3-1) and (3-N) are transmitted to the output matching circuit (6).
  • the output matching circuit (6) also has a function of synthesizing the output signals of the output stage amplifiers (3-1) to (3-N).
  • the output signal of the output matching circuit (6) passes through an antenna through a duplexer (7) and is output as a radio signal.
  • the gain control circuit 4 generates a bias voltage for controlling the gain of the above-mentioned human-stage amplifier (1) and the above-mentioned output-stage amplifiers (3-1) to (3-N).
  • An input signal input from the antenna is taken into the receiving circuit (10) through the duplexer (7).
  • the received signal includes a control signal indicating the electric field strength of the radio signal from the base station, in addition to the signal from the communication partner.
  • the receiving circuit (10) decodes the control signal and forms corresponding power control signals (1) to (N) to form power control amplifiers (8-1) to (8-N). ) To tell.
  • each of the output stage amplifiers (3-1) to (3-N) has a size such as 1ZM for the amplifying element forming the output signal Pout.
  • a power sense element consisting of a small amplifying element is provided, and its input has an output gain control. The bias voltage for performing the above is transmitted.
  • the output signal from the power sense element is synthesized by the detection current synthesis circuit (5), and the synthesized signal is transmitted to the power control amplifiers (8-1) to (8-N) as a power sense output. .
  • the input-stage amplifier (1) and the output-stage amplifier (3-1) No-pass (3-N) consist of an amplifying MOSFET whose gate is input and whose source is grounded as described later, and an output signal is obtained from the drain. Things.
  • the input-stage amplifier (1) and the output-stage amplifiers (3-1) to (3-N) perform a class AB amplification operation.
  • the transconductance gm is increased. It operates as a variable gain amplifier that increases the gain.
  • the above-mentioned MOSFET is used to mean a metal-insulating film-semiconductor (MIS) FET in addition to a metal monoxide film-semiconductor field effect transistor.
  • MIS metal-insulating film-semiconductor
  • the gate electrodes of MOS FETs and MISFETs include not only metal but also conductive polycrystalline silicon, and have a structure that performs high-frequency operation.
  • This embodiment is a case of a GSM (Global System for Mobile Communication) system.
  • GSM Global System for Mobile Communication
  • this GSM system is a European common system for digital mobile phones, uses TDMA (time division multiplexing access) technology and FDD (frequency division bidirectional) technology, and has a carrier frequency of 900 MHz.
  • GMSK Gausian filtered minimum shift keying
  • the distance between base stations can be up to 10 miles (approximately 16 km), so the mobile phone must control the output to a height of 13 dBm to 43 dBm in 2 dB steps.
  • the output control method of the GSM system always controls the transmission output of the mobile phone. In other words, The mobile telephone controls output according to a control signal periodically sent from the base station.
  • one of the power control signals (1) to (N) is selected by the output control circuit included in the receiving circuit (10) as the control signal received through the antenna.
  • the power control signal has a pulse duty corresponding to the above-described time division, and is a pulse signal in which the peak value of the pulse becomes a voltage corresponding to the output power.
  • the rising and falling slopes of the pulse are controlled so as not to be steep.
  • a digital Z-to-analog conversion circuit is used to control the rising and falling slopes so that the rising and falling edges are controlled in accordance with the clock signal.
  • the power control amplifiers (8-1) to (8-N) are supplied with the power control signal as described above to one of them, and form a bias voltage so that the power control signal and the power sense output are matched. Then, the output power Pout of one output stage amplifier (3) operated as described above is controlled, and 0 0
  • the power control signal (2) rises due to the above-described slope and becomes a constant voltage corresponding to the peak power, and after the transmission time by the above-mentioned time division, falls by the same slope. Since the bias voltage changes so that the power control signal (2) and the sense output become the same, not only the peak power but also the rise and fall slopes of the transmission output can be controlled with high accuracy. .
  • the control signal from the base station specifies a small output range or a large output range
  • the power control signal (1) or (3) is formed and only the power control amplifier (8-1) or (8-3) is used. And the others are inactive. In this way, by selectively using the three output stage amplifiers, it is possible to obtain high output efficiency and high-sensitivity sense output.
  • FIG. 2 is a circuit diagram showing one embodiment of the output stage amplifier according to the present invention.
  • the output stage amplifier consists of an output MOSFET (T1) and a sense MOSFET (T2) reduced to 1 / M size.
  • the MOSFETs (T1) and (T2) are supplied with a ground potential at their sources, and supplied with a bias voltage from the gain control circuit (4) through resistors R1 and R2.
  • the signal component is supplied to the output MOSFET (T1) gate through the distribution circuit (2) and the coupling capacitor C1.
  • the gain of the MOSFET (T 1) is determined by the transconductance gm corresponding to the DC bias voltage supplied to its gate. Therefore, by providing a sensing MOSFET (T2) to which the same bias voltage is applied, the output MOSFET (T A sense output of 1 ZM can be obtained for the output power of T 1).
  • the sense output can be set corresponding to the above 1 / M, if the maximum output power of the output MOSFET (T 1) is relatively small, the above 1ZM should be increased (M should be reduced) and the output MOSF should be reduced. If the maximum output power of ET (T1) is relatively large, the above 1ZM can be reduced (increased M) to obtain a high-sensitivity sense output that is optimal for circuit control corresponding to the required output power. be able to.
  • FIG. 3 shows a circuit diagram of another embodiment of the output stage amplifier according to the present invention.
  • two output stage circuits are used to extend the output range.
  • the output power range is divided into about two, and the output MOSFET (T 1) is formed by a relatively small-sized MOSFET so as to cover a region where the output power is small.
  • the output MOSFET (T3) has a relatively large size so as to cover a region where the output power is large.
  • a sense MOSFET (T2) is provided for the output MOSFET (T 1)
  • a sense MOSFET (T4) is provided for the output MOSFET (T3). That is, the output MOSFET and the sense MOSFET are provided in one-to-one correspondence.
  • the bias voltage from the power control circuit (4) is supplied to the gates of the output MOSFET (T1) and the sense MOSFET (T2) through resistors R1 and R2. Similarly, the gates of the output MOSFET (T3) and the sense MOSFET (T4) are connected to the power control circuit ( 4) The bias voltage from is supplied through resistors R3 and R4. The input signals are supplied to the gates of the output MOSFETs (T 1) and (T3) through the coupling capacitors C 1 and C 2. The drain outputs of the output MOSFETs (T 1) and (T 3) are matched. One is selected and output through circuit (6).
  • the drains of the sense MOSFETs (T2) and (T4) are connected in common, and the drain output of the one that has been activated by the bias voltage is output from the common sense output terminal.
  • two output MOSFETs (T 1) and (T 3) are used correspondingly to the above output range. Can be used effectively.
  • FIG. 4 is a detection current-output power characteristic diagram for explaining an example of a power control method using a plurality of output MOS FETs having different output capabilities as described above.
  • the output power range is set in three stages such as small power, medium power and large power.
  • Three output stage amplifiers are provided to cover each output power range. In order to continuously change the output level from low power to high power, if the output power cannot be covered by the low power output stage amplifier, it is switched to the medium power output stage amplifier. If the medium power output stage amplifier cannot cover it, it is switched to a high power output amplifier. Conversely, in an output stage amplifier with a large output power, if the sense current is reduced and if a medium power output that cannot control a stable bias voltage with such a small sense current is instructed, Output stage amplifier.
  • the above output control is periodically performed from the base station to the mobile phone. Since the output stage amplifier is switched during the time-divisional output operation, there is no major problem in performing the power control as described above.
  • FIG. 5 shows a detection current-output power characteristic diagram for explaining another example of a power control method when a plurality of output MOSFETs having different output capabilities are used as described above. .
  • the output power range is set in three stages such as small power, medium power and large power.
  • one of the three output stage amplifiers is selected based on the output control initially specified from the base station to the mobile phone at the start of the call, and during the call, one of the selected output Output control is performed by the stage amplifier.
  • control of the output stage amplifier is simplified since there is no switching of the output stage amplifier.
  • select one of the above small power, medium power, and large power in anticipation of a range that can cover a certain width, large and small, centering on the output power specified by the base station to the mobile phone at the start of the call. You can do it.
  • FIG. 6 is a circuit diagram of another embodiment of the output stage amplifier according to the present invention.
  • this embodiment there is shown a circuit to which an automatic switching function is added when a plurality of output stages MOSFET are operated simultaneously. That is, a self-shortened down circuit is added to the output stage amplifier of this embodiment.
  • one of the plurality of output stage amplifiers is exemplarily shown as a representative, and a plurality of output MOSFETs (T 1) of a similar output stage amplifier are connected via a matching circuit (6). Connected in parallel.
  • the receiving circuit supplies the power control signal to the power control amplifiers (8-1) to (8-N) at the maximum output to control all the output stage amplifiers (3-1) to (3-N).
  • a resistor R3 is provided between the drain of the sensing MOSFET (T2) and the reference voltage Vref.
  • the drain output voltage of the MOSFET (T2) is supplied to the gate of the shut-down MOSFET T3.
  • the drain and source paths of the MOSFET (T 3) connect the gate and source (ground potential of the circuit) of the output MOSFET (T 1).
  • the drain current flowing through the sense MOSFET (T2) also decreases.
  • the voltage drop at the resistor R3 decreases and the gate voltage of the MOSFET (T3) increases.
  • the MOSFET (T 3) rises above its threshold voltage, the MOSFET (T 3) is turned on and the output MOSFET (T 1) is turned off.
  • the output MOSFET (T1) is brought into a non-operation state, and an output signal is formed by an output operation by another output MOSFET (not shown).
  • the combination of the size ratio 1 / M of the sensing MOSFETs provided in the multiple output MOSFETs as described above and the setting of the resistance value of the resistor R3 makes it possible to reference the threshold voltage of the shutdown MOSFET.
  • an output MOSFET to be operated in each of the small power region, the medium power region, and the large power region is determined in advance.
  • the self-down circuit is operated correspondingly to switch the output power. Operation is not required due to the addition of the self-shutdown circuit described above.
  • Output M ⁇ SFE T Input The signal can be cut off and the output leakage can be reduced.
  • the plurality of output MOS FETs may be composed of the same size MO SFEs, or may have a certain weight to determine the size.
  • FIG. 7 shows a basic configuration diagram of one embodiment of the high-frequency power amplifier circuit according to the present invention.
  • the figure shows a circuit of an output stage amplifier composed of an output MOSFET and a sense MOS FET, and corresponding element patterns.
  • the output stage amplifier has the same output amplification MOSFET (T1), sensing MOSFET (T2), and resistor that transmits the bias voltage for gain control to the gates of the MOSFETs (T1) and (T2). R1 and R2, and a coupling capacitor C1 for transmitting the input signal Pin to the gate of the output MOSFET (T1).
  • a load resistance is provided between the drain Drain (l) of the output amplification MOSFET (T 1) and the power supply voltage Vcc.
  • the drain Drain (2) of the sensing MOSFET (T2) is provided with a sensing resistor Rs, and the detection current detected by the sensing MOSFET (T2) can be converted into a voltage signal by the resistor Rs.
  • the sense MOSFET (T2) is formed thick in the vertical direction by hatching, and a drain is formed so as to be sandwiched between a pair of source regions.
  • a pair of gate electrodes shown in black is provided between the source region and the drain region.
  • the two gate electrodes are commonly connected to the gate wiring Gate (2) on the lower side.
  • the drain region formed so as to be sandwiched between the two gate electrodes is connected to a drain wiring Drain (2).
  • the output MOSFET (T 1) is composed of M sets of source, drain and gate using the above source, drain and gate electrode as one unit. The electrodes are arranged side by side. As a result, the drain current flowing through the MOSFET (T 1) is multiplied by M times the drain current flowing through the MOSFET (T2) when the gate-source voltage is the same. In other words, the current of 1 ZM flows through the sensing MOSFET (T2) with respect to the output DC current output from the output MOSFET (T1). Since the output DC current of the output MOSFET (T1) corresponds to the transmission output power, the drain current flowing through the sensing MOSFET (T2) corresponds to the transmission output power.
  • the source region of the MOSFET (T2) and the source region consisting of M groups arranged in the lateral direction of the MOSFET (T1) are connected in common, and the ground potential of the circuit is given.
  • FIG. 8 is a circuit diagram of another embodiment of the high-frequency power amplifier circuit according to the present invention.
  • the sense sensitivity is switched.
  • the sense resistor connected to the drain wiring Drain (2) of the sensing MOSFET (T2) is connected by two series circuits as Rs1 and Rs2.
  • a switch is provided, and the voltage generated by the series resistance of the resistors Rs1 and Rs2 or the voltage generated by the resistor Rs1 is supplied to the amplifier circuit as a sense signal to obtain the sense output. Is to do so.
  • FIG. 9 shows a circuit diagram of still another embodiment of the high-frequency power amplifier circuit according to the present invention. Also in this embodiment, the sense sensitivity is switched. That is, two sense MOSFETs (T2) and (T2 ') are provided for the output stage amplifier similar to that of FIG.
  • the drains Drain (2) and Drain (2 ') of these MOSFETs for sensing (T2) and (T2') have a sense resistor commonly connected to Rs1.
  • the gate of the added sensing MOSFET (# 2 ') is switched by a switch via the gate input resistor R3 to the gain control bias voltage or the circuit ground potential.
  • the sense current formed by the one sensing MOSFET (T 1) or the sensing current doubled by adding the sensing MOSFET ( ⁇ 2 ′) is obtained.
  • the power flowing through the drain of the sense MOSFET (T 2) increases accordingly.
  • the ground potential of the circuit is supplied to the gate of the sensing MOSFET (T 2 ′) by the switch to turn off the sensing MOSFET (T 2 ′).
  • the sense current formed only by the power MOSFET (T 2) flows through the sense resistor Rs 1.
  • FIG. 10 is a characteristic diagram of output power and detection current for explaining an example of the operation of the high-frequency power amplifier circuit according to the present invention.
  • This characteristic diagram corresponds to the description of the operation of the high-frequency power amplifier circuit shown in FIGS. 8 and 9 and includes a switch Rs in which a sense resistor Rs2 is inserted in series or a MOSFET for sensing ( ⁇ 2 ′ ), The sense sensitivity is maintained high even in a small power region, as in the case of a single region.
  • FIG. 11 is a circuit diagram of still another embodiment of the high-frequency power amplifier circuit according to the present invention.
  • the input signal Pin is also supplied to the sensing MOSFET (T2).
  • the gates of the output MOSFET (T 1) and the sensing MOSFET (T2) are connected in common, and a bias voltage for gain control is applied via the resistor R 1.
  • the input signal Pin is supplied to the output MOSFET (T1) and the gate of the sensing MOSFET (T2) via the coupling capacitor C1.
  • a signal component also flows to the drain output of the sensing MOSFET (T2), which is smoothed by the capacity provided in parallel with the sense resistor Rs1 and approximated by the drain output of the output MOSFET (T1).
  • a sense voltage can be formed.
  • FIG. 12 is a block diagram showing still another embodiment of the high-frequency power amplifier circuit according to the present invention.
  • the high frequency power amplification stage In order to obtain a high gain in the amplifier, a three-stage amplifier configuration consisting of the first-stage amplifier A1, the second-stage amplifier A2, and the output-stage amplifier A3 is adopted.
  • the first-stage amplifier A1 and the second-stage amplifier A2 are composed of simple amplification MOSFETs only, and the output MOSFET (T1) and the sensing MOSFET (T2) are provided only in the output-stage amplifier A3.
  • the bias voltage for gain control formed based on the detection signal from the sensing MOSFET (T 2) of the stage amplifier is supplied to the first stage amplifier A 1, the second stage amplifier A 2, and the output stage amplifier A 3 in common. .
  • the overall power control including the process variation of the first-stage amplifier A1 and the next-stage amplifier A2 is performed by the output sense of the output stage amplifier with the highest power and the corresponding power control. You can do it. Since the output signals of the MOSFETs constituting the first-stage amplifier A1 and the second-stage amplifier A2 are small, the size of the MOSFET is determined in accordance with each output.
  • FIG. 13 is an overall block diagram of one embodiment of the mobile communication device according to the present invention.
  • the most typical example of the mobile communication device is a mobile phone.
  • the reception signal received by the antenna is amplified in the reception front-end, converted into an intermediate frequency by the mixer, and transmitted to the audio processing circuit through the intermediate signal processing circuit IF-IC.
  • the gain control signal periodically included in the received signal is not particularly limited, but is decoded in the microprocessor CPU, and is a power control signal including a pulse duty corresponding to the time division as described above. Is formed and transmitted to the high-frequency power amplifier as described above according to the present invention, and power control of the transmission output is performed.
  • the frequency synthesizer consists of a reference oscillator circuit T CXO and a voltage-controlled oscillator circuit V An oscillation signal corresponding to the reception frequency is formed by the CO and PLL loops, while being transmitted to the reception front-end mixer.
  • the oscillating signal is, on the other hand, supplied to a modulator.
  • the received signal drives the receiver to output an audio signal.
  • the transmitted voice is converted into an electrical signal by a microphone and transmitted to the modulator through a voice processing circuit and a modem.
  • a plurality of the first amplifying elements are provided. ⁇ By increasing or decreasing the number of first amplifiers that are operated in parallel in response to the control signal of one control circuit, it is possible to widen the output with high efficiency and cover the output power range. The effect that a high frequency power amplifier circuit can be obtained is obtained.
  • the first amplifying element is composed of a plurality of pieces having different sizes, and one of the plurality is selectively operated according to an output control signal corresponding to the control signal of the power control circuit.
  • the second amplifying element has a one-to-one correspondence with the first amplifying element.
  • a plurality of the plurality of the plurality of the first amplifying elements which are brought into the above-mentioned operation state in response to the control signal from the above-mentioned power control circuit are arranged in parallel to obtain a sense output.
  • the effect is obtained that a sense output corresponding to the power switching can be obtained.
  • the second amplifying element is composed of a plurality corresponding to the first amplifying element in a one-to-one correspondence, and one of the first amplifying elements is set to the operation state by a control signal from the power control circuit.
  • the output current output from the output terminal of the second amplifier element is selectively switched to a plurality of series resistors by a switch that is switch-controlled by the output current detection sensitivity switching signal, thereby reducing The effect that the high sensitivity can be maintained in the power region as in the case of the large noise region can be obtained.
  • the second amplifier element has a plurality of common output terminals, and the control signal is selectively supplied by a switch that is switch-controlled by an output current sensitivity switching signal.
  • the effect is that the sensitivity can be maintained at a high level as in the case of a large power range.
  • An input signal supplied to the input terminal of the first amplifier element is also supplied to the input terminal of the second amplifier element, and the output current of the second amplifier element is converted to a direct current of the input signal.
  • the detection current it is possible to obtain an effect that higher-precision and more accurate power control becomes possible.
  • the first amplifying element constitutes an output stage amplifier of a multi-stage amplifying circuit in which one or a plurality of amplifying elements-are connected in cascade at the preceding stage, and the second amplifying element is
  • the control signal formed by the power control circuit is provided corresponding to the first amplification element constituting the output stage amplifier, and the control signal formed by the power control circuit is supplied to the amplification element constituting each stage of the amplification amplifier connected in the cascade configuration.
  • the battery life can be prolonged, in other words, the communication time per charge can be prolonged. Is obtained.
  • a high-frequency power amplifier circuit according to the present invention is controlled by a control signal included in a received signal from a base station, and an electronic circuit such as a transmission / reception circuit or a control circuit including the high-frequency power amplifier circuit is operated by a battery. As a result, it is possible to obtain a mobile communication device having a longer communication time per charge.
  • the digital mobile phone may be of any type as long as the output power is controlled by a control signal from a base station, such as a CDMA (Code Division Multiple Access) system. For example, even in the CDMA system, power control is performed by performing precise feedback control from a base station to a mobile phone.
  • a control signal from a base station, such as a CDMA (Code Division Multiple Access) system.
  • CDMA Code Division Multiple Access
  • the transmission operation with high efficiency can be performed by using the high-frequency power amplifier circuit according to the present invention.
  • mobile communication devices convert digital signals into signals in the voice signal frequency band and use the digital telephone switching network to communicate with personal computers and other similar mobile communication devices.
  • a digital signal may be transmitted and received between the devices.
  • the present invention can be widely used for high-frequency power amplifier circuits and mobile communication devices using the same.

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Abstract

A high frequency power amplifying circuit where a first amplifying element and a second amplifying element of the same structure as the above first amplifying element and being reduced to 1/M in element size are used, the above first amplifying element and the second amplifying element are supplied with the same bias voltage from a power control circuit, and the power output of the above first amplifying element is judged based on the output current ouputted from the output terminal of the above second amplifying element.

Description

明 細 書 - 高周波電力増幅回路とそれを用いた移動通信機器 技術分野  Specification-RF power amplifier circuit and mobile communication equipment using it
この発明は、 高周波電力増幅回路とそれを用いた移動通信機器に関し 、 主として電池駆動される高周波電力増幅回路とそれを用いた移動通信 機器における高周波電力の制御に利用して有効な技術に関するものであ る。 背景技術  The present invention relates to a high-frequency power amplifier circuit and a mobile communication device using the same, and relates mainly to a battery-driven high-frequency power amplifier circuit and an effective technique used for controlling high-frequency power in a mobile communication device using the same. is there. Background art
移動通信機器に用いられる高周波電力増幅回路 (R F電力増幅 I C ) に関しては、 日経マグロウヒル社、 1 9 9 7年 1月 2 7日付 「日経エレ クトロニクス」 第 1 1 5頁〜第 1 2 6頁がある。  Regarding the high-frequency power amplifier (RF power amplifier IC) used in mobile communication equipment, see Nikkei McGraw-Hill, Nikkei Electronics, January 27, 1997, pages 115-126. is there.
移動通信機器において、 送信電力制御のための高周波電力検出として パワーカプラーを用るもの、 あるレ、は高周波電力増幅回路の電源電流を センスするものがある。 上記パワーカプラーを用いるものでは、 送信電 波の一部を取り出して検出するために挿入損失が 0 . 2〜0 . 3 d Bも あり送信効率が悪くなる。 上記電源電流をセンスするものでは、 高周波 電力増幅回路の電源供給線にセンス用の抵抗素子が直列に挿入されるた め、 出力電力が大きいときに電源電圧を低下させてしまレ、電池電圧の使 用効率が悪化し、 電池寿命を短くしてしまう。 また、 上記いずれのセン ス方式におし、ても、 出力電力が小さし、領域ではそれに伴ってセンス出力 カ^、さくなつてしまい高レ、精度での小電力制御ができなくなつてしまう という問題も有する。  In mobile communication devices, there are those that use a power coupler as high-frequency power detection for transmission power control, and those that sense the power supply current of a high-frequency power amplifier circuit. In the case of using the above-mentioned power coupler, since a part of the transmission wave is extracted and detected, the insertion loss is 0.2 to 0.3 dB, and the transmission efficiency is deteriorated. In the case of sensing the power supply current described above, a resistor for sensing is inserted in series in the power supply line of the high-frequency power amplifier circuit. The usage efficiency deteriorates and the battery life is shortened. Also, in any of the sensing methods described above, the output power is small, and in that area, the sense output power is reduced, resulting in a high output, and the low power control with high accuracy cannot be performed. There is also a problem.
したがって、 この発明は、 高い送信効率を実現しつつ、 広い電力範囲 での高精度での電力検出を可能にした¾周波増幅回路とそれを用いた移 動通信機器を提供することを目的としている。 この発明は、 低電圧まで の動作を可能にした高周波増幅回路とそれを用いた移動通信機器を提供 することを他の目的としている。 この発明の前記ならびにそのほかの目 的と新規な特徴は、 本明細書の記述および添付図面から明らかになるで あろう。 発明の開示 Therefore, the present invention realizes a high transmission efficiency and a wide power range. An object of the present invention is to provide a low-frequency amplifier circuit capable of detecting power with high accuracy by using the same and a mobile communication device using the same. Another object of the present invention is to provide a high-frequency amplifier circuit capable of operating up to a low voltage and a mobile communication device using the same. The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings. Disclosure of the invention
本発明は、 第 1の増幅素子と、 上記第 1の増幅素子と同じ構造で、 そ の素子サイズが 1 ZMに小さく形成された第 2増幅素子とを用い、 パヮ 一コント口一ル回路から上記第 1の増幅素子と第 2の増幅素子に対して 同じバイアス電圧を供給し、 上記第 2の増幅素子の出力端子から出力さ れる出力電流に基づいて上記第 1の増幅素子の電力出力を判定する。 図面の簡単な説明  The present invention uses a first amplifying element and a second amplifying element having the same structure as the above-mentioned first amplifying element and having a small element size of 1 ZM, and from a power control circuit. The same bias voltage is supplied to the first amplification element and the second amplification element, and the power output of the first amplification element is determined based on the output current output from the output terminal of the second amplification element. judge. BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 この発明に係る高周波電力増幅回路を用いた移動通信機器 の一実施例を示す要部プロック図であり、  FIG. 1 is a main block diagram showing an embodiment of a mobile communication device using the high-frequency power amplifier circuit according to the present invention,
第 2図は、 この発明に係る高周波電力増幅回路の一実施例を示す基本 的回路図であり、  FIG. 2 is a basic circuit diagram showing one embodiment of the high-frequency power amplifier circuit according to the present invention,
第 3図は、 この発明に係る高周波電力増幅回路の他の一実施例を示す 基本的回路図であり、  FIG. 3 is a basic circuit diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention,
第 4図は、 この発明に係る高周波電力増幅回路の動作の一例を説明す るための出力パワーと検出電流の関係を示す特性図であり、  FIG. 4 is a characteristic diagram showing a relationship between output power and detection current for explaining an example of the operation of the high-frequency power amplifier circuit according to the present invention;
第 5図は、 この発明に係る高周波電力増幅回路の動作の他の一例を説 明するための出力パワーと検出電流の関係を示す特性図であり、 第 6図は、 この発明に係る高周波電力増幅回路の他の一実施例を示す 回路図であり、 第 7図は、 この発明に係る高周波電力増幅回路の一実施例を示す基本 的構成図であり、 FIG. 5 is a characteristic diagram illustrating a relationship between output power and a detection current for explaining another example of the operation of the high-frequency power amplifier circuit according to the present invention. FIG. 14 shows another embodiment of the amplifier circuit. FIG. 7 is a circuit diagram, FIG. 7 is a basic configuration diagram showing one embodiment of a high-frequency power amplifier circuit according to the present invention,
第 8図は、 この発明に係る高周波電力増幅回路の他の一実施例を示す 回路図であり、  FIG. 8 is a circuit diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention,
第 9図は、 この発明に係る高周波電力増幅回路の他の一実施例を示す 回路図であり、  FIG. 9 is a circuit diagram showing another embodiment of the high frequency power amplifier circuit according to the present invention,
第 1 0図は、 この発明に係る高周波電力増幅回路の動作の一例を説明 するための出力パワーと検出電流の関係を示す特性図であり、  FIG. 10 is a characteristic diagram showing a relationship between output power and detected current for explaining an example of the operation of the high-frequency power amplifier circuit according to the present invention;
第 1 1図は、 この発明に係る高周波電力増幅回路の他の一実施例を示 す回路図であり、  FIG. 11 is a circuit diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention,
第 1 2図は、 この発明に係る高周波電力増幅回路の他の一実施例を示 すブロック図であり、  FIG. 12 is a block diagram showing another embodiment of the high-frequency power amplifier circuit according to the present invention,
第 1 3図は、 この発明に係る高周波電力増幅回路を用いた移動通信機 器の一実施例を示す全体プロック図である。 発明を実施するための最良の形態  FIG. 13 is an overall block diagram showing one embodiment of a mobile communication device using the high-frequency power amplifier circuit according to the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
この発明をより詳細に説述するために、 添付の図面に従つてこれを説 明する。  The present invention will be described in more detail with reference to the accompanying drawings.
第 1図には、 この発明に係る高周波電力増幅回路を用いた移動通信機 器の一実施例を示す要部プロック図が示されている。 移動通信機器の電 源は、 特に制限されないが、 リチウムイオン電池が使用される。 周知の ようにリチウムイオン電池は、 電圧が 3 . 6 Vのような小さな電圧であ るので、 かかる低電圧において必要な高周波電力増幅出力を得るように すること、 及びその消費電力を極力小さく抑えるようにするために、 次 のようなパワーコントロール回路と、 高周波電力出力のセンス回路が設 ― けられる。 FIG. 1 is a block diagram of a main part showing an embodiment of a mobile communication device using a high-frequency power amplifier circuit according to the present invention. The power source of the mobile communication device is not particularly limited, but a lithium ion battery is used. As is well known, since the voltage of a lithium ion battery is a small voltage such as 3.6 V, it is necessary to obtain a required high-frequency power amplification output at such a low voltage and to minimize the power consumption thereof. In order to make the following And a sense circuit for high-frequency power output.
入力信号 P i nは、 入力段アンプ ( 1 ) の入力端子に供給される。 こ の入力段アンプ ( 1 ) の出力部には、 電力分配回路 (2) が設けられる 。 上記電力分配回路 (2) には、 上記入力段アンプ ( 1 ) の出力信号を 分配して複数からなる出力段アンプ (3— 1) ないし (3— N) に電力 分配を行うとともに段間のインピーダンスマッチングを行う。  The input signal Pin is supplied to the input terminal of the input stage amplifier (1). A power distribution circuit (2) is provided at the output of the input stage amplifier (1). The power distribution circuit (2) distributes the output signal of the input stage amplifier (1) and distributes power to a plurality of output stage amplifiers (3-1) to (3-N), Perform impedance matching.
上記出力段アンプ (3— 1 ) ないし (3— N) の出力端子は、 出力整 合回路 (6) に伝えられる。 この出力整合回路 (6) は、 上記出力段ァ ンプ (3— 1) ないし (3—N) の出力信号の合成する機能も合わせ持 つようにされる。 上記出力整合回路 (6) の出力信号はデュプレクサ ( 7) を通してアンテナを通し、 電波信号として出力される。  The output terminals of the output stage amplifiers (3-1) and (3-N) are transmitted to the output matching circuit (6). The output matching circuit (6) also has a function of synthesizing the output signals of the output stage amplifiers (3-1) to (3-N). The output signal of the output matching circuit (6) passes through an antenna through a duplexer (7) and is output as a radio signal.
ゲインコントロール回路 4は、 上記人力段アンプ (1) 及び上記出力 段アンプ (3— 1 ) ないし (3— N) のゲインコントロールするための バイアス電圧を発生する。  The gain control circuit 4 generates a bias voltage for controlling the gain of the above-mentioned human-stage amplifier (1) and the above-mentioned output-stage amplifiers (3-1) to (3-N).
上記アンテナから入力された入力信号は、 上記デュプレクサ (7) を 通して受信回路 (1 0) に取り込まれる。 受信信号は、 上記通信相手方 からの信号の他、 基地局からの上記電波信号の電界強度を指示するコン トロール信号が含まれる。 上記受信回路 (1 0) では、 上記コント口一 ル信号を解読し、 それに対応したパワーコントロール信号 ( 1) ないし (N) を形成してパワーコントロール用アンプ (8— 1 ) ないし (8— N) に伝える。  An input signal input from the antenna is taken into the receiving circuit (10) through the duplexer (7). The received signal includes a control signal indicating the electric field strength of the radio signal from the base station, in addition to the signal from the communication partner. The receiving circuit (10) decodes the control signal and forms corresponding power control signals (1) to (N) to form power control amplifiers (8-1) to (8-N). ) To tell.
また、 特に制限されないが、 上記各出力段アンプ (3— 1 ) ないし ( 3 -N) のそれぞれには、 上記出力信号 P 0 u tを形成する増幅素子に 対して、 そのサイズが 1ZMのように小さく形成された増幅素子からな るパワーセンス素子が設けられ、 その入力には出力ゲインコントロール するための上記バイアス電圧が伝えられている。 - 上記パワーセンス素子からの出力信号は、 検出電流合成回路 (5) に よって合成され、 その合成信号がパワーセンス出力として上記パワーコ ントロール用アンプ (8— 1 ) ないし (8— N) に伝えられる。 Also, although not particularly limited, each of the output stage amplifiers (3-1) to (3-N) has a size such as 1ZM for the amplifying element forming the output signal Pout. A power sense element consisting of a small amplifying element is provided, and its input has an output gain control. The bias voltage for performing the above is transmitted. -The output signal from the power sense element is synthesized by the detection current synthesis circuit (5), and the synthesized signal is transmitted to the power control amplifiers (8-1) to (8-N) as a power sense output. .
上記入力段アンプ (1)及び出力段アンプ (3—1) なぃし (3—N ) は、 後述するようにゲートが入力でソース接地の増幅 MOSFETか ら構成され、 ドレインから出力信号を得るものである。  The input-stage amplifier (1) and the output-stage amplifier (3-1) No-pass (3-N) consist of an amplifying MOSFET whose gate is input and whose source is grounded as described later, and an output signal is obtained from the drain. Things.
上記入力段アンプ (1)及び出力段アンプ (3— 1) ないし (3— N ) は、 A B級の増幅動作を行うものであり、 そのゲート電圧を高くする ことにより相互コンダクタンス gmを大きく して利得を増大させるとい う可変利得アンプとして動作する。 なお、 本願において、 上記 MOSF ETは、 金属一酸化膜-半導体電界効果トランジス夕の他に金属—絶縁 膜—半導体 (MI S) FETも含む意味で用いている。 そして、 MOS FET、 M I SFETのゲート電極は、 金属ばかりでなく導電性多結晶 シリコンなども含むものであり、 高周波動作を行うような構造のものが 用いられる。  The input-stage amplifier (1) and the output-stage amplifiers (3-1) to (3-N) perform a class AB amplification operation. By increasing the gate voltage, the transconductance gm is increased. It operates as a variable gain amplifier that increases the gain. In the present application, the above-mentioned MOSFET is used to mean a metal-insulating film-semiconductor (MIS) FET in addition to a metal monoxide film-semiconductor field effect transistor. The gate electrodes of MOS FETs and MISFETs include not only metal but also conductive polycrystalline silicon, and have a structure that performs high-frequency operation.
この実施例は、 GSM (Global System for Mobile Communication) 方式の場合である。 この GSM方式は、 公知のようにディジタル携帯電 話の欧州共通方式であり、 TDMA (時分割多重元接続) 技術と FDD (周波数分割双方向) 技術を使 、、 搬送波周波数は 900 MHz帯で、 変調方式は GMSK (Gaussian filtered minimum shift keying)が用い られる。  This embodiment is a case of a GSM (Global System for Mobile Communication) system. As is well known, this GSM system is a European common system for digital mobile phones, uses TDMA (time division multiplexing access) technology and FDD (frequency division bidirectional) technology, and has a carrier frequency of 900 MHz. GMSK (Gaussian filtered minimum shift keying) is used as the modulation method.
上記 GSM方式では、 基地局間の距離は最大で 1 0マイル (約 16K m) まで許されるので、 携帯電話機は 2d Bステップで、 1 3dBm〜 43 dBmという高さまで出力を制御しなければならない。 GSM方式 の出力制御方式は、 携帯電話機の送信出力を常に制御する。 つまり、 携 帯電話機は、 基地局から周期的に送られてくる制御信号に従って出力制 御を行う。 In the above GSM system, the distance between base stations can be up to 10 miles (approximately 16 km), so the mobile phone must control the output to a height of 13 dBm to 43 dBm in 2 dB steps. The output control method of the GSM system always controls the transmission output of the mobile phone. In other words, The mobile telephone controls output according to a control signal periodically sent from the base station.
第 1図において、 アンテナを通して受信された上記制御信号は、 上記 受信回路 ( 1 0) に含まれる出力制御回路によりパワーコントロール信 号 ( 1) ないし (N) のいずれか 1つが選ばれる。 このパワーコント口 ール信号は、 上記時分割に対応したパルスデューティを持ち、 そのパル スのピーク値が出力パワーに対応された電圧となるようなパルス状の信 号とされる。 ただし、 パルスの立ち上がりと立ち下がりのスロープは、 急峻にならないようにコントロールされる。 この立ち上がりと立ち下が りのスロープのコントロールには、 ディジタル Zアナログ変換回路が用 いられ、 クロック信号に対応して制御された立ち上がりと立ち下がりを 持つようにされる。  In FIG. 1, one of the power control signals (1) to (N) is selected by the output control circuit included in the receiving circuit (10) as the control signal received through the antenna. The power control signal has a pulse duty corresponding to the above-described time division, and is a pulse signal in which the peak value of the pulse becomes a voltage corresponding to the output power. However, the rising and falling slopes of the pulse are controlled so as not to be steep. A digital Z-to-analog conversion circuit is used to control the rising and falling slopes so that the rising and falling edges are controlled in accordance with the clock signal.
パワーコントロール用アンプ (8— 1 ) ないし (8—N) は、 その 1 つに上記のようなパワーコントロール信号が供給され、 それと上記パヮ —センス出力とがー致するようにバイアス電圧を形成して、 上記動作さ せられる 1つの出力段アンプ (3) の出力パワー Pou tの制御が行わ れ 00 The power control amplifiers (8-1) to (8-N) are supplied with the power control signal as described above to one of them, and form a bias voltage so that the power control signal and the power sense output are matched. Then, the output power Pout of one output stage amplifier (3) operated as described above is controlled, and 0 0
この実施例では、 簡単にしかも高精度で上記のような広し、範囲での出 力パワーのコントロールを行うようにするため、 例えば、 上記 Nを 3と した場合、 1 3 dBm〜43 dBmのような設定範囲が小出力用アンプ ( 1) 、 中出力アンプ (3— 2) 、 大出力アンプ (3— 3) のように個 々に振り分けられる。 上記受信回路 ( 1 0) においては、 基地局からの 制御信号が中出力範囲を指定したなら、 パワーコントロール信号 (2) を形成してパワーコントロールアンプ (8— 2) のみを動作させるよう 指示する。 他のパワーコントロールアンプ (8— 1 ) と (8— 3) には 、 パワーコントロール信号 ( 1) と (3) が零に設定されることにより 、 それに対応した出力段アンプ (3— 1) と (3— 3) はバイアス電圧 ' により非動作伏態にされる。 In this embodiment, in order to easily and precisely control the output power in the above-described wide and range, for example, when N is set to 3, 13 dBm to 43 dBm is used. Such setting ranges are individually assigned to small output amplifiers (1), medium output amplifiers (3-2), and large output amplifiers (3-3). In the receiving circuit (10), if the control signal from the base station specifies the medium output range, a power control signal (2) is formed to instruct only the power control amplifier (8-2) to operate. . The other power control amplifiers (8-1) and (8-3) have the power control signals (1) and (3) set to zero. The corresponding output stage amplifiers (3-1) and (3-3) are deactivated by the bias voltage '.
そして、 上記パワーコントロール信号 (2) の上記ようなスロープに より立ち上がりピークパワーに対応した一定の電圧になり、 上記時分割 による送信時間経過後は同様なスロープにより立ち下がる。 このような パワーコントロール信号 (2) とセンス出力が同じくなるようにバイァ ス電圧が変化するので、 ピークパワーのみならず送信出力の立ち上がり と立ち下がりのスロープも合わせて高精度に制御することができる。  Then, the power control signal (2) rises due to the above-described slope and becomes a constant voltage corresponding to the peak power, and after the transmission time by the above-mentioned time division, falls by the same slope. Since the bias voltage changes so that the power control signal (2) and the sense output become the same, not only the peak power but also the rise and fall slopes of the transmission output can be controlled with high accuracy. .
基地局からの制御信号が小出力範囲又は大出力範囲を指定したなら、 パワーコントロール信号 ( 1 ) 又は (3) を形成してパワーコントロー ルアンプ (8— 1 ) 又は (8— 3) のみを前記のように動作させ、 他は 非動作状態にさせる。 このようにして、 3つの出力段アンプを選択的に 使用することにより、 出力の高効率化と高感度でのセンス出力を得るよ うにすることができる。  If the control signal from the base station specifies a small output range or a large output range, the power control signal (1) or (3) is formed and only the power control amplifier (8-1) or (8-3) is used. And the others are inactive. In this way, by selectively using the three output stage amplifiers, it is possible to obtain high output efficiency and high-sensitivity sense output.
第 2図には、 この発明に係る出力段アンプの一実施例の回路図が示さ れている。 出力段アンプは、 出力 MOSFET (T1) と、 それに対し て 1/Mのサイズに小さくされたセンス MOSFET (T2) から構成 される。 上記 MOSFET (T1) と (T2) は、 ソースに接地電位が 与えられ、 上記ゲインコントロール回路 (4)から抵抗 R 1及び R 2を 通してバイアス電圧が供給される。 信号成分は分配回路 (2) とカップ リングコンデンサ C 1を通して上記出力 MOSFET (T1) のゲート に供給される。  FIG. 2 is a circuit diagram showing one embodiment of the output stage amplifier according to the present invention. The output stage amplifier consists of an output MOSFET (T1) and a sense MOSFET (T2) reduced to 1 / M size. The MOSFETs (T1) and (T2) are supplied with a ground potential at their sources, and supplied with a bias voltage from the gain control circuit (4) through resistors R1 and R2. The signal component is supplied to the output MOSFET (T1) gate through the distribution circuit (2) and the coupling capacitor C1.
前記のように MOSFET (T 1 ) の利得は、 そのゲートに供給され る直流バイアス電圧に対応した相互コンダクタンス gmにより決まる。 そのため、 同じバイアス電圧が与えられたセンス用 MOSFET (T2 ) を設けることにより、 そのドレイン出力から上記出力 MOSFET ( T 1 ) の出力パワーに対して 1 ZMにされたセンス出力を得ることがで きる。 As described above, the gain of the MOSFET (T 1) is determined by the transconductance gm corresponding to the DC bias voltage supplied to its gate. Therefore, by providing a sensing MOSFET (T2) to which the same bias voltage is applied, the output MOSFET (T A sense output of 1 ZM can be obtained for the output power of T 1).
この構成では、 出力 MOSFET (T 1 ) で形成された出力信号が全 て送信信号として出力されるために低電圧のもとでも高い送信出力を得 ることができる。 センス出力は、 上記 1/Mに対応して設定できるため に、 上記出力 MOSFET (T 1 ) の最大出力パワーが相対的に小さき ものでは上記 1ZMを大きくし (Mを小さくする) 、 上記出力 MOSF ET (T1) の最大出力パワーが相対的に大きいものでは上記 1ZMが 小さくし (Mを大きくし) することにより、 必要な出力パワーに対応し て回路制御に最適で高感度のセンス出力を得ることができる。  In this configuration, since all output signals formed by the output MOSFET (T 1) are output as transmission signals, a high transmission output can be obtained even at a low voltage. Since the sense output can be set corresponding to the above 1 / M, if the maximum output power of the output MOSFET (T 1) is relatively small, the above 1ZM should be increased (M should be reduced) and the output MOSF should be reduced. If the maximum output power of ET (T1) is relatively large, the above 1ZM can be reduced (increased M) to obtain a high-sensitivity sense output that is optimal for circuit control corresponding to the required output power. be able to.
第 3図には、 この発明に係る出力段アンプの他の一実施例の回路図が 示されている。 この実施例では、 出力範囲を拡大させるために 2つの出 力段回路が用いられる。  FIG. 3 shows a circuit diagram of another embodiment of the output stage amplifier according to the present invention. In this embodiment, two output stage circuits are used to extend the output range.
この実施例では、 出力パワー範囲を約 2分割し、 出力 MOSFET ( T 1 ) は出力パワーの小さい領域をカバ一するように比較的小さなサイ ズの MOSFETにより構成される。 これに対して、 出力 MOSFET (T3) は出力パワーの大きい領域をカバ一するように比較的大きなサ ィズにより構成される。 この実施例では、 上記出力 MOSFET (T 1 ) 対してセンス MOSFET (T2)が設けられ、 上記出力 MOSFE T (T3) に対してセンス MOSFET (T4)が設けられる。 つまり 、 出力 M〇 SFETとセンス MOSFETとが一対一に対応して設けら れる。  In this embodiment, the output power range is divided into about two, and the output MOSFET (T 1) is formed by a relatively small-sized MOSFET so as to cover a region where the output power is small. On the other hand, the output MOSFET (T3) has a relatively large size so as to cover a region where the output power is large. In this embodiment, a sense MOSFET (T2) is provided for the output MOSFET (T 1), and a sense MOSFET (T4) is provided for the output MOSFET (T3). That is, the output MOSFET and the sense MOSFET are provided in one-to-one correspondence.
上記出力 MOSFET (T 1) とセンス MOSFET (T2) のゲ一 トには、 パワーコントロール回路 (4)からのバイアス電圧が抵抗 R 1 と R 2を通して供給される。 同様に、 上記出力 MOSFET (T3) と センス MOSFET (T4) のゲートには、 パワーコントロール回路 ( 4) からのバイアス電圧が抵抗 R 3と R 4を通して供給される。 上記出 力 MOSFET (T 1 ) と (T3) のゲートには、 カップリングコンデ ンサ C 1 と C 2を通して入力信号が供給され、 上記出力 MOSFET ( T 1 ) と (T3) のドレイン出力は、 整合回路 (6) を通して 1つが選 択されて出力される。 これに対して、 センス MOSFET (T2) と ( T4) のドレインは共通接続されて、 上記バイアス電圧により動作状態 にされたもののドレイン出力が共通のセンス出力端子から出力される。 この構成では、 上記出力範囲に対応して 2つの出力 MOSFET (T 1 ) と (T3) がそれぞれ用いられるものあるために、 そのバイアス電 圧と出力電力との特性のうち、 出力効率の高い部分を有効に使用するこ とができる。 The bias voltage from the power control circuit (4) is supplied to the gates of the output MOSFET (T1) and the sense MOSFET (T2) through resistors R1 and R2. Similarly, the gates of the output MOSFET (T3) and the sense MOSFET (T4) are connected to the power control circuit ( 4) The bias voltage from is supplied through resistors R3 and R4. The input signals are supplied to the gates of the output MOSFETs (T 1) and (T3) through the coupling capacitors C 1 and C 2. The drain outputs of the output MOSFETs (T 1) and (T 3) are matched. One is selected and output through circuit (6). On the other hand, the drains of the sense MOSFETs (T2) and (T4) are connected in common, and the drain output of the one that has been activated by the bias voltage is output from the common sense output terminal. In this configuration, two output MOSFETs (T 1) and (T 3) are used correspondingly to the above output range. Can be used effectively.
第 4図には、 上記のように異なる出力能力を持つ複数の出力 MO S F ETを用いた場合の一例のパワー制御方法を説明するための検出電流一 出力パワー特性図が示されている。 同図においては、 前記のように出力 パワー範囲が小パワー、 中パワー及び大パワーのように 3段階に分けて 設定される。  FIG. 4 is a detection current-output power characteristic diagram for explaining an example of a power control method using a plurality of output MOS FETs having different output capabilities as described above. In the figure, as described above, the output power range is set in three stages such as small power, medium power and large power.
それぞれの出力パワー範困をカバーするように 3つの出力段アンプが 設けられる。 出力バヮ一を小パワーから大パワーまで連続的に変化させ るようにするため、 小パワーの出力段アンプではカバ一できないときに は、 中パワーの出力段アンプに切り換えられる。 上記中パワーの出力段 アンプではカバーできないときには、 大パワーの出力アンプに切り換え られる。 逆に、 大出力パワーの出力段アンプでは、 センス電流が小さく なること、 及びかかる小さなセンス電流での安定したバイアス電圧の制 御ができないような中パワーの出力が指示されたなら、 上記中パワーの 出力段アンプに切り換えられる。  Three output stage amplifiers are provided to cover each output power range. In order to continuously change the output level from low power to high power, if the output power cannot be covered by the low power output stage amplifier, it is switched to the medium power output stage amplifier. If the medium power output stage amplifier cannot cover it, it is switched to a high power output amplifier. Conversely, in an output stage amplifier with a large output power, if the sense current is reduced and if a medium power output that cannot control a stable bias voltage with such a small sense current is instructed, Output stage amplifier.
上記 G SM方式では、 周期的に基地局から携帯電話機に上記出力制御 が指示されるものであり、 上記時分割による出力動作の間で出力段アン プの切り換えが行われるので上記のようなパワー制御を行うことに大き な問題は生じない。 In the above GSM system, the above output control is periodically performed from the base station to the mobile phone. Since the output stage amplifier is switched during the time-divisional output operation, there is no major problem in performing the power control as described above.
第 5図には、 上記のように異なる出力能力を持つ複数の出力 MO S F E Tを用いた場合の他の一例のパワー制御方法を説明するための検出電 流—出力パワー特性図が示されている。 同図においては、 前記のように 出力パワー範囲が小パワー、 中パワー及び大パワーのように 3段階に分 けて設定される。  FIG. 5 shows a detection current-output power characteristic diagram for explaining another example of a power control method when a plurality of output MOSFETs having different output capabilities are used as described above. . In the figure, as described above, the output power range is set in three stages such as small power, medium power and large power.
この実施例では、 通話開始時に基地局から携帯電話機に最初に指定さ れた出力制御に基づいて 3つの出力段アンプのうちの 1つが選択され、 その通話中においては上記選択された 1つの出力段アンプによって出力 制御が行われる。 この構成では、 出力段アンプの切り換えが無いために 出力段アンプの制御が簡単となる。 一般に、 携帯電話機において通話中 に極端に出力パワーを変更する必要が無いと考えられるから上記のよう な制御方式でも実際上は問題ない。 つまり、 通話開始時に基地局から携 帯電話機に指定された出力パワーを中心にして、 大小一定の幅をカバー できる範囲を見込んで、 上記小パワー、 中パワー、 大パワーのいずれか を選択するようにすれば良い。  In this embodiment, one of the three output stage amplifiers is selected based on the output control initially specified from the base station to the mobile phone at the start of the call, and during the call, one of the selected output Output control is performed by the stage amplifier. In this configuration, control of the output stage amplifier is simplified since there is no switching of the output stage amplifier. In general, it is considered that there is no need to extremely change the output power during a call in a mobile phone, so there is no practical problem with the above control method. In other words, select one of the above small power, medium power, and large power in anticipation of a range that can cover a certain width, large and small, centering on the output power specified by the base station to the mobile phone at the start of the call. You can do it.
第 6図には、 この発明に係る出力段アンプの他の一実施例の回路図が 示されている。 この実施例では、 複数の出力段 MO S F E Tを同時に動 作させる場合の自動切り換え機能を付加した回路が示されている。 つま り、 この実施例の出力段アンプには自己シャツトダウン回路が付加され る。  FIG. 6 is a circuit diagram of another embodiment of the output stage amplifier according to the present invention. In this embodiment, there is shown a circuit to which an automatic switching function is added when a plurality of output stages MOSFET are operated simultaneously. That is, a self-shortened down circuit is added to the output stage amplifier of this embodiment.
同図では、 上記複数の出力段アンプのうちの 1つが代表として例示的 に示されており、 同様な出力段アンプの出力 MO S F E T (T 1 ) は複 数個が整合回路 (6 ) を介して並列に接続されている。 例えば、 第 1図 の回路において、 受信回路は最大出力のときにはパワーコントロールァ ンプ (8— 1 ) ないし (8— N) にパワーコントロール信号を供給して 全出力段アンプ (3— 1) ないし (3— N) を動作伏態にする。 センス 用 MOSFET (T2) のドレインと基準電圧 Vref との間には、 抵抗 R 3が設けられる。 上記 MOSFET (T2) のドレイン出力電圧は、 シャツトダウン MOSFETT3のゲートに供給される。 この MOSF ET (T 3) のドレイン、 ソース径路は、 上記出力 MOSFET (T 1 ) のゲートとソース (回路の接地電位) を接続する。 In the figure, one of the plurality of output stage amplifiers is exemplarily shown as a representative, and a plurality of output MOSFETs (T 1) of a similar output stage amplifier are connected via a matching circuit (6). Connected in parallel. For example, Figure 1 In the circuit of (1), the receiving circuit supplies the power control signal to the power control amplifiers (8-1) to (8-N) at the maximum output to control all the output stage amplifiers (3-1) to (3-N). Move to working state. A resistor R3 is provided between the drain of the sensing MOSFET (T2) and the reference voltage Vref. The drain output voltage of the MOSFET (T2) is supplied to the gate of the shut-down MOSFET T3. The drain and source paths of the MOSFET (T 3) connect the gate and source (ground potential of the circuit) of the output MOSFET (T 1).
指定された出力制御信号によりバイアス電圧が低下すると、 センス M OSFET (T2) に流れるドレイン電流も小さくなる。 このドレイン 電流が小さくなると、 抵抗 R 3での電圧降下分が小さくなって MO S F ET (T3) のゲート電圧を高くする。 この MOSFET (T 3) のゲ ート電圧がそのしきい値電圧以上に高くなると、 MOSFET (T3) がオン状態となって上記出力 MOSFET (T1) をオフ状態にさせる 。 これにより、 上記出力 MOSFET (T1) は非動作状態となり、 図 示しない他の出力 MOSFETによる出力動作によって出力信号が形成 される。  When the specified output control signal lowers the bias voltage, the drain current flowing through the sense MOSFET (T2) also decreases. When this drain current decreases, the voltage drop at the resistor R3 decreases and the gate voltage of the MOSFET (T3) increases. When the gate voltage of the MOSFET (T 3) rises above its threshold voltage, the MOSFET (T 3) is turned on and the output MOSFET (T 1) is turned off. As a result, the output MOSFET (T1) is brought into a non-operation state, and an output signal is formed by an output operation by another output MOSFET (not shown).
上記複数の出力 MOSFETに設けられたセンス用 MOSFETの上 記のようなサイズ比 1 /Mと、 上記抵抗 R 3の抵抗値の設定の組み合わ せにより、 シャットダウン MOSFETのしきい値電圧を基準にして、 上記複数の出力 MO S F E Tの出力信号を合成して送信出力を行うよう にするとともに、 例えば小パワー領域、 中パワー領域、 及び大パワー領 域のそれぞれにおいて動作させる出力 MOSFETを予め決めておいて 、 それぞれに対応して上記自己シャツトダウン回路を動作させて出力パ ヮ一の切り換えを行うようにするものである。 上記のような自己シャツ トダウン回路の付加により、 動作不要になって出力 M〇 SFE Tの入力 信号を遮断し、 その出力もれを小さくすることができる。 - 上記の場合、 複数の出力 MO S F E Tは同じサイズの MO S F E丁で 構成してもよいし、 一定の重みを持たせてそのサイズを決定するように するものであってもよい。 The combination of the size ratio 1 / M of the sensing MOSFETs provided in the multiple output MOSFETs as described above and the setting of the resistance value of the resistor R3 makes it possible to reference the threshold voltage of the shutdown MOSFET. In addition to combining the output signals of the plurality of output MOSFETs to perform transmission output, for example, an output MOSFET to be operated in each of the small power region, the medium power region, and the large power region is determined in advance. The self-down circuit is operated correspondingly to switch the output power. Operation is not required due to the addition of the self-shutdown circuit described above. Output M 出力 SFE T Input The signal can be cut off and the output leakage can be reduced. -In the above case, the plurality of output MOS FETs may be composed of the same size MO SFEs, or may have a certain weight to determine the size.
第 7図には、 この発明に係る高周波電力増幅回路の一実施例の基本的 構成図が示されている。 同図には、 出力 MOSFET及びセンス MOS FETからなる出力段アンプの回路とそれに対応した素子パターンが示 されている。  FIG. 7 shows a basic configuration diagram of one embodiment of the high-frequency power amplifier circuit according to the present invention. The figure shows a circuit of an output stage amplifier composed of an output MOSFET and a sense MOS FET, and corresponding element patterns.
出力段アンプは、 前記同様な出力増幅 MOSFET (T1) と、 セン ス用 MOSFET (T 2) と、 利得制御用のバイアス電圧を上記各 MO SFET (T 1) と (T2) のゲートに伝える抵抗 R 1, R 2と、 入力 信号 P i nを上記出力 MOSFET (T 1 ) のゲートに伝えるカツプリ ングコンデンサ C 1から構成される。 上記出力増幅 MOSFET (T 1 ) のドレイン Drain(l) と電源電圧 Vccとの間には負荷抵抗が設けられ る。 上記センス用 MOSFET (T2) のドレイン Drain(2) は、 セン ス用抵抗 Rsが設けられ、 上記センス用 MOSFET (T2)で検出さ れた検出電流が上記抵抗 R sによって電圧信号に変換きれる。  The output stage amplifier has the same output amplification MOSFET (T1), sensing MOSFET (T2), and resistor that transmits the bias voltage for gain control to the gates of the MOSFETs (T1) and (T2). R1 and R2, and a coupling capacitor C1 for transmitting the input signal Pin to the gate of the output MOSFET (T1). A load resistance is provided between the drain Drain (l) of the output amplification MOSFET (T 1) and the power supply voltage Vcc. The drain Drain (2) of the sensing MOSFET (T2) is provided with a sensing resistor Rs, and the detection current detected by the sensing MOSFET (T2) can be converted into a voltage signal by the resistor Rs.
上記センス MOSFET (T2) は、 パターン図に示すようにハッチ ングにより縦方向に太く形成され一対のソ一ス領域に挟まれるように紬 く形成されたドレインが形成される。 上記ソース領域とドレイン領域の 間に黒で示された一対のゲー卜電極が設けられる。 上記 2つのゲート電 極は、 下側において共通にゲート配線 Gate(2)に接続される。 上記 2つ のゲ一ト電極に挟まるように形成されたドレイン領域は、 ドレイン配線 Drain(2) に接続される。  As shown in the pattern diagram, the sense MOSFET (T2) is formed thick in the vertical direction by hatching, and a drain is formed so as to be sandwiched between a pair of source regions. A pair of gate electrodes shown in black is provided between the source region and the drain region. The two gate electrodes are commonly connected to the gate wiring Gate (2) on the lower side. The drain region formed so as to be sandwiched between the two gate electrodes is connected to a drain wiring Drain (2).
これに対して、 出力 MOSFET (T 1 ) は、 上記ソース, ドレイン 及びゲ一ト電極を 1つの単位として M組のソース, ドレイン及びゲート 電極が横方向に並べて配置される。 これにより、 ゲート, ソース間電圧 が同じときに MOSFET (T2) に流れるドレイン電流に対して、 M OSFET (T 1 ) に流れるドレイン電流は M倍にされる。 言い換える ならば、 出力 MOSFET (T 1 ) により出力される出力直流電流に対 してセンス用 MOSFET (T2) にはその 1 ZMの電流が流れるよう にされる。 上記出力 MOSFET (T 1 ) の出力直流電流は送信出力電 力に対応されたものであるので、 上記センス用 MOSFET (T2) に 流れるドレイン電流は、 上記送信出力電力に対応されたものとなる。 上記 MOSFET (T2) のソース領域と、 上記 MOSFET (T 1 ) の横方向に並べられた M組からなるソース領域とは共通に接続されて 回路の接地電位が与えられる。 On the other hand, the output MOSFET (T 1) is composed of M sets of source, drain and gate using the above source, drain and gate electrode as one unit. The electrodes are arranged side by side. As a result, the drain current flowing through the MOSFET (T 1) is multiplied by M times the drain current flowing through the MOSFET (T2) when the gate-source voltage is the same. In other words, the current of 1 ZM flows through the sensing MOSFET (T2) with respect to the output DC current output from the output MOSFET (T1). Since the output DC current of the output MOSFET (T1) corresponds to the transmission output power, the drain current flowing through the sensing MOSFET (T2) corresponds to the transmission output power. The source region of the MOSFET (T2) and the source region consisting of M groups arranged in the lateral direction of the MOSFET (T1) are connected in common, and the ground potential of the circuit is given.
第 8図には、 この発明に係る高周波電力増幅回路の他の一実施例の回 路図が示されている。 この実施例では、 センス感度が切り換えられるよ うにされる。 つまり、 前記図 7と同様な出力段アンプに対して、 センス 用 MOSFET (T 2) のドレイン配線 Drain(2) に接続されるセンス 抵抗を Rs 1と R s 2のように 2つの直列回路により構成し、 スィッチ を設けて、 上記抵抗 Rs 1と Rs 2との直列抵抗で発生した電圧、 ある いは抵抗 R s 1で発生した電圧をセンス信号として増幅回路に供給して 上記センス出力を得るようにするものである。  FIG. 8 is a circuit diagram of another embodiment of the high-frequency power amplifier circuit according to the present invention. In this embodiment, the sense sensitivity is switched. In other words, for the output stage amplifier similar to that of Fig. 7, the sense resistor connected to the drain wiring Drain (2) of the sensing MOSFET (T2) is connected by two series circuits as Rs1 and Rs2. A switch is provided, and the voltage generated by the series resistance of the resistors Rs1 and Rs2 or the voltage generated by the resistor Rs1 is supplied to the amplifier circuit as a sense signal to obtain the sense output. Is to do so.
出力 MOSFET (T 1 ) の出力パワーが小さい領域では、 それに伴 つてセンス用 MOSFET (T2) のドレインに流れる電流も小さくな る。 この場合には、 上記スィッチにより上記抵抗 R s 1と Rs 2の直列 回路で発生した大きな電圧をセンス電圧として取り込むようにする。 出力 MOSFET (T 1) の出力パワーが大きい領域では、 それに伴 つてセンス用 MOSFET (T2) のドレインに流れる電流も大きくな る。 この場合には、 上記スィッチにより上記抵抗 R s 1のみで発生した 電圧をセンス電圧として取り込むようにする。 このように出力パワーの - 大小に対応してセンス電圧の切り換えを行うようにすることにより、 高 感度でのセンス出力を形成することができる。 ただし、 上記のような抵 抗の切り換えにより、 パワーコントロール信号側もそれに対応したレべ ル切り換えが行われることはいうまでもない。 In a region where the output power of the output MOSFET (T 1) is small, the current flowing to the drain of the sensing MOSFET (T 2) also decreases accordingly. In this case, a large voltage generated in the series circuit of the resistors Rs1 and Rs2 by the switch is taken in as a sense voltage. In the region where the output power of the output MOSFET (T1) is large, the current flowing to the drain of the sensing MOSFET (T2) also increases accordingly. In this case, the above switch caused only the resistance R s 1 The voltage is taken in as a sense voltage. In this way, by switching the sense voltage according to the magnitude of the output power, a sense output with high sensitivity can be formed. However, it goes without saying that the level switching corresponding to the power control signal side is performed by the resistance switching as described above.
第 9図には、 この発明に係る高周波電力増幅回路の更に他の一実施例 の回路図が示されている。 この実施例においても、 センス感度が切り換 えられるようにされる。 つまり、 前記図 7と同様な出力段アンプに対し て、 2つのセンス用 MOSFET (T2) と (T2' ) が設けられる。  FIG. 9 shows a circuit diagram of still another embodiment of the high-frequency power amplifier circuit according to the present invention. Also in this embodiment, the sense sensitivity is switched. That is, two sense MOSFETs (T2) and (T2 ') are provided for the output stage amplifier similar to that of FIG.
これらのセンス用 MOSFET (T2) と (T2' ) のドレイン配線 D rain (2) と Drain(2' ) は共通にセンス抵抗を Rs 1に接続される。 上 記追加されたセンス用 MOSFET (Τ2' ) のゲートには、 ゲート入 力抵抗 R 3を介してスィツチにより前記利得制御用のバイアス電圧か、 回路の接地電位かに切り換えられる。 これにより、 上記 1つのセンス用 MOSFET (T 1 )で形成したセンス電流か、 あるいは上記センス用 MOSFET (Τ2' ) を追加して 2倍にしたセンス電流を得るように するものである。 The drains Drain (2) and Drain (2 ') of these MOSFETs for sensing (T2) and (T2') have a sense resistor commonly connected to Rs1. The gate of the added sensing MOSFET (# 2 ') is switched by a switch via the gate input resistor R3 to the gain control bias voltage or the circuit ground potential. As a result, the sense current formed by the one sensing MOSFET (T 1) or the sensing current doubled by adding the sensing MOSFET (Τ2 ′) is obtained.
出力 MOSFET (T 1) の出力パワーが小さい領域では、 それに伴 つてセンス用 MOSFET (T2) のドレインに流れる電流も小さくな る。 この場合には、 上記スィッチにより上記センス用 MOSFET (T 2' ) にもバイアス電圧を供給して上記のような 2倍のセンス電流を形 成するようにする。  In the region where the output power of the output MOSFET (T1) is small, the current flowing to the drain of the sensing MOSFET (T2) also decreases accordingly. In this case, a bias voltage is also supplied to the sensing MOSFET (T2 ') by the switch so as to generate a doubled sense current as described above.
出力 MOSFET (T 1 ) の出力パワーが大きい領域では、 それに伴 つてセンス用 MOSFET (T2) のドレインに流れる電¾!も大きくな る。 この場合には、 上記スィッチにより上記センス用 MOSFET (T 2' ) のゲートには回路の接地電位を供給してオフ状態にし、 上記セン ス用 MOSFET (T 2) のみで形成したセンス電流を上記センス抵抗 Rs 1に流すようにする。 このように出力パワーの大小に対応してセン ス電流の切り換えを行うようにすることにより、 高感度でのセンス出力 を形成することができる。 ただし、 前記同様に上記のようなセンス用 M OSFET (T 2' ) の切り換えにより、 パワーコントロール信号側も それに対応したレベル切り換えが行われることはいうまでもない。 In the region where the output power of the output MOSFET (T 1) is large, the power flowing through the drain of the sense MOSFET (T 2) increases accordingly. In this case, the ground potential of the circuit is supplied to the gate of the sensing MOSFET (T 2 ′) by the switch to turn off the sensing MOSFET (T 2 ′). The sense current formed only by the power MOSFET (T 2) flows through the sense resistor Rs 1. By switching the sense current in accordance with the magnitude of the output power in this way, a highly sensitive sense output can be formed. However, it is needless to say that the switching of the sensing MOS FET (T 2) as described above also causes the power control signal side to perform level switching corresponding thereto.
第 1 0図には、 この発明に係る高周波電力増幅回路の動作の一例を説 明するための出力パワーと検出電流の特性図が示されている。 この特性 図は、 前記第 8図及び第 9図の高周波電力増幅回路の動作説明に対応さ れたものであり、 センス抵抗 R s 2を直列に挿入するスィッチ R s又は センス用 MOSFET (Τ2' ) を追加するスィッチ Νにより、 小パヮ —領域でもセンス感度が大ノ、°ヮ一領域のときのように高感度に維持され る。  FIG. 10 is a characteristic diagram of output power and detection current for explaining an example of the operation of the high-frequency power amplifier circuit according to the present invention. This characteristic diagram corresponds to the description of the operation of the high-frequency power amplifier circuit shown in FIGS. 8 and 9 and includes a switch Rs in which a sense resistor Rs2 is inserted in series or a MOSFET for sensing (Τ2 ′ ), The sense sensitivity is maintained high even in a small power region, as in the case of a single region.
第 1 1図には、 この発明に係る高周波電力増幅回路の更に他の一実施 例の回路図が示されている。 この実施例では、 センス用 MOSFET ( T2) にも入力信号 P i nが供給される。 つまり、 出力 MOSFET ( T 1 ) とセンス用 MOSFET (T2) のゲートは共通接続され、 抵抗 R 1を介して利得制御用のバイアス電圧が与えられる。 そして、 入力信 号 P i nは、 カツプリングコンデンサ C 1を介して上記出力 MOSFE T (T 1)及びセンス用 MOSFET (T2) のゲートに供給される。 このため、 センス用 MOSFET (T2) のドレイン出力にも信号成分 が流れ、 それが上記センス抵抗 Rs 1に並列に設けられたキャパシ夕に より平滑され、 出力 MOSFET (T 1) のドレイン出力により近似さ れたセンス電圧を形成することができる。  FIG. 11 is a circuit diagram of still another embodiment of the high-frequency power amplifier circuit according to the present invention. In this embodiment, the input signal Pin is also supplied to the sensing MOSFET (T2). In other words, the gates of the output MOSFET (T 1) and the sensing MOSFET (T2) are connected in common, and a bias voltage for gain control is applied via the resistor R 1. Then, the input signal Pin is supplied to the output MOSFET (T1) and the gate of the sensing MOSFET (T2) via the coupling capacitor C1. For this reason, a signal component also flows to the drain output of the sensing MOSFET (T2), which is smoothed by the capacity provided in parallel with the sense resistor Rs1 and approximated by the drain output of the output MOSFET (T1). Thus, a sense voltage can be formed.
第 1 2図には、 この発明に係る高周波電力増幅回路の更に他の一実施 例のブロック図が示されている。 この実施例では、 高周波数電力増幅段 での高利得を得るために初段アンプ A 1、 次段アンプ A2及び出力段ァ - ンプ A 3からなる 3段アンプ構成にされる。 この場合、 初段アンプ A 1 と次段アンプ A 2は、 単なる増幅 MOSFETのみで構成され、 出力段 アンプ A3のみに上記出力 MOSFET (T 1 ) とセンス用 MOSFE T (T2) が設けられ、 かかる出力段アンプのセンス用 MOSFET ( T 2) からの検出信号に基づいて形成された利得制御用のバイアス電圧 が上記初段アンプ A 1、 次段アンプ A 2及び出力段アンプ A 3に共通に 供給される。 FIG. 12 is a block diagram showing still another embodiment of the high-frequency power amplifier circuit according to the present invention. In this embodiment, the high frequency power amplification stage In order to obtain a high gain in the amplifier, a three-stage amplifier configuration consisting of the first-stage amplifier A1, the second-stage amplifier A2, and the output-stage amplifier A3 is adopted. In this case, the first-stage amplifier A1 and the second-stage amplifier A2 are composed of simple amplification MOSFETs only, and the output MOSFET (T1) and the sensing MOSFET (T2) are provided only in the output-stage amplifier A3. The bias voltage for gain control formed based on the detection signal from the sensing MOSFET (T 2) of the stage amplifier is supplied to the first stage amplifier A 1, the second stage amplifier A 2, and the output stage amplifier A 3 in common. .
この構成では、 最もパワーの大きな出力段アンプでの出力センスとそ れに対応した電力制御により、 上記初段アンプ A 1、 次段アンプ A 2の プロセスバラツキを含めてた全体としてのパワーコントロールを行うよ うにすることができる。 なお、 上記初段アンプ A 1、 次段アンプ A 2を 構成する MOSFETは、 それぞれの出力信号は小さいからそれぞれの 出力に対応して MOSFETのサイズが決められるものである。  In this configuration, the overall power control including the process variation of the first-stage amplifier A1 and the next-stage amplifier A2 is performed by the output sense of the output stage amplifier with the highest power and the corresponding power control. You can do it. Since the output signals of the MOSFETs constituting the first-stage amplifier A1 and the second-stage amplifier A2 are small, the size of the MOSFET is determined in accordance with each output.
第 1 3図には、 この発明に係る移動通信機器の一実施例の全体ブロッ ク図が示されている。 上記移動通信機器は最も代表的な例が形態電話機 である。  FIG. 13 is an overall block diagram of one embodiment of the mobile communication device according to the present invention. The most typical example of the mobile communication device is a mobile phone.
アンテナで受信された受信信号は、 受信フロントェンドにおいて増幅 され、 ミクサにより中間周波に変換され、 中間信号処理回路 I F— I C を通して音声処理回路に伝えられる。 上記受信信号に周期的に含まれる 利得制御信号は、 特に制限されないが、 マイクロプロセッサ CPUにお いてデコ一ドされて、 ここで前記のような時分割に対応したパルスデュ —ティからなるパワーコントロール信号が形成されて、 この発明に係る 前記のような高周波の電力増幅器に伝えられて、 送信出力の電力制御が 行われる。  The reception signal received by the antenna is amplified in the reception front-end, converted into an intermediate frequency by the mixer, and transmitted to the audio processing circuit through the intermediate signal processing circuit IF-IC. The gain control signal periodically included in the received signal is not particularly limited, but is decoded in the microprocessor CPU, and is a power control signal including a pulse duty corresponding to the time division as described above. Is formed and transmitted to the high-frequency power amplifier as described above according to the present invention, and power control of the transmission output is performed.
周波数シンセサイザは、 基準発振回路 T CXOと電圧制御発振回路 V C O及び P L Lループによって受信周波数に対応した発振信号を形成し - 、 一方において受信フロントエンドのミクサに伝えられる。 上記発振信 号は、 他方において変調器に供給される。 The frequency synthesizer consists of a reference oscillator circuit T CXO and a voltage-controlled oscillator circuit V An oscillation signal corresponding to the reception frequency is formed by the CO and PLL loops, while being transmitted to the reception front-end mixer. The oscillating signal is, on the other hand, supplied to a modulator.
上記音声処理回路では、 受信信号はレシーバを駆動して音声信号が出 力される。 送信音声は、 マイクロホンで電気信号に変換され、 音声処理 回路と変復調器を通して変調器に伝えられる。  In the above audio processing circuit, the received signal drives the receiver to output an audio signal. The transmitted voice is converted into an electrical signal by a microphone and transmitted to the modulator through a voice processing circuit and a modem.
上記の実施例から得られる作用効果は、 下記の通りである。  The operational effects obtained from the above embodiment are as follows.
( 1 ) 第 1の増幅素子と、 上記第 1の増幅素子と同じ構造で、 その素 子サイズが 1 /Mに小さく形成された第 2増幅素子とを用い、 パワーコ ントロール回路から上記第 1の増幅素子と第 2の増幅素子に対して同じ バイァス電圧を供給し、 上記第 2の増幅素子の出力端子から出力される 出力電流に基づいて上記第 1の増幅素子の電力出力を判定することによ り、 高い送信効率を実現しつつ、 広い電力範囲にわたり高精度での電力 検出を可能にした高周波増幅回路を得ることができるという効果が得ら れる。  (1) Using a first amplifying element and a second amplifying element having the same structure as the above-mentioned first amplifying element and having a smaller element size of 1 / M, The same bias voltage is supplied to the amplification element and the second amplification element, and the power output of the first amplification element is determined based on the output current output from the output terminal of the second amplification element. As a result, it is possible to obtain a high-frequency amplifier circuit that enables high-precision power detection over a wide power range while realizing high transmission efficiency.
( 2 ) 上記第 1の増幅素子を複数個とし、 上記 、。ヮ一コントロール回 路のコントロール信号に対応して並列形態で動作状態にされる第 1の増 幅素子の数を増減させるようにすることにより、 高効率で広し、出力パヮ —範囲をカバーできる高周波電力増幅回路を得ることができるという効 果が得られる。  (2) A plurality of the first amplifying elements are provided.数 By increasing or decreasing the number of first amplifiers that are operated in parallel in response to the control signal of one control circuit, it is possible to widen the output with high efficiency and cover the output power range. The effect that a high frequency power amplifier circuit can be obtained is obtained.
( 3 ) 上記第 1の増幅素子はサイズが異なる複数個からなり、 上記パ ヮーコントロール回路のコントロール信号に対応した出力制御信号に対 応して複数個の中の 1つを選択的に動作状態にされることにより、 高効 率で広い出力パワー範囲をカバーできる高周波電力増幅回路を得ること ができるという効果が得られる。  (3) The first amplifying element is composed of a plurality of pieces having different sizes, and one of the plurality is selectively operated according to an output control signal corresponding to the control signal of the power control circuit. By doing so, it is possible to obtain an effect that a high-frequency power amplifier circuit that can cover a wide output power range with high efficiency can be obtained.
( ) 上記第 2の増幅素子は、 上記第 1の増幅素子に一対一に対応し た複数個とし、 上記パワーコントロール回路からのコントロール信号に 対応して上記動作状態にされる第 1の増幅素子に従った複数個を並列形 態にしてセンス出力を得るようにすることにより、 出力パワーの切り換 えに対応したセンス出力を得ることができるという効果が得られる。 ( 5 ) 上記第 2の増幅素子は、 上記第 1の増幅素子に一対一に対応し た複数個からなり、 上記パワーコントロール回路からのコントロール信 号により上記動作状態にされる 1つの第 1の増幅素子に対応したものを 動作状態にすることにより、 出力パワーの切り換えに対応したセンス出 力を得ることができるという効果が得られる。 () The second amplifying element has a one-to-one correspondence with the first amplifying element. A plurality of the plurality of the plurality of the first amplifying elements which are brought into the above-mentioned operation state in response to the control signal from the above-mentioned power control circuit are arranged in parallel to obtain a sense output. The effect is obtained that a sense output corresponding to the power switching can be obtained. (5) The second amplifying element is composed of a plurality corresponding to the first amplifying element in a one-to-one correspondence, and one of the first amplifying elements is set to the operation state by a control signal from the power control circuit. By bringing the element corresponding to the amplifying element into the operating state, it is possible to obtain the effect that a sense output corresponding to the switching of the output power can be obtained.
( 6 ) 上記第 1の増幅素子と第 2の増幅素子とを同じ半導体基板上に 形成することによってプロセスバラツキの影響を受けないで高い精度で のセンス出力を得ることができるという効果が得られる。  (6) By forming the first and second amplifying elements on the same semiconductor substrate, it is possible to obtain an effect that a highly accurate sense output can be obtained without being affected by process variations. .
( 7 ) 上記第 2の増幅素子の出力端子から出力される出力電流を、 出 力電流検出感度切り換え信号によりスイツチ制御されるスィッチにより 複数の直列抵抗に選択的に流れるようにすることにより、 小パワー領域 でもセンス感度が大ノ ヮー領域のときのように高感度に維持させること ができるという効果が得られる。  (7) The output current output from the output terminal of the second amplifier element is selectively switched to a plurality of series resistors by a switch that is switch-controlled by the output current detection sensitivity switching signal, thereby reducing The effect that the high sensitivity can be maintained in the power region as in the case of the large noise region can be obtained.
( 8 ) 上記第 2の増幅素子の出力端子を共通化した複数個とし、 出力 電流感度切り換え信号によりスィッチ制御されるスィッチにより上記コ ントロール信号が選択的に供給することにより、 小パワー領域でもセン ス感度が大パワー領域のときのように高感度に維持させることができる という効果が得られる。  (8) The second amplifier element has a plurality of common output terminals, and the control signal is selectively supplied by a switch that is switch-controlled by an output current sensitivity switching signal. The effect is that the sensitivity can be maintained at a high level as in the case of a large power range.
( 9 ) 上記第 2の増幅素子の入力端子に、 上記第 1の増幅素子の入力 に供給される入力信号も供給し、 上記第 2の増幅素子の出力電流を上記 入力信号を直流化したものも加えて検出電流とすることにより、 より高 レ、精度でのパワー制御が可能になるという効果が得られる。 ( 10) 上記第 1の増幅素子には、 その前段に 1ないし複数の増幅素子 - が縦列形態に接続されてなる多段増幅回路の出力段アンプを構成し、 上 記第 2の増幅素子は上記出力段アンプを構成する第 1のの増幅素子に対 応して設け、 上記パワーコントロール回路より形成されるコントロール 信号は、 上記縦列形態に接続された各段の増幅アンプを構成する増幅素 子に対して共通に供給することにより、 簡単な構成で前段回路のプロセ スバラツキを含めて出力パワーの制御を行うようにすることができると いう効果が得られる。 (9) An input signal supplied to the input terminal of the first amplifier element is also supplied to the input terminal of the second amplifier element, and the output current of the second amplifier element is converted to a direct current of the input signal. In addition, by using the detection current, it is possible to obtain an effect that higher-precision and more accurate power control becomes possible. (10) The first amplifying element constitutes an output stage amplifier of a multi-stage amplifying circuit in which one or a plurality of amplifying elements-are connected in cascade at the preceding stage, and the second amplifying element is The control signal formed by the power control circuit is provided corresponding to the first amplification element constituting the output stage amplifier, and the control signal formed by the power control circuit is supplied to the amplification element constituting each stage of the amplification amplifier connected in the cascade configuration. By providing a common supply, the output power can be controlled with a simple configuration including the process variation of the preceding circuit.
(11) 上記第 1と第 2の増幅素子として、 高周波 MO S F E Tを用い ることにより、 G a A s ME S F E Tを用いるような負電圧が不必要で あり、 取扱レ、が簡単でしかもリチウムィォン電池のような低電圧での動 作も可能になるという効果が得られる。  (11) By using high-frequency MOS FETs as the first and second amplifying elements, it is not necessary to use a negative voltage as in the case of using GaAs ME SFETs, handling is simple, and lithium ion is used. The effect that operation at a low voltage like a battery becomes possible is obtained.
(12) 電池電圧で動作する高周波電力増幅回路にこの発明を適用する ことにより、 電池寿命を長くすることができる、 言い換えるならば、 1 回の充電での通信時間を長くすることができるという効果が得られる。  (12) By applying the present invention to a high-frequency power amplifier circuit that operates on battery voltage, the battery life can be prolonged, in other words, the communication time per charge can be prolonged. Is obtained.
(13) この発明に係る高周波電力増幅回路を基地局からの受信信号に 含まれる制御信号により制御し、 上記高周波電力増幅回路を含む送受信 回路や制御回路のような電子回路を電池で動作させることにより、 1回 の充電での通信時間を長くした移動通信機器を得ることができるという 効果が得られる。  (13) A high-frequency power amplifier circuit according to the present invention is controlled by a control signal included in a received signal from a base station, and an electronic circuit such as a transmission / reception circuit or a control circuit including the high-frequency power amplifier circuit is operated by a battery. As a result, it is possible to obtain a mobile communication device having a longer communication time per charge.
(14) 上記電池としてリチウムイオン電池を用いることにより、 小型 軽量で 1回の充電での通信時間を長くした移動通信機器を得ることがで きるという効果が得られる。 以上本発明者よりなされた発明を実施例に基づき具体的に説明したが 、 本願発明は前記実施例に限定されるものではなく、 その要旨を逸脱し ない範囲で種々変更可能であることはいうまでもない。 ディジタル携帯 電話機は、 C DMA (符号分割多重元接続) 方式のように基地局からの 制御信号によって出力電力が制御されるものであれば何であってもよい 。 例えば、 C D MA方式においても基地局から携帯電話機に対して緻密 にフィードバック制御することでパワーコントロールが行われる。 この 他、 出力電力の制御がそれほど重要でない例えば I S— 1 3 6方式、 A M P S方式等のものでも、 この発明に係る高周波電力増幅回路を用いる ことにより、 高効率化での送信動作を行わせることができる。 移動通信 機器は、 電話機のように音声信号を送受信するものの他、 ディジタル信 号を音声信号周波数帯の信号に変換し、 ディジタル電話交換網を利用し てパーソナルコンピュータや他の同様な移動通信機器との間でのディジ タル信号の送受信を行うものであってもよい。 産業上の利用可能性 (14) By using a lithium-ion battery as the above-mentioned battery, it is possible to obtain a mobile communication device that is small and lightweight and has a long communication time per charge. Although the invention made by the inventor has been specifically described based on the embodiment, the invention of the present application is not limited to the embodiment, and may deviate from the gist of the invention. Needless to say, various changes can be made within the range that does not exist. The digital mobile phone may be of any type as long as the output power is controlled by a control signal from a base station, such as a CDMA (Code Division Multiple Access) system. For example, even in the CDMA system, power control is performed by performing precise feedback control from a base station to a mobile phone. In addition, even when the control of the output power is not so important, for example, in the IS-136 system, the AMPS system, etc., the transmission operation with high efficiency can be performed by using the high-frequency power amplifier circuit according to the present invention. Can be. In addition to transmitting and receiving voice signals like telephones, mobile communication devices convert digital signals into signals in the voice signal frequency band and use the digital telephone switching network to communicate with personal computers and other similar mobile communication devices. A digital signal may be transmitted and received between the devices. Industrial applicability
以上のように、 この発明は、 高周波電力増幅回路とそれを用いた移動 通信機器に広く利用できる。  INDUSTRIAL APPLICABILITY As described above, the present invention can be widely used for high-frequency power amplifier circuits and mobile communication devices using the same.

Claims

請 求 の 範 囲 - The scope of the claims -
1 . 第 1の増幅素子と、 1. a first amplifying element;
上記第 1の増幅素子と同じ構造で、 その素子サイズが 1 ZMに小さ く形成された第 2増幅素子と、  A second amplifying element having the same structure as that of the first amplifying element and having an element size as small as 1 ZM;
上記第 1の増幅素子と第 2の増幅素子に対して同じバイアス電圧を 供給するパワーコントロール回路と、  A power control circuit for supplying the same bias voltage to the first amplification element and the second amplification element,
上記第 2の増幅素子の出力端子から出力される出力電流に基づレ、て 上記第 1の増幅素子の電力出力を判定してなることを特徴とする高周波 電力増幅回路。  A high-frequency power amplifier circuit comprising: determining a power output of the first amplifier element based on an output current output from an output terminal of the second amplifier element.
2 . 上記第 1の増幅素子は複数個からなり、 上記パワーコントロール回 路のコントロール信号に対応して並列形態で動作状態にされる第 1の増 幅素子の数が増減させられるものであることを特徴とする請求の範囲第 2. The first amplifying element is composed of a plurality of elements, and the number of the first amplifying elements to be operated in a parallel mode corresponding to the control signal of the power control circuit is increased or decreased. Claims characterized by
1項記載の高周波電力増幅回路。 The high-frequency power amplifier circuit according to claim 1.
3 . 上記第 1の増幅素子はサイズが異なる複数個からなり、 上記パワー コントロール回路のコントロール信号に対応した出力制御信号に対応し て複数個の中の 1つが選択されて動作状態にされるものであることを特 徵とする請求の範囲第 1項記載の高周波電力増幅回路。  3. The first amplifying element has a plurality of different sizes, and one of the plurality is selected and activated in response to an output control signal corresponding to the control signal of the power control circuit. 2. The high-frequency power amplifier circuit according to claim 1, wherein:
4 . 上記第 2の増幅素子は、 上記第 1の増幅素子に一対一に対応した複 数個からなり、 上記パワーコントロール回路からのコントロール信号に 対応して上記動作状態にされる第 1の増幅素子に従った複数個が並列形 態に動作状態にされるものであることを特徴とする請求の範囲第 2項記 載の高周波電力増幅回路。  4. The second amplifying element comprises a plurality of one-to-one correspondences with the first amplifying element, and the first amplifying element is brought into the operating state in response to a control signal from the power control circuit. 3. The high-frequency power amplifier circuit according to claim 2, wherein a plurality of the elements according to the elements are operated in a parallel state.
5 . 上記第 2の増幅素子は、 上記第 1の増幅素子に一対一に対応した複 数個からなり、 上記パワーコントロール回路からのコントロール信号に より上記動作状態にされる 1つの第 1の増幅素子に対応したものが動作 状態にされるものであることを特徴とする請求の範囲第 3項記載の高周 - 波電力増幅回路。 5. The second amplifying element includes a plurality of ones corresponding to the first amplifying element in a one-to-one correspondence, and one first amplifying element that is brought into the above-described operation state by a control signal from the power control circuit. The one corresponding to the element operates 4. The high-frequency power amplifier circuit according to claim 3, wherein the high-frequency power amplifier circuit is placed in a state.
6 . 上記第 1の増幅素子と第 2の増幅素子とは同じ半導体基板上に形成 されてなるものであることを特徴とする請求の範囲第 4項記載の高周波 電力増幅回路。  6. The high-frequency power amplifier circuit according to claim 4, wherein the first amplifier element and the second amplifier element are formed on the same semiconductor substrate.
7 . 上記第 1の増幅素子と第 2の増幅素子とは同じ半導体基板上に形成 されてなるものであることを特徴とする請求の範囲第 5項記載の高周波 電力増幅回路。  7. The high-frequency power amplifier circuit according to claim 5, wherein the first amplifier element and the second amplifier element are formed on the same semiconductor substrate.
8 . 上記第 2の増幅素子の出力端子から出力される出力電流は、 出力電 流検出感度切り換え信号によりスィツチ制御されるスィツチにより複数 の直列抵抗に選択的に流れるようにされるものであることを特徴とする 請求の範囲第 1項記載の高周波電力増幅回路。  8. The output current output from the output terminal of the second amplifying element is to be selectively passed through a plurality of series resistors by a switch that is switch-controlled by an output current detection sensitivity switching signal. The high-frequency power amplifier circuit according to claim 1, wherein:
9 . 上記第 2の増幅素子は出力端子が共通化された複数個からなり、 出 力電流感度切り換え信号によりスイツチ制御されるスィッチにより上記 コントロール信号が選択的に供給されることを特徴とする請求の範囲第 1項記載の高周波電力増幅回路。  9. The second amplifying element comprises a plurality of common output terminals, and the control signal is selectively supplied by a switch which is switch-controlled by an output current sensitivity switching signal. 2. The high frequency power amplifier circuit according to claim 1, wherein:
10. 上記第 2の増幅素子の入力端子には、 上記第 1の増幅素子の入力に 供給される入力信号も供給され、 上記第 2の増幅素子の出力電流は上記 入力信号を直流化して検出電流とするものであることを特徴とする請求 の範囲第 1項記載の高周波電力増幅回路。  10. The input signal supplied to the input of the first amplifier is also supplied to the input terminal of the second amplifier, and the output current of the second amplifier is detected by converting the input signal to DC. The high-frequency power amplifier circuit according to claim 1, wherein the high-frequency power amplifier circuit is a current.
1 1. 上記第 1の増幅素子は、 その前段に 1ないし複数の増幅素子が縦列 形態に接続されて多段増幅回路の出力段アンプを構成するものであり、 上記第 2の増幅素子は上記出力段ァンプを構成する第 1のの増幅素 子に対応して設けられ、  1 1. The first amplifying element is configured such that one or more amplifying elements are connected in a cascade form at the preceding stage to form an output stage amplifier of a multi-stage amplifying circuit. Provided corresponding to the first amplification element constituting the step-
上記パワーコントロール回路より形成されるコントロール信号は、 上記縦列形態に接続された各段の増幅アンプを構成する増幅素子に対し て共通に供給されるものであることを特徴とする請求の範囲第 1項記載 - の高周波電力増幅回路。 The control signal formed by the power control circuit is applied to the amplification elements constituting the amplification amplifiers of each stage connected in the cascade form. 2. The high-frequency power amplifier circuit according to claim 1, wherein the high-frequency power amplifier circuit is supplied in common.
12. 上記第 1と第 2の増幅素子は、 MO S F E Tであることを特徴とす る請求項 1の高周波電力増幅回路。  12. The high-frequency power amplifier circuit according to claim 1, wherein the first and second amplifying elements are MOS FETs.
13. 上記第 1の増幅素子は、 電池電圧により動作させられるものである ことを特徴とする請求項 1の高周波電力増幅回路。 13. The high-frequency power amplifier circuit according to claim 1, wherein the first amplifier element is operated by a battery voltage.
14. 第 1の増幅素子と、 上記第 1の増幅素子と同じ構造で、 その素子サ ィズが 1 ZMに小さく形成された第 2増幅素子と、 上記第 1の増幅素子 と第 2の増幅素子に対して同じバイアス電圧を供給するパワーコント口 ール回路と、 上記第 2の増幅素子の出力端子から出力される出力電流に 基づいて上記第 1の増幅素子の電力出力を判定してなる高周波電力増幅 回路と、  14. A first amplifying element, a second amplifying element having the same structure as the above-mentioned first amplifying element, and having a smaller element size of 1 ZM, and a first amplifying element and a second amplifying element. A power control circuit for supplying the same bias voltage to the element, and a power output of the first amplifier element is determined based on an output current output from an output terminal of the second amplifier element. A high frequency power amplifier circuit,
基地局からの受信信号に含まれる制御信号により上記ノ、'ヮ一コント ロール回路に対して出力電力の制御を指示する制御回路と、  A control circuit that instructs the control circuit to control output power by a control signal included in a received signal from the base station;
上記高周波電力増幅回路及び上記制御回路む電子回路に動作電圧を 供給する充電可能にされた電池とを備えてなることを特徴とする移動通 信機器。  A mobile communication device comprising: the high-frequency power amplifier circuit; and a chargeable battery that supplies an operation voltage to an electronic circuit including the control circuit.
15. 上記電池は、 リチウムイオン電池であることを特徴とする請求の範 囲第 1 4項記載の移動通信機器。  15. The mobile communication device according to claim 14, wherein the battery is a lithium ion battery.
PCT/JP1997/004356 1997-11-28 1997-11-28 High frequency power amplifying circuit, and mobile communication apparatus using it WO1999029037A1 (en)

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